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Active solid-state devices (e.g., transistors, solid-state diodes) March listing by industry category 03/10

20100072445 - Memory cell that includes a carbon nano-tube reversible resistance-switching element and methods of forming the same: Methods of forming planar carbon nanotube (“CNT”) resistivity-switching materials for use in memory cells are provided, that include depositing first dielectric material, patterning the first dielectric material, etching the first dielectric material to form a feature within the first dielectric material, depositing CNT resistivity-switching material over the first dielectric material... Agent: Dugan & Dugan, PC

20100072446 - Phase-change semiconductor device and methods of manufacturing the same: In a phase-change semiconductor device and methods of manufacturing the same, an example method may include forming a metal layer pattern on a substrate, the metal layer pattern including an opening that exposes a portion of the substrate, forming an etch stop layer on the metal layer pattern, a sidewall... Agent: Harness, Dickey & Pierce, P.L.C

20100072447 - Phase change memory cell having interface structures with essentially equal thermal impedances and manufacturing methods: A memory device as described herein includes a memory member contacting first and second interface structures. The first interface structure electrically and thermally couples the memory member to access circuitry and has a first thermal impedance therebetween. The second interface structure electrically and thermally couples the memory member to a... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20100072452 - Non-volatile memory device: Provided is a non-volatile memory device having a stacked structure that is easily highly integrated and a method of economically fabricating the non-volatile memory device. The non-volatile memory device may include at least one first electrode and at least one second electrode that cross each other. At least one data... Agent: Harness, Dickey & Pierce, P.L.C

20100072450 - Phase change memory device with heater electrodes having fine contact area and method for manufacturing the same: A phase change memory device includes a semiconductor substrate having a conductive region, a heater electrode formed on the semiconductor substrate and including a connection element which is composed of carbon nanotubes electrically connected with the conductive region, and a phase change pattern layer contacting the connection element of the... Agent: Ladas & Parry LLP

20100072448 - Planar programmable metallization memory cells: Programmable metallization memory cells that have an inert electrode and an active electrode positioned in a non-overlapping manner in relation to a substrate. A fast ion conductor material is in electrical contact with and extends from the inert electrode to the active electrode, the fast ion conductor including superionic clusters... Agent: Campbell Nelson Whipps, LLC

20100072449 - Rram with improved resistance transformation characteristic and method of making the same: A method for fabricating an RRAM is provided. First, a bottom electrode is formed. A resistive layer is formed on the bottom electrode. A top electrode is then formed on the resistive layer, wherein the top electrode is selected from the group consisting of indium tin oxide (ITO) and indium... Agent: North America Intellectual Property Corporation

20100072451 - Semiconductor device: A recording layer 52 made of a chalcogenide material which stores a high-resistance state of a high electrical resistance value and a low-resistance state of a low electrical resistance value is used as a memory element RM in a memory cell region, and it is formed so that a concentration... Agent: Mattingly & Malur, P.C.

20100072454 - Exposure method, and semiconductor device: An exposure method includes an exposure process for exposing a substrate through a halftone mask with quadrupole illumination to form plural columnar portions that are disposed into a matrix shape in a first direction and a second direction orthogonal to the first direction. The halftone mask includes a first pattern... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100072453 - Phase-changeable fuse elements and memory devices containing phase-changeable fuse elements and memory cells therein: Non-volatile memory devices include an array of phase-changeable memory cells, which have first phase-changeable material patterns therein, and at least one phase-changeable fuse element. This phase-changeable fuse element includes a second phase-changeable material pattern therein with a higher crystallization temperature relative to the first phase-changeable material patterns in the array... Agent: Myers Bigel Sibley & Sajovec

20100072455 - Well-structure anti-punch-through microwire device: A well-structure anti-punch-through microwire device and associated fabrication method are provided. The method initially forms a microwire with alternating highly and lightly doped cylindrical regions. A channel ring is formed external to the microwire outer shell and surrounding a first dopant well-structure region in the microwire, between source and drain... Agent: Sharp Laboratories Of America, Inc. C/o Law Office Of Gerald Maliszewski

20100072456 - Opto-electronic read head: A read head for a scale reading apparatus, the head including a light source and an array of photodetector elements, wherein said light source and array of photodetector elements are fabricated in a lattice matched semiconductor compound.... Agent: Oliff & Berridge, PLC

20100072457 - Light-receiving device: A light-receiving element device capable of receiving near infrared to mid-infrared light of 1.7 μm-3.5 μm is provided. A substrate is formed of InP, and a superlattice light-receiving layer is formed of a superlattice of a type 2 junction formed by alternately being stacked a falling layer of a Group... Agent: Venable LLP

20100072458 - Methods for sorting nanotubes by wall number: The present teachings provide methods for sorting nanotubes according to their wall number, and optionally further in terms of their diameter, electronic type, and/or chirality. Also provided are highly enriched nanotube populations provided thereby and articles of manufacture including such populations.... Agent: K&l Gates LLP

20100072460 - Nanoelectronic device: An electronic device and method of manufacturing the device. The device includes a semiconducting region, which can be a nanowire, a first contact electrically coupled to the semiconducting region, and at least one second contact capacitively coupled to the semiconducting region. At least a portion of the semiconducting region between... Agent: Ibm Corporation, T.j. Watson Research Center

20100072459 - Nonvolatile nanotube programmable logic devices and a nonvolatile nanotube field programmable gate array using same: Field programmable device (FPD) chips with large logic capacity and field programmability that are in-circuit programmable are described. FPDs use small versatile nonvolatile nanotube switches that enable efficient architectures for dense low power and high performance chip implementations and are compatible with low cost CMOS technologies and simple to integrate.... Agent: Wilmerhale/boston

20100072461 - Thermo-electric semiconductor device and method for manufacturing the same: A thermo-electric semiconductor device is provided. The thermo-electric semiconductor device includes: a first electrode layer; a spacer layer formed on the first electrode layer and having a plurality of pillars with a uniform height, the plurality of pillars thermally grown and protruded on a surface of the spacer layer; and... Agent: Cantor Colburn, LLP

20100072463 - Laminate structure and its manufacturing method: A disclosed laminate structure is capable of having its surface free energy changed with a small amount of UV irradiation. The invention also discloses a method of manufacturing the laminate structure; an electronic device having the laminate structure; an electronic device array having a plurality of the electronic devices; and... Agent: Cooper & Dunham, LLP

20100072464 - Organic thin-film transistor substrate, its manufacturing method, image display panel, and its manufacturing method: The present invention is a method for manufacturing an organic thin-film transistor substrate including an organic thin-film transistor as a transistor element, and an object of the invention is to provide a manufacturing method capable of forming a bank in a smaller number of steps. The method for manufacturing the... Agent: Sughrue Mion, PLLC

20100072462 - Planarizing agents and devices: Use of certain materials in hole injection layer and/or hole transport layer can improve operational lifetimes in organic devices. Polymers having fused aromatic side groups such as polyvinylnaphthol polymers can be used in conjunction with conjugated polymers. Inks can be formulated and cast as films in organic electronic devices including... Agent: Foley And Lardner LLP Suite 500

20100072465 - Barium copper sulfur fluoride transparent conductive thin films and bulk material: The present invention is generally directed to a bulk barium copper sulfur fluoride (BCSF) material made by combining Cu2S, BaS and BaF2, heating the ampoule between 400 and 550 ° C. for at least two hours, and then heating the ampoule at a temperature between 550 and 950 ° C.... Agent: Naval Research Laboratory Associate Counsel (patents)

20100072466 - Electronic circuit with repetitive patterns formed by shadow mask vapor deposition and a method of manufacturing an electronic circuit element: An electronic circuit with repetitive patterns formed by shadow mask vapor deposition includes a repetitive pattern of electronic circuit elements formed on a substrate. Each electronic circuit element includes the following elements in the desired order of deposition: a first semiconductor segment, a second semiconductor segment, a first metal segment,... Agent: The Webb Law Firm, P.C.

20100072468 - Display device: A display device includes a pixel portion in which a pixel electrode layer is arranged in a matrix, and an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen is provided corresponding to the pixel electrode layer.... Agent: Eric Robinson

20100072470 - Display device: A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, a channel protective layer overlapping with a channel formation region of the first oxide semiconductor... Agent: Eric Robinson

20100072471 - Display device: A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, and a first wiring layer and a second wiring layer whose end portions overlap with... Agent: Eric Robinson

20100072469 - Display device and manufacturing method of the same: To provide a structure suitable for a common connection portion provided in a display panel. A common connection portion provided in an outer region of a pixel portion has a stacked structure of an insulating layer formed using the same layer as a gate insulating layer, an oxide semiconductor layer... Agent: Eric Robinson

20100072467 - Semiconductor device: A display device includes a pixel portion in which a pixel is arranged in a matrix, the pixel including an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen and having a channel protective layer over a... Agent: Eric Robinson

20100072472 - Nanostructures with 0, 1, 2, and 3 dimensions, with negative differential resistance and method for making these nanostructures: Nanostructures with 0, 1, 2 and 3 dimensions, with negative differential resistance and method for making these nanostructures. A nanostructure according to the invention may notably be used in nanoelectronics. It comprises at least one structure (32) or at least one plurality of said at least one structure, at the... Agent: Nixon Peabody LLP

20100072473 - Tack adhesion testing device: A tack adhesion testing device for quantitatively measuring tack adhesion between a material and an object with a planar surface for contact with the material. The device has a material mount for mounting a quantity of the material such that the quantity of material presents an exposed flat face, an... Agent: Silverbrook Research Pty Ltd

20100072475 - Self-aligned masks using multi-temperature phase-change materials: A method of forming a pattern includes forming a first layer on a substrate, forming a second layer on the first layer, depositing a multi-temperature phase-change material on the second layer, patterning the second layer using the multi-temperature phase-change material as a mask, reflowing the multi-temperature phase-change material, and patterning... Agent: Marger Johnson & Mccollom/parc

20100072474 - Semiconductor device: A semiconductor device including a memory cell is provided. The memory cell comprises a transistor, a memory element and a capacitor. One of first and second electrodes of the memory element and one of first and second electrodes of the capacitor are formed by a same metal film. The metal... Agent: Cook Alex Ltd

20100072478 - Flat panel display: A flat panel display that can prevent a voltage drop of a driving power and, at the same time, minimizes the characteristic reduction of electronic devices located in a circuit region where various circuit devices are located includes: a substrate; an insulating film arranged on the substrate; a pixel region... Agent: Robert E. Bushnell & Law Firm

20100072479 - Lcd pixel array structure: Only five photomasks are used to fabricate a LCD pixel array structure. A gate dielectric layer of the LCD pixel array structure is formed by two deposition steps to increase the storage capacity of the storage capacitor.... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100072477 - Liquid crystal display device: A liquid crystal display device includes a first substrate and a second substrate facing each other having a pixel region; a color filter layer on the first substrate corresponding to the pixel region; a planarization layer on the color filter layer having a groove; a common electrode on the planarization... Agent: Mckenna Long & Aldridge LLP

20100072476 - Pixel structure, display panel, photoelectric device and manufacturing method thereof: A pixel structure includes a substrate, a first and a second patterned conductive layers, and a pixel electrode. The first patterned conductive layer, disposed on the substrate, includes at least one scan line, at least one gate, and at least one common electrode line. The second patterned conductive layer, disposed... Agent: Jianq Chyun Intellectual Property Office

20100072480 - Thin film transistor and method of manufacturing the same: A thin film transistor (TFT) and a method of manufacturing the same are provided, the TFT including a gate insulating layer on a gate. A channel may be formed on a portion of the gate insulating layer corresponding to the gate. A metal material may be formed on a surface... Agent: Harness, Dickey & Pierce, P.L.C

20100072481 - Method and resulting structure using silver for lcos devices: A method for fabricating an LCOS device. The method includes providing a semiconductor substrate and forming a plurality of MOS transistor devices formed on a portion of the semiconductor substrate. The method includes forming a first dielectric layer overlying the plurality of transistor devices and forming a first metal layer... Agent: Townsend And Townsend And Crew, LLP

20100072482 - Organic light emitting display and method of manufacturing the same: Disclosed are an organic light emitting display and a method of manufacturing the same. The organic light emitting includes a first substrate, a first electrode, an organic light emitting layer, and a second electrode. The first substrate includes a pixel region showing an image and a peripheral region surrounding the... Agent: H.c. Park & Associates, PLC

20100072483 - Thin film transistor array panel and method for manufacturing the same: A thin film transistor array panel according to the present invention includes: a gate line formed on a substrate and including a gate electrode; a gate insulating layer formed on the gate electrode; a mold layer formed on the gate insulating layer and having an opening overlapping the gate electrode;... Agent: Haynes And Boone, LLPIPSection

20100072484 - Heteroepitaxial gallium nitride-based device formed on an off-cut substrate: Embodiments include but are not limited to apparatuses and systems including a heteroepitaxial gallium nitride-based device formed on an off-cut substrate, and methods for making the same. Other embodiments may be described and claimed.... Agent: Schwabe Williamson & Wyatt Pacwest Center, Suite 1900

20100072485 - Semiconductor device and semiconductor manufacturing method: One atomic layer of Si atoms 3 is grown on an Si-terminated SiC surface 1a having an Si polar face, and one atomic layer of C atoms 5 is further grown thereon. Then, Si and C are supplied to form an SiC layer. The surface of the SiC layer thus... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC

20100072486 - Wavelength converting elements with reflective edges: A light emitting device (1) is provided and comprises a light emitting diode (2) and a self-supporting wavelength converting element (3) arranged to receive at least part of the light emitted by said light emitting diode (2). The wavelength converting element has a flat light receiving surface (4), a light... Agent: Philips Intellectual Property & Standards

20100072487 - Light emitting diode, package structure and manufacturing method thereof: A light emitting diode (LED), a fabricating method thereof, and a package structure thereof are provided. The LED includes a substrate, a first semiconductor layer disposed on the substrate, an active layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the active layer, a current distribution... Agent: Jianq Chyun Intellectual Property Office

20100072493 - Active matrix substrate: In an active matrix substrate (100) of the present invention, a gate bus line (105) and a gate electrode (166) extend in the first direction (the x direction). At a contact portion (168) for electrically connecting the gate bus line (105) with the drain regions of a first-conductivity-type transistor section... Agent: Birch Stewart Kolasch & Birch

20100072491 - Led chip module: A LED chip module comprises a base board comprising a PCB circuit therein; and a LED chip mounting on the base board comprising a supporting frame comprising a case having a peripheral wall defining an inner room therein, and a plurality of pairs of pins provided at both sides of... Agent: David And Raymond Patent Firm

20100072488 - Led with controlled angular non-uniformity: A light source that uses a light emitting diode with a wavelength converting element is configured to produce a non-uniform angular color distribution, e.g., Δu′v′>0.015 within an angular distribution from 0° to 90°, that can be used with specific light based device that translate the angular color distribution into a... Agent: Philips Intellectual Property & Standards

20100072494 - Light emitting diode having light emitting cell with different size and light emitting device thereof: l

20100072490 - Low cost flexible display sheet: Exemplary embodiments provide methods and systems for assembling electronic devices, such as integrated circuit (IC) chips, onto a subsequent flexible surface using a release member having a phase change material. Specifically, IC elements/components can be selectively received, stored, inspected, repaired, and/or released in a scalable manner during the assembly of... Agent: Eastman Kodak Company Patent Legal Staff

20100072492 - Package substrate and light emitting device using the same: A package substrate of the present invention at least comprises a metal substrate and a plurality of light emitting dies. The metal substrate is provided thereon with at least one trench. The trench is recessed into the surface of the metal substrate through an insulating layer. The light emitting dies... Agent: Jackson Intellectual Property Group PLLC

20100072489 - Semiconductor light emitting devices grown on composite substrates: A plurality of III-nitride semiconductor structures, each comprising a light emitting layer disposed between an n-type region and a p-type region, are grown on a composite substrate. The composite substrate includes a plurality of islands of III-nitride material connected to a host by a bonding layer. The plurality of III-nitride... Agent: Philips Intellectual Property & Standards

20100072495 - Contact structure and semiconductor device: To improve the reliability of contact with an anisotropic conductive film in a semiconductor device such as a liquid crystal display panel, a terminal portion (182) of a connecting wiring (183) on an active matrix substrate is electrically connected to an FPC (191) by an anisotropic conductive film (195). The... Agent: Eric Robinson

20100072496 - Semiconductor light emitting device: A semiconductor light emitting device (A1) includes a case (1) and a plurality of semiconductor light emitting elements (3) arranged in the case. The case (1) is formed with a plurality of reflectors (11) each in the form of a truncated cone surrounding a respective one of the semiconductor light... Agent: Hamre, Schumann, Mueller & Larson, P.C.

20100072497 - Light emitting diode chip: A light emitting diode chip includes a permanent substrate having a holding space formed on the permanent substrate; an insulating layer and a metal layer sequentially formed on the permanent substrate and the holding spacer; a die having a eutectic layer and a light-emitting region and bonded to the metal... Agent: Wpat, PC Intellectual Property Attorneys

20100072503 - Electro-optical device and electronic apparatus: An electro-optical device includes a semiconductor layer including a channel region having a channel length along one of a first direction and a second direction, a source region having a source length along the second direction and electrically connected to a data line, a drain region having a drain length... Agent: Workman Nydegger 1000 Eagle Gate Tower

20100072499 - Led package: The present invention has an object to provide a LED package having a means capable of precisely limiting a region in which a resin containing a phosphor is dotted on a member on which an LED chip is supported. To this end, an LED package according to the present invention... Agent: H.c. Park & Associates, PLC

20100072502 - Light-emitting diode: A light-emitting diode includes a circuit board, a pair of electrodes provided on the circuit board, at least one light-emitting diode element electrically connected to the pair of electrodes, a central electrode for heat-dissipation, provided between the pair of electrodes on the circuit board, and a heat-dissipation plate disposed on... Agent: Browdy And Neimark, P.l.l.c. 624 Ninth Street, Nw

20100072498 - Lithium-containing sialon phosphor and method of manufactring the same: According to the invention, a highly crystalline α-sialon is synthesized to emit highly intense light and a white LED showing an excellent color rendering characteristic is provided by shifting emitted light to the short wavelength side (blue shift). Such an α-sialon is designed so as to be expressed by general... Agent: Kanesaka Berner And Partners LLP

20100072501 - Semiconductor light emitting device: A semiconductor light emitting device which includes at least one concave on a light extraction surface opposite to a surface on which a semiconductor stack comprising a light emitting layer between a n-type semiconductor layer and a p-type semiconductor layer is mounted. The concave has not less than two slopes... Agent: Squire, Sanders & Dempsey L.L.P.

20100072500 - Thin-film light emitting diode chip and method for producing a thin-film light emitting diode chip: A thin-film light-emitting diode chip with a layer stack having a first emission surface and an opposite second emission surface, so that the thin-film light-emitting diode chip has at least two main emission directions. Measures for improving the outcoupling of the light generated in the layer sequence are provided on... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100072508 - Group iii nitride semiconductor light-emitting device and method for producing the same: A method for producing a Group III nitride semiconductor light-emitting device with a face-up configuration including a p-type layer and a transparent electrode composed of ITO is provided in which a p-pad electrode on the transparent electrode and an n-electrode on an n-type layer are simultaneously formed. The p-pad electrode... Agent: Mcginn Intellectual Property Law Group, PLLC

20100072509 - Lead frame assembly, lead frame and insulating housing combination, and led module having the same: A unitary lead frame assembly having a plurality of lead frame sets each comprises a first lead frame unit. The first lead frame unit has a pair of first and second frame portions extending along a first direction and spaced apart from each other along a second direction different from... Agent: Rosenberg, Klein & Lee

20100072507 - Lead frame, and light emitting diode module having the same: A light emitting diode (LED) module includes a lead frame having a number (N) of conducting arms spaced apart from each other, where N≧3, and at least one LED die mounted on one of any two neighbor conducting arms. Any two neighbor conducting arms are electrically coupled each other.... Agent: Rosenberg, Klein & Lee

20100072505 - Led interconnect assembly: A light-emitting device assembly which can be used in many applications has a contact carrier, at least one light-emitting device, a heat sink and at least one securing member. The contact carrier has a light-emitting device receiving region and resilient contacts which are provided proximate to the light-emitting device receiving... Agent: Tyco Technology Resources

20100072504 - Light-emitting device and method for manufacturing the same: Provided are a light-emitting device and a method for manufacturing the same. The light-emitting device includes a substrate, a light-emitting device, a protection device, and a connecting line. The light-emitting device is formed on one part of the substrate, and includes a first semiconductor layer and a second semiconductor layer.... Agent: Birch Stewart Kolasch & Birch

20100072511 - Semiconductor chip assembly with copper/aluminum post/base heat spreader: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The heat spreader includes a post and a base that include a copper surface layer and... Agent: David M. Sigmond

20100072510 - Semiconductor chip assembly with post/base/cap heat spreader: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The heat spreader includes a post, a base and a cap. The post extends upwardly from... Agent: David M. Sigmond

20100072506 - Ultraviolet light emitting diode package: An ultraviolet light emitting diode package for emitting ultraviolet light is disclosed. The ultraviolet light emitting diode package comprises an LED chip emitting light with a peak wavelength of 350 nm or less, and a protective member provided so that surroundings of the LED chip is covered to protect the... Agent: H.c. Park & Associates, PLC

20100072512 - Silicon break over diode: A Break Over Diode (“BOD”) device is a gate-less two terminal high power semiconductor switch in which transitions from a blocking state to a conducting state are triggered by a dV/dt pulse to the anode. The BOD device can be thought of as two cross-coupled PNP and NPN transistors, and... Agent: Clise, Billion & Cyr, P.A.

20100072513 - Semiconductor heterostructures and manufacturing thereof: A semiconductor heterostructure (10) includes a crystalline substrate of a first semiconductor material and a mask (11) disposed over a surface of the crystalline substrate. The mask (11) has openings (12) including a plurality of elongated opening sections (13, 14) with a width (w) less than or equal to 900... Agent: Young & Thompson

20100072514 - High operating temperature barrier infrared detector with tailorable cutoff wavelength: A barrier infrared detector with absorber materials having selectable cutoff wavelengths and its method of manufacture is described. A GaInAsSb absorber layer may be grown on a GaSb substrate layer formed by mixing GaSb and InAsSb by an absorber mixing ratio. A GaAlAsSb barrier layer may then be grown on... Agent: Canady & Lortz LLP

20100072515 - Fabrication and structures of crystalline material: A surface of the first semiconductor crystalline material has a reduced roughness. A semiconductor device includes a low defect, strained second semiconductor crystalline material over the surface of the first crystalline material. A surface of the strained second semiconductor crystalline material has a reduced roughness. One example includes obtaining a... Agent: Amberwave System Corp.

20100072516 - Nitride semiconductor device: A nitride semiconductor device includes an active layer formed between an n-type cladding layer and a p-type cladding layer, and a current confining layer having a conductive area through which a current flows to the active layer. The current confining layer includes a first semiconductor layer, a second semiconductor layer... Agent: Mcdermott Will & Emery LLP

20100072517 - Bipolar/dual fet structure including enhacement and depletion mode fets with isolated channels: According to an exemplary embodiment, a bipolar/dual FET structure includes a bipolar transistor situated over a substrate. The bipolar/dual FET structure further includes an enhancement-mode FET and a depletion-mode FET situated over the substrate. In the bipolar/dual FET structure, the channel of the enhancement-mode FET is situated above the base... Agent: Smith Frohwein Tempel Greenlee Blaha LLC

20100072518 - Semiconductor devices and methods of fabricating same: Methods of fabricating semiconductor devices using electrode-less wet-etching techniques to reduce defect densities on etched group III-nitride semiconductor surfaces are described herein. The methods generally involve contacting an etched surface of a component of a semiconductor device with a solution comprising a metal hydroxide and an oxidizing agent effective to... Agent: Troutman Sanders LLP 5200 Bank Of America Plaza

20100072519 - P-channel power mis field effect transistor and switching circuit: In a P-channel power MIS field effect transistor formed on a silicon surface having substantially a (110) plane, a gate insulation film is used which provides a gate-to-source breakdown voltage of 10 V or more, and planarizes the silicon surface, or contains Kr, Ar, or Xe.... Agent: Schwegman, Lundberg & Woessner, P.A.

20100072520 - Methods of fabricating transistors having buried p-type layers coupled to the gate: A unit cell of a metal-semiconductor field-effect transistor (MESFET) is provided. The MESFET has a source, a drain and a gate. The gate is between the source and the drain and on an n-type conductivity channel layer. A p-type conductivity region is provided beneath the gate between the source and... Agent: Myers Bigel Sibley & Sajovec

20100072521 - Method for forming silicide of semiconductor device: A silicide forming method for a semiconductor device. A silicide forming method may include forming a gate electrode by depositing a gate oxide film and/or polysilicon over a silicon substrate and patterning. A silicide forming method may include forming a nitride film spacer over sidewalls of a gate electrode and... Agent: Sherr & Vaughn, PLLC

20100072522 - Semiconductor device and fabrication method thereof: A semiconductor device fabrication method includes the steps of (a) forming a dielectric film on a semiconductor substrate; (b) etching the dielectric film by a dry process; and (c) supplying thermally decomposed atomic hydrogen onto the semiconductor substrate under a prescribed temperature condition, to remove a damaged layer produced in... Agent: Fujitsu Patent Center C/o Cpa Global

20100072523 - Semiconductor device and method for manufacturing the same: A semiconductor device includes a first MIS transistor and a second MIS transistor. The first MIS transistor includes a first gate electrode includes a second metal film formed on a first gate insulating film, and an insulating film formed, extending over side surfaces of the first gate electrode and upper... Agent: Mcdermott Will & Emery LLP

20100072524 - Magnetic devices having oxide antiferromagnetic layer next to free ferromagnetic layer: Magnetic multilayer structures, such as magnetic or magnetoresistive tunnel junctions (MTJs) and spin valves, having a magnetic biasing layer formed next to and magnetically coupled to the free ferromagnetic layer to achieve a desired stability against fluctuations caused by, e.g., thermal fluctuations and astray fields. Stable MTJ cells with low... Agent: Fish & Richardson, PC

20100072530 - Magnetic random access memorty: A magnetic random access memory of an aspect of the present invention including a magnetoresistive effect element having a fixed layer whose magnetization direction is fixed, a recording layer whose magnetization direction is reversible, and a non-magnetic layer provided between the fixed and recording layers, wherein the magnetization directions of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100072526 - Semiconductor memory device: A semiconductor memory device includes a semiconductor substrate; a ferroelectric capacitor comprising an upper electrode, a ferroelectric film, and a lower electrode above the semiconductor substrate; and an upper interlayer dielectric film surrounding a periphery of the ferroelectric capacitor, wherein a gap is provided between the ferroelectric capacitor and the... Agent: Knobbe Martens Olson & Bear LLP

20100072527 - Semiconductor memory device and manufacturing method thereof: A semiconductor memory device includes: a transistor on a semiconductor substrate; an interlayer dielectric film covering the transistor; a ferroelectric capacitor comprising a first upper electrode, a ferroelectric film, and a lower electrode on the interlayer dielectric film; a contact plug which is in the interlayer dielectric film and electrically... Agent: Knobbe Martens Olson & Bear LLP

20100072525 - Semiconductor memory device and method for manufacturing the same: According to a method for manufacturing a semiconductor memory device of the present invention, a capacitor lower electrode film is left on the wiring layer located above a dummy transistor. In this manner, when processing of the capacitors is performed by removing a capacitor upper electrode film and a ferroelectric... Agent: Knobbe Martens Olson & Bear LLP

20100072528 - Spin transistor, integrated circuit, and magnetic memory: A spin transistor includes a first ferromagnetic layer, a second ferromagnetic layer, a semiconductor layer between the first and second ferromagnetic layers, and a gate electrode on or above a surface of the semiconductor layer, the surface being between the first and second ferromagnetic layers. The first ferromagnetic layer comprises... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100072529 - Stack having heusler alloy, magnetoresistive element and spin transistor using the stack, and method of manufacturing the same: A stack includes a crystalline MgO layer, crystalline Heusler alloy layer, and amorphous Heusler alloy layer. The crystalline Heusler alloy layer is provided on the MgO layer. The amorphous Heusler alloy layer is provided on the crystalline Heusler alloy layer.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100072531 - Method for forming a memory cell comprising a capacitor having a strontium titaniumoxide based dielectric layer and devices obtained thereof: A method is disclosed for manufacturing SrxTiyO3 based metal-insulator-metal (MIM) capacitors using a low temperature Atomic Layer Deposition (ALD) process. Preferably TiN is used to form the bottom electrode. The Sr/Ti ratio in the SrxTiyO3 dielectric layer of the capacitor can be varied to tune the electric properties of the... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP

20100072532 - Recessed access device for a memory: Semiconductor memory devices having recessed access devices are disclosed. In some embodiments, a method of forming the recessed access device includes forming a device recess in a substrate material that extends to a first depth in the substrate that includes a gate oxide layer in the recess. The device recess... Agent: Wells St. John P.s.

20100072533 - Asymmetric channel doping for improved memory operation for floating body cell (fbc) memory: An improved dynamic memory cell using a semiconductor fin or body is described. Asymmetrical doping is used in the channel region, with more dopant under the back gate to improve retention without significantly increasing read voltage.... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100072534 - Nonvolatile semiconductor memory device and method of fabricating the same: A nonvolatile semiconductor memory device includes a gate insulating film formed on a semiconductor substrate, a first gate electrode corresponding to a memory cell transistor and a second gate electrode. The first gate electrode includes a floating gate electrode film, a first interelectrode insulating film and a control gate electrode... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100072536 - Non-volatile memory device and method of manufacturing the same: In a non-volatile memory device and a method of manufacturing the non-volatile memory device, a tunnel insulating layer, a charge trapping layer, a dielectric layer and a conductive layer may be sequentially formed on a channel region of a substrate. The conductive layer may be patterned to form a gate... Agent: Harness, Dickey & Pierce, P.L.C

20100072535 - Nonvolatile semiconductor memory device: A nonvolatile semiconductor memory device includes a source region and a drain region provided apart from each other in a semiconductor substrate, a first insulating film provided on a channel region between the source region and the drain region, a charge storage layer provided on the first insulating film, a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100072537 - Band engineered nano-crystal non-volatile memory device utilizing enhanced gate injection: Non-volatile memory devices and arrays are described that utilize reverse mode non-volatile memory cells that have band engineered gate-stacks and nano-crystal charge trapping in EEPROM and block erasable memory devices, such as Flash memory devices. Embodiments of the present invention allow a reverse mode gate-insulator stack memory cell that utilizes... Agent: Leffert Jay & Polglaze, P.A.

20100072539 - Memory cell of nonvolatile semiconductor memory device: A memory cell of a nonvolatile semiconductor memory device according to an embodiment of the invention has a MONOS structure. The charge storage layer of the memory cell includes insulating material layers. The relationship between the conduction band edge energy and valance band edge energy of the insulating material layers... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100072538 - Nonvolatile semiconductor memory device and method of manufacturing the same: A nonvolatile semiconductor memory device includes a plurality of memory strings, each of which has a plurality of electrically rewritable memory cells connected in series; and select transistors, one of which is connected to each of ends of each of the memory strings. Each of the memory strings is provided... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100072540 - Electronic circuit control element with tap element: A technique for controlling a power supply with power supply control element with a tap element. An example power supply control element includes a power transistor that has first and second main terminals, a control terminal and a tap terminal. A control circuit is coupled to the control terminal. The... Agent: Blakely Sokoloff Taylor & Zafman LLP

20100072541 - Semiconductor device with increased channel area and decreased leakage current: The semiconductor device includes an active region, a recess channel region including vertical channel structures, a gate insulating film, and a gate structure. The active region is defined by a device isolation structure formed in a semiconductor substrate. The recess channel region is formed in the active region. The vertical... Agent: Townsend And Townsend And Crew, LLP

20100072542 - Semiconductor device, method for manufacturing the same, and data processing system: A semiconductor device includes a recess portion, a first liner film and a second liner film sequentially formed on inner wall side surfaces of the recess portion, the second liner film containing an oxygen atom, and an insulating region filled in the recess portion. The first liner film has a... Agent: Foley And Lardner LLP Suite 500

20100072544 - Method of forming an mos transistor and structure therefor: In one embodiment, an MOS transistor is formed to have an active region and a termination region. Within the termination region a plurality of conductors are formed to make electrical contact to conductors that are within a plurality of trenches. The plurality of conductors in the termination region are formed... Agent: Semiconductor Components Industries, LLC Intellectual Property Dept. - A700

20100072543 - Trench mosfet with etching buffer layer in trench gate: The present invention is to provide a trench MOSFET with an etching buffer layer in a trench gate, comprising: a substrate which has a first surface and a second surface opposite to each other and comprises at least a drain region, a gate region, and a source region which are... Agent: Bayshore Patent Group, LLC

20100072545 - Recessed channel array transistors, and semiconductor devices including a recessed channel array transistor: A recessed channel array transistor may include a substrate, a gate oxide layer, a gate electrode and source/drain regions. The substrate may have an active region and an isolation region. A recess may be formed in the active region. The gate oxide layer may be formed on the recess and... Agent: Myers Bigel Sibley & Sajovec

20100072546 - Semiconductor device: Provided is a semiconductor device in which on-resistance is largely reduced. The semiconductor device includes an n type epitaxial layer (2) in which each region between neighboring trenches (3) becomes a channel (9), and a plurality of embedded electrodes (5) each of which is formed on an inner surface of... Agent: Fish & Richardson P.C.

20100072547 - Techniques for curvature control in power transistor devices: Techniques for processing power transistor devices are provided. In one aspect, the curvature of a power transistor device comprising a device film formed on a substrate is controlled by thinning the substrate, the device having an overall residual stress attributable at least in part to the thinning step, and applying... Agent: Ryan, Mason & Lewis, LLP

20100072551 - Semiconductor device and manufacturing method of the semiconductor device: A semiconductor device includes a semiconductor layer formed on an insulating layer; a gate electrode disposed on said semiconductor layer via a gate insulating film; a source/drain layer composed by including an alloy layer or a metal layer with a bottom surface in contact with the insulating layer, with joint... Agent: Oliff & Berridge, PLC

20100072548 - Semiconductor device and method for manufacturing the same: A semiconductor device in which defects in characteristics due to electrostatic discharge is reduced and a method for manufacturing the semiconductor device are provided. The semiconductor device has at least one of these structures: (1) a structure in which a first and second insulating films are in direct contact with... Agent: Cook Alex Ltd

20100072549 - Semiconductor device and method for manufacturing the same: It is made possible to restrict strain relaxation even if a strained semiconductor element is formed on a very small minute layer. A semiconductor device includes: a substrate; a first semiconductor layer formed into a mesa shape above the substrate and having strain, and including source and drain regions of... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100072550 - Semiconductor device and method of manufacturing the same: A semiconductor device has plural columnar gate electrodes for plural MOSFETs formed in a row separately on a semiconductor substrate, and a semiconductor region which is formed in a part between the neighboring two columnar gate electrodes of the plural columnar gate electrodes to form a channel of the MOSFETs.... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100072552 - Field effect transistor for preventing collapse or deformation of active regions: A field effect transistor includes an active region provided in a projecting part on a surface of a semiconductor substrate, the projecting part extending in a fixed direction parallel to the surface, and a gate electrode provided on a sidewall of the projecting part along the fixed direction with a... Agent: Sughrue Mion, PLLC

20100072553 - Metal gate stress film for mobility enhancement in finfet device: A CMOS FinFET semiconductor device provides an NMOS FinFET device that includes a compressive stress metal gate layer over semiconductor fins and a PMOS FinFET device that includes a tensile stress metal gate layer over semiconductor fins. A process for forming the same includes a selective annealing process that selectively... Agent: Duane Morris LLP (tsmc)IPDepartment

20100072557 - Semiconductor constructions: Some embodiments include methods of recessing multiple materials to a common depth utilizing etchant comprising C4F6 and C4F3. The recessed materials may be within isolation regions, and the recessing may be utilized to form trenches for receiving gatelines. Some embodiments include structures having an island of semiconductor material laterally surrounded... Agent: Wells St. John P.s.

20100072554 - Semiconductor device: A semiconductor device according to one embodiment includes: an n-type transistor comprising a first gate electrode formed on a semiconductor substrate via a first gate insulating film, a first channel region formed in the semiconductor substrate under the first gate insulating film, and first source/drain regions formed in the semiconductor... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100072556 - Semiconductor device and associated methods: A semiconductor device and associated methods, the semiconductor device including a semiconductor substrate with a first well region, a first gate electrode disposed on the first well region, and a first N-type capping pattern, a first P-type capping pattern, and a first gate dielectric pattern disposed between the first well... Agent: Lee & Morse, P.C.

20100072555 - Wafer bonding method and wafer stack formed thereby: A wafer bonding process that compensates for curvatures in wafer surfaces, and a wafer stack produced by the bonding process. The process entails forming a groove in a surface of a first wafer, depositing a bonding stack on a surface of a second wafer, aligning and mating the first and... Agent: Hartman & Hartman, P.C.

20100072558 - Method for manufacturing high-stability resistors, such as high ohmic poly resistors, integrated on a semiconductor substrate: A method for protecting a circuit component on a semiconductor substrate from a plasma etching or other removal process includes forming a screening layer over an auxiliary layer to conceal at least an area of the auxiliary layer that overlays at least a portion of the circuit component, such as... Agent: Stmicroelectronics, Inc.

20100072560 - Nonvolatile memory device and method of manufacturing the same: A method of manufacturing a nonvolatile memory device wherein first gate lines and second gate lines are formed over a semiconductor substrate. The first gate lines are spaced-from each other at a first width, the second gate lines are spaced-from each other at a second width, and the first width... Agent: Marshall, Gerstein & Borun LLP

20100072559 - Semiconductor device and method of manufacturing the same: A semiconductor device having a string gate structure and a method of manufacturing the same suppress leakage current. The semiconductor device includes a selection gate and a memory gate. The channel region of the selection gate has a higher impurity concentration than that of the memory gate. Impurities may be... Agent: Volentine & Whitt PLLC

20100072562 - Functional element package and fabrication method therefor: A functional element package includes a silicon substrate with a functional element having one of a mobile portion and a sensor thereon; a seal member being bonded with the silicon substrate to form an airtightly sealed space therein, and including a step portion in its height direction; a first wiring... Agent: Cooper & Dunham, LLP

20100072561 - Method for fabricating micro-electro-mechanical system (mems) device: A micro-electro-mechanical system (MEMS) device includes a substrate, having a first side and second side, the second side has a cavity and a plurality of venting holes in the substrate at the second side with connection to the cavity. However, the cavity is included in option without absolute need. A... Agent: Jianq Chyun Intellectual Property Office

20100072564 - Semiconductor device and manufacturing method thereof: A semiconductor device of the invention includes: a substrate having a hollowed hollow section on a top surface; a semiconductor chip mounted in the hollow section of the substrate; and a lid having a substantially plate-shaped top plate section that opposes the substrate and covers the hollow section, and having... Agent: Dickstein Shapiro LLP

20100072563 - Substrate bonded mems sensor: A MEMS sensor includes a first substrate; a second substrate; a movable electrode portion and a fixed electrode portion which are arranged between the first substrate and the second substrate, wherein: conductive supporting portions of the movable electrode portion and the fixed electrode portion are, respectively, fixedly secured to a... Agent: Brinks Hofer Gilson & Lione

20100072565 - Soft mems: A microscale polymer-based apparatus comprises a substrate formed from a first polymer material and at least one active region integrated with the substrate. The at least one active region is patterned from a second polymer material that is modified to perform at least one function within the at least one... Agent: Greer, Burns & Crain

20100072566 - Magnetic element utilizing protective sidewall passivation: Exemplary embodiments of the invention are directed to magnetic elements including a passivation layer for isolation from other on-chip elements. One embodiment is directed to an apparatus comprising a magnetic tunnel junction (MTJ) element. The MTJ element comprises: a first ferromagnetic layer; a second ferromagnetic layer; an insulating layer disposed... Agent: Qualcomm Incorporated

20100072567 - Image sensor and method for manufacturing the same: Disclosed are an image sensor and a method for manufacturing the same. The image sensor includes an isolation trench formed in a semiconductor substrate corresponding to a logic region and a pixel separating trench formed on the semiconductor substrate corresponding to a pixel region and having a depth shallower than... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100072568 - Image sensor and method of manufacturing the same: An image sensor and a method of manufacturing the same are disclosed. The image sensor includes a plurality of photodiodes on a substrate, an dielectric layer on the plurality of the photodiodes, a metal line layer in the dielectric layer corresponding to a border region between neighboring photodiodes, the metal... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20100072569 - Method of forming an isolation layer, method of manufacturing a semiconductor device using the same, and semiconductor device having an isolation layer: In a method of forming an isolation layer, a plurality of trenches is formed on a substrate. A liner is formed on inner walls of the trenches. The liner is thermally oxidized to fill up some of the trenches. The other trenches are filled up with an insulation material. As... Agent: Mills & Onello LLP

20100072570 - Semiconductor device and method of forming embedded passive circuit elements interconnected to through hole vias: A semiconductor die has a first insulating material disposed around a periphery of the die. A portion of the first insulating material is removed to form a through hole via (THV). Conductive material is deposited in the THV. A second insulating layer is formed over an active surface of the... Agent: Robert D. Atkins

20100072571 - Effective efuse structure: An electrically programmable fuse (eFuse) comprises a semiconductor layer, a silicide layer overlying the semiconductor layer, and first and second contact structures electrically coupled to the silicide layer. The first contact structure is configured to function as an anode and the second contact structure is configured to function as a... Agent: Freescale Semiconductor, Inc. Law Department

20100072572 - Semiconductor device: One or more embodiments relate to a semiconductor device, comprising: a inductor coil including a winding; and a capacitor arrangement including at least one capacitor, the capacitor arrangement electrically coupled to the inductor coil, the footprint of the capacitor arrangement at least partially overlapping the footprint of the inductor coil.... Agent: Infineon Technologies Ag Patent Department

20100072573 - Method of forming a high capacitance diode and structure therefor: In one embodiment, high doped semiconductor channels are formed in a semiconductor region of an opposite conductivity type to increase the capacitance of the device.... Agent: Semiconductor Components Industries, LLC Intellectual Property Dept. - A700

20100072574 - Semiconductor device and manufacturing method thereof: A resistor whose characteristic value can be changed without requiring a photolithography process again is provided. The resistor includes a plurality of first resistor units which is connected serially to each other and a second resistor unit which is connected in parallel to part of the first resistor units. Then,... Agent: Cook Alex Ltd

20100072575 - Layout patterns for deep well region to facilitate routing body-bias voltage: Layout patterns for the deep well region to facilitate routing the body-bias voltage in a semiconductor device are provided and described. The layout patterns include a diagonal sub-surface mesh structure, an axial sub-surface mesh structure, a diagonal sub-surface strip structure, and an axial sub-surface strip structure. A particular layout pattern... Agent: Iv (transmeta) C/o Murabito, Hao & Barnes LLP

20100072576 - Methods and structures for altering strain in iii-nitride materials: Methods and structures for producing semiconductor materials, substrates and devices with improved characteristics are disclosed. Structures and methods for forming reduced strain structures include forming an interface between a support structure surface and a strained semiconductor layer. The support structure is selectively etched to form a plurality of semiconductor islands... Agent: Traskbritt, P.C.

20100072577 - Methods and devices for fabricating and assembling printable semiconductor elements: The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials.... Agent: Greenlee Winner And Sullivan P C

20100072578 - Semiconductor chip and semiconductor wafer: A semiconductor chip which includes an element forming region formed over a substrate, a scribe line region which surrounds the element forming region, and a structure provided locally inside the scribe line region in at least one corner area of the semiconductor chip. The element forming region and the scribe... Agent: Mcginn Intellectual Property Law Group, PLLC

20100072579 - Through substrate conductors: Structures and methods of forming through substrate vias are disclosed. In one embodiment, the method includes forming a through substrate opening from a top surface of a substrate, the top surface including active devices, and filling the first through substrate opening with an ancillary material. A conductive capping layer is... Agent: Slater & Matsil, L.L.P.

20100072580 - Ultra-thin oxide bonding for si to si dual orientation bonding: A multi-layered substrate with bulk substrate characteristics and processes for the fabrication of such substrates are herein disclosed. The multi-layered substrate can include a first layer, a second layer and an interfacial layer therebetween. The first and second layers can be silicon, germanium, or any other suitable material of the... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100072581 - Composition for film formation, insulating film, semiconductor device, and process for producing the semiconductor device: wherein R1 and R3 represent a hydrogen atom or a monovalent substituent; R2 represents a divalent group having an alicyclic structure with four carbon atoms or a derivative of the divalent group; X1 and X2 represent a hydrolysable group; and m and n are an integer of from 0 to... Agent: Turocy & Watson, LLP

20100072583 - Semiconductor device and manufacturing method of the same: With the use of a conductive shield formed on the top or bottom side of a semiconductor integrated circuit, an electrostatic breakdown (malfunctions of the circuit or damages of a semiconductor element) of the semiconductor integrated circuit due to electrostatic discharge is prevented, and sufficient communication capability is obtained. With... Agent: Cook Alex Ltd

20100072582 - Semiconductor device and method of electrically connecting a shielding layer to ground through a conductive via disposed in peripheral region around semiconductor die: A semiconductor device is made by mounting a plurality of semiconductor die to a substrate, depositing an encapsulant over the substrate and semiconductor die, forming a shielding layer over the semiconductor die, creating a channel in a peripheral region around the semiconductor die through the shielding layer, encapsulant and substrate... Agent: Robert D. Atkins

20100072584 - Copper alloy sheet for electric and electronic parts: A Cu—Fe—P alloy sheet that is provided with the high strength and with the improved resistance of peel off of oxidation film, in order to deal with problems such as package cracks and peeling, is provided. A copper alloy sheet for electric and electronic parts according to the present invention... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100072585 - Top exposed clip with window array: A clip for a semiconductor device package may include a metal sheet including an array of windows and one or more conductive fingers. Each of the conductive fingers has a first end and a second end. The first end is electrically connected to the metal sheet at one of the... Agent: Joshua D. Isenberg Jdi Patent

20100072587 - Ic socket having heat dissipation function: It is an object of the present invention to provide an IC socket that has a configuration to promote heat dissipation from an IC device in a simple configuration, and prevent overheating of the IC device under test. Contact pins 6c, similar to the contact pins 6a and 6b, are... Agent: 3m Innovative Properties Company

20100072586 - Quad flat pack in quad flat pack integrated circuit package system: An integrated circuit package system includes: providing a base package having a first integrated circuit with an inner lead on a periphery thereof and connected thereto with interconnects, and the inner lead partially encapsulated by an inner encapsulation; mounting an outer lead on the periphery of the base package; mounting... Agent: Law Offices Of Mikio Ishimaru

20100072591 - Integrated circuit package system with anti-peel pad: An integrated circuit package system includes: forming an anti-peel pad having both a concave ring and an external terminal with the concave ring, having a peripheral wall, surrounding the external terminal; connecting an integrated circuit with the anti-peel pad; and forming an encapsulation over the integrated circuit, the concave ring,... Agent: Law Offices Of Mikio Ishimaru

20100072592 - Light source using a light-emitting diode: A light source is described herein. An embodiment of the light source comprises a mounting surface and a first lead frame. The first lead frame extends from the mounting surface. The first lead frame comprises a first portion extending from the mounting surface; a cup portion having a cup portion... Agent: Kathy Manke Avago Technologies Limited

20100072593 - Semiconductor package and method for manufacturing the same: A semiconductor package includes a first package including at least one first semiconductor chip; a second package including an external connection terminal and at least one second semiconductor chip, the second package being stacked on the first package; and an interposer disposed between the first and second packages and connected... Agent: Mills & Onello LLP

20100072589 - Semiconductor package system with die support pad: A semiconductor package system includes: providing a leadframe with a lead; making a die support pad separately from the leadframe; attaching a semiconductor die to the die support pad through a die attach adhesive, the semiconductor die being spaced from the lead; and connecting a bonding pad on the semiconductor... Agent: Law Offices Of Mikio Ishimaru

20100072590 - Stacking quad pre-molded component packages, systems using the same, and methods of making the same: Pre-molded component packages that may be as thin as a leadframe for a semiconductor die, systems using the same, and methods of making the same are disclosed. The leads of an exemplary package are exposed at both surfaces at the leadframe. The packages may be stacked upon one another and... Agent: Townsend And Townsend And Crew, LLP

20100072588 - Substrate structure with die embedded inside and dual build-up layers over both side surfaces and method of the same: The present invention discloses a structure of device package comprising a first substrate with a die metal pad, a first wiring circuit on top surface of said first substrate and a second wiring circuit on bottom surface of said first substrate. A die is disposed on the die metal pad.... Agent: Bacon & Thomas, PLLC

20100072594 - Low cost die placement: Exemplary embodiments provide methods and systems for assembling electronic devices, such as integrated circuit (IC) chips, using a release member having a phase change material. Specifically, IC elements/components can be selectively received, stored, inspected, repaired, and/or released in a scalable manner during the assembly of IC chips by inducing phase... Agent: Eastman Kodak Company Patent Legal Staff

20100072595 - Method and system for sealing a substrate: A method of sealing a microelectromechanical system (MEMS) device from ambient conditions is described, wherein the MEMS device is formed on a substrate and a substantially hermetic seal is formed as part of the MEMS device manufacturing process. The method comprises forming a metal seal on the substrate proximate to... Agent: Knobbe, Martens, Olson & Bear, LLP

20100072600 - Fine-pitch oblong solder connections for stacking multi-chip packages: A semiconductor PoP device (100) includes a first device (101) with a first substrate (110) having on its first side (110a) a stack (115) of at least two chips, first contact pads (111), and a first package (116) having a height (116a) and a top surface (116b). Via holes (130)... Agent: Texas Instruments Incorporated

20100072597 - Integrated circuit package system for stackable devices: An integrated circuit package system provides: forming a stack module including: providing a stack die and encapsulating the stack die with an insulating material having a protruding support and a pad connected to the stack die; mounting the stack module on a package base; connecting the pad to the package... Agent: Law Offices Of Mikio Ishimaru

20100072596 - Integrated circuit packaging system having planar interconnect: An integrated circuit package system includes: mounting an integrated circuit, having a planar interconnect, over a carrier with the planar interconnect at a non-active side of the integrated circuit and an active side of the integrated circuit facing the carrier; connecting the integrated circuit and the carrier; connecting the planar... Agent: Law Offices Of Mikio Ishimaru

20100072601 - Semiconductor device and manufacturing method of a semiconductor device: A semiconductor device of the present invention comprises a substrate and a first semiconductor element. The substrate comprises an inner layer conductor and a cavity comprising the bottom surface on which a part of the inner layer conductor is exposed. The first semiconductor element contacts, in the cavity, the inner... Agent: Mr. Jackson Chen

20100072599 - Semiconductor device and method of forming a wafer level package with top and bottom solder bump interconnection: A semiconductor device is made by forming solder bumps over a copper carrier. Solder capture indentations are formed in the copper carrier to receive the solder bumps. A semiconductor die is mounted to the copper carrier using a die attach adhesive. The semiconductor die has contact pads formed over its... Agent: Robert D. Atkins

20100072598 - Semiconductor package and stacked semiconductor package having the same: A semiconductor package includes a substrate having a substrate body possessing a first region, a second region which is defined around the first region and a third region which is defined around the second region. Wiring lines are placed on the substrate body, and the wiring lines have first ends... Agent: Ladas & Parry LLP

20100072602 - Stacked integrated circuit package using a window substrate: An integrated circuit (IC) package is disclosed. The IC package includes a first substrate having a first surface having first substrate bond pads, a second surface having second substrate bond pads, and an opening that extends from the first surface to the second surface. The IC package further includes a... Agent: Harness, Dickey & Pierce P.L.C

20100072603 - Semiconductor device assemblies and packages with edge contacts and sacrificial substrates and other intermediate structures used or formed in fabricating the assemblies or packages: A sacrificial substrate for fabricating semiconductor device assemblies and packages with edge contacts includes conductive elements on a surface thereof, which are located so as to align along a street between each adjacent pair of semiconductor devices on the device substrate. A semiconductor device assembly or package includes a semiconductor... Agent: Trask Britt, P.C./ Micron Technology

20100072604 - Semiconductor device: In an example of the main technique, two chips are stacked with each other, first to third pads are disposed along corresponding sides of the respective chips, which are arranged close and in parallel to each other, and these pads are commonly connected to each other with first to third... Agent: Mattingly & Malur, P.C.

20100072605 - Semiconductor package with a controlled impedance bus and method of forming same: An apparatus includes a first substrate having a set of semiconductor devices formed within it. The apparatus also includes a second substrate. A third substrate has a data conductor coupled between first and second connections to the second substrate. The data conductor is coupled to the set of semiconductor devices... Agent: Morgan Lewis & Bockius LLP/rambus Inc.

20100072606 - Stacking package structure with chip embedded inside and die having through silicon via and method of the same: The semiconductor device package structure includes a first die with a through silicon via (TSV) open from back side of the first die to expose bonding pads; a build up layer coupled between the bonding pads to terminal metal pads by the through silicon via (TSV); a substrate with a... Agent: Ditthavong Mori & Steiner, P.C.

20100072607 - Tab package connecting host device element: A device is provided in which a glass panel having beveled edge is flexibly connected to a TAB package. The outer lead portions of the TAB package include an end portion of first width connected to a connection pattern on the glass panel, a terminal portion having a second width... Agent: Muir Patent Consulting, PLLC

20100072608 - Semiconductor device: A semiconductor device is disclosed which includes a metal base, a semiconductor chip, a lead, and a sealant. The semiconductor chip has an opposite pair of first and second electrode surfaces and a side surface. The semiconductor chip is fixed on the metal base with the first electrode surface solder-connected... Agent: Oliff & Berridge, PLC

20100072609 - Socket for semiconductor integrated circuit: Provided is a socket for semiconductor integrated circuit allowing a semiconductor integrated circuit to be analyzed easily. The socket for semiconductor integrated circuit according to the invention is used by mounting a package thereon. The socket for semiconductor integrated circuit includes: a socket main body which covers both a front-side... Agent: Mcginn Intellectual Property Law Group, PLLC

20100072610 - process for precision placement of integrated circuit overcoat material: The present invention provides a process for manufacturing an integrated circuit (IC) package and an integrated circuit (IC) package. The process, without limitation, includes providing an integrated circuit chip having a configuration, and forming a layer of overcoat material over the integrated circuit chip based upon the configuration.... Agent: Texas Instruments Incorporated

20100072611 - Semiconductor device and method for manufacturing the same: An object is to provide a thin and small semiconductor device that has high reliability and high resistance to external stress and electrostatic discharge. Another object is to manufacture a semiconductor device with high yield while shape defects and defective characteristics which are caused by external stress or electrostatic discharge... Agent: Cook Alex Ltd

20100072612 - Bare die package with displacement constraint: Embodiments of the present invention describe a bare die package and its methods of fabrication The bare die package comprises a die electrically coupled to a package substrate, and a displacement constraint. In an embodiment of the present invention, the displacement constraint is a plurality of members fixedly attached onto... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100072613 - Inkjet printed leadframe: Apparatuses and methods for inkjet printing electrical interconnect patterns such as leadframes for integrated circuit devices are disclosed. An apparatus for packaging includes a thin substrate adapted for high temperature processing, and an attach pad and contact regions that are inkjet printed to the thin substrate using a metallic nanoink.... Agent: Beyer Law Group LLP/ Nsc

20100072614 - 3-dimensional integrated circuit designing method: A 3-dimensional integrated circuit designing method includes forming a temporary layout region for an original integrated circuit on an XY plane, the plane being short in an X direction and long in a Y direction perpendicular to the X direction, dividing the temporary layout region into 2N (N is an... Agent: Charles N.j. Ruggiero, Esq. Ohlandt, Greeley, Ruggiero & Perle, L.L.P.

20100072615 - High-electrical-current wafer level packaging, high-electrical-current wlp electronic devices, and methods of manufacture thereof: The present invention has various aspects relating to the maximization of current carrying capacity of wafer level packaged chip scale solder pad mounted integrated circuits. In one aspect, the solder pad areas are maximized by using rectangular solder pads spaced as close together as reliable mounting to a circuit board... Agent: Maxim/bstz Blakely Sokoloff Taylor & Zafman LLP

20100072616 - Method of manufacturing an electronic system: A method of manufacturing an electronic system. One embodiment provides a semiconductor chip having a first main face and a second main face opposite to the first main face. A mask is applied to the first main face of the semiconductor chip. A compound is applied to the first main... Agent: Dicke, Billig & Czaja

20100072617 - Multiple die structure and method of forming a connection between first and second dies in same: A multiple die structure includes a first die (110), a second die (120), a carbon nanotube (130) having a first end (131) in physical contact with the first die and having a second end (132) in physical contact with the second die, and an electrically conductive material (240) in physical... Agent: Intel Corporation C/o Cpa Global

20100072618 - Semiconductor device and method of forming a wafer level package with bump interconnection: A semiconductor device is made by providing a metal substrate for supporting the semiconductor device. Solder bumps are connected to the substrate. In one embodiment, a conductive material is deposited over the substrate and is reflowed to form the solder bumps. A semiconductor die is mounted to the substrate using... Agent: Robert D. Atkins

20100072619 - Wire bonding structure and manufacturing method thereof: The present invention relates to a wire bonding structure, and more particularly to a manufacturing method for said wire bonding structure. The wire bonding structure comprises a die that connects with a lead via a bonding wire. At least one bond pad is positioned on an active surface of the... Agent: Rosenberg, Klein & Lee

20100072620 - Semiconductor chip with backside conductor structure: Various semiconductor devices and methods of testing such devices are disclosed. In one aspect, a method of manufacturing is provided that includes forming a bore from a backside of a semiconductor chip through a buried insulating layer and to a semiconductor device layer of the semiconductor chip. A conductor structure... Agent: Ditthavong Mori & Steiner, P.C.

20100072621 - Electronic component: An electronic component has a metallic layer on a substrate made of a semiconductor material, a diffusion barrier layer that is made of a material that has a small diffusion coefficient for the metal of the metallic layer being formed between the metallic layer and the substrate.... Agent: Kenyon & Kenyon LLP

20100072622 - Method for forming barrier layer and the related damascene structure: A method for forming barrier layers comprises steps of forming a first metal barrier layer covering a first dielectric layer and contacting a conductive layer through a via of the first dielectric layer, forming a barrier layer of metalized materials on the first metal layer, optionally forming a second metal... Agent: Lanway Ipr Services

20100072624 - Metal interconnection: A metal interconnection including a substrate, a first conductive structure, a second conductive structure, a complex plug and a plug is provided. The substrate includes a first region and a second region. The first conductive structure is disposed on the first region. The second conductive structure is disposed on the... Agent: North America Intellectual Property Corporation

20100072623 - Semiconductor device with improved contact plugs, and related fabrication methods: Semiconductor device structures and related fabrication methods are provided herein. One fabrication method relates to the formation of conductive contact plugs for a semiconductor device. The method begins by providing a semiconductor device structure having a conductive contact region, a layer of insulating material overlying the conductive contact region, and... Agent: Ingrassia Fisher & Lorenz, P.C. (amd)

20100072625 - Semiconductor device including power supply pad and trunk wiring which are arranged at the same layer level: A semiconductor device includes a semiconductor substrate which includes a functional circuit, a trunk wiring which passes through a portion near a position immediately above a center portion of the functional circuit, a power supply pad which is connected to an end of the trunk wiring and placed at a... Agent: Mcginn Intellectual Property Law Group, PLLC

20100072628 - Semiconductor device: A semiconductor device includes a carrier and a first chip attached to the carrier. The semiconductor device includes a sintered insulation material over at least a portion of the carrier and the first chip.... Agent: Dicke, Billig & Czaja

20100072627 - Wafer including intercepting through-vias and method of making intercepting through-vias in a wafer: A semiconductor device includes a substrate; a first via provided in the substrate extending from a first side of the substrate to a first depth into the substrate, the first depth being less than a thickness of the substrate and the first via having a first width in one direction;... Agent: Kathy Manke Avago Technologies Limited

20100072626 - Wafer level packaged mems integrated circuit: A wafer-level packaged integrated circuit includes a semiconductor substrate including a first silicon layer. A micro-electromechanical system (MEMS) device is integrated into the first silicon layer. A thin-film deposited sealing member is deposited over the first silicon layer and is configured to seal a cavity in the first silicon layer.... Agent: Dicke, Billig & Czaja

20100072629 - Wiring structure, semiconductor device having the wiring structure, and method for manufacturing the semiconductor device: A wiring structure, a semiconductor device having the structure, and a method for manufacturing the semiconductor device are disclosed. The wiring structure includes a first metal layer, a second metal layer on the first metal layer, an insulating layer between the first metal layer and the second metal layer, and... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20100072630 - Integrated circuit package system with adhesive segment spacer: An integrated circuit package system includes attaching an adhesive segment spacer to an interposer assembly; mounting an integrated circuit over a carrier; mounting the interposer assembly over the integrated circuit with the adhesive segment spacer exposing an inner region of the integrated circuit and covering a periphery of the integrated... Agent: Law Offices Of Mikio Ishimaru

20100072631 - Connection by fitting together two soldered inserts: A connection device between two components includes a hollow conductive insert, into which is fitted another conductive insert, the electrical connection between the two inserts being provided by means of a solder element.... Agent: Heslin Rothenberg Farley & Mesiti PC

20100072632 - Bond pad structure having dummy plugs and/or patterns formed therearound: A semiconductor structure is provided. In one embodiment, a bond pad is formed above one or more underlying layers of a substrate. A plurality of dummy plugs are spaced around the bond pad, the plurality of dummy plugs substantially vertically traversing the one or more underlying layers, wherein the plurality... Agent: Thomas, Kayden, Horstemeyer & Risley LLP

20100072633 - Semiconductor apparatus with thin semiconductor film: A semiconductor apparatus includes a substrate having at least one terminal, a thin semiconductor film including at least one semiconductor device, the thin semiconductor film being disposed and bonded on the substrate; and an individual interconnecting line formed as a thin conductive film extending from the semiconductor device in the... Agent: Rabin & Berdo, PC

20100072634 - Planar encapsulation and mold cavity package in package system: An integrated circuit package system includes: providing a substrate; mounting a first package above the substrate, the first package having a mold cavity exposing an exposed portion on a first integrated circuit from a first package encapsulation; mounting a second package above the first package and attached to the exposed... Agent: Law Offices Of Mikio Ishimaru

20100072635 - Protecting sidewalls of semiconductor chips using insulation films: A method of forming an integrated circuit structure includes providing a wafer having a first semiconductor chip, a second semiconductor chip, and a scribe line between and adjoining the first semiconductor chip and the second semiconductor chip; forming a notch in the scribe line, wherein the notch has a bottom... Agent: Slater & Matsil, L.L.P.

20100065803 - Memory device and manufacturing method thereof: Provided is a resistance variable non-volatile memory device using a trap-controlled Space Charge Limited Current (SCLC), and a manufacturing method thereof. The memory device includes a bottom electrode; an inter-electrode dielectric thin film diffusion prevention film formed on the bottom electrode; a dielectric thin film formed on the inter-electrode dielectric... Agent: Ampacc Law Group

20100065805 - Phase change memory device having a bottleneck constriction and method of manufacturing the same: A phase change memory device having a bottleneck constriction and method of making same are presented. The phase change memory device includes a semiconductor substrate, a lower electrode, an interlayer film, an insulator, a phase change layer and an upper electrode. The interlayer film is formed on the semiconductor substrate... Agent: Ladas & Parry LLP

20100065804 - Phase change memory device having multiple metal silicide layers and method of manufacturing the same: A phase change memory device having multiple metal silicide layers which enhances the current driving capability of switching elements and a method of manufacturing the same are presented. The device also includes switching elements, heaters, stack patterns, top electrodes, bit lines, word line contacts and word lines. The bottom of... Agent: Ladas & Parry LLP

20100065806 - Programmable resistance memory devices and systems using the same and methods of forming the same: A programmable resistance memory element and method of forming the same. The memory element includes a first electrode, a dielectric layer over the first electrode and a second electrode over the dielectric layer. The dielectric layer and the second electrode each have sidewalls. A layer of programmable resistance material, e.g.,... Agent: Dickstein Shapiro LLP

20100065807 - Nonvolatile memory element, nonvolatile memory element array, and method for manufacturing nonvolatile memory element: The present invention is configured such that a resistance variable element (16) and a rectifying element (20) are formed on a substrate (12). The resistance variable element (16) is configured such that a resistance variable layer (14) made of a metal oxide material is sandwiched between a lower electrode (13)... Agent: Mcdermott Will & Emery LLP

20100065808 - Phase change memory cell in via array with self-aligned, self-converged bottom electrode and method for manufacturing: An array of “mushroom” style phase change memory cells is manufactured by forming a separation layer over an array of contacts, forming an isolation layer on the separation layer and forming an array of memory element openings in the isolation layer using a lithographic process. Etch masks are formed within... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20100065810 - Method of synthesizing semiconductor nanostructures and nanostructures synthesized by the method: A method of synthesizing semiconductor nanostructures of at least one semiconductor material (e.g. nanowires, nanorods, nanoribbons, nanodots, quantumdots, etc.) is described which includes the steps of placing a solid catalyst particle on a substrate, placing the combination of the said substrate and the said solid catalyst in a chamber of... Agent: Townsend And Townsend And Crew, LLP

20100065809 - Nanowire comprising silicon rich oxide and method for producing the same: Disclosed herein is a nanowire including silicon rich oxide and a method for producing the same. The nanowire exhibits excellent electrically conducting properties and optical characteristics, and therefore is effectively used in a variety of applications including, for example, solar cells, sensors, photodetectors, light emitting diodes, laser diodes, EL devices,... Agent: Cantor Colburn, LLP

20100065814 - Hybrid organic/nanoparticle devices: Example embodiments disclosed herein may relate to organic electronic and/or organic optoelectronic devices, which may further relate to hybrid organic/nanoparticle devices with dual functions of resonant tunneling and light emission behaviors.... Agent: Berkeley Law & Technology Group, LLP

20100065813 - Light emitting device: A light emitting device includes a stacked body including at least a light emitting layer made of Inx(AlyGa1-y)1-xP (0≦x≦1, 0≦y≦1), a p-type cladding layer made of Inx(AlyGa1-y)1-xP (0≦x≦1, 0≦y≦1), and a bonding layer made of a semiconductor; and a substrate in which deviation in a lattice constant at a bonding... Agent: Turocy & Watson, LLP

20100065816 - Light emitting diode and fabrication method thereof: A light emitting diode (LED) and a method for fabricating the same, capable of improving brightness by forming a InGaN layer having a low concentration of indium, and whose lattice constant is similar to that of an active layer of the LED, is provided. The LED includes: a buffer layer... Agent: Birch Stewart Kolasch & Birch

20100065812 - Nitride semiconductor light emitting element: Provided is a nitride semiconductor light emitting element having an improved carrier injection efficiency from a p-type nitride semiconductor layer to an active layer by simple means from a viewpoint utterly different from the prior art. A buffer layer 2, an undoped GaN layer 3, an n-type GaN contact layer... Agent: Rabin & Berdo, PC

20100065815 - Semiconductor structure including mixed rare earth oxide formed on silicon: A method (and resultant structure) of forming a semiconductor structure, includes forming a mixed rare earth oxide on silicon. The mixed rare earth oxide is lattice-matched to silicon.... Agent: Mcginn Intellectual Property Law Group, PLLC

20100065811 - Single photon source with allnn current injection layer: A photon source includes a substrate, an active region formed above the substrate, and a pair of electrodes configured to provide an injection current which passes through the active region. The active region includes a quantum dot layer including one or more AlyGaxIn1-x-yN quantum dots, where 0≦x≦1 and 0≦y≦<1, and... Agent: Mark D. Saralino ( Sharp ) Renner, Otto, Boisselle & Sklar, LLP

20100065818 - Layers and patterns of nanowire or carbon nanotube using chemical self assembly and fabricating method in liquid crystal display device thereby: Disclosed are layers and patterns of nanowire or nanotube using a chemical self assembly for forming a semiconductor layer and a conductive layer of a thin film transistor by using a nanowire and/or nanotube solution and an diamine-based self-assembled monolayer (SAM) material. The Layers and patterns including layers and patterns... Agent: Mckenna Long & Aldridge LLP

20100065817 - Memory device and method of fabricating the same: A memory device includes a first electrode, a second electrode spaced apart from the first electrode and a nanotube or nanowire network disposed between the first electrode and the second electrode, having a heterojunction structure of a P-type network and an N-type network, and having a diode characteristic. Since the... Agent: Lowe Hauptman Ham & Berner, LLP

20100065819 - Well-aligned, high aspect-ratio, high-density silicon nanowires and methods of making the same: A method of producing silicon nanowires includes providing a substrate in the form of a doped material; formulating an etching solution; and applying an appropriate current density for an appropriate length of time. Related structures and devices composed at least in part from silicon nanowires are also described.... Agent: Buchanan, Ingersoll & Rooney PC

20100065823 - Gated resonant tunneling diode: A gated resonant tunneling diode (GRTD) that operates without cryogenic cooling is provided. This GRTD employs conventional CMOS process technology, preferably at the 65 nm node and smaller, which is different from other conventional quantum transistors that require other, completely different process technologies and operating conditions. To accomplish this, the... Agent: Texas Instruments Incorporated

20100065822 - Lipid nanotube or nanowire sensor: A sensor apparatus comprising a nanotube or nanowire, a lipid bilayer around the nanotube or nanowire, and a sensing element connected to the lipid bilayer. Also a biosensor apparatus comprising a gate electrode; a source electrode; a drain electrode; a nanotube or nanowire operatively connected to the gate electrode, the... Agent: Lawrence Livermore National Security, LLC

20100065824 - Method for reducing fermi-level-pinning in a non-silicon channel mos device: A method to reduce (avoid) Fermi Level Pinning (FLP) in high mobility semiconductor compound channel such as Ge and III-V compounds (e.g. GaAs or InGaAs) in a Metal Oxide Semiconductor (MOS) device. The method is using atomic hydrogen which passivates the interface of the high mobility semiconductor compound with the... Agent: Knobbe Martens Olson & Bear LLP

20100065821 - Molecular quantum interference device: A molecular quantum interference device is provided. A method for the design of such devices is also provided, the method including modelling of device performance.... Agent: Seed Intellectual Property Law Group PLLC

20100065820 - Nanotube device having nanotubes with multiple characteristics: A carbon nanotube of a nanotube device has at least two segments with different characteristics. The segments meet at a junction and a diameter of the carbon nanotube on either side of the junction is about the same. One segment may be doped differently from another segment. One segment may... Agent: Aka Chan LLP

20100065828 - compounds and organic light emitting diode using the same: Disclosed are new compounds and an organic light emitting diode using the same. The organic light emitting diode using the new compound according to the present invention exhibits excellent characteristics in terms of actuating voltage, light efficiency, and lifespan.... Agent: Mckenna Long & Aldridge LLP

20100065827 - Compounds and organic light emitting diode using the same: Disclosed are new compounds and an organic light emitting diode using the same. The organic light emitting diode using the new compound according to the present invention exhibits excellent characteristics in terms of actuating voltage, light efficiency, and lifespan.... Agent: Mckenna Long & Aldridge LLP

20100065831 - Hybrid organic light-emitting transistor device and manufacturing method thereof: A hybrid organic light-emitting transistor device and a manufacturing method thereof are provided. The hybrid organic light-emitting transistor device includes at least one organic light-emitting diode device and at least one organic thin-film transistor device placed on the same substrate. The organic light-emitting diode device has a first organic layer... Agent: Rabin & Berdo, PC

20100065834 - Integrated organic photovoltaic and light emitting diode device: An integrated organic photovoltaic and electroluminescent device includes an organic light emitting diode and an organic photovoltaic. The OLED and the OPV share a common substrate building layer.... Agent: Foley And Lardner LLP Suite 500

20100065832 - Light-emitting apparatus: [Solving Means] A display panel unit including a flexible substrate (10) having a flat portion including an extended portion (11) formed on each side thereof, a light-emitting portion (12) formed on one surface of the substrate (10) to extend to the extended portion, and an electrode terminal formed at an... Agent: Wenderoth, Lind & Ponack, L.L.P.

20100065825 - Light-emitting component: The invention relates to a light-emitting device, in particular a light-emitting diode, with an arrangement of layers on a substrate, wherein the arrangement of layers has an anode contact and a cathode contact which are in electrical contact with a light-emitting layer stack arranged between the anode contact and the... Agent: Sutherland Asbill & Brennan LLP

20100065826 - Novel fused polycyclic aromatic compound, process for producing the same, and use thereof: In one embodiment of the present invention, a novel fused polycyclic aromatic compound of the present invention is (a) a compound including a benzodichalcogenophenobenzodichalcogenophene (BXBX) skeleton further having an aromatic ring(s) located outside the BXBX skeleton, or (b) a compound including a BXBX skeleton in which a benzene ring is... Agent: Harness, Dickey & Pierce, P.L.C

20100065833 - Organic field-effect transistor and circuit: The invention relates to an organic field-effect transistor, in particular an organic thin film field-effect transistor comprising a gate electrode, a drain electrode and a source electrode, a dielectric layer which is formed in contact with the gate electrode, an active layer made from an organic material which is in... Agent: Sutherland Asbill & Brennan LLP

20100065830 - Organic thin film transistor and method for fabricating the same: Disclosed herein are a method for fabricating an organic thin film transistor, including treating the surfaces of a gate insulating layer and source/drain electrodes with a self-assembled monolayer (SAM)-forming compound through a one-pot reaction, and an organic thin film transistor fabricated by the method. According to example embodiments, the surface-treatment... Agent: Harness, Dickey & Pierce, P.L.C

20100065829 - Polymer wrapped carbon nanotube near-infrared photovoltaic devices: A photovoltaic device includes a photoactive region disposed between and electrically connected to two electrodes where the photoactive region includes photoactive polymer-wrapped carbon nanotubes that create excitons upon absorption of light in the range of about 400 nm to 1400 nm.... Agent: Duane Morris LLP - Princeton

20100065839 - Display device: A protective circuit includes a non-linear element, which includes a gate electrode, a gate insulating layer covering the gate electrode, a pair of first and second wiring layers whose end portions overlap with the gate electrode over the gate insulating layer and in which a second oxide semiconductor layer and... Agent: Eric Robinson

20100065840 - Display device: A protective circuit includes a non-linear element, which further includes a gate electrode, a gate insulating layer covering the gate electrode, a pair of first and second wiring layers whose end portions overlap with the gate electrode over the gate insulating layer and in which a conductive layer and a... Agent: Eric Robinson

20100065837 - Method for manufacturing thin film transistor using oxide semiconductor and display apparatus: A thin film transistor is manufactured by forming a gate electrode on a substrate, forming a first insulating film on the gate electrode, forming an oxide semiconductor layer on the first insulating film with an amorphous oxide, patterning the first insulating film, patterning the oxide semiconductor layer, forming a second... Agent: Fitzpatrick Cella Harper & Scinto

20100065845 - Organic electroluminescence display device: The invention provides an organic electroluminescent display device comprising: an organic electroluminescent element comprising an organic layer comprising a luminescent layer disposed between a pixel electrode and an upper electrode; and a drive TFT that supplies an electric current to the organic electroluminescent element, wherein: the drive TFT comprises a... Agent: Birch Stewart Kolasch & Birch

20100065836 - Resistive memory device and method of fabricating the same: A resistive memory device includes an insulation layer over a substrate, a nanowire penetrating the insulation layer, a resistive layer formed over the insulation layer and contacting with the nanowire, and an upper electrode formed over the resistive layer.... Agent: Lowe Hauptman Ham & Berner, LLP

20100065842 - Semiconductor device and manufacturing method thereof: It is an object of the present invention to provide a thin film transistor in which an oxide semiconductor film containing indium (In), gallium (Ga), and zinc (Zn) is used and contact resistance of a source or a drain electrode layer is reduced, and a manufacturing method thereof. An IGZO... Agent: Eric Robinson

20100065838 - Semiconductor device and method for manufacturing the same: An object is to provide a semiconductor device including a thin film transistor with excellent electrical characteristics and high reliability and a method for manufacturing the semiconductor device with high mass productivity. A main point is to form a low-resistance oxide semiconductor layer as a source or drain region after... Agent: Eric Robinson

20100065844 - Thin film transistor and method of manufacturing thin film transistor: The present invention provides a thin film transistor including: a channel layer mainly containing a conductive oxide semiconductor; a pair of electrodes on the channel layer; and a protective film covering an exposed surface of the channel layer, exposed to the gap between the pair of electrodes. The protective film... Agent: Sonnenschein Nath & Rosenthal LLP

20100065841 - Thin film transistor array substrate and method of manufacturing the same: A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide... Agent: Cantor Colburn, LLP

20100065835 - Thin film transistor having crystalline indium oxide semiconductor film: To provide a thin film transistor having an indium oxide-based semiconductor film which allows only a thin metal film on the semiconductor film to be selectively etched. A thin film transistor having a crystalline indium oxide semiconductor film which is composed mainly of indium oxide and contains a positive trivalent... Agent: Millen, White, Zelano & Branigan, P.C.

20100065843 - Zinc oxide-based semiconductor device and method for producing same: A semiconductor device that has excellent characteristics and mass productivity wherein the introduction of defects thereinto at the time of device separation is prevented, and a method for producing the semiconductor device. In particular, there is provided a high-performance semiconductor device having excellent luminous efficiency, longevity and mass productivity; and... Agent: Frishauf, Holtz, Goodman & Chick, PC

20100065846 - System in package and socket: This invention relates to a system in package including a plurality of integrated circuit chips and a substrate on which the plurality of integrated circuit chips are mounted and characterized in that a testability circuit for facilitating a test on at least one of the integrated circuit chips is incorporated... Agent: Knobbe Martens Olson & Bear LLP

20100065847 - Al alloy film for display device,display device, and sputtering target: The present invention provides an Al alloy film for a display device, to be directly connected to a conductive oxide film on a substrate, the Al alloy film comprising Ge in an amount of 0.05 to 0.5 at %, and comprising Gd and/or La in a total amount of 0.05... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100065848 - Tft substrate and method of fabricating the same: Provided are a thin-film transistor (TFT) substrate which can facilitate the formation of contact holes and has improved reliability and a method of fabricating the TFT substrate. The TFT substrate includes a gate wiring formed on an insulating substrate; a data wiring defining a pixel region by intersecting the gate... Agent: F. Chau & Associates, LLC

20100065850 - Array substrate and method of manufacturing the same: An array substrate includes a substrate including a display area and a peripheral area surrounding the display area, a transistor layer formed in the display area of the substrate and electrically connected to a gate line and a data line, a color filter formed in a pixel region on the... Agent: F. Chau & Associates, LLC

20100065849 - Organic light emitting display and fabrication method of the same: Disclosed is an organic light emitting display. In the organic light emitting display, a substrate is divided into a display region, in which an image is displayed, and a non-display region surrounding the display region. The organic light emitting display includes a plurality of pixels provided on the display region.... Agent: Haynes And Boone, LLPIPSection

20100065851 - Semiconductor device, and its manufacturing method: A semiconductor device 100 includes a thin-film transistor 123 and a thin-film diode 124. The thin-film transistor 123 includes a semiconductor layer S1 with a channel region 114, a source region and a drain region 112, a gate electrode 109 that controls the conductivity of the channel region 114, and... Agent: Birch Stewart Kolasch & Birch

20100065852 - System for displaying images and fabricating method thereof: A system for displaying images and fabricating method thereof are provided. The system includes a thin film transistor substrate including a substrate having a display area and a pad area. The thin film transistor substrate further includes a conductive line disposed on the substrate in the display area. The conductive... Agent: Lowe Hauptman Ham & Berner, LLP

20100065853 - Process and system for laser crystallization processing of film regions on a substrate to minimize edge areas, and structure of such film regions: A process and system for processing a thin film sample are provided. In particular, a beam generator can be controlled to emit at least one beam pulse. The beam pulse is then masked to produce at least one masked beam pulse, which is used to irradiate at least one portion... Agent: Baker Botts L.L.P.

20100065854 - Growth and manufacture of reduced dislocation density and free-standing aluminum nitride films by hydride vapor phase epitaxy: A Group III-nitride semiconductor film containing aluminum, and methods for growing this film. A film is grown by patterning a substrate, and growing the Group III-nitride semi-conductor film containing aluminum on the substrate at a temperature designed to increase the mobility of aluminum atoms to increase a lateral growth rate... Agent: Gates & Cooper LLP Howard Hughes Center

20100065855 - Method of manufacturing group-iii nitride semiconductor light emitting device, group-iii nitride semiconductor light emitting device and lamp: The object of the present invention is to provide a method of manufacturing a Group-III nitride semiconductor light-emitting device that is highly productive and that enables production of a device having excellent light-emitting properties; a Group-III nitride semiconductor light-emitting device; and a lamp using the light emitting device. The present... Agent: Sughrue Mion, PLLC

20100065856 - Semiconductor package with integrated passives and method for fabricating same: According to one disclosed embodiment, a semiconductor package for integrated passives and a semiconductor device comprises a high permeability structure formed over a surface of the semiconductor package and surrounding a contact body of the semiconductor package, the contact body being connected to an output of the semiconductor device. The... Agent: Farjami & Farjami LLP

20100065857 - Silicon carbide semiconductor device and method of manufacturing the same: A silicon carbide semiconductor device having excellent performance characteristics and a method of manufacturing the same are obtained. A coating film made of Si is formed on an initial growth layer on a 4H—SiC substrate, and an extended terrace surface is formed in a region covered with the coating film.... Agent: Venable LLP

20100065858 - Semiconductor device including a plurality of semiconductor substrates and method of manufacturing the same: In a semiconductor device, a first semiconductor substrate includes a first element on a first-surface side thereof, and a second semiconductor substrate includes a second element and a wiring part on a first-surface side thereof. The first semiconductor substrate and the second semiconductor substrate are attached with each other in... Agent: Posz Law Group, PLC

20100065859 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a substrate, and a semiconductor thin film bonded to the substrate, wherein the semiconductor thin film includes a plurality of discrete operating regions and an element isolating region which isolates the plurality of discrete operating regions, and the element isolating region is etched to a shallower... Agent: Rabin & Berdo, PC

20100065860 - Light emitting diode lighting device: The present invention relates to a light emitting diode (LED) lighting device (10). The lighting device comprises a light guide plate (12), and a plurality of LEDs (16) accommodated in holes (14) arranged in the plane of the light guide. At least one hole has a first side facet (18)... Agent: Philips Intellectual Property & Standards

20100065862 - Light emitting, photovoltaic or other electronic apparatus and system: The present invention provides an electronic apparatus, such as a lighting device comprised of light emitting diodes (LEDs) or a power generating apparatus comprising photovoltaic diodes, which may be created through a printing process, using a semiconductor or other substrate particle ink or suspension and using a lens particle ink... Agent: Gamburd Law Group LLC

20100065863 - Light emitting, photovoltaic or other electronic apparatus and system: The present invention provides an electronic apparatus, such as a lighting device comprised of light emitting diodes (LEDs) or a power generating apparatus comprising photovoltaic diodes, which may be created through a printing process, using a semiconductor or other substrate particle ink or suspension and using a lens particle ink... Agent: Gamburd Law Group LLC

20100065861 - Light-emitting device: A light-emitting device 1 includes a base 2 and a light-emitting element 3 that is disposed on the base 2. The light-emitting element 3 is made up of a plurality of semiconductor layers including a light-emitting layer, and at the same time, is covered with a wavelength converting portion 4... Agent: Hamre, Schumann, Mueller & Larson P.C.

20100065864 - White point compensated leds for lcd displays: A backlight for a color LCD includes white light LEDs formed using a blue LED die with a layer of red and green phosphors over it. The attenuation by the LCD layers of the blue light component of the white light is typically greater as the blue wavelength becomes shorter.... Agent: Philips Intellectual Property & Standards

20100065865 - Method of forming nitride semiconductor and electronic device comprising the same: A method of forming a nitride semiconductor through ion implantation and an electronic device including the same are disclosed. In the method, an ion implantation region composed of a line/space pattern is formed on a substrate at an ion implantation dose of more than 1E17 ions/cm2 to 5E18 ions/cm2 or... Agent: Ampacc Law Group

20100065878 - Adhesive sheet for light-emitting diode device and light-emitting diode device: m

20100065866 - Inverted led structure with improved light extraction: A light source and method for fabricating the same are disclosed. The light source includes a substrate and a light emitting structure. The substrate has a first surface and a second surface, the second surface including a curved, convex surface with respect to the first surface of the substrate. The... Agent: The Law Offices Of Calvin B. Ward

20100065876 - Led package with metal pcb: The present invention relates to a light emitting diode (LED) package. An object of the present invention is to provide an LED package having a metal PCB, which has a superior heat dissipation property and a compact structure, does not largely restrict use of conventional equipments, and is compatible with... Agent: H.c. Park & Associates, PLC

20100065867 - Light emitting device: A light emitting device has a semiconductor multilayer structure having a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type different from the first conductivity type, and an active layer sandwiched between the first semiconductor layer and the second semiconductor layer, a... Agent: Mcginn Intellectual Property Law Group, PLLC

20100065870 - Light emitting device: A light emitting device includes a semiconductor multilayer structure having a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and an active layer. A reflecting layer is provided at one surface of the semiconductor multilayer structure and reflects a light emitted... Agent: Mcginn Intellectual Property Law Group, PLLC

20100065874 - Light emitting device: A light emitting device includes: a first substrate with an end surface formed by separation on its outer edge; a second substrate including on its upper surface a first electrode and a second electrode, and at its side corner a first extraction electrode connected to the first electrode and a... Agent: Turocy & Watson, LLP

20100065869 - Light emitting device and method for fabricating the same: A light emitting device includes a semiconductor multilayer structure having a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and an active layer. A reflecting layer is provided at a side of one surface of the semiconductor multilayer structure and reflects... Agent: Mcginn Intellectual Property Law Group, PLLC

20100065873 - Light-emitting device comprising an elastomeric layer: A light emitting device (100) is provided, which comprises a substrate (101) accomodating at least one light emitting diode (104) and an elastomeric layer (105) arranged to receive light from the light emitting diode(s) (104). The elastomeric layer (105) comprises phosphors (106), which enhance the output of light from the... Agent: Philips Intellectual Property & Standards

20100065875 - Optical lens and light emitting device using the same: A light emitting device includes a light-emitting semiconductor unit and an optical lens coupled to the light-emitting semiconductor unit. The optical lens includes a top surface, a base portion opposite to the top surface, and a peripheral side surface defining a first refractive portion. The top surface is generally funnel-shaped.... Agent: PCe Industry, Inc. Att. Steven Reiss

20100065871 - Polymers with transmission into the ultraviolet: An ultra violet light transmitting polymer is obtainable by the polymerisation of at least one compound having a substantially non UV absorbing core group comprising; linear or branched aliphatic hydrocarbons which may contain an aliphatic ring; or polydialkylsiloxanes. The compounds have at least one functional group comprising formula (A), (B)... Agent: Myers Bigel Sibley & Sajovec

20100065868 - Semiconductor light emitting device: A semiconductor light emitting device including: a substrate; an electrode layer; and a semiconductor multilayer film disposed between the substrate and the electrode layer, the semiconductor multilayer film including: an n-type semiconductor layer; a p-type semiconductor layer; and an active layer disposed between the n-type semiconductor layer and the p-type... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100065872 - Semiconductor light emitting device and method of fabricating the same: Provided are a semiconductor light emitting device and a method of fabricating the same. The semiconductor light emitting device comprises: a light emitting structure comprising a first conductive type semiconductor layer, an active layer under the first conductive type semiconductor layer, and a second conductive type semiconductor layer under the... Agent: Birch Stewart Kolasch & Birch

20100065877 - Semiconductor light-emitting device with improved light extraction efficiency: The present invention provides a semiconductor light-emitting device. The light-emitting device comprises a first conductive clad layer, an active layer, and a second conductive clad layer sequentially formed on a substrate. In the light-emitting device, the substrate has one or more side patterns formed on an upper surface thereof while... Agent: Volpe And Koenig, P.C.

20100065882 - Glass for covering optical element, glass-covered light-emitting element and glass-covered light-emitting device: The glass-covered light-emitting element includes a semiconductor light-emitting element having a principal surface, and a P2O5—ZnO—SnO type glass covering the principal surface of the semiconductor light-emitting element, and the glass consists essentially of, as represented by mol % based on the following oxides, from 20 to 45% of P2O5, from... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100065881 - Light-emitting element capable of increasing amount of light emitted, light-emitting device including the same, and method of manufacturing light-emitting element and light-emitting device: A light-emitting element capable of increasing the amount of light emitted, a light-emitting device including the same, and a method of manufacturing the light-emitting element and the light-emitting device include a buffer layer having an uneven pattern formed thereon; a light-emitting structure including a first conductive pattern of a first... Agent: Mills & Onello LLP

20100065879 - Optoelectronic device with housing body: A housing body for an optoelectronic component comprises a main surface having a first area region and a second area region. The first area region and the second area region form a step in the main surface. The first area region and the second area region adjoin one another by... Agent: Slater & Matsil, L.L.P.

20100065883 - Process for making contact with and housing integrated circuits: A process for producing electrical contact connections for a component integrated in a substrate material is provided, the substrate material having a first surface region, and at least one terminal contact being arranged at least partially in the first surface region for each component, which is distinguished in particular by... Agent: Charles N. J. Ruggiero Ohlandt, Greeley, Ruggiero & Perle, L.L.P.

20100065880 - Silicone laminated substrate, method of producing same, silicone resin composition for producing silicone laminated substrate, and led device: A silicone laminated substrate, including a glass cloth, and a cured product of a silicone resin composition with which the glass cloth is filled and a surface of the glass cloth is coated, in which the silicone resin composition includes: (A) an organopolysiloxane having a resin structure consisting of specific... Agent: Birch Stewart Kolasch & Birch

20100065884 - Electrostatic discharge diode: The present invention relates to an electrostatic discharge diode. The electrostatic discharge diode according to exemplary embodiment of the present invention includes: an N-type well formed on a substrate; an n− region formed on the N-type well; a plurality of p− regions penetrated and formed in the n− region; a... Agent: Okamoto & Benedicto, LLP

20100065885 - Soi device with more immunity from stubstrate voltage: A semiconductor on insulator device has an insulator layer, an active layer (40) on the insulator layer, a lateral arrangement of collector (10), emitter (30) and base (20) on the active layer, and a high Base-dose region (70) extending under the emitter towards the insulator to suppress vertical current flowing... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100065887 - Field effect transistor source or drain with a multi-facet surface: FET configurations in which two (or more) facets are exposed on a surface of a semiconductor channel, the facets being angled with respect to the direction of the channel, allow for conformal deposition of a convex or concave S/D. A convex tip of the S/D enhances electric fields at the... Agent: Sonnenschein Nath & Rosenthal LLP

20100065886 - Semiconductor device and manufacturing method thereof: According to an aspect of the present invention, there is provided a semiconductor device including: a substrate that includes a semiconductor region including Ge as a primary component; a compound layer that is formed above the semiconductor region, that includes Ge and that has a non-metallic characteristic; an insulator film... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100065888 - High mobility tri-gate devices and methods of fabrication: A high mobility semiconductor assembly. In one exemplary aspect, the high mobility semiconductor assembly includes a first substrate having a first reference orientation located at a <110> crystal plane location on the first substrate and a second substrate formed on top of the first substrate. The second substrate has a... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100065889 - Porous device for optical and electronic applications and method of fabricating the porous device: A porous device for optical and electronic applications comprises a single crystal substrate and a porous single crystal structure epitaxially disposed on the substrate, where the porous single crystal structure includes a three-dimensional arrangement of pores. The three-dimensional arrangement may also be a periodic arrangement. A method of fabricating such... Agent: Brinks Hofer Gilson & Lione

20100065890 - Semiconductor substrate of gaas and semiconductor device: A semiconductor substrate, of GaAs with a semiconductor layer sequence applied on top of the substrate. The semiconductor layer sequence comprises a plurality of semiconductor layers of Al1-yGayAs1-xPx with 0≦x≦1 and 0≦y≦1. A number of the semiconductor layers respectively comprising a phosphorus component x which is greater than in a... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100065891 - Compact memory arrays: Embodiments of the invention describe compact memory arrays. In one embodiment, the memory cell array includes first, second, and third gate lines disposed over a substrate, the second gate lines are disposed between the first and the third gate lines. The first, the second, and the third gate lines form... Agent: Slater & Matsil LLP

20100065892 - Bio-sensor and method of manufacturing the same: A bio-sensor includes a gate dielectric formed on a silicon semiconductor substrate, a gate electrode of a conductive diamond film formed on the gate dielectric, probe molecules bonded on the gate electrode for detecting biomolecules, and source/drain regions formed on the semiconductor substrate at the sides of the gate electrode.... Agent: Bacon & Thomas, PLLC

20100065893 - Semiconductor memory structure with stress regions: A semiconductor memory structure with stress regions includes a substrate defining a first and a second device zone; a first and a second stress region formed in each of the first and second device zone to yield stress different in level; a barrier plug separating the two device zones from... Agent: Schmeiser Olsen & Watts

20100065894 - Semiconductor device having a field effect source/drain region: A semiconductor device includes an active region defined in a semiconductor substrate, and gate electrodes crossing over the active region. Source/drain regions are defined in the active region on two sides of the gate electrode. At least one of the source/drain regions is a field effect source/drain region generated by... Agent: Frank Chau, Esq. F. Chau & Associates, LLC

20100065895 - Method for producing at least one porous layer: A method for producing at least one porous layer on a substrate, whereby a suspension, which contains particles from a layer-forming material or molecular precursors of the layer-forming material, as well as at least one organic component, is applied to the substrate, the precursors of the layer-forming material are subsequently... Agent: Kenyon & Kenyon LLP

20100065896 - Image sensor including a pixel cell having an epitaxial layer, system having the same, and method of forming a pixel cell: A pixel cell includes a substrate, an epitaxial layer, and a photo converting device in the epitaxial layer. The epitaxial layer has a doping concentration profile of embossing shape, and includes a plurality of layers that are stacked on the substrate. The photo converting device does not include a neutral... Agent: Harness, Dickey & Pierce, P.L.C

20100065897 - Cmos image sensor and method for fabricating the same: A CMOS image sensor and a method for fabricating the same are disclosed. The method includes forming a plurality of color filters on a substrate, each color filter having a curvature, and forming microlenses on the color filters that each has a radius of curvature that varies with the wavelength... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20100065898 - Integrated circuit semiconductor device having different gate stacks in cell region and core/peripheral region and method of manufacturing the same: The integrated circuit semiconductor device includes a semiconductor substrate having a cell region and a core/peripheral region, a first gate stack including a first gate insulating film and a first gate electrode on the semiconductor substrate in the cell region, wherein the first gate insulating film includes a silicon oxide... Agent: Lee & Morse, P.C.

20100065900 - Semiconductor device including resistance element: A semiconductor device includes a resistance element. The resistance element includes a first and second conductive films, second insulating film, and contact plugs. The first conductive film is formed on a semiconductor substrate with a first insulating film interposed therebetween. The second insulating film is formed on the first conductive... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100065899 - Semiconductor devices including auxiliary gate electrodes and methods of fabricating the same: A semiconductor device may include first and second auxiliary gate electrodes and a semiconductor layer crossing the first and second auxiliary gate electrodes. A primary gate electrode may be provided on the semiconductor layer so that the semiconductor layer is between the primary gate electrode and the first and second... Agent: Myers Bigel Sibley & Sajovec

20100065901 - Electrically programmable and erasable memory device and method of fabrication thereof: The present memory device includes a substrate, a tunneling layer over the substrate, a floating gate over the tunneling layer, a dielectric over the floating gate and including silicon oxynitride, and a control gate over the dielectric. A method for fabricating such a memory device is also provided, including various... Agent: Spansion LLC C/o Murabito , Hao & Barnes LLP

20100065902 - Scalable high density non-volatile memory cells in a contactless memory array: A plurality of mesas are formed in the substrate. Each pair of mesas forms a trench. A plurality of diffusion areas are formed in the substrate. A mesa diffusion area is formed in each mesa top and a trench diffusion area is formed under each trench. A vertical, non-volatile memory... Agent: Leffert Jay & Polglaze, P.A.

20100065903 - High-voltage vertical transistor with a varied width silicon pillar: In one embodiment, a vertical HVFET includes a pillar of semiconductor material a pillar of semiconductor material arranged in a loop layout having at least two substantially parallel and substantially linear fillet sections each having a first width, and at least two rounded sections, the rounded sections having a second... Agent: The Law Offices Of Bradley J. Bereznak

20100065907 - Fin fet and method of fabricating same: A fin field effect transistor (fin FET) is formed using a bulk silicon substrate and sufficiently guarantees a top channel length formed under a gate, by forming a recess having a predetermined depth in a fin active region and then by forming the gate in an upper part of the... Agent: Muir Patent Consulting, PLLC

20100065904 - High density trench field effect transistor: A semiconductor structure comprises trenches extending into a semiconductor region. Portions of the semiconductor region extend between adjacent trenches forming mesa regions. A gate electrode is in each trench. Well regions of a first conductivity type extend in the semiconductor region between adjacent trenches. Source regions of a second conductivity... Agent: Townsend And Townsend And Crew, LLP

20100065905 - Structures and methods for reducing dopant out-diffusion from implant regions in power devices: A semiconductor structure comprises a drift region of a first conductivity type in a semiconductor region. A well region of a second conductivity type is over the drift region. A source region of the first conductivity type is in an upper portion of the well region. A heavy body region... Agent: Townsend And Townsend And Crew, LLP

20100065906 - System for vertical dmos with slots: A device for providing a high power, low resistance, efficient vertical DMOS device is disclosed. The device comprises providing a semiconductor substrate with a source body structure thereon. The device further comprises a plurality of slots in the source/body structure and providing a metal within the plurality of slots to... Agent: Sawyer Law Group PC

20100065908 - Alignment of trench for mos: Manufacturing a power transistor by forming a gate structure on a first layer, forming a trench in the first layer, self aligned with the gate structure, and forming part of the transistor in the trench. By forming a spacer next to the gate, the spacer and gate can be used... Agent: Bacon & Thomas, PLLC

20100065909 - Semiconductor device and method for making the same: To provide a semiconductor device and a method of making the same, the device being capable of preventing decrease in the withstanding voltage along the direction perpendicular to the source-drain direction and thereby improving the resistance to an overvoltage (overcurrent), the device includes: a p-type semiconductor substrate 201; an n-type... Agent: Harness, Dickey & Pierce, P.L.C

20100065910 - Semiconductor device and method for manufacturing the same: A semiconductor device includes a first MISFET and a second MISFET, wherein the first MISFET includes a semiconductor substrate 100, a first gate insulating film 101a and a first gate electrode 102a formed on the first region of the semiconductor substrate, and first side walls (103a, 120a) formed on the... Agent: Mcdermott Will & Emery LLP

20100065911 - Semiconductor memory device: s

20100065912 - Stacked semiconductor device and related method: A stacked semiconductor device and a method for fabricating the stacked semiconductor device are disclosed. The stacked semiconductor device includes a first insulating interlayer having an opening that partially exposes a substrate, wherein the substrate includes single crystalline silicon, and a first seed pattern that fills the opening, wherein the... Agent: Volentine & Whitt PLLC

20100065915 - Chemical mechanical polishing (cmp) method for gate last process: A method for fabricating a semiconductor device is provided which includes providing a semiconductor substrate, forming a plurality of transistors, each transistor having a dummy gate structure, forming a contact etch stop layer (CESL) over the substrate including the dummy gate structures, forming a first dielectric layer to fill in... Agent: Haynes And Boone, LLPIPSection

20100065914 - Method of forming a single metal that performs n and p work functions in high-k/metal gate devices: The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor substrate with a first region and a second region, forming a high-k dielectric layer over the semiconductor substrate, forming a metal layer over the high-k dielectric layer, the metal layer having a first... Agent: David M. O' Dell Haynes And Boone, LLP

20100065913 - Performance-aware logic operations for generating masks: A method for forming masks for manufacturing a circuit includes providing a design of the circuit, wherein the circuit comprises a device; performing a first logic operation to determine a first region for forming a first feature of the device; and performing a second logic operation to expand the first... Agent: Slater & Matsil, L.L.P.

20100065916 - Semiconductor device and method for manufacturing the same: Disclosed are a semiconductor device and a method for manufacturing the same. The semiconductor device includes an isolation area formed on a semiconductor substrate to define NMOS and PMOS areas, a gate insulating layer and a gate formed on each of the NMOS and PMOS areas, a primary gate spacer... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100065918 - Semiconductor device and method for manufacturing the same: A semiconductor device includes a semiconductor substrate containing a p-type diffusion layer and an n-type diffusion layer which are separated by an element separation film; a gate insulating film formed on or above the p-type diffusion layer and the n-type diffusion layer of the semiconductor substrate, respectively; a gate electrode... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100065917 - Semiconductor device and method of manufacturing the same: A semiconductor device having a double-gate structure has: a first fin layer; a first epitaxial growth layer formed on a surface of the first fin layer, and constituting a first source/drain diffusion layer, and containing the n-type impurity; a second fin layer; a second epitaxial growth layer formed on a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100065919 - Semiconductor devices including multiple stress films in interface area: A semiconductor substrate includes a first transistor area having a first gate electrode and first source/drain areas, a second transistor area having a second gate electrode and second source/drain areas, and an interface area provided at an interface of the first transistor area and the second transistor area and having... Agent: Myers Bigel Sibley & Sajovec

20100065920 - Method to reduce collector resistance of a bipolar transistor and integration into a standard cmos flow: The invention, in one aspect, provides a method for fabricating a semiconductor device. In one aspect, the method provides for a dual implantation of a tub of a bipolar transistor. The tub in bipolar region is implanted by implanting the tub through separate implant masks that are also used to... Agent: Hitt Gaines, PC Lsi Corporation

20100065921 - Semiconductor device with local interconnects: A semiconductor device with local interconnects is provided. The semiconductor device comprises a first gate line structure and a second gate line structure disposed on a substrate and substantially collinear. A first pair of source/drain regions is formed in the substrate on both sides of the first gate line structure... Agent: Thomas, Kayden, Horstemeyer & Risley LLP

20100065922 - Semiconductor devices and methods of manufacture thereof: Semiconductor devices and methods of manufacture thereof are disclosed. In a preferred embodiment, a method of manufacturing a semiconductor device includes providing a semiconductor wafer, forming at least one isolation structure within the semiconductor wafer, and forming at least one feature over the semiconductor wafer. A top portion of the... Agent: Slater & Matsil LLP

20100065923 - Iii-nitride device with back-gate and field plate and process for its manufacture: A III-Nitride device has a back-gate disposed in a trench and under and in close proximity to the 2 DEG layer and in lateral alignment with the main gate of the device. A laterally disposed trench is also disposed in a trench and under and in close proximity to the... Agent: Farjami & Farjami LLP

20100065924 - Ultra-shallow junctions using atomic-layer doping: A semiconductor device and a method of manufacturing are provided. A substrate has a gate stack formed thereon. Ultra-shallow junctions are formed by depositing an atomic layer of a dopant and performing an anneal to diffuse the dopant into the substrate on opposing sides of the gate stack. The substrate... Agent: Slater & Matsil, L.L.P.

20100065925 - Local charge and work function engineering on mosfet: The present disclosure provides a semiconductor device. The semiconductor device includes a semiconductor substrate having a source region and a drain region, defining a first dimension from the source to drain; and a gate stack disposed on the semiconductor substrate and partially interposed between the source region and the drain... Agent: Haynes And Boone, LLPIPSection

20100065926 - Photoresist etch back method for gate last process: A method is provided for fabricating a semiconductor device. The method includes providing a substrate including a dummy gate structure formed thereon, removing the dummy gate structure to form a trench, forming a first metal layer over the substrate to fill a portion of the trench, forming a protection layer... Agent: Haynes And Boone, LLPIPSection

20100065927 - Semiconductor device and fabrication method of the same: A disclosed semiconductor device includes a gate insulation film formed on a silicon substrate and a metal gate electrode formed in the gate insulation film, wherein the gate insulation film includes a first insulation film, a second insulation film that is formed on the first insulation film and has a... Agent: Ipusa, P.l.l.c

20100065928 - Semiconductor device and manufacturing method of semiconductor device: In one aspect of the present invention, a semiconductor device may include a first semiconductor layer of a first conductivity type and having a main surface that has a first plane orientation, a second semiconductor layer of the first conductivity type and having a main surface that has a second... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100065930 - Method of etching sacrificial layer, method of manufacturing mems device, mems device and mems sensor: The method of etching a sacrificial layer according to the present invention includes the steps of forming a sacrificial layer having a protrusive shape on a base layer, forming a covering film covering the sacrificial layer, forming a protective film made of a material whose etching selection ratio to the... Agent: Rabin & Berdo, PC

20100065929 - Semiconductor device: An object of the invention is to provide a smaller semiconductor device of which the manufacturing process is simplified and the manufacturing cost is reduced. Furthermore, an object of the invention is to provide a semiconductor device having a cavity. A device element 3 is formed on a front surface... Agent: Morrison & Foerster LLP

20100065932 - Mems device, mems device module and acoustic transducer: A MEMS device includes a first insulating film formed on a semiconductor substrate, a vibrating film formed on the first insulating film, and a fixed film above the vibrating film with an air gap being interposed therebetween. The semiconductor substrate has a region containing N-type majority carriers. A concentration of... Agent: Mcdermott Will & Emery LLP

20100065931 - Micro-electromechanical system microphone structure and method of fabricating the same: A method of fabricating a micro-electromechanical system microphone structure is disclosed. First, a substrate defining a MEMS region and a logic region is provided, and a surface of the substrate has a dielectric layer thereon. Next, at least one metal interconnect layer is formed on the dielectric layer in the... Agent: North America Intellectual Property Corporation

20100065933 - Semiconductor strain gauge and the manufacturing method: A high-density impurity diffused layer of an identical conduction type to the semiconductor substrate on which the impurity is doped higher in density than the semiconductor substrate around the diffuse resistance region is provided, one side of the electrodes is formed extending to the high-density impurity diffused layer and the... Agent: Jordan And Hamburg LLP

20100065934 - Transducer: A transducer for use in a harsh environment including a substrate and a transducer die directly coupled to the substrate by a bond frame positioned between the substrate and the transducer die. The transducer die includes a transducer element which provides an output signal related to a physical characteristic to... Agent: Thompson Hine L.L.P. Intellectual Property Group

20100065935 - Structure and method to fabricate high performance mtj devices for spin-transfer torque (stt)-ram: A STT-RAM MTJ is disclosed with a MgO tunnel barrier formed by a NOX process, a CoFeB/FeSiO/CoFeB composite free layer with a middle nanocurrent channel layer to minimize Jc0, and a Ru capping layer to enhance the spin scattering effect and increase dR/R. Good write margin is achieved by modifying... Agent: Saile Ackerman LLC

20100065936 - Integrated circuit package system with image sensor system: An integrated circuit package system is provided including providing a wafer including image sensor systems having interconnects connected thereto and encapsulating the image sensor systems and interconnects in a transparent encapsulant. The system includes removing a portion of the transparent encapsulant to expose portions of the interconnects and singulating the... Agent: Law Offices Of Mikio Ishimaru

20100065937 - Photonic power switch and method of controlling current flow in the photonic power switch and use of such photonic power switch: Photonic power switch and method of controlling current flow in the photonic power switch, the photonic power switch comprising an avalanche photo diode installed on a switch element, the switch element comprising a carrier donor layer and a channel layer. Photons are injected in the avalanche photo diode for generating... Agent: Harness, Dickey & Pierce, P.L.C

20100065938 - Ion implantation method, method of producing solid-state imaging device, solid-state imaging device, and electronic apparatus: An ion implantation method includes performing ion implantation a plurality of times using a plurality of ion implantation masks each including main mask portions, bridge portions connecting between the main mask portions, and openings corresponding to parts of annular regions where ions are to be implanted, whereby a plurality of... Agent: Sonnenschein Nath & Rosenthal LLP

20100065939 - Thin active layer fishbone photodiode with a shallow n+ layer and method of manufacturing the same: The present invention is directed toward a detector structure, detector arrays, and a method of detecting incident radiation. The present invention comprises a photodiode array and method of manufacturing a photodiode array that provides for reduced radiation damage susceptibility, decreased affects of crosstalk, reduced dark current (current leakage) and increased... Agent: Patentmetrix

20100065940 - 3-d integrated circuit system and method: A semiconductor fabrication system and method are presented. A three dimensional multilayer integrated circuit fabrication method can include forming a first device layer and forming a second device layer on top of the first device layer with minimal detrimental heat transfer to the first layer by utilizing a controlled laser... Agent: Spansion LLC C/o Murabito , Hao & Barnes LLP

20100065941 - Intermediate semiconductor structures: An intermediate semiconductor structure that comprises a substrate and at least one undercut structure formed in the substrate is disclosed. The undercut feature may include a vertical opening having a lateral cavity therein, the vertical opening extending below the lateral cavity. The lateral cavity may include faceted sidewalls.... Agent: Trask Britt, P.C./ Micron Technology

20100065942 - Semiconductor device and method of forming high-frequency circuit structure and method thereof: A semiconductor device is made by providing an integrated passive device (IPD). Through-silicon vias (TSVs) are formed in the IPD. A capacitor is formed over a surface of the IPD by depositing a first metal layer over the IPD, depositing a resistive layer over the first metal layer, depositing a... Agent: Robert D. Atkins

20100065943 - Method for including decoupling capacitors into semiconductor circuit having logic circuit therein and semiconductor circuit thereof: A method for including decoupling capacitors into a semiconductor circuit having at least a logic circuit therein, includes: arranging a first decoupling capacitor and a second decoupling capacitor into a first area and a second area around the logic circuit respectively, wherein a gate oxide thickness of the first decoupling... Agent: North America Intellectual Property Corporation

20100065944 - Semiconductor device with decoupling capacitor design: An integrated circuit includes a circuit module having a plurality of active components coupled between a pair of supply nodes, and a capacitive decoupling module coupled to the circuit module. The capacitive decoupling module includes a plurality of metal-insulator-metal (MiM) capacitors coupled in series between the pair of supply nodes,... Agent: Duane Morris LLP (tsmc)IPDepartment

20100065945 - Semiconductor device and manufacturing method thereof: A semiconductor integrated circuit is reduced in size by suppressing lateral extension of an isolation region when impurities are thermally diffused in a semiconductor substrate to form the isolation region. Boron ions (B+) are implanted into an epitaxial layer through a third opening K3 to form a P-type impurity region,... Agent: Morrison & Foerster LLP

20100065946 - Bonded wafer substrate for use in mems structures: A method of manufacturing a semiconductor device includes providing first and second semiconductor substrates, each having first and second main surfaces opposite to one another. A roughened surface is formed on at least one of the first main surface of the first semiconductor substrate and the second main surface of... Agent: Panitch Schwarze Belisario & Nadel LLP

20100065947 - Method for evaluating impurity distribution under gate electrode without damaging silicon substrate: According to the evaluation method, a gate electrode made of a silicon containing material is removed without removing a gate insulating film by contacting pyrolysis hydrogen generated by pyrolysis to the semiconductor device that includes the gate electrode arranged on a semiconductor substrate through a gate insulating film, and a... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100065948 - Semiconductor device and method of forming a fan-in package-on-package structure using through-silicon vias: A semiconductor device is made by providing a first semiconductor die having a plurality of contact pads formed over a first surface of the first semiconductor die and having a plurality of through-silicon vias (TSVs) formed within the first semiconductor die. A second semiconductor die is mounted to the first... Agent: Robert D. Atkins

20100065949 - Stacked semiconductor chips with through substrate vias: Structures and methods of forming stacked chips are disclosed. In one embodiment, a first chip is disposed over a second chip, a top surface of the first and the second chip includes active circuitry. A first through substrate via is disposed within the first chip, the first through substrate via... Agent: Slater & Matsil, L.L.P.

20100065950 - Leaded semiconductor power module with direct bonding and double sided cooling: A leaded semiconductor power module includes a first heatsink, an electrically insulated substrate thermally coupled to the first heatsink, one or more semiconductor chips, a leadframe substrate, and a second heatsink thermally coupled to the leadframe substrate, the assembly being overmolded with an encapsulant to expose the first heatsink, the... Agent: Delphi Technologies, Inc Legal Staff - M/c 483-400-402

20100065951 - Method of manufacturing a semiconductor device: The quality of a non-leaded semiconductor device is to be improved. The semiconductor device comprises a sealing body for sealing a semiconductor chip with resin, a tab disposed in the interior of the sealing body, suspension leads for supporting the tab, plural leads having respective to-be-connected surfaces exposed to outer... Agent: Miles & Stockbridge PC

20100065952 - Semiconductor device: To solve a problem in that an antenna or a circuit including a thin film transistor is damaged due to discharge of electric charge accumulated in an insulator (a problem of electrostatic discharge), a semiconductor device includes a first insulator, a circuit including a thin film transistor provided over the... Agent: Cook Alex Ltd

20100065954 - Bond pad structures and semiconductor devices using the same: A semiconductor device comprises a first semiconductor die and a second semiconductor die. The first semiconductor die comprises a at least one first bond pads formed on a peripheral region of the first semiconductor die, a at least one re-distributed layer (RDL) pads formed on a center region of the... Agent: North America Intellectual Property Corporation

20100065955 - Integrated circuit devices with stacked package interposers: An IC device includes a die and a first package interposer stacked over a second package interposer. The IC device includes a first conductive connection from a first bond pad of the die directly to a bond pad of the first interposer and a second conductive connection from a second... Agent: Wells St. John P.s.

20100065953 - Semiconductor package: A semiconductor package according to the present invention includes a substrate; first and second semiconductor chips mounted on a first surface of the substrate; and a heat-radiation sheet. The heat-radiation sheet includes a heat-transferable conductive layer and first and second insulating layers formed on top and bottom surfaces of the... Agent: Rabin & Berdo, PC

20100065957 - Package substrate, semiconductor package having the package substrate: A package substrate includes an insulating substrate having a mount region including external terminals mounted to the insulating substrate and a clamp region having an opening receiving a molding material therein, the clamp region disposed adjacent to the mount region in a first direction, a circuit pattern formed on the... Agent: F. Chau & Associates, LLC

20100065956 - Packaging structure, packaging method and photosensitive device: The application provides a packaging structure, a packaging method and a photosensitive device. The packaging structure includes a substrate structure, a chip and a solder bump electrically connecting with a pad on the chip. The solder bump is located on the substrate structure, so that the multilayer coverage structure required... Agent: Frommer Lawrence & Haug LLP

20100065958 - Pad redistribution chip for compactness, method of manufacturing the same, and stacked package using the same: A substrate includes a substrate; a number of pad redistribution chips stacked on the substrate and on one another after being rotated 90° in a predetermined direction relative to one another, the pad redistribution chips having a number of center pads positioned at the center thereof, a number of (+)... Agent: Ladas & Parry LLP

20100065959 - Semiconductor package and method of manufacturing the same, and semiconductor device: A semiconductor package includes a wiring substrate having a connection pad on both surface sides respectively, and a supporting plate provided on one surface side of the wiring substrate and formed of an insulator in which an opening portion is provided in a portion corresponding to the connection pad. The... Agent: Kratz, Quintos & Hanson, LLP

20100065960 - Resin sheet, circuit device and method of manufacturing the same: Provided is a circuit device manufacturing method for coating a bottom surface of a circuit board with a thin coating of sealing resin. In the present invention, a circuit board having a circuit element such as a semiconductor element embedded therein is placed in a molding die, and a resin... Agent: Morrison & Foerster LLP

20100065961 - Electronic device and method of manufacturing same: This application relates to a method of manufacturing a semiconductor device comprising: providing a metal carrier; placing the metal carrier into a mold for forming a molded structure holding the metal carrier; segmenting the metal carrier into at least two disconnected metal carrier segments; and attaching a semiconductor chip to... Agent: Infineon Technologies Ag Patent Department

20100065962 - Power semiconductor module: A semiconductor module includes a multilayer substrate. The multilayer substrate includes a first metal layer and a first ceramic layer over the first metal layer. An edge of the first ceramic layer extends beyond an edge of the first metal layer. The multilayer substrate includes a second metal layer over... Agent: Dicke, Billig & Czaja

20100065963 - Method of wirebonding that utilizes a gas flow within a capillary from which a wire is played out: Contact structures for a variety of electronic components can be formed to have primarily elastic properties. The contact structures can be free standing, and can be coupled to a variety of different electronic components such as a probe card assembly, a semiconductor wafer or dies, an interposer, or the like.... Agent: N. Kenneth Burraston Kirton & Mcconkie

20100065964 - Copper-topped interconnect structure that has thin and thick copper traces and method of forming the copper-topped interconnect structure: A copper-topped interconnect structure allows the combination of high density design areas, which have low current requirements that can be met with tightly packed thin and narrow copper traces, and low density design areas, which have high current requirements that can be met with more widely spaced thick and wide... Agent: Law Office Of Mark C. Pickering

20100065965 - Methods of forming solder connections and structure thereof: A method comprises depositing a first metal containing layer into a trench structure, which contacts a metalized area of a semiconductor structure. The method further includes patterning at least one opening in a resist to the first metal containing layer. The opening should be in alignment with the trench structure.... Agent: Greenblum & Bernstein, P.L.C

20100065966 - Solder joint flip chip interconnection: A flip chip interconnect has a tapering interconnect structure, and the area of contact of the interconnect structure with the site on the substrate metallization is less than the area of contact of the interconnect structure with the die pad. Also, a bond-on-lead or bond-on-narrow pad or bond on a... Agent: Robert D. Atkins

20100065967 - Copper interconnection, method for forming copper interconnection structure, and semiconductor device: A copper interconnection structure includes an insulating layer, an interconnection body including copper and a barrier layer surrounding the interconnection body. The barrier layer includes a first barrier layer formed between a first portion of the interconnection body and the insulating layer. The first portion of the interconnection body is... Agent: Masuvalley & Partners

20100065968 - Electronic apparatus interconnect routing: Apparatus are provided for routing interconnects of a dual-gate electronic device operating in a differential configuration. An electronic apparatus formed on a substrate is provided comprising a first interconnect (40, 42, 44) configured to couple to a first region of the substrate, a first gate (22, 24, 26, 28) coupled... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20100065969 - Integrated circuit device: An integrated circuit device having at least a bond pad for semiconductor devices and method for fabricating the same are provided. A bond pad has a first passivation layer having a plurality of openings. A conductive layer which overlies the openings and portions of the first passivation layer, having a... Agent: Birch Stewart Kolasch & Birch

20100065970 - Microfeature workpieces having conductive interconnect structures formed by chemically reactive processes, and associated systems and methods: Microfeature workpieces having conductive vias formed by chemically reactive processes, and associated systems and methods are disclosed. A method in accordance with one embodiment includes disposing a conductive lining on walls of a via in a microfeature workpiece, so that a space is located between opposing portions of the lining... Agent: Perkins Coie LLP Patent-sea

20100065971 - Laser assisted chemical vapor deposition for backside die marking and structures formed thereby: Methods of forming a microelectronic structure are described. Embodiments of those methods include forming an identification mark on a portion of a backside of an individual die of a wafer by utilizing laser assisted CVD, wherein the formation of the identification mark is localized to a focal spot of the... Agent: Intel Corporation C/o Cpa Global

20100059729 - Apparatus and method for memory: A programmable resistance memory includes a volume of programmable resistance material formed between and coupled to two electrodes. The volume of programmable resistance material includes a region of enhanced programmability that is positioned to maximize the effect of a programming current. The region of enhanced programmability is positioned at a... Agent: Ovonyx, Inc

20100059730 - Resistance change element and semiconductor device including the same: To use a resistance change element having an MIM structure, which is obtained by stacking a metal, a metal oxide, and a metal, as a switching element, it is necessary to achieve OFF resistance higher than that required in a memory element by a factor of at least 1000. On... Agent: Mr. Jackson Chen

20100059731 - Phase change memory device and method for manufacturing the same: A phase change memory device and a corresponding method of manufacturing the same is presented. The phase change memory device includes a silicon substrate, a first insulation layer, cell switching elements, heaters, a gate, a second insulation layer, a barrier layer, a phase change layer and top electrodes. The first... Agent: Ladas & Parry LLP

20100059732 - Phase change memory device having heat sinks formed under heaters and method for manufacturing the same: A phase change memory device includes a silicon substrate having a cell region and a peripheral region. A first insulation layer is formed in the cell region and includes a plurality of holes. Cell switching elements are formed in the holes of the first insulation layer and heat sinks are... Agent: Ladas & Parry LLP

20100059733 - Led structure: An LED structure includes a first substrate; an adhering layer formed on the first substrate; first ohmic contact layers formed on the adhering layer; epi-layers formed on the first ohmic contact layers; a first isolation layer covering the first ohmic contact layers and the epi-layers at exposed surfaces thereof; and... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC

20100059735 - Light emitting diode having barrier layer of superlattice structure: A light emitting diode (LED) having a barrier layer with a superlattice structure is disclosed. In an LED having an active region between an GaN-based N-type compound semiconductor layer and a GaN-based P-type compound semiconductor layer, the active region comprises a well layer and a barrier layer with a superlattice... Agent: H.c. Park & Associates, PLC

20100059734 - Semiconductor light emitting device and wafer: A semiconductor light emitting device includes a first layer made of at least one of n-type GaN and n-type AlGaN; a second layer made of Mg-containing p-type AlGaN; and a light emitting section provided between the first layer and the second layer. The light emitting section included a plurality of... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100059736 - Heterostructure nanotube devices: Heterostructure devices incorporate carbon nanotube technology to implement rectifying devices including diodes, rectifiers, silicon-controlled rectifiers, varistors, and thyristors. In a specific implementation, a rectifying device includes carbon nanotube and nanowire elements. The carbon nanotubes may be single-walled carbon nanotubes. The devices may be formed using parallel pores of a porous... Agent: Aka Chan LLP

20100059737 - Tunnel field-effect transistors with superlattice channels: A semiconductor device includes a channel region; a gate dielectric over the channel region; a gate electrode over the gate dielectric; and a first source/drain region adjacent the gate dielectric. The first source/drain region is of a first conductivity type. At least one of the channel region and the first... Agent: Slater & Matsil, L.L.P.

20100059738 - Conductive polymer compositions in opto-electrical devices: A conductive polymer composition comprising: a polymer having a HOMO level greater than or equal to −5.7 eV and a dopant having a LUMO level less than −4.3 eV.... Agent: Marshall, Gerstein & Borun LLP

20100059741 - Light-emitting element, light-emitting device, and electronic device: To provide a light-emitting element with high light emission efficiency, a long lifetime, and reduced driving voltage. To provide a light-emitting element including an anode, a cathode, and a plurality of light-emitting layers which are in contact with each other so that a stacked structure is formed, between the anode... Agent: Cook Alex Ltd

20100059739 - Organic electroluminescence element, image display device, and imaging apparatus: An organic electroluminescence element includes organic compound layers disposed between electrodes, the concentration of halogen atoms contained in organic compounds of the organic compound layers being 1 ppm or less according to combustion ion chromatography.... Agent: Canon U.s.a. Inc. Intellectual Property Division

20100059740 - Polymeric anions/cations: The present invention relates to light-emitting devices and in particular organic light-emitting devices (OLEDs). In particular, the invention relates to emitter materials in which charged metal complexes are bonded to a polymer by electrostatic interactions.... Agent: Connolly Bove Lodge & Hutz, LLP

20100059743 - Nanocrystal-metal oxide composite, methods of manufacture thereof and articles comprising the same: Disclosed herein is a method for preparing nanocrystal-metal oxide composites with long-term stability in a simple and easy manner. Also disclosed herein are nanocrystal-metal oxide composites with high luminescence efficiency and uniform emission wavelengths. Also disclosed herein is a light-emitting device using the composites.... Agent: Cantor Colburn, LLP

20100059742 - Stable amorphous metal oxide semiconductor: A thin film semiconductor device has a semiconductor layer including a mixture of an amorphous semiconductor ionic metal oxide and an amorphous insulating covalent metal oxide. A pair of terminals is positioned in communication with the semiconductor layer and define a conductive channel, and a gate terminal is positioned in... Agent: Robert A. Parsons

20100059747 - Thin film field-effect transistor and display device: The invention provides a thin film field-effect transistor including, on a substrate, a gate electrode, a gate insulating film, an active layer including an oxide semiconductor, a source electrode, a drain electrode, a resistive layer including an oxide semiconductor and positioned between the active layer and at least one of... Agent: Solaris Intellectual Property Group, PLLC

20100059746 - Thin film field-effect transistor and display using the same: The present invention provides a thin film field-effect transistor comprising a substrate having thereon at least a gate electrode, a gate insulating film, an active layer, a source electrode, and a drain electrode, wherein the active layer is an oxide semiconductor layer, a resistance layer having an electric conductivity that... Agent: Solaris Intellectual Property Group, PLLC

20100059745 - Thin-film transistor display panel and method of fabricating the same: Provided are a thin-film transistor (TFT) display panel having improved electrical properties that can be fabricated time-effectively and a method of fabricating the TFT display panel. The TFT display panel includes: gate wirings which are formed on an insulating substrate; oxide active layer patterns which are formed on the gate... Agent: Innovation Counsel LLP

20100059744 - Transistor, inverter including the same and methods of manufacturing transistor and inverter: A transistor, an inverter including the transistor, and methods of manufacturing the inverter and the transistor. A gate insulating layer of the transistor has a charge trap region. A threshold voltage may be moved in a positive (+) direction by trapping charges in the charge trap region. The transistor may... Agent: Harness, Dickey & Pierce, P.L.C

20100059748 - Method for manufacturing thin film integrated circuit, and element substrate: Application form of and demand for an IC chip formed with a silicon wafer are expected to increase, and further reduction in cost is required. An object of the invention is to provide a structure of an IC chip and a process capable of producing at a lower cost. In... Agent: Eric Robinson

20100059750 - Bottom gate thin film transistor and method of manufacturing the same: A method of manufacturing a bottom gate thin film transistor (“TFT”) in which a polycrystalline channel region having a large grain size is formed relatively simply and easily. The method of manufacturing a bottom gate thin film transistor includes forming a bottom gate electrode on a substrate, forming a gate... Agent: Cantor Colburn, LLP

20100059749 - Thin film transistor: A thin film transistor is provided, which includes a gate electrode layer over a substrate, a gate insulating layer over the gate electrode layer, a layer including an amorphous semiconductor over the gate insulating layer, a pair of crystal regions over the layer including the amorphous semiconductor, and source and... Agent: Nixon Peabody, LLP

20100059751 - Thin-film transistor and process for its fabrication: A bottom gate type thin-film transistor constituted of at least a substrate, a gate electrode, a gate insulating layer, a semiconductor layer, a source electrode and a drain electrode. At an interface between the gate electrode and the gate insulating layer, the interface has a difference between hill tops and... Agent: Fitzpatrick Cella Harper & Scinto

20100059752 - Display substrate, method of manufacturing the same: A method of manufacturing a display substrate and a display substrate manufactured by the same that are capable of improving display quality are presented. The method includes forming a gate wiring, a data wiring, a thin film transistor connected to the gate wiring and the data wiring respectively, and a... Agent: Innovation Counsel LLP

20100059755 - Improved oxide-based field-effect transistors: A field-effect transistor includes a source region; a drain region; a semiconductor layer disposed between the source and drain regions; a gate region; and a dielectric region disposed between the semiconductor layer and the gate region. The semiconductor layer comprises a titanium dioxide film. The transistor may be light sending,... Agent: Kirschstein, Israel, Schiffmiller & Pieroni, P.C.

20100059753 - Matrix electronic devices using opaque substrates and fabrication method therefor: A fabrication method is described for forming an electronic circuit on a flexible substrate consisting of plastic and opaque foils. Corresponding circuit structures are also described herein. The opaque substrate can be selected from a set of polymers which have the appropriate thermo-mechanical properties. The foil geometry of the opaque... Agent: Fulbright & Jaworski L.L.P.

20100059754 - Organic light emitting device and a manufacturing method thereof: An organic light emitting device, wherein a color filter is formed in a display device displaying a color by using a micro-cavity effect, and grooves with a concave lens shape are formed In the surface of the color filter. As a result, the amount of emitted light is increased and... Agent: F. Chau & Associates, LLC

20100059756 - Thin film transistor and method of manufacturing the same: Disclosed is a thin film transistor (TFT). The TFT may include an intermediate layer between a channel and a source and drain. An increased off current, which may occur to a drain area of the TFT, is reduced due to the intermediate layer. Accordingly, the TFT may be stably driven.... Agent: Harness, Dickey & Pierce, P.L.C

20100059757 - Apparatus and method of manufacturing the same: An apparatus includes a substrate having a plurality of pixels, wherein the substrate comprises a concave-convex surface and a cured adhesive layer formed on the concave-convex surface.... Agent: F. Chau & Associates, LLC

20100059758 - Pixel structure of a display panel: A tri-gate pixel structure includes three sub-pixel regions, three gate lines, a data line, three thin film transistors (TFTs), three pixel electrodes, and a common line. The gate lines are disposed along a first direction, and the data line is disposed along a second direction. The TFTs are disposed in... Agent: North America Intellectual Property Corporation

20100059760 - Gallium nitride-based compound semiconductor light emitting device and process for its production: The gallium nitride-based compound semiconductor light emitting device of the present invention is a gallium nitride-based compound semiconductor light emitting device characterized by comprising an n-type semiconductor layer, a light emitting layer and a p-type semiconductor layer, composed of gallium nitride-based compound semiconductors, stacked in that order on a substrate,... Agent: Sughrue Mion, PLLC

20100059759 - Nitride semiconductor light emitting device and method for forming the same: An active layer 17 is provided so as to emit light having a light emission wavelength in the range of 440 to 550 nm. A first conduction type gallium nitride-based semiconductor region 13, the active layer 17, and a second conduction type gallium nitride-based semiconductor region 15 are disposed in... Agent: Venable LLP

20100059761 - Schottky barrier diode: A Schottky barrier diode includes a GaN freestanding substrate having a front surface, a GaN epitaxial layer deposited on the front surface, and an insulation layer deposited on the GaN epitaxial layer at a front surface and having an opening. Furthermore, the Schottky barrier diode also includes an electrode. The... Agent: Venable LLP

20100059762 - Heat removal facilitated with diamond-like carbon layer in soi structures: Described are Silicon-on-Insulator devices containing a diamond-like carbon layer, methods of making the Silicon-on-Insulator devices, and methods of using the Silicon-on-Insulator devices.... Agent: Turocy & Watson, LLP

20100059763 - Luminous element having a plurality of cells: Disclosed is a light emitting element comprising a first array having a plurality of vertical light emitting cells connected in series on a single substrate; and a second array that has another plurality of vertical light emitting cells connected in series on the single substrate and is connected to the... Agent: H.c. Park & Associates, PLC

20100059764 - Structure and method to form multilayer embedded stressors: A multilayer embedded stressor having a graded dopant profile for use in a semiconductor structure for inducing strain on a device channel region is provided. The inventive multilayer stressor is formed within areas of a semiconductor structure in which source/drain regions are typically located. The inventive multilayer stressor includes a... Agent: Scully, Scott, Murphy & Presser, P.C.

20100059765 - Light-emitting device with improved electrode structures: A light-emitting device includes first and second semiconductor layers and a light-emitting layer between the first and second semiconductor layers. The light-emitting device also includes an improved electrode structures.... Agent: Arent Fox LLP

20100059766 - Storage of an image in an integrated circuit: An integrated circuit including a substrate of a semiconductor material and first metal portions of a first metallization level or of a first via level defining pixels of an image. The pixels are distributed in first pixels, for each of which the first metal portion is connected to the substrate,... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20100059767 - Surface light-emitting device and display device using the same: A surface light-emitting device is disclosed, in which a plurality of spot light sources are arranged along the side surface of a housing of the device, and the light emitted from the spot light sources located at the end portions of the spot light source sequence emits a lower light... Agent: Banner & Witcoff, Ltd. Attorneys For Client No. 000449, 001701

20100059768 - Series connected segmented led: A light source and method for making the same are disclosed. The light source includes a substrate, and a light emitting structure that is divided into segments. The light emitting structure includes a first layer of semiconductor material of a first conductivity type deposited on the substrate, an active layer... Agent: The Law Offices Of Calvin B. Ward

20100059769 - Light emitting device and method of manufacturing the same: A method of manufacturing a light emitting device is provided. An epitaxial layer is first formed at a plurality of separated regions on a substrate and a second electrode layer is formed on the epitaxial layer. Subsequently, the substrate is removed from the epitaxial layer and a first electrode layer... Agent: Birch Stewart Kolasch & Birch

20100059774 - Encapsulant material for optical component and light-emitting device: m

20100059777 - Illumination device, particularly with luminescent ceramics: The invention relates to an illumination device (10) that comprises an active layer (11), for example a blue LED, covered with a first luminescent ceramic converter layer (12) and partially covered with a second luminescent ceramic converter layer (13). The first and second conversion layers (12, 13) convert primary photons... Agent: Philips Intellectual Property & Standards

20100059772 - Light emitting device: The present invention provides a light emitting device. The light emitting device has a light distribution in which a light distribution I (θ, φ) obtained when light emitted from a chip of the light emitting device is directly measured is not dependent on a direction φ and is substantially represented... Agent: Fitch, Even, Tabin & Flannery

20100059779 - Light-emitting diode with embedded elements: A light-emitting diode (LED) device is provided. The LED device has a substrate and an LED structure overlying the substrate. Embedded elements are embedded within one or more layers of the LED structure. In an embodiment, the embedded elements include a dielectric material extending through the LED structure such that... Agent: Slater & Matsil, L.L.P.

20100059771 - Multi-layer led phosphors: An LED assembly can have a plurality of different types of phosphors that are separated from one another in a manner that substantially mitigates the cannibalization of light emitted by at least one of the types of phosphors. By mitigating the cannibalization of light, brighter and more efficient white light... Agent: Haynes And Boone, LLPIPSection

20100059776 - Optical bonding composition for led light source: Disclosed herein is an optical bonding composition that may be used in optical applications. An LED light source that utilizes the composition is also disclosed, as well as a method of making it. The LED light source may comprise: an LED die; an optical element optically coupled to the LED... Agent: 3m Innovative Properties Company

20100059782 - Optical-semiconductor device and method for manufactruing the same: A method for manufacturing an optical-semiconductor device, including forming a plurality of first and second electrically conductive members that are disposed separately from each other on a support substrate; providing a base member formed from a light blocking resin between the first and second electrically conductive members; mounting an optical-semiconductor... Agent: Birch Stewart Kolasch & Birch

20100059775 - Organic light emitting diode and method of fabricating the same: Provided are an organic light emitting diode and a method of fabricating the same, which can reduce the efficiency of electron injection and transport at low brightness to cause low luminous efficiency, thus preventing the organic light emitting diode from emitting light when displaying black. The organic light emitting diode... Agent: Robert E. Bushnell & Law Firm

20100059778 - Organic light emitting element: An object of the present invention is to provide an organic light emitting element where light emitted from the light emitting layer is efficiently emitted to the outside, and thus, the efficiency of light emission is higher. The present invention provides an organic light emitting element where a first reflective... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100059770 - Package method and structure for a light emitting diode multi-layer module: A package method and structure for a light emitting diode multi-layer module, wherein the method comprises the steps of: fabricating a printed circuit layer with a plurality of staggered nodes on a substrate; fabricating a frame around the substrate; fabricating a protruding inclined pier around the bottom rim of the... Agent: Dr. Banger Shia

20100059773 - Semiconductor light-emitting device: A semiconductor light-emitting device comprises a substrate, a first conductive type semiconductor layer positioned on the substrate, a light-emitting structure positioned on the first conductive type semiconductor layer, and a second conductive type semiconductor layer positioned on the light-emitting structure. The substrate includes an upper surface and a plurality of... Agent: Wpat, PC Intellectual Property Attorneys

20100059781 - Semiconductor light-emitting element and method of manufacturing same: In an exemplary embodiment of the invention, a semiconductor light-emitting element includes a first semiconductor layer having a first conduction type, a second semiconductor layer having a second conduction type, an active layer provided between the first and second semiconductor layers. The semiconductor light-emitting element also includes a polarity inversion... Agent: Frishauf, Holtz, Goodman & Chick, PC

20100059780 - System for displaying images: A system for displaying images employing an organic electroluminescent device is provided. The organic electroluminescent device includes a first electrode, an organic electroluminescent element disposed on the first electrode, a second electrode disposed on the organic electroluminescent element, and a color tuning element disposed on the second electrode. In particular,... Agent: Lowe Hauptman Ham & Berner, LLP

20100059783 - Light emitting chip package with metal leads for enhanced heat dissipation: A light emitting chip package includes a planar substrate, an LED die mounted on the substrate, and one or more relatively wide and thick metal leads to serve as a low thermal resistance path. The substrate comprises a chip mounting area and a wire bond area on a dielectric body.... Agent: Harry Chandra

20100059785 - Light emitting device and method of fabricating the same: A method of fabricating a light emitting device initially forms a copper clad ceramic board of the light emitting device using hot-pressing technique at high temperature and photolithography process. Next, a circuit of the light emitting device is formed using die bonding and wire bonding/flip-chip processes. Finally, the light emitting... Agent: Wpat, PC Intellectual Property Attorneys

20100059784 - Lighting device of leds on a transparent substrate: Proposed is a lighting device (100), comprising LEDs (130) mounted on a transparent substrate (110), provided with a transparent electrically conductive layer (120) and a contact pad (140). The contact pad has a second part (142), extending away from a first part (141), for further reducing the current density in... Agent: Philips Intellectual Property & Standards

20100059786 - Semiconductor chip assembly with post/base heat spreader and substrate: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a substrate and an adhesive. The semiconductor device is electrically connected to the substrate and thermally connected to the heat spreader. The heat spreader includes a post and a base. The post extends upwardly from the base into an... Agent: David M. Sigmond

20100059787 - Semiconductor light-emitting apparatus: An object of the present invention is to provide a light-emitting apparatus reduced in the optical self-absorption of the light-emitting device and assured of excellent light extraction efficiency. The inventive light-emitting apparatus comprises a substrate, a semiconductor light-emitting device provided on the substrate with or without intervention of a submount,... Agent: Sughrue Mion, PLLC

20100059788 - Thermosetting composition: A thermosetting composition containing an aluminosiloxane, a silicone oil containing silanol groups at both ends, and a silicone alkoxy oligomer. The thermosetting composition of the present invention can be used for, for example, encapsulating materials, coating materials, molding materials, surface-protecting materials, adhesive agents, bonding agents, and the like. Especially, in... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100059789 - Nitride semiconductor light-emitting device and method for fabricating thereof: Disclosed is a nitride semiconductor light-emitting device, including a substrate, a nitride semiconductor layer including a first conductive layer, an active layer and a second conductive layer located on the substrate, a first electrode formed on the first conductive layer, and a second electrode formed on the second conductive layer,... Agent: Sherr & Vaughn, PLLC

20100059790 - Nitride-based semiconductor device and method of manufacturing the same: A nitride-based semiconductor device includes an n-type nitride-based semiconductor layer, and an n-side electrode having a first metal layer made of Al, formed on a surface of the n-type nitride-based semiconductor layer and a second metal layer made of Hf formed so as to cover a surface of the first... Agent: Ditthavong Mori & Steiner, P.C.

20100059791 - Semiconductor device and fabrication method for the same: The semiconductor device and the fabrication method for the same including: a gate electrode, a source electrode, and a drain electrode which are placed on a first surface of a semi-insulating substrate 11, and have a plurality of fingers; an earth conductor 26 placed on a second surface of an... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100059792 - Method of radiation generation and manipulation: A method of managing radiation having a frequency in the terahertz and/or microwave regions. The method comprises providing a semiconducting device having a two-dimensional carrier gas. Plasma waves are generated in the carrier gas using a laser pulse. The frequency of the plasma waves, and as a result, the generated... Agent: Hoffman Warnick LLC

20100059793 - Inp based heterojunction bipolar transistors with emitter-up and emitter-down profiles on a common wafer: A wafer comprising at least one emitter-up Heterojunction Bipolar Transistor (HBT) and at least one emitter-down HBT on a common InP based semiconductor wafer. Isolation and N-type implants into the device layers differentiate an emitter-down HBT from an emitter-up HBT. The method for preparing a device comprises forming identical layers... Agent: Ladas & Parry

20100059794 - Semiconductor integrated circuit device and a method of manufacturing the same: In order to prevent noise from a power supply potential or a reference potential with a large potential difference from affecting a gate electrode and causing a malfunction, a first plug connected to the gate electrode and a second plug to which the power supply potential or the reference potential... Agent: Miles & Stockbridge PC

20100059795 - Vertical current transport in a power converter circuit: In at least one embodiment of the invention, an apparatus includes an integrated circuit comprising a power stage portion of a power converter circuit. The power stage portion includes a first switch circuit portion formed by a first plurality of lateral devices in a first substrate. The power stage portion... Agent: Zagorin O'brien Graham LLP

20100059796 - Shared masks for x-lines and shared masks for y-lines for fabrication of 3d memory arrays: A structure and a method of manufacturing a three dimensional memory using a number of bit line masks that is less than the number of device layers. A first bit line mask is used to form a first bit line layer in a first device level. The first bit line... Agent: Sandisk Corporation C/o Foley & Lardner LLP

20100059797 - (110)-oriented p-channel trench mosfet having high-k gate dielectric: A method of forming a field effect transistor having a heavily doped p-type (110) semiconductor layer over a metal substrate starts with providing a heavily doped p-type (110) silicon layer, and forming a lightly doped p-type (110) silicon layer on the P heavily doped-type (110) silicon layer. The method also... Agent: Townsend And Townsend And Crew, LLP

20100059798 - Semiconductor device and manufacturing method for semiconductor device: There is provided a semiconductor device including: a SiC substrate; an AlGaN layer formed on the SiC substrate; a source electrode and a drain electrode formed on the AlGaN layer so as to be spaced from each other; a first insulation film formed between the source electrode and the drain... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100059799 - Method for manufacturing semiconductor device: The present invention relates to a method for manufacturing a semiconductor device, and provides to reduce a contact resistance of a landing plug by forming the landing plug in such a manner that a polysilicon layer is deposited only on the surface of a landing plug contact hole, and a... Agent: Ampacc Law Group

20100059800 - Semiconductor device and manufacturing method for semiconductor device: A semiconductor device including: a SiC substrate; an AlGaN layer formed on the SiC substrate; a source electrode and a drain electrode formed on the AlGaN layer so as to be spaced from each other; an insulation film formed between the source electrode and the drain electrode and having a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100059801 - Semiconductor device and method for fabricating the same: A semiconductor device includes a gate insulating film formed on a semiconductor region of a first conductivity type; a gate electrode formed on the gate insulating film; an offset spacer formed on a side surface of the gate electrode; an inner sidewall formed on the side surface of the gate... Agent: Mcdermott Will & Emery LLP

20100059802 - Image sensor with raised photosensitive elements: An image sensor having a pixel array comprises periphery elements formed over a substrate, an oxide layer formed over the periphery elements, an epitaxial layer formed in an opening in the oxide layer in a pixel array area, and a plurality of photosensitive elements of the pixel array formed in... Agent: Eastman Kodak Company Patent Legal Staff

20100059803 - Light reflecting cmos image sensor:

20100059804 - Photoelectric conversion device and method of manufacturing the same: A photoelectric conversion device includes a thin film transistor that is placed on a substrate, a photodiode that is connected to a drain electrode of the thin film transistor and includes an upper electrode, a lower electrode and a photoelectric conversion layer placed between the upper and lower electrodes, a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100059805 - Semiconductor device: A semiconductor device includes a semiconductor substrate having an active region and an isolation region. A gate structure is provided on the semiconductor device. First and second impurity regions are provided in the substrate on both sides of the gate structure. A pad electrode is provided to contact the first... Agent: Stanzione & Kim, LLP

20100059806 - Semiconductor device: A semiconductor device is proposed in which signal delay due to compensation capacitance elements in peripheral circuit element regions is eliminated. The semiconductor device includes: a first region including memory cells; a second region 10 including a functional circuit; cell capacitors formed in the first region; and compensation capacitance elements... Agent: Mcginn Intellectual Property Law Group, PLLC

20100059807 - Semiconductor device having bar type active pattern: A semiconductor device having a bar type active pattern and a method of manufacturing the same are provided. The semiconductor device may include a semiconductor substrate having a semiconductor fin configured to protrude from a surface of the semiconductor substrate in a first direction, the semiconductor substrate having a first... Agent: Harness, Dickey & Pierce, P.L.C

20100059808 - Nonvolatile memories with charge trapping dielectric modified at the edges: A nonvolatile memory cell has charge trapping dielectric (160) which has been modified (i.e. oxidized) adjacent to edges of blocking dielectric (180). The modification reduces the charge-trapping density adjacent to the edges of the blocking dielectric, and hence reduces the leakage current at the edges. Other features are also provided.... Agent: Haynes And Boone, LLPIPSection

20100059812 - Flash memory device and method for manufacturing the same: Disclosed are a flash memory device and a method for manufacturing the same. The flash memory device includes a semiconductor substrate having a unit cell defined by an isolation layer, a gate formed over the semiconductor substrate, LDD areas formed at shallow areas of the semiconductor substrate at both sides... Agent: Jin Ha Park

20100059809 - Non-volatile memory and method of fabricating the same: A method of fabricating a non-volatile memory is provided. First, a bottom oxide layer is formed on a substrate. Thereafter, a silicon-rich nitride layer is formed on the bottom oxide layer by using NH3 and SiH2Cl2 or SiH4, wherein the thickness of the silicon-rich nitride layer is less than about... Agent: J C Patents

20100059811 - Nonvolatile semiconductor memory device and method for manufacturing same: In a nonvolatile semiconductor memory device, a stacked body is provided on a silicon substrate by alternately stacking pluralities of isolation dielectric films and electrode films, a through-hole is formed in the stacked body to extend in the stacking direction, a memory film is formed by stacking a block layer,... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100059810 - Semiconductor device and a method of manufacturing the same: The present invention can realize a highly-integrated semiconductor device having a MONOS type nonvolatile memory cell equipped with a split gate structure without deteriorating the reliability of the device. A memory gate electrode of a memory nMIS has a height greater by from 20 to 100 nm than that of... Agent: Miles & Stockbridge PC

20100059813 - Nonvolatile semiconductor memory device and manufacturing method therefor: A gate electrode of a select gate transistor includes a gate insulating film that is formed on a semiconductor substrate, a lower gate electrode that is formed on the gate insulating film and that has a tapered portion in which a side surface on a side of a gate electrode... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100059814 - Semiconductor device having vertical charge-compensated structure and sub-surface connecting layer and method: In one embodiment, a semiconductor device is formed having vertical localized charge-compensated trenches, trench control regions, and sub-surface doped layers. The vertical localized charge-compensated trenches include at least a pair of opposite conductivity type semiconductor layers. The trench control regions are configured to provide a generally vertical channel region electrically... Agent: Semiconductor Components Industries, LLC Intellectual Property Dept. - A700

20100059815 - Semiconductor trench structure having a sealing plug and method: In one embodiment, a semiconductor device is formed having a trench structure. The trench structure includes a single crystalline semiconductor plug formed along exposed upper surfaces of the trench. In one embodiment, the single crystalline semiconductor plug seals the trench to form a sealed core.... Agent: Semiconductor Components Industries, LLC Intellectual Property Dept. - A700

20100059816 - Trench gate type transistor and method of manufacturing the same: The invention provides a trench gate type transistor in which the gate capacitance is reduced, the crystal defect is prevented and the gate breakdown voltage is enhanced. Trenches are formed in an N− type semiconductor layer. A uniformly thick silicon oxide film is formed on the bottom of each of... Agent: Morrison & Foerster LLP

20100059817 - Power mosfet with a gate structure of different material: A semiconductor device includes a semiconductor layer of a first conductivity type and a first doping concentration. A first semiconductor region, used as drain, of the first conductivity type has a lower doping concentration than the semiconductor layer and is over the semiconductor layer. A gate dielectric is over the... Agent: Freescale Semiconductor, Inc. Law Department

20100059818 - Semiconductor device and manufacturing method for the same: A semiconductor device includes a first conductive type first semiconductor region, a second semiconductor region, and a second conductive type lateral RESURF region. The first semiconductor region is arranged on a first electrode side. The second semiconductor region includes first conductive type first pillar regions and a terminal part. The... Agent: Robert J. Depke Lewis T. Steadman

20100059819 - Power transistor with metal source and method of manufacture: A metal source power transistor device and method of manufacture is provided, wherein the metal source power transistor having a source which is comprised of metal and which forms a Schottky barrier with the body region and channel region of the transistor. The metal source power transistor is unconditionally immune... Agent: Lemaire Patent Law Firm, P.l.l.c.

20100059821 - Isolated tri-gate transistor fabricated on bulk substrate: A method of forming an isolated tri-gate semiconductor body comprises patterning a bulk substrate to form a fin structure, depositing an insulating material around the fin structure, recessing the insulating material to expose a portion of the fin structure that will be used for the tri-gate semiconductor body, depositing a... Agent: Intel Corporation C/o Cpa Global

20100059820 - Semiconductor device and method for manufacturing semiconductor device: A thin-film transistor (TFT) has a gate insulating film excellent in transparency and flatness. The gate insulating film is formed by a transparent insulating film (131) which is composed of an oxide represented by RxMOy and which is arranged between a gate electrode and a semiconductor layer. The transparent insulating... Agent: Birch Stewart Kolasch & Birch

20100059822 - Method and system for monolithic integration of photonics and electronics in cmos processes: Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on a single CMOS wafer with different silicon layer thicknesses. The devices may be fabricated on a semiconductor-on-insulator (SOI) wafer utilizing a bulk CMOS process and/or on... Agent: Mcandrews Held & Malloy, Ltd

20100059823 - Resistive device for high-k metal gate technology and method of making: A semiconductor device is provided which includes a semiconductor substrate, an isolation structure formed in the substrate for isolating an active region of the substrate, the isolation structure being formed of a first material, an active device formed in the active region of the substrate, the active device having a... Agent: Haynes And Boone, LLPIPSection

20100059824 - System and method for i/o esd protection with polysilicon regions fabricated by processes for making core transistors: A system and method for electrostatic discharge protection. The system includes a first transistor coupled to a first system and including a first gate, a first dielectric layer located between the first gate and a first substrate, a first source, and a first drain. The first system includes or is... Agent: Townsend And Townsend And Crew, LLP

20100059825 - Integrated circuit and a method of making an integrated circuit to provide a gate contact over a diffusion region: A method of forming an integrated circuit 68 provides over a diffusion region 28 on a substrate 26 a gate electrode 36. A source electrode is provided by a source local interconnect conductor 30 and a drain electrode is provided by a drain local interconnect conductor 32. An insulator layer... Agent: Nixon & Vanderhye P.C.

20100059826 - Semiconductor integrated circuit device: To provide a technique that can maintain uniformity of semiconductor elements and wirings microfabricated, while maintaining the mounting efficiency of circuit cells onto a chip. Respective gate electrodes of an n-channel type MISFET and another n-channel type MISFET forming a NAND circuit cell are coupled to the same node, and... Agent: Miles & Stockbridge PC

20100059828 - Semiconductor device and method for fabricating the same: A semiconductor device formed by the steps of: forming a dummy electrode 22n and a dummy electrode 22p; forming a metal film 32 on the dummy electrode 22p; conducting a thermal treatment at a first temperature to substitute the dummy electrode 22n with an electrode 34a of a material containing... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100059827 - Semiconductor device and method of manufacturing the same: A first and second gate electrodes are formed on a first and second active regions, respectively. The first and second gate electrodes have a first and second metal-containing conductive films, respectively. The first and second metal-containing conductive films are formed on the isolation region for segmenting the first and second... Agent: Mcdermott Will & Emery LLP

20100059829 - Process for manufacturing a memory device including a vertical bipolar junction transistor and a cmos transistor with spacers: A bipolar selection transistor and a circuitry MOS transistor for a memory device are formed in a semiconductor body. The bipolar selection transistor is formed by implanting a buried collector, implanting a base region on the buried collector, forming a silicide protection mask on the semiconductor body, and implanting an... Agent: Seed Intellectual Property Law Group PLLC

20100059830 - Semiconductor device: In a semiconductor device, the degree of flatness of 0.3 nm or less in terms of a peak-to-valley (P-V) value is realized by rinsing a silicon surface with hydrogen-added ultrapure water in a light-screened state and in a nitrogen atmosphere and a contact resistance of 10−11 Ωcm2 or less is... Agent: Foley And Lardner LLP Suite 500

20100059831 - Spacer-less low-k dielectric processes: A first example embodiment provides a method of removing first spacers from gates and incorporating a low-k material into the ILD layer to increase device performance. A second example embodiment comprises replacing the first spacers after silicidation with low-k spacers. This serves to reduce the parasitic capacitances. Also, by implementing... Agent: HorizonIPPte Ltd

20100059832 - Semiconductor device: Provided is a semiconductor device including a depletion type MOS transistor and an enhancement type MOS transistor. In the semiconductor device, in order to provide a reference voltage generating circuit having an enhanced temperature characteristic or analog characteristic without increasing an area of the semiconductor device through addition of a... Agent: Bruce L. Adams, Esq Adams & Wilks

20100059834 - Integrated electronic circuit including a thin film portion based on hafnium oxide: An integrated electronic circuit has a thin layer portion based on hafnium oxide. This portion additionally contains magnesium atoms, so that the portion is in the form of a hafnium-and-magnesium mixed oxide. Such a portion has a high dielectric constant and a very low leakage current. It is particularly suitable... Agent: Gardere Wynne Sewell LLP Intellectual Property Section

20100059833 - Metal gate transistor and method for fabricating the same: A method for fabricating metal gate transistor is disclosed. First, a substrate having a first transistor region and a second transistor region is provided. Next, a stacked film is formed on the substrate, in which the stacked film includes at least one high-k dielectric layer and a first metal layer.... Agent: North America Intellectual Property Corporation

20100059835 - Apparatus and method of wafer bonding using compatible alloy: A method of forming an inertial sensor provides 1) a device wafer with a two-dimensional array of inertial sensors and 2) a second wafer, and deposits an alloy of aluminum/germanium onto one or both of the wafers. The alloy is deposited and patterned to form a plurality of closed loops.... Agent: Sunstein Kann Murphy & Timbers LLP

20100059836 - Mems device and method for manufacturing the same: A MEMS device, including: a substrate having a first principal plane and a second principal plane opposite to the first principal plane; a through hole formed in the substrate; and a vibrating film formed over the first principal plane so as to cover the through hole. The first principal plane... Agent: Mcdermott Will & Emery LLP

20100059837 - Spin transfer torque memory device having common source line and method for manufacturing the same: A spin transfer torque memory device and a method for manufacturing the same. The spin transfer torque memory device comprises a MRAM cell using a MTJ and a vertical transistor. A common source line is formed in the bottom of the vertical transistor, thereby obtaining the high-integrated and simplified memory... Agent: Marshall, Gerstein & Borun LLP

20100059840 - Cmos image sensor and method for manufacturing the same: A Complementary Metal Oxide Semiconductor (CMOS) image sensor and a method for manufacturing the same are disclosed. The CMOS image sensor includes a photodiode formed in a semiconductor substrate, an inter dielectric layer formed over the semiconductor substrate in which the photodiode is formed, at least one metal line layer... Agent: Sherr & Vaughn, PLLC

20100059842 - Image sensor and manufacturing method thereof: A manufacturing method of an image sensor includes forming a photodiode region by implanting impurity ions in a semiconductor substrate, forming an interlayer dielectric over the semiconductor substrate having the photodiode region, forming a recess in the interlayer dielectric to expose the photodiode region, vapor-depositing a plurality of refractive layers... Agent: Sherr & Vaughn, PLLC

20100059841 - Image sensor and method for manufacturing the same: Disclosed are an image sensor and a method for manufacturing the same. The image sensor includes an image sensing device on a substrate, an interlayer dielectric layer over the image sensing device, and an aspheric microlens over the interlayer dielectric layer.... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100059845 - Image sensor and method of manufacturing the same: An image sensor includes a plurality of unit pixels arranged in a matrix shape, each of which is disposed in a region defined by a gate line extending in a first direction and a data line extending in a second direction that is different from the first direction. Each of... Agent: Jae Y. Park

20100059838 - Image sensor module and method of manufacturing the same: An image sensor module includes a transparent substrate having recesses defined in a lower face thereof. A light concentration member includes transparent light concentration parts each of which are disposed in a corresponding one of the recesses. Color filters are disposed over each of the light concentration parts and photo... Agent: Ladas & Parry LLP

20100059839 - Light receiving element: A light receiving element comprises: a photodiode including an optical waveguide, an end surface of the optical waveguide being a light receiving surface of the photodiode; a signal electrode and a bias electrode on a common surface of the photodiode, the signal electrode being connected to an anode of the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100059843 - Solid-state imaging device and method for making the same, and manufacturing substrate for solid-state imaging device: A method for making a solid-state imaging device includes forming a pinning layer, which is a P-type semiconductor layer or an N-type semiconductor layer, on a first substrate by deposition; forming a semiconductor layer on the pinning layer; forming a photoelectric conversion unit in the semiconductor layer, the photoelectric conversion... Agent: Robert J. Depke Lewis T. Steadman

20100059844 - Solid-state imaging device and solid-state imaging device designing method: A solid-state imaging device includes light receiving sections which are arranged in an image area on a semiconductor substrate at the same pitch and which light exiting from an imaging optical system enters, condensing lenses respectively arranged above the light receiving sections, and light shielding sections each of which is... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100059846 - Image sensor and method of manufacturing the same: Provided are image sensors and methods of manufacturing the same. An image sensor includes a metal line and an interlayer insulation layer on a semiconductor substrate including a readout circuit; an image detection unit on the interlayer insulation layer and including stacked first and second doping layers; a pixel separation... Agent: Tae Gyu Kim

20100059847 - Stacked photoelectric conversion device and method for producing the same: The stacked photoelectric conversion device of the present invention comprises a plurality of silicon-based photoelectric conversion layers having a p-i-n structure stacked, wherein at least a pair of adjacent photoelectric conversion layers have an interlayer of a silicon nitride therebetween, the pair of the photoelectric conversion layers are electrically connected... Agent: Nixon & Vanderhye, PC

20100059848 - Image sensor and method for manufacturing the same: Embodiments provide an image sensor. The image sensor includes readout circuitry, an interlayer dielectric, an interconnection, and an image sensing device. The interconnection includes a lower barrier metal and a nitride barrier formed under the lower barrier metal. A contact plug electrically connecting the lower barrier metal to a lower... Agent: Ji Hoon Hong

20100059849 - Semiconductor component and method of manufacture: A semiconductor component having a low resistance conduction path and a method for manufacturing the semiconductor component. When the semiconductor component is a Schottky diode, one or more trenches are formed in an epitaxial layer of a first conductivity type that is formed over a semiconductor substrate of the first... Agent: Semiconductor Components Industries, LLC Intellectual Property Dept. - A700

20100059850 - Varactor diode with doped voltage blocking layer: A varactor diode includes a contact layer having a first conductivity type, a voltage blocking layer having the first conductivity and a first net doping concentration on the contact layer, a blocking junction on the voltage blocking layer, and a plurality of discrete doped regions in the voltage blocking layer... Agent: Myers Bigel Sibley & Sajovec, P.A.

20100059851 - Cmos circuits combining high voltage and rf technologies: A CMOS circuit comprises at least one high voltage transistor (having gate and drain operating voltages of greater than 8V) and at least one high frequency capable transistor (having a maximum switching frequency of between 100 MHz and 1000 GHz) wherein said transistors are integrated on the same semiconductor substrate... Agent: Thompson Hine L.L.P. Intellectual Property Group

20100059852 - Semiconductor transistor device with improved isolation arrangement, and related fabrication methods: A method of fabricating a semiconductor device structure is provided. The method begins by providing a substrate having a layer of semiconductor material, a pad oxide layer overlying the layer of semiconductor material, and a pad nitride layer overlying the pad oxide layer. The method proceeds by selectively removing a... Agent: Ingrassia Fisher & Lorenz, P.C. (amd)

20100059856 - Method of configuring a semiconductor integrated circuit involving capacitors having a width equal to the length of active resistors: A method of configuring a semiconductor integrated circuit (IC) includes arranging a circuit region in the center of a unit cell. Capacitor/resistor regions are arranged along the left and right edge portions of the unit cell. The capacitor/resistor regions include a plurality of active resistors having the same length and... Agent: Harness, Dickey & Pierce, P.L.C

20100059855 - Semiconductor device and method of forming a fan-out structure with integrated passive device and discrete component: A semiconductor device is made by providing a temporary carrier for supporting the semiconductor device. An integrated passive device (IPD) is mounted to the temporary carrier using an adhesive. The IPD includes a capacitor and a resistor and has a plurality of through-silicon vias (TSVs). A discrete component is mounted... Agent: Robert D. Atkins

20100059854 - Semiconductor device and method of forming an ipd over a high-resistivity encapsulant separated from other ipds and baseband circuit: A semiconductor device has a first conductive layer formed over a sacrificial substrate. A first integrated passive device (IPD) is formed in a first region over the first conductive layer. A conductive pillar is formed over the first conductive layer. A high-resistivity encapsulant greater than 1.0 kohm-cm is formed over... Agent: Robert D. Atkins

20100059853 - Semiconductor device and method of forming shielding layer over integrated passive device using conductive channels: A semiconductor device is made by providing a substrate, forming a first insulation layer over the substrate, forming a first conductive layer over the first insulation layer, forming a second insulation layer over the first conductive layer, and forming a second conductive layer over the second insulation layer. A portion... Agent: Robert D. Atkins

20100059857 - Method of fabricating a semiconductor device: A method of fabricating a semiconductor device. One embodiment provides a metal carrier. A semiconductor chip is provided. A porous layer is produced at a surface of at least one of the carrier and the semiconductor chip. The semiconductor chip is placed on the carrier. The resulting structure is heated... Agent: Dicke, Billig & Czaja

20100059858 - Integrated capacitors in package-level structures, processes of making same, and systems containing same: An article includes a top electrode that is embedded in a solder mask. An article includes a top electrode that is on a core structure. A process of forming the top electrode includes reducing the solder mask thickness and forming the top electrode on the reduced-thickness solder mask. A process... Agent: Intel Corporation C/o Cpa Global

20100059860 - Counter-doped varactor structure and method: An improved varactor diode (40) is obtained by providing a substrate (41) having a first surface (43), in which are formed a P+ region (53, 46) proximate the first surface (43), a first N region (54, 45) located beneath the P+ region (53, 46), an N well region (56, 44)... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20100059859 - Varactor structure and method: An improved varactor diode (40) is obtained by providing a substrate (70) having a first surface (73) and in which are formed a first N region (46) having a first peak dopant concentration (47) located at a first depth (48) beneath the surface (73), and a first P region having... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20100059861 - Semiconductor wafer composed of monocrystalline silicon and method for producing itö: Semiconductor wafers composed of monocrystalline silicon and doped with nitrogen contain an OSF region and a PV region, wherein the OSF region extends from the center radially toward the edge of the wafer as far as the Pv region; the wafer has an OSF density of less than 10 cm−2,... Agent: Brooks Kushman P.C.

20100059862 - Thinned semiconductor wafer and method of thinning a semiconductor wafer: A thinned semiconductor wafer and a method for thinning the semiconductor wafer. A semiconductor wafer is thinned from its backside to form a cavity in a central region of the backside of the semiconductor wafer. Forming the cavity also forms a ring support structure in a peripheral region of the... Agent: Semiconductor Components Industries, LLC Intellectual Property Dept. - A700

20100059863 - Stretchable form of single crystal silicon for high performance electronics on rubber substrates: The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant... Agent: Greenlee Winner And Sullivan P C

20100059864 - Method of manufacturing a semiconductor device including etching to etch stop regions: A method of manufacturing a semiconductor device. The method includes providing a wafer having a first face and a second face opposite the first face, selectively doping the wafer via the first face to selectively form etch stop regions in the wafer and etching the wafer at the second face... Agent: Dicke, Billig & Czaja

20100059865 - Package with power and ground through via: A wire bond design integrated circuit with a substrate having a front side and an opposing back side. Circuitry is disposed on the font side. Electrically conductive vias are disposed through the substrate from the front side to the back side, and are electrically connected to the circuitry such that... Agent: Lng/lsi Joint Customer C/o Luedeka, Neely & Graham, P.C.

20100059866 - Semiconductor device and method of forming vertically offset bond on trace interconnects on recessed and raised bond fingers: A semiconductor device has a vertically offset bond on trace (BOT) interconnect structure. The vertical offset is achieved by forming a first conductive layer extending above a surface of a carrier. The first conductive layer is pressed into a surface of a substrate so that the first conductive layer is... Agent: Robert D. Atkins

20100059868 - Electronic device and method for manufacturing structure for electronic device: An electronic device including a shielded electronic element, and a method for manufacturing a shielding structure. An oxide film is formed on the surface of a silicon substrate having a [100] face. Part of the oxide film is removed to form a first window region. Silicon substrates are joined together... Agent: Freescale Semiconductor, Inc. Law Department

20100059867 - Integrated circuit chip with seal ring structure: An integrated circuit chip includes an analog and/or RF circuit block, a digital circuit, and a seal ring structure surrounding and protecting the analog and/or RF circuit block. The seal ring structure comprises a continuous outer seal ring, and a discontinuous inner seal ring divided into at least a first... Agent: North America Intellectual Property Corporation

20100059869 - Systems and methods for enabling esd protection on 3-d stacked devices: An electrostatic discharge (ESD) protection device is fabricated in a vertical space between active layers of stacked semiconductor dies thereby utilizing space that would otherwise be used only for communication purposes. The vertical surface area of the through silicon vias (TSVs) is used for absorbing large voltages resulting from ESD... Agent: Qualcomm Incorporated

20100059870 - Chip package structure: A chip package structure including a substrate, at least one chip, a plurality of leads, a heat dissipation device, a molding compound, and at least one insulating sheet is provided. The chip is disposed on the substrate. The leads are electrically connected to the substrate. The molding compound having a... Agent: J C Patents

20100059871 - Leadframe: A leadframe including a chip supporting plate, a lead forming plate, and solder points is provided. A notch is formed on an edge of the chip supporting plate. The thickness of the lead forming plate is less than the thickness of the chip supporting plate. The lead forming plate has... Agent: J C Patents

20100059872 - Adhesive tape, connected structure and semiconductor package: An adhesive tape 101 electrically connecting conductive components includes a resin layer 132 containing a thermosetting resin, a solder powder 103 and a curing agent. The solder powder 103 and the curing agent reside in the resin layer 132, the curing temperature T1 of the resin layer 132 and the... Agent: Smith, Gambrell & Russell

20100059873 - Ball grid array package stacking system: A ball grid array package stacking system includes: forming a heat spreader having a centrally located access port; mounting a substrate in the heat spreader for providing a connection pad in the centrally located access port; coupling an integrated circuit die to the substrate; and coupling a system interconnect to... Agent: Law Offices Of Mikio Ishimaru

20100059874 - Semiconductor chip capable of increased number of pads in limited region and semiconductor package using the same: A semiconductor package includes a semiconductor chip including a body unit having one or more circuit units. A first bonding pad is disposed in a first face of the body unit and is connected to a circuit unit. A second bonding pad is disposed in the first face of the... Agent: Ladas & Parry LLP

20100059875 - Semiconductor device: A package of a semiconductor device internally includes a first semiconductor chip and a second semiconductor chip in which power MOS•FETs are formed and a third semiconductor chip in which a control circuit controlling the first and second semiconductor chips is formed. The first to third semiconductor chips are mounted... Agent: Mattingly & Malur, P.C.

20100059876 - Electronic component package and method of manufacturing the same: There is provided an electronic component package. The electronic component package includes: a core layer including a plurality of insulating layers formed by impregnating a base material with a resin, wherein a hollow portion is formed in the core layer; core wiring layers each disposed between the insulating layers; and... Agent: Drinker Biddle & Reath (dc)

20100059877 - Method for packaging electronic devices and integrated circuits: The present invention relates to the field of electronic devices and their associated driver and/or controller integrated circuits and in particular to the mechanical packaging of electronic devices and to the packaging of electronic devices and their associated driver and/or controller integrated circuits.... Agent: Demont & Breyer, LLC

20100059878 - Stack assemblies containing semiconductor devices: The present invention provides a stack assembly comprising at least one semiconductor device 2a-2d, preferably having an open construction, interspersed between heatsinks 20a-20e and adapted to be at least partially immersed in a liquid dielectric coolant. The open construction means that the at least one semiconductor device 2a-2d will be... Agent: Eckert Seamans Cherin & Mellott

20100059879 - Power amplifier assembly: The power amplifier module comprises a laminate substrate comprising thermal vias and terminals, as well as a platform device with an interconnection substrate of a semiconductor material. This substrate is provided with electrical interconnects at a first side, and having been mounted on the laminate substrate with an opposite second... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100059880 - Semiconductor module and an electronic system including the same: A three-dimensional semiconductor module and an electronic system including the same are provided. The semiconductor module includes a module substrate, a logic device formed on a part of the module substrate, and a plurality of memory devices formed on another part of the module substrate, wherein the plurality of memory... Agent: Stanzione & Kim, LLP

20100059882 - Semiconductor device: Signal lines which provide electric connections from an internal circuit formed on a main surface of a semiconductor chip and including, for example, MIS transistor to protective elements constituted by, for example, diodes are drawn out from outlet ports formed on wiring lines disposed between the protective elements, and a... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100059881 - Semiconductor package and method of manufacturing the same: A semiconductor package and a method of manufacturing the semiconductor package are disclosed. The semiconductor package in accordance with an embodiment of the present invention includes: a substrate, in which a conductive pattern formed on one surface of the substrate; an insulation layer, which is formed on one surface of... Agent: Mcdermott Will & Emery LLP

20100059886 - Carrier structure of soc with custom interface: The present invention discloses a carrier structure of a System-on-Chip (SoC) with a custom interface. The carrier structure includes a substrate, at least one common die, at least one custom interface and a molding compound. The common die and the custom interface are disposed on the substrate. The molding compound... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC

20100059885 - Integrated circuit package system with redistribution layer: An integrated circuit package system includes: providing a base device; attaching a base interconnect to the base device; applying an encapsulant over the base device and the base interconnect; and forming a re-routing film over the encapsulant, the base device, and the base interconnect for connectivity without a substrate.... Agent: Law Offices Of Mikio Ishimaru

20100059884 - Leadless semiconductor chip carrier system: A semiconductor package system includes: providing a semiconductor die with bonding pad on the semiconductor die; attaching the semiconductor die to an intermediate layer; attaching one end of a bonding wire to the bonding pad; forming a bonding ball at the other end of the bonding wire, the bonding ball... Agent: Law Offices Of Mikio Ishimaru

20100059883 - Method of forming ball bond: A method of forming a ball bond (10) includes forming a bonding ball (12) at an end of a bonding wire (16). The bonding ball (12) is preformed to a substantially ball bond shape at a preform location (14) remote from a bonding site (24). The preformed bonding ball (22)... Agent: Freescale Semiconductor, Inc. Law Department

20100059888 - Mask rom and method of fabricating the same: A mask read-only memory (ROM) includes a dielectric layer formed on a substrate and a plurality of first conductive lines formed on the dielectric layer. A plurality of diodes are formed in the first conductive lines, and a plurality of final vias are formed for a first set of the... Agent: Law Office Of Monica H Choi

20100059887 - Semiconductor device having insulating film with surface modification layer and method for manufacturing the same: Provided is a semiconductor device, which includes an interlayer insulating film formed on a semiconductor substrate, a wiring layer filled in a recess formed in the interlayer insulating film, and a cap insulating film. The interlayer insulating film includes a first SiOCH film and a surface modification layer including an... Agent: Young & Thompson

20100059889 - Adhesion of diffusion barrier on copper-containing interconnect element: The present invention relates to a method for fabricating a semiconductor device. For improving the adhesion between a copper-containing interconnect element and a diffusion barrier on top of it, a first dielectric layer (108) of a first dielectric material is deposited on an exposed surface (102.1) of the interconnect element.... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100059890 - Metal line of semiconductor device having a diffusion barrier including crxby and method for forming the same: A metal line of a semiconductor device having a diffusion barrier including CrxBy and a method for forming the same is described. The metal line of a semiconductor device includes an insulation layer formed on a semiconductor substrate. The insulation layer is formed having a metal line forming region. A... Agent: Ladas & Parry LLP

20100059891 - Alternative to desmear for build-up roughening and copper adhesion promotion: In some embodiments, an alternative to desmear for build-up roughening and copper adhesion promotion is presented. In this regard, a substrate in introduced having a dielectric layer, a plurality of polyelectrolyte multilayers on the dielectric layer, and a copper plating layer on the polyelectrolyte multilayers. Other embodiments are also disclosed... Agent: Dave Guglielmi C/o Blakely, Sokoloff, Taylor & Zafman LLP

20100059892 - Production method of semiconductor device, production method of display device, semiconductor device, production method of semiconductor element, and semiconductor element: The present invention provides a production method of a semiconductor device, a production method of a display device, a semiconductor device, a production method of a semiconductor element, and a semiconductor element, each capable of providing a lower-resistance semiconductor element which is more finely prepared through more simple steps. The... Agent: Birch Stewart Kolasch & Birch

20100059893 - Synergy effect of alloying materials in interconnect structures: A method of forming an integrated circuit structure, the method includes providing a semiconductor substrate; forming a dielectric layer over the semiconductor substrate; forming an opening in the dielectric layer; forming a seed layer in the opening; forming a copper line on the seed layer, wherein at least one of... Agent: Slater & Matsil, L.L.P.

20100059894 - Method of manufacturing openings in a substrate, a via in substrate, and a semiconductor device comprising such a via: The invention relates to a method of manufacturing openings in a substrate (5), the method comprising steps of: providing the substrate (5) with a masking layer (40) on a surface thereof; forming a first opening (10), a second opening (30), and a channel (20) in between the first opening (10)... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100059895 - Semiconductor device having an interlayer insulating film wiring laminated structure section and method of fabricating the same: In the manufacture of a semiconductor, in unnecessary semiconductor device formation areas 22b and 22c, a columnar electrode 14 made of copper is formed only in an area excluding an area corresponding to a dicing street 23 and both sides of the dicing street 23, and is not formed in... Agent: Frishauf, Holtz, Goodman & Chick, PC

20100059896 - Coplaner waveguide and fabrication method thereof: A coplanar waveguide includes a substrate, a signal line formed on the substrate, a pair of ground conductors formed on the substrate on mutually opposite sides of the signal line, a signal line insulating film disposed between the signal line and the substrate, and a ground conductor insulating film disposed... Agent: Rabin & Berdo, PC

20100059897 - Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods: Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods are disclosed. A system in accordance with a particular embodiment includes a first semiconductor substrate having a first substrate material, and a penetrating structure carried by the first semiconductor substrate. The system further includes... Agent: Perkins Coie LLP Patent-sea

20100059898 - Signal delivery in stacked device: Some embodiments include apparatus, systems, and methods having a base, a first die, a second arranged in a stacked with the first die and the base, and a structure located in the stack and outside at least one of the first and second dice and configured to transfer signals between... Agent: Schwegman, Lundberg & Woessner/micron

20100059899 - Ic card and manufacturing method thereof: This IC card is provided with a module having an inlet, an adhesive layer covering the module, and a first base material and second base material sandwiching the module with interposition of the adhesive layer. The module is disposed on one face of the first base material with interposition of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100051894 - Device for storing data with optical addressing: P

20100051891 - Electronic element including ferroelectric substance film and method of manufacturing the same: A laminated film structure, method of manufacturing, and a preferable electronic element using the structure. The effective polarization into the electric field can be realized in the direction of crystal axis by enhancing the crystal property and alignment property of the ferroelectric substance film formed through epitaxial growth with reference... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100051892 - Nonvolatile semiconductor memory apparatus and manufacturing method thereof: A nonvolatile semiconductor memory apparatus (10) of the present invention comprises a semiconductor substrate (11), an active element forming region provided on the semiconductor substrate (11) and including a plurality of active elements (12), a wire forming region which is provided on the active element forming region to electrically connect... Agent: Mcdermott Will & Emery LLP

20100051893 - Plasma treating methods of fabricating phase change memory devices, and memory devices so fabricated: Phase change memory devices may be fabricated by forming a first electrode on a substrate and forming a chalcogenide material on the first electrode. The chalcogenide material is plasma treated sufficiently to induce a plasma species throughout the chalcogenide material. A second electrode is formed on the chalcogenide material. Related... Agent: Myers Bigel Sibley & Sajovec

20100051895 - Phase change material, a phase change random access memory device including the phase change material, a semiconductor structure including the phase change material, and methods of forming the phase change material: A phase change material including a high adhesion phase change material formed on a dielectric material and a low adhesion phase change material formed on the high adhesion phase change material. The high adhesion phase change material includes a greater amount of at least one of nitrogen and oxygen than... Agent: Trask Britt, P.C./ Micron Technology

20100051896 - Variable resistance memory device using a channel-shaped variable resistance pattern: A variable resistance memory device includes a substrate and a plurality of spaced apart lower electrodes on the substrate. The device further includes a variable resistance material pattern comprising two vertically opposed wall members connected by a bottom member disposed on and electrically connected to at least one of the... Agent: Myers Bigel Sibley & Sajovec

20100051897 - Device and process of forming device with device structure formed in trench and graphene layer formed thereover: A graphene-based device is formed with a substrate having a trench therein, a device structure on the substrate and within the trench, a graphene layer over the device structure, and a protective layer over the graphene layer. Fabrication techniques include forming a trench in a substrate, forming a device structure... Agent: Ditthavong Mori & Steiner, P.C.

20100051899 - Method of manufacturing nanowire, method of manufacturing a semiconductor apparatus including nanowire and semiconductor apparatus formed from the same: A method of manufacturing a nanowire, a method of manufacturing a semiconductor apparatus including a nanowire and a semiconductor apparatus formed from the same are provided. The method of manufacturing a semiconductor apparatus may include forming a material layer pattern on a substrate, forming a first insulating layer on the... Agent: Harness, Dickey & Pierce, P.L.C

20100051898 - Quantum dot-wavelength converter, manufacturing method of the same and light emitting device including the same: There is provided a quantum dot wavelength converter including a quantum dot, which is optically stable without any change in an emission wavelength and improved in emission capability. The quantum dot wavelength converter includes: a wavelength converting part including a quantum dot wavelength-converting excitation light and generating a wavelength-converted light... Agent: Mcdermott Will & Emery LLP

20100051901 - Light emitting devices and displays with improved performance: Light emitting devices and devices with improved performance are disclosed. In one embodiment, a light emitting device includes an emissive material disposed between a first electrode, and a second electrode, wherein the emissive material comprises semiconductor nanocrystals capable of emitting light including a maximum peak emission in the blue region... Agent: Martha Ann Finnegan Qd Vision, Inc.

20100051900 - Misfit dislocation forming interfacial self-assembly for growth of highly-mismatched iii-sb alloys: Exemplary embodiments provide high-quality layered semiconductor devices and methods for their fabrication. The high-quality layered semiconductor device can be formed in planar with low defect densities and with strain relieved through a plurality of arrays of misfit dislocations formed at the interface of highly lattice-mismatched layers of the device. The... Agent: Mh2 Technology Law Group, LLP

20100051902 - Semiconductor device and method of manufacturing the same: A semiconductor device has a structure in which a light-emitting layer of an organic material or the like is sandwiched between a work function controlled single-wall carbon nanotube cathode encapsulating a donor having a low ionization potential and a work function controlled single-wall carbon nanotube anode encapsulating an acceptor having... Agent: Sughrue Mion, PLLC

20100051904 - Dual-level self-assembled patterning method and apparatus fabricated using the method: A method of fabricating a device includes: providing a substrate having a patterned surface, depositing a first-level self-assembled material on at least a portion of the patterned surface, wherein the position and/or orientation of the first-level self-assembled material is directed by the patterned surface, to form a first nanostructure pattern,... Agent: Pietragallo Gordon Alfano Bosick & Raspanti, LLP

20100051903 - Method of aligning nanorods and related compositions: A method of forming an array of nanorods on a crystalline substrate includes heating a composition that includes the crystalline substrate, a nanorod precursor, and a surfactant. The surfactant is capable of associating with the surface of the nanorods. The resulting nanostructures formed from the methods may be used in... Agent: Seo-yong Cho San 4-2, Bongchun-dong

20100051905 - Moisture detector, biological body moisture detector, natural product moisture detector, and product/material moisture detector: A moisture detector includes a light-receiving element including an absorption layer having a pn-junction, or an array of the light-receiving elements, wherein the absorption layer has a multiquantum well structure composed of a Group III-V semiconductor, the pn-junction is formed by selectively diffusing an impurity element into the absorption layer,... Agent: Venable LLP

20100051906 - Semiconductor device: A semiconductor device for correcting an input signal and outputting a corrected signal are provided. The semiconductor device includes a semiconductor layer, a plurality of first conductors formed on one of faces of the semiconductor layer and serving as input terminals to which a signal is input, second conductors of... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100051907 - Devices including graphene layers epitaxially grown on single crystal substrates: An electronic device comprises a body including a single crystal region on a major surface of the body. The single crystal region has a hexagonal crystal lattice that is substantially lattice-matched to graphene, and a at least one epitaxial layer of graphene is disposed on the single crystal region. In... Agent: Michael J. Urbano

20100051926 - Anthracene derivative, material for light-emitting element, light-emitting element, light-emitting device, and electronic appliance: An anthracene derivative represented by general formula (1) is provided. In the formula, Ar1, Ar3, Ar5, and Ar6 independently represent an aryl group having 6 to 13 carbon atoms, Ar2 and Ar4 independently represent an arylene group having 6 to 13 carbon atoms, and R1 to R8 independently represent hydrogen... Agent: Cook Alex Ltd

20100051920 - Composite article including a cation-sensitive layer: A composite article includes a substrate having a surface, a cation-sensitive layer including a cation-sensitive material disposed on the surface of the substrate, and a silicone layer disposed between the substrate and the cation-sensitive layer. Cations are present on the surface of the substrate in an amount of at least... Agent: Howard & Howard Attorneys PLLC

20100051924 - Fluorene-containing compound and organic light emitting device employing the same: A novel fluorene-containing compound and an organic electroluminescent device including an organic layer employing the same. The fluorene-containing compound has excellent electrical characteristics and an excellent charge transporting capability, and so can be used as a hole injecting material, hole transporting material, and/or emitting material that is suitable for all-color... Agent: Stein Mcewen, LLP

20100051930 - Light emitting transistor: A main object of the present invention is to provide a static induction light emitting transistor having an organic EL element structure and a vertical FET structure which is possible to avoid a problem of the shielding of light and a problem of shielding of electric field by a gate... Agent: Ladas & Parry LLP

20100051908 - Liquid charge transporting material: The present invention relates to optoelectronic and/or electrochemical devices comprising an organic charge transporting material which is liquid at a temperature of ≦180° C. In particular in dye-sensitised solar cells, quantum efficiency higher than with prior art solid organic hole-transporters is reported. The melting point of a large quantity of... Agent: Clifford W Browning Krieg De Vault

20100051916 - Method for forming an electronic device in multi-layer structure: A method for forming an organic or partly organic switching device, comprising: depositing layers of conducting, semiconducting and/or insulating layers by solution processing and direct printing; defining microgrooves in the multilayer structure by solid state embossing; and forming a switching device inside the microgroove.... Agent: Sughrue Mion, PLLC

20100051912 - Molecular electronic device fabrication methods and structures: We describe an optical or optoelectronic device comprising a substrate and a plurality of discrete bank structures disposed on the substrate, wherein: each bank structure defines the perimeter of at least one well; one or more of a charge transporting, charge injecting, light-filtering and light-emitting material is disposed in the... Agent: Marshall, Gerstein & Borun LLP

20100051909 - Molecular electronic devices and methods of fabricating same: Substrates carrying many molecular devices and circuits made of at least two devices are described. The substrates have less than 50% shorted molecular devices; and molecular circuits comprise a first molecular device and a second molecular device. The first molecular device has at least one self assembled monolayer (SAM) of... Agent: Martin D. Moynihan D/b/a Prtsi, Inc.

20100051928 - Organic electroluminescence device: wherein each of Z11 and Z12 independently represents an aromatic heterocyclic ring or an aromatic hydrocarbon ring; R11 represents a hydrogen atom or a substituent, provided that a plurality of R11s are the same or different; m represents an integer of 1 or more; and L1 represents a single bond... Agent: Sughrue-265550

20100051921 - Organic field effect transistor: An organic field effect transistor comprising a gate electrode 2, a gate insulating layer 3, a semiconductor layer 4, a source electrode 7, and a drain electrode 8, wherein the source electrode 7 and the drain electrode 8 are composed of conductive layers 6 and 6′, and compound layers 5... Agent: Sughrue Mion, PLLC

20100051927 - Organic field effect transistor and its production method:

20100051913 - Organic field-effect transistor, production method and intermediate structure therefor, and organic field-effect device: An organic field-effect transistor normally includes: a source electrode and a drain electrode; an organic semiconductor layer in contact with the source electrode and the drain electrode; a gate insulating layer adjacent to the organic semiconductor layer; and a gate electrode in contact with the gate insulating layer. The gate... Agent: Oliff & Berridge, PLC

20100051910 - Organic light emitting diode display and fabricating method thereof: An organic light emitting diode display device includes a switch TFT and a drive TFT formed on a substrate; an overcoat layer formed on the TFTs; a drain contact hole exposing portions of a drain electrode of the drive TFT by removing portions of the overcoat layer; a first electrode... Agent: Holland & Knight LLP

20100051925 - Organic light emitting diode display device and method of fabricating the same: An organic light emitting diode (OLED) display device which can improve emission efficiency and reduce (or minimize) resonance effect, and a method of fabricating the same. The OLED display device includes a substrate; a first electrode disposed on the substrate and including a reflective layer; an organic layer disposed on... Agent: Christie, Parker & Hale, LLP

20100051929 - Organic light emitting display apparatus and method of manufacturing same: An organic light emitting display apparatus having a substrate, a plurality of first electrodes of black color formed on the substrate, separators disposed on spaces between the first electrodes, a black matrix layer that is conductive and formed on the separators, an organic light emitting layer formed on the first... Agent: Robert E. Bushnell & Law Firm

20100051918 - Organic thin film transistor and organic thin film light-emitting transistor: An organic thin film transistor including a substrate having thereon at least three terminals of a gate electrode, a source electrode and a drain electrode, an insulator layer and an organic semiconductor layer, with a current between a source and a drain being controlled upon application of a voltage to... Agent: Millen, White, Zelano & Branigan, P.C.

20100051919 - Organic thin film transistor and organic thin film light-emitting transistor: An organic thin film transistor including a substrate having thereon at least three terminals of a gate electrode, a source electrode and a drain electrode, an insulator layer and an organic semiconductor layer, with a current between a source and a drain being controlled upon application of a voltage to... Agent: Millen, White, Zelano & Branigan, P.C.

20100051911 - Organic thin film transistor array panel and method of manufacturing the same: In an organic thin film transistor array panel includes a source electrode and a drain electrode having a double layer including a metal and a metal oxide. The organic thin film transistor array panel is formed through a lift-off process or by using a shadow mask. The thin film transistor... Agent: F. Chau & Associates, LLC

20100051922 - Organic thin film transistors: An organic thin film transistor comprising: a substrate; a source electrode and a drain electrode defining a channel; a layer of insulating material disposed over the source and drain electrodes; a layer of organic semi-conductive material extending across the channel; a layer of dielectric material; and a gate electrode disposed... Agent: Marshall, Gerstein & Borun LLP

20100051923 - Organischer feldeffekt transistor: The invention relates to an organic field-effect transistor, in particular an organic thin-layer field-effect transistor, with a gate electrode, a drain electrode and a source electrode, an active layer of organic material which during operation is configured to form an electrical line channel, a dielectric layer which electrically isolates the... Agent: Sutherland Asbill & Brennan LLP

20100051915 - Polymer charge transport material for optoelectronic devices: Polymers that enable the use of high work-function metals as a cathode in optoelectronic devices and optoelectronic devices incorporating the polymers as an electron transport layer.... Agent: Christensen, O'connor, Johnson, Kindness, PLLC

20100051917 - Printable thin-film transistors with high dielectric constant gate insulators and methods for producing same: Disclosed are embodiments of organic thin-film transistors (OTFT) with a gate insulator layer comprised of nanocomposites incorporating metal oxide nanoparticles coated by organic ligands and methods of fabricating such OTFTs. This abstract is intended as a scanning tool for purposes of searching in the particular art and is not intended... Agent: Ballard Spahr LLP

20100051931 - Semiconductor apparatus and process for fabricating the same: A semiconductor apparatus in which a conducting path formed from organic semiconductor molecules as a material has a novel structure and exhibits high mobility, and a manufacturing method for fabricating the same are provided. Fine particles that include a conductor or a semiconductor and organic semiconductor molecules, are alternately bonded... Agent: K&l Gates LLP

20100051914 - Silicon-containing compound and organic electroluminescent device employing the same: The silicon-containing compound has excellent electrical characteristics and a charge transporting capability, the silicon-containing compound can be used as a hole injecting material, a hole transporting material, and/or a light emitting material that are suitable for all-color fluorescent and phosphorescent organic light emitting devices such as red, green, blue, and... Agent: Robert E. Bushnell & Law Firm

20100051938 - Amorphous oxide semiconductor and thin film transistor using the same: There is provided an amorphous oxide semiconductor including hydrogen and at least one element of indium (In) and zinc (Zn), the amorphous oxide semiconductor containing one of hydrogen atoms and deuterium atoms of 1×1020 cm−3 or more to 1×1022 cm−3 or less, and a density of bonds between oxygen and... Agent: Fitzpatrick Cella Harper & Scinto

20100051936 - Bottom gate type thin film transistor, method of manufacturing the same, and display apparatus: Provided is a bottom gate type thin film transistor including on a substrate (1) a gate electrode (2), a first insulating film (3) as a gate insulating film, an oxide semiconductor layer (4) as a channel layer, a second insulating film (5) as a protective layer, a source electrode (6),... Agent: Fitzpatrick Cella Harper & Scinto

20100051941 - Display device: A display device in which an OFF current of a thin film transistor formed of metal oxide semiconductor provided to the display device is further lowered thus ensuring the stability of an operation of the thin film transistor is provided. In a display device in which thin film transistors each... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100051935 - Liquid crystal display and method of manufacturing the same: A liquid crystal display and a method of manufacturing the same are provided. The liquid crystal display includes an insulating substrate, a gate electrode formed on the insulating substrate, an oxide semiconductor layer formed on the gate electrode, an etch stopper formed on the oxide semiconductor layer in a channel... Agent: F. Chau & Associates, LLC

20100051943 - Method for forming pattern, thin film transistor, display device, method for manufacturing thereof, and television apparatus: To provide a display device which can be manufactured with higher efficiency in the use of material through a simplified manufacturing process, and a method for manufacturing the display device. Another object is to provide a technique by which patterns of a wiring the like which constitutes the display device... Agent: Nixon Peabody, LLP

20100051932 - Nanostructure and uses thereof: Disclosed herein are nanostructures comprising a conducting substrate, an array of nanowires, and one or more semiconductor nanolayers disposed radially around the nanowires. A layer of dye may be further disposed radially around the one or more semiconductor layers. The nanostructures may be used to provide a dye-sensitizing solar cell... Agent: Seo-yong Cho

20100051939 - Nitride based semiconductor device and method of manufacturing the same: An interfacial reaction suppressing layer 12 formed between an oxide layer including a ZnO single crystal substrate 11 and a nitride layer including an InGaN semiconductor layer 13 restrains the interfacial reaction between the oxide layer and the nitride layer and formation of a reaction layer (Al2ZnO4) at the interface,... Agent: Kubotera & Associates, LLC

20100051940 - Semiconductor device and method for manufacturing the semiconductor device: An object is to provide favorable interface characteristics of a thin film transistor including an oxide semiconductor layer without mixing of an impurity such as moisture. Another object is to provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability, and a method by... Agent: Eric Robinson

20100051934 - Thin film transistor array panel and method of manufacturing the same: A thin film transistor array panel and a method of manufacturing the same are provided according to one or more embodiments. In an embodiment, a method includes: forming a gate line on an insulation substrate; stacking a gate insulating layer, an oxide semiconductor layer, a first barrier layer, and a... Agent: Haynes And Boone, LLPIPSection

20100051933 - Thin film transistor array substrate and method of fabricating the same: A thin film transistor array substrate having a high charge mobility and that can raise a threshold voltage, and a method of fabricating the thin film transistor array substrate are provided. The thin film transistor array substrate includes: an insulating substrate; a gate electrode formed on the insulating substrate; an... Agent: Haynes And Boone, LLPIPSection

20100051937 - Thin-film transistor and method of manufacturing same: There is provided a thin-film transistor including at least a substrate, a gate electrode, a gate insulating layer, an oxide semiconductor layer, a source electrode, a drain electrode and a protective layer, wherein the oxide semiconductor layer is an amorphous oxide containing at least one of the elements In, Ga... Agent: Fitzpatrick Cella Harper & Scinto

20100051942 - Zno-based thin film transistor and method of manufacturing the same: A ZnO-based thin film transistor (TFT) is provided herein, as is a method of manufacturing the TFT. The ZnO-based TFT has a channel layer that comprises ZnO and ZnCl, wherein the ZnCl has a higher bonding energy than ZnO with respect to plasma. The ZnCl is formed through the entire... Agent: Cantor Colburn, LLP

20100051944 - Silicon processing method and silicon substrate with etching mask: A silicon processing method includes: forming a mask pattern on a principal plane of a single-crystal silicon substrate; and applying crystal anisotropic etching to the principal surface to form a structure including a (111) surface and a crystal surface equivalent thereto and having width W1 and length L1. The principal... Agent: Fitzpatrick Cella Harper & Scinto

20100051946 - Poly-emitter type bipolar junction transistor, bipolar cmos dmos device, and manufacturing methods of poly-emitter type bipolar junction transistor and bipolar cmos dmos device: A poly-emitter type bipolar transistor includes a buried layer formed over an upper portion of a semiconductor substrate, an epitaxial layer formed on the semiconductor substrate, a collector area formed on the epitaxial layer and connected to the buried layer, a base area formed at a part of an upper... Agent: Sherr & Vaughn, PLLC

20100051945 - Silicon wafer and method for producing the same: A silicon wafer is produced through the steps of forming a silicon ingot by a CZ method with an interstitial oxygen concentration of not more than 7.0×1017 atoms/cm3 and with a diameter of a COP occurring region not more than a diameter of a crystal, slicing a wafer from the... Agent: Greenblum & Bernstein, P.L.C

20100051947 - Amorphous insulator film and thin-film transistor: An amorphous insulator film is provided which is composed of silicon (Si) oxide, in which the amorphous insulator film includes Ar and an amount of Ar included therein is equal to or larger than 3 at. % in terms of atomic ratio with respect to Si.... Agent: Fitzpatrick Cella Harper & Scinto

20100051949 - Semiconductor device and method for manufacturing the same: A thin film transistor structure in which a source electrode and a drain electrode formed from a metal material are in direct contact with an oxide semiconductor film may lead to high contact resistance. One cause of high contact resistance is that a Schottky junction is formed at a contact... Agent: Eric Robinson

20100051948 - Thin film transistor, electro-optic device, and electronic apparatus: A thin film transistor includes a gate electrode and a semiconductor layer. The semiconductor layer includes a channel region, a source region, a drain region, a low-concentration impurity region provided between the channel region and the source or drain region and a high-concentration impurity region. The high-concentration impurity region overlaps... Agent: Advantedge Law Group, LLC

20100051953 - Liquid crystal display device and method of fabricating the same: A display device includes a substrate having a display region and a driver region; a gate line and a data line crossing each other to define a pixel region in the display region, the pixel region having a pixel electrode; an insulation layer between the gate line and the data... Agent: Mckenna Long & Aldridge LLP

20100051954 - Pixel structure and method for manufacturing the same: A method for manufacturing a pixel structure is provided. First, a first mask process is performed to form a patterned first metal layer on a substrate, wherein the patterned first metal layer includes a gate. Next, a second mask process is performed to form a patterned insulating layer and a... Agent: Bacon & Thomas, PLLC

20100051951 - Thin film transistor array panel and manufacturing method of the same: A thin film transistor (“TFT”) array panel includes; an insulation substrate, a TFT disposed on the insulation substrate and including a drain electrode, a passivation layer covering the TFT and including a contact portion disposed therein corresponding to the drain electrode, a partition comprising an organic material disposed on the... Agent: Cantor Colburn, LLP

20100051955 - Thin film transistor array substrate: A thin film transistor array substrate including a substrate, scan lines, data lines, thin film transistors, pixel electrodes, common lines and a patterned upper electrode is provided. The scan lines and the data lines are disposed over the substrate to define pixel areas. Each thin film transistor is disposed within... Agent: Jianq Chyun Intellectual Property Office

20100051950 - Thin film transistor array substrate and method of fabricating thereof: A thin film transistor array substrate includes a substrate, a plurality of poly-silicon islands and a plurality of gates. The substrate has a display region, a gate driver region and a source driver region. Each poly-silicon island disposed on the substrate has a source region, a drain region and a... Agent: Jianq Chyun Intellectual Property Office

20100051952 - Thin film transistor substrate and method of manufacturing the same: A thin film transistor substrate capable of appropriately maintaining driving performance even when there is a difference between manufacturing processes and a method of manufacturing the same. The thin film transistor substrate includes: a gate electrode formed on an insulating substrate; a semiconductor layer formed on the gate electrode; and... Agent: F. Chau & Associates, LLC

20100051959 - Circuit board and display device: The present invention provides a circuit board that includes high-performance thin film transistors whose characteristics are hardly varied thereamong in a monolithic circuit and also provide a display device including the circuit board. The circuit board of the present invention is a circuit board including a monolithic circuit including a... Agent: Birch Stewart Kolasch & Birch

20100051958 - Display device and manufacturing method thereof: A display device includes an insulation substrate on which TFT elements, first electrodes, light emitting layers and a second electrode are stacked in this order. Auxiliary lines are arranged between the insulation substrate and the second electrodes, and an insulation layer is interposed between the auxiliary lines and the second... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100051957 - Thin film transistor array panel: A thin film transistor array panel, in which a middle storage electrode and a storage electrode overlapping a drain electrode of a thin film transistor thereby forming a storage capacitance are formed. Accordingly, sufficient storage capacitance may be formed without a decrease of the aperture ratio and fight transmittance of... Agent: F. Chau & Associates, LLC

20100051956 - Thin film transistor array panel and method for manufacturing the same: A thin film transistor array panel includes a substrate; a first gate line disposed on the substrate and including a gate electrode; a storage electrode disposed in a layer which is the same layer as a layer of the first gate line; a gate insulating layer disposed on the first... Agent: Cantor Colburn, LLP

20100051962 - Compound semiconductor device and the fabricating method of the same: A GaN layer functions as an electron transit layer and is formed to exhibit, at least at a portion thereof, A/B ratio of 0.2 or less obtained by a photoluminescence measurement, where “A” is the light-emission intensity in the 500-600 nm band, and “B” is the light-emission intensity at the... Agent: Kratz, Quintos & Hanson, LLP

20100051960 - Device and process of forming device with pre-patterned trench and graphene-based device structure formed therein: A graphene-based device is formed with a trench in one or more layers of material, a graphene layer within the trench, and a device structure on the graphene layer and within the trench. Fabrication techniques includes forming a trench defined by one or more layers of material, forming a graphene... Agent: Ditthavong Mori & Steiner, P.C.

20100051961 - Epitaxial substrate, semiconductor device substrate, and hemt device: A buffer layer formed of Inx1Aly1Gaz1N formed on a base, with an upper part of the buffer layer containing columnar polycrystalline including a grain boundary existing in a direction substantially perpendicular to a surface of the base. The number of grain boundaries in the lower part of the buffer layer... Agent: Burr & Brown

20100051964 - Method for preparing a semiconductor ultrananocrystalline diamond film and a semiconductor ultrananocrystalline diamond film prepared therefrom: A method for preparing a semiconductor ultrananocrystalline diamond (UNCD) film includes doping an UNCD film with an ion source at a dose not less than 1014 ions/cm2 through ion implantation, and annealing the doped UNCD film. A semiconductor UNCD film prepared from the method by using a nitrogen-containing gas as... Agent: Ladas & Parry LLP

20100051963 - Power transistor: A power transistor. One embodiment provides a power transistor having a first terminal, a second terminal and a control terminal. A support layer is formed of a first material having a first bandgap. An active region is formed of a second material having a second bandgap wider than the first... Agent: Dicke, Billig & Czaja

20100051965 - Carbon-containing semiconductor substrate: A light-emitting diode (LED) device is provided. The LED device is formed on a substrate having a carbon-containing layer. Carbon atoms are introduced into the substrate to prevent or reduce atoms from an overlying metal/metal alloy transition layer from inter-mixing with atoms of the substrate. In this manner, a crystalline... Agent: Slater & Matsil, L.L.P.

20100051966 - Methods of making semiconductor-based electronic devices on a wire and articles that can be made using such devices: Strands of active electronic devices (AEDs), such as FETs, are made by first completely or partially forming a plurality of the AEDs on a precursor substrate. Then, one or more elongate conductors (e.g., wires) are secured to ones of the AEDs so as to electrically connected the AEDs together. After... Agent: Downs Rachlin Martin PLLC

20100051967 - Absorbing film: Materials can be prepared in a layer-by-layer fashion on a patterned first substrate and subsequently transferred to a second substrate. The transfer step can preserve the pattern of the first substrate, such that the second substrate will bear a pattern of the transferred material. The material can be an electrostatic... Agent: Steptoe & Johnson LLP

20100051968 - Light-emitting element, light-emitting device, and electronic device: Disclosed is a light-emitting element having a light-emitting layer which includes a first layer, a second layer, and a third layer provided in this order on an anode side between the anode and a cathode. The first layer has a hole-transporting property, the second layer has a bipolar property, and... Agent: Cook Alex Ltd

20100051969 - Display device: A display device includes a transparent substrate, and a plurality of single-crystal thin-film semiconductor light-emitting elements disposed on one side of the transparent substrate. Each of the single-crystal thin-film semiconductor light-emitting elements is composed of single-crystal thin-film semiconductor layers separated from a base substrate, and includes a light-emitting layer and... Agent: Rabin & Berdo, PC

20100051971 - High efficiency light emitting articles and methods of forming the same: A light emitting article (100) is disclosed and includes a light emitting diode (110) having a p-n junction, a light emitting surface (111), and a patterned electrode (130). An extractor (140) having a light input surface (141) is optically coupled to the light emitting surface forming a light emitting interface... Agent: 3m Innovative Properties Company

20100051973 - Light-emitting device, electronic equipment, and process of producing light-emitting device: A light-emitting device includes a light-reflecting layer, a first electrode disposed on or above the light-reflecting layer, a semi-transparent reflective second electrode, a light-emitting function layer disposed between the first electrode and the second electrode, and an electron-injection layer disposed between the light-emitting function layer and the second electrode. The... Agent: Oliff & Berridge, PLC

20100051972 - Light-emitting diode integration scheme: A circuit structure includes a carrier substrate, which includes a first through-via and a second through-via. Each of the first through-via and the second through-via extends from a first surface of the carrier substrate to a second surface of the carrier substrate opposite the first surface. The circuit structure further... Agent: Slater & Matsil, L.L.P.

20100051970 - Planarized led with optical extractor: A light emitting article is disclosed and includes a light emitting diode having an n-layer or p-layer with a first refractive index value. A planarizing layer having a refractive index value equal to or greater than the first refractive index value is disposed on the n-layer or p-layer, and a... Agent: 3m Innovative Properties Company

20100051975 - Layered semiconductor light emitting device and image forming apparatus: A layered semiconductor light emitting device includes a plurality of semiconductor light emitting elements each of which includes a light emitting region that converts electricity into light and emits the light. The semiconductor light emitting elements are layered in a layering direction perpendicular to the light emitting regions, and are... Agent: Rabin & Berdo, PC

20100051976 - Led lighting assembly: Disclosed is a lighting assembly comprising one or more light emitting diodes (LEDs). The assembly comprises a ceramic disc which is coated with a layer of heat conducting material. The assembly provides sufficient galvanic insulation for it to be used safely even when connected to the electric grid as a... Agent: Howrey LLP-eu

20100051974 - Light source including a wavelength-converted semiconductor light emitting device and a filter: A semiconductor light emitting device comprises a light emitting layer disposed between an n-type region and a p-type region. The light emitting layer is adapted to emit first light having a first peak wavelength. A first wavelength converting material is adapted to absorb the first light and emit second light... Agent: Patent Law Group LLP

20100051977 - Light emitting device having isolating insulative layer for isolating light emitting cells from each other and method of fabricating the same: Disclosed is a light emitting device having an isolating insulative layer for isolating light emitting cells from one another and a method of fabricating the same. The light emitting device comprises a substrate and a plurality of light emitting cells formed on the substrate. Each of the light emitting cells... Agent: H.c. Park & Associates, PLC

20100051980 - Method for manufacturing group iii nitride compound semiconductor light-emitting device, group iii nitride compound semiconductor light-emitting device, and lamp: A method for manufacturing a Group III nitride semiconductor light-emitting device according to the present invention, comprising forming, on a substrate, a semiconductor layer comprised of a Group III nitride compound semiconductor containing Ga as a Group III element by a sputtering method, wherein during the formation of the semiconductor... Agent: Sughrue Mion, PLLC

20100051979 - Semiconductor device and optical print head: A semiconductor device includes a diamond-like carbon film formed on the substrate. A thin film is formed on the diamond-like carbon film. The thin film has a thickness thinner than the diamond-like carbon. A semiconductor thin film having a semiconductor element is bonded onto the thin film.... Agent: Rabin & Berdo, PC

20100051978 - Semiconductor light emitting device and method for manufacturing same: A semiconductor light emitting device includes: a laminated structure body including an n-type semiconductor layer, a p-type semiconductor layer and a light emitting layer provided between the n-type semiconductor layer and the p-type semiconductor layer; a first electrode connected to the n-type semiconductor layer and containing at least one of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100051990 - Electroluminescence device: An organic EL element has excellent features as compared with other electroluminescent elements, but on the other hand, has a problem that the life of the element is not sufficiently long. In addition, since the organic EL element is expected to be applied to a mobile display and the like,... Agent: Cook Alex Ltd

20100051989 - Led and method for making the same: An LED includes a substrate, an LED die, and a packaging layer. The substrate has conductive pins extending therethrough. The LED die is arranged on the substrate and electronically connected to the conductive pins of the substrate. The packaging layer fills in the substrate to encapsulate the LED die therein.... Agent: PCe Industry, Inc. Att. Steven Reiss

20100051985 - Led package: The present invention provides an LED package including: a heat discharge body provided with a plurality of radially protruding heat discharge fins at an outer circumferential surface and molding material filled spaces between the heat discharge fins; a package body which is received on a top surface of the heat... Agent: Mcdermott Will & Emery LLP

20100052001 - Led packaging structure: A light emitting diode packaging structure includes a package body, a red LED chip, a blue LED chip, a green LED chip, a package material and a yellow phosphor. Three LED chips are disposed within an accommodating room of the body package and covered by the package material. The yellow... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100051993 - Light emitting apparatus and manufacturing method thereof: Disclosed is a light emitting apparatus including: a first electrode; at least one carrier transporting layer on the first electrode; a second electrode on the carrier transporting layer; a partition wall formed on an upper face side of a substrate the partition wall including an opening to be communicated with... Agent: Frishauf, Holtz, Goodman & Chick, PC

20100051988 - Light emitting device and method for manufacturing the same: A light emitting device includes: a substrate having a concave portion formed on a surface thereof; a light emitting element emitting a first light which is a blue light or a near-ultraviolet light; a resin sheet being a deformable resin sheet formed on the substrate so as to cover the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100051982 - Light-emitting diode device and method for fabricating the same: A semiconductor device is disclosed. The semiconductor device comprises a light-emitting diode chip disposed in a cavity of a semiconductor substrate. At least two isolated outer wiring layers are disposed on the bottom surface of the semiconductor substrate and are electrically connected to the light-emitting diode chip, serving as input... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100051986 - Light-emitting diodes using nano-rods and methods of manufacturing a light-emitting diode: Light-emitting diodes, and methods of manufacturing the light-emitting diode, are provided wherein a plurality of nano-rods may be formed on a reflection electrode. The plurality of nano-rods extend perpendicularly from an upper surface of the reflection electrode. Each of the nano-rods includes a first region doped with a first type... Agent: Harness, Dickey & Pierce, P.L.C

20100051996 - Light-emitting semiconductor device and package thereof: The present application discloses a light-emitting semiconductor device including a semiconductor light-emitting element, a transparent paste layer and a wavelength conversion structure. A first light emitted from the semiconductor light-emitting element enters the wavelength conversion structure to generate a second light which has a wavelength different from that of the... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100051999 - Liquid-crystalline polyester resin mixture, and reflecting plate and light-emitting device using the same: The present inventions provides a liquid-crystalline polyester resin mixture comprising a liquid-crystalline polyester, a particulate titanium oxide and at least one compound selected from the group consisting of a fatty acid amide and a fatty acid metal salt, wherein the resin mixture contains the particulate titanium oxide in an amount... Agent: Sughrue Mion, PLLC

20100051995 - Method for manufacturing semiconductor light emitting apparatus and semiconductor light emitting apparatus: A method for manufacturing a semiconductor light emitting apparatus includes causing a semiconductor light emitting device and a mounting member to face each other. The semiconductor light emitting device includes a stacked structure unit including a first semiconductor layer, a second semiconductor layer, and a light emitting layer provided between... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100052002 - Micro-reflectors on a substrate for high-density led array: The present invention provides an optical array module that includes a plurality of semiconductor devices mounted on a thermal substrate formed with a plurality of openings that function as micro-reflectors, wherein each micro-reflector includes a layer of reflective material to reflect light. Such material preferably is conductive so as to... Agent: Marger Johnson & Mccollom, P.C.

20100052000 - Optoelectronic semiconductor device: An optoelectronic semiconductor device in accordance with an embodiment of present invention includes a conversion unit having a first side; an electrical connector; a contact layer having an outer perimeter; and at least three successive discontinuous-regions formed along the outer perimeter and having at least one different factor; wherein the... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100051991 - Organic el device and process of producing the same: An organic EL device includes a light-emitting element having a first electrode disposed above a substrate, a second electrode arranged above the first electrode, and a light emission functional layer arranged between the first and second electrodes. The second electrode includes a mixture layer composed of a mixture of an... Agent: Oliff & Berridge, PLC

20100051992 - Organic electroluminescence element and manufacturing method thereof: A main object of the present invention is to provide an organic EL element which can absolutely segment cathodes when forming an organic layer by a coating method, and a producing method thereof. The present invention attains the object by providing a producing method of an organic EL element comprising... Agent: Ladas & Parry LLP

20100051997 - Organic light emitting diode and method of fabricating the same: The present invention discloses an organic light emitting diode and a method of fabricating the organic light emitting diode. The OLED device includes one or more light emitting layers, and the light emitting layer is composed of one or more light emitting materials and one or more subject materials, and... Agent: Roger H. Chu

20100051998 - Organic light emitting diode and method of fabricating the same: The present invention discloses an organic light emitting diode and a method of fabricating the organic light emitting diode. The OLED device includes one or more light emitting layers, and the light emitting layer is composed of one or more light emitting materials and one or more subject materials, and... Agent: Roger H. Chu

20100051984 - Phosphor-converted led: A light source and method for fabricating the same are disclosed. The light source includes a die, a light conversion component, and a scattering ring. The die emits light of a first wavelength through a top surface of the die and one or more side surfaces of the die, and... Agent: The Law Offices Of Calvin B. Ward

20100051983 - Polarization recycling optics for leds: An integrated multi-layer apparatus and method of producing the same is disclosed. The structure comprises an LED configured to emit first and second polarized light, and a polarizing layer configured to pass a first polarized light and reflect the second polarized light back to the LED, wherein the LED is... Agent: Arent Fox LLP

20100051994 - Semiconductor light emitting device and semiconductor light emitting apparatus: A semiconductor light emitting device, includes: a stacked structure unit including a first semiconductor layer, a second semiconductor layer, and a light emitting layer provided between the first semiconductor layer and the second semiconductor layer; a first electrode provided on a first major surface of the stacked structure unit on... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100051987 - Semiconductor light-emitting device and method for manufacturing same: A semiconductor light-emitting device includes: a laminated structure, a first electrode, a second electrode and a dielectric laminated film. The laminated structure includes, a first semiconductor layer, a second semiconductor layer, and a light-emitting layer provided between the first semiconductor layer and the second semiconductor layer, in which the second... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100051981 - Semiconductor light-emitting device, manufacturing method thereof, and lamp: There is provided a semiconductor light-emitting device having excellent light extraction efficiency and low wavelength unevenness, a manufacturing method thereof, and a lamp. A semiconductor light-emitting device includes an n-type semiconductor layer 12, a light-emitting layer 13, a p-type semiconductor layer 14, and a titanium oxide-based conductive film layer 15... Agent: Sughrue Mion, PLLC

20100052004 - Led bonding structures and methods of fabricating led bonding structures: An LED is disclosed that includes a conductive submount, a bond pad having a total volume less than 3×10−5 mm3 conductively joined to the submount, a first ohmic contact on the bond pad opposite from the submount, an epitaxial region comprising at least a p-type layer and an n-type layer... Agent: Summa, Additon & Ashe, P.A.

20100052005 - Semiconductor chip assembly with post/base heat spreader and conductive trace: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The heat spreader includes a post and a base. The post extends upwardly from the base... Agent: David M. Sigmond

20100052003 - Surface mountable chip: A surface mountable device having a circuit device and a base section. The circuit device includes top and bottom layers having a top contact and a bottom contact, respectively. The base section includes a substrate having a top base surface and a bottom base surface. The top base surface includes... Agent: The Law Offices Of Calvin B. Ward

20100052006 - Light emitting semiconductor device: A light emitting semiconductor device includes a base substrate; a light emitting semiconductor element including a crystal growth basis and provided on the base substrate so that the crystal growth basis faces in opposite direction to the base substrate; a first transparent sealing medium which seals the light emitting semiconductor... Agent: Mcginn Intellectual Property Law Group, PLLC

20100052008 - Enhancement of optical polarization of nitride light-emitting diodes by wafer off-axis cut: An off-axis cut of a nonpolar III-nitride wafer towards a polar (−c) orientation results in higher polarization ratios for light emission than wafers without such off-axis cuts. A 5° angle for an off-axis cut has been confirmed to provide the highest polarization ratio (0.9) than any other examined angles for... Agent: Gates & Cooper LLP Howard Hughes Center

20100052009 - Light emitting device and method of manufacturing the same: A light emitting device is provided. The light emitting device comprises a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer, and an InNO layer. The active layer is disposed on the first conductive semiconductor layer. The second conductive semiconductor layer is disposed on the active... Agent: Birch Stewart Kolasch & Birch

20100052007 - Light-emitting device, manufacturing method thereof, and lamp: The present invention provides a light-emitting device comprising an n-type semiconductor layer, a light-emitting layer, a p-type semiconductor layer and a titanium oxide-based conductive film layer laminated in this order, wherein the titanium oxide-based conductive film layer comprises a first layer as a light extraction layer and a second layer... Agent: Sughrue Mion, PLLC

20100052010 - Semiconductor light emitting device: e

20100052011 - Semiconductor device: and the thickness WTB of the drift region held between the base region and the buffer region, the ratio (DC/DB) of the net dose DC of the collector region with respect to the net dose DB of the buffer region is at least α. Thus, a semiconductor device capable of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100052012 - Semiconductor device: The first base electrodes and the first emitter electrodes are all formed like strips, and are alternately arranged in parallel, and the area of the second emitter electrode is expanded to be larger than that of the second base electrode. With this, the number of current paths increases in each... Agent: Morrison & Foerster LLP

20100052013 - Semiconductor device and method for manufacturing semiconductor device: It is desired for semiconductor devices to reduce leakage currents. In a semiconductor device having a stacked structure including a GaAs layer and an InGaP layer, p-type impurity is doped to the GaAs layer. Consequently, the conduction band of the GaAs is raised to higher than the Fermi level. As... Agent: Young & Thompson

20100052014 - Semiconductor device and fabrication method for the same: A semiconductor device includes a substrate; a nitride based compound semiconductor layer placed on the substrate; an active area which is placed on the nitride based compound semiconductor layer, and is composed of an aluminum gallium nitride layer (AlxGa1-xN) (where 0.1<=x<=1); an isolation region which performs isolation of the active... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100052015 - Semiconductor device: A semiconductor device includes a first compound semiconductor layer having a two-dimensional carrier gas channel, a second compound semiconductor layer which functions as a barrier layer and is arranged above the first compound semiconductor layer, a first main electrode connected to one end of the two-dimensional carrier gas channel, and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100052016 - Semiconductor structure and method of manufacture of same: A method of manufacturing a nitride semiconductor structure includes disposing a semiconductor substrate in a molecular beam epitaxy reactor; growing a wetting layer comprising AlxInyGa(1−(x/y))As(0≦x+y≦1) or AlxInyGa(1−(x/y))P(0≦x+y≦1) on the substrate; in-situ annealing the wetting layer; growing a first AlGaInN layer on the wetting layer using plasma activated nitrogen as the... Agent: Mark D. Saralino ( Sharp ) Renner, Otto, Boisselle & Sklar, LLP

20100052017 - Semiconductor memory device and manufacturing method thereof: A semiconductor memory device includes a first block having first memory cells and first select transistors, a second block having second memory cells and second select transistors, and arranged adjacent to the first block in a first direction, the second select transistor being arranged to face the first select transistor... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100052018 - Continuous metal semiconductor alloy via for interconnects: A contact structure is disclosed in which a continuous metal semiconductor alloy is located within a via contained within a dielectric material. The continuous semiconductor metal alloy is in direct contact with an upper metal line of a first metal level located atop the continuous semiconductor metal alloy and at... Agent: Scully, Scott, Murphy & Presser, P.C.

20100052019 - Semiconductor device and method for fabricating the same: Provided are a semiconductor device and a fabricating method thereof. The semiconductor device includes a substrate having a trench that defines an active region, an isolation layer that buries the trench, a pro-oxidant region formed at an upper corner portion of the trench to enhance oxidation at the upper corner... Agent: Morgan Lewis & Bockius LLP

20100052020 - Semiconductor substrate and mos based pixel structure: The invention relates to a semiconductor substrate 1 and a MOS based pixel structure for detecting light. The semiconductor substrate 1 comprises a base region 2 having dopants of a first conductivity type, a first region 3 having dopants of a second conductivity type, a second region 5 having dopants... Agent: Bacon & Thomas, PLLC

20100052022 - Nonvolatile memory and manufacturing method thereof: According to an aspect of the present invention, there is provided a nonvolatile memory including: a cell transistor including: a gate electrode and first and second diffusion layers; a second insulating film covering the cell transistor; first and second plugs penetrating the second insulating film to reach the first and... Agent: Knobbe Martens Olson & Bear LLP

20100052023 - Semiconductor device having a ferroelectric capacitor and method of manufacturing the same: A semiconductor device includes a semiconductor substrate, a plurality of transistors connected in series and including a transistor having first and second diffusion regions arranged in the semiconductor substrate. The device also includes an insulating film columnar body arranged above the semiconductor substrate, and having a side which is inclined... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100052021 - Semiconductor memory device: A semiconductor memory device includes: a MOS transistor; a bit line provided above a memory region, and electrically connected to an impurity diffusion layer; a capacitor which has a capacitive insulating film including a ferroelectric material or a high-k material, and is provided at a position higher than that of... Agent: Mcdermott Will & Emery LLP

20100052024 - Capacitor insulating film, method of forming the same, capacitor and semiconductor device using the capacitor insulating film: A capacitor insulating film may include, but is not limited to, strontium, titanium, and oxygen. The capacitor insulating film has a ratio of a spectrum intensity of (200) crystal face of the capacitor insulating film to a spectrum intensity of (111) crystal face of the capacitor insulating film in the... Agent: Sughrue Mion, PLLC

20100052025 - Soi mugfets having single gate electrode level: A silicon on insulator (SOI) multi-gate field effect transistor electrically Programmable Read-Only Memory (MuFET EPROM) includes a substrate having a dielectric surface. A first semiconducting region is in or on the dielectric surface. A source region, a drain region and a channel region interposed between the source and drain are... Agent: Texas Instruments Incorporated

20100052026 - Deep trench capacitor for soi cmos devices for soft error immunity: A semiconductor structure is disclosed. The semiconductor structure includes an active semiconductor layer, a semiconductor device having a gate disposed on top of the active semiconductor layer, and source and drain regions and a body/channel region disposed within the active semiconductor layer, an insulator layer having a first and second... Agent: Cantor Colburn LLP-ibm Yorktown

20100052028 - Capacitor of dynamic random access memory and method of manufacturing the capacitor: A transistor formed on a semiconductor substrate has a gate electrode formed via a gate insulating film and first and second diffusion layers formed in the semiconductor substrate, the first and second diffusion layers being positioned at both sides of the gate electrode. A first electrode is connected to the... Agent: Foley And Lardner LLP Suite 500

20100052027 - Dram layout with vertical fets and method of formation: DRAM cell arrays having a cell area of about 4 F2 comprise an array of vertical transistors with buried bit lines and vertical double gate electrodes. The buried bit lines comprise a silicide material and are provided below a surface of the substrate. The word lines are optionally formed of... Agent: Wells St. John P.s.

20100052029 - Transistor structure and dynamic random access memory structure including the same: A dynamic random access memory structure is disclosed, in which, the active area is a donut-type pillar at which a novel vertical transistor is disposed and has a gate filled in the central cavity of the pillar and upper and lower sources/drains located in the upper and the lower portions... Agent: North America Intellectual Property Corporation

20100052030 - Nonvolatile semiconductor memory and manufacturing method thereof: A nonvolatile semiconductor memory of an aspect of the present invention including a plurality of first active areas which are provided in the memory cell array side-by-side in a first direction and which have a dimension smaller than a fabrication limit dimension obtained by lithography, a second active area provided... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100052033 - Lanthanide yttrium aluminum oxide dielectric films: Electronic apparatus and methods of forming the electronic apparatus include a lanthanide yttrium aluminum oxide dielectric film on a substrate for use in a variety of electronic systems. The lanthanide yttrium aluminum oxide film may be structured as one or more monolayers. The lanthanide yttrium aluminum oxide film may be... Agent: Schwegman, Lundberg & Woessner/micron

20100052031 - Memory device and method for fabricating the same: A memory device includes gate lines and select lines formed over a substrate, and at least two dummy lines formed in a gap region between adjacent select lines. The memory device is able to reduce a width of the select line by enhancing uniformity of the line pattern density. Therefore,... Agent: Townsend And Townsend And Crew, LLP

20100052032 - Nonvolatile semiconductor memory and method for fabricating the same: A nonvolatile semiconductor memory includes a first semiconductor layer; second semiconductor regions formed on the first semiconductor layer having device isolating regions extended in a column direction; a first interlayer insulator film formed above the first semiconductor layer; a lower conductive plug connected to the second semiconductor regions; a first... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100052034 - Flash memory gate structure for widened lithography window: A first portion of a semiconductor substrate belonging to a flash memory device region is recessed to a recess depth to form a recessed region, while a second portion of the semiconductor substrate belonging to a logic device region is protected with a masking layer. A first gate dielectric layer... Agent: Scully, Scott, Murphy & Presser, P.C.

20100052036 - Memory device and manufacturing method thereof, and semiconductor device: A semiconductor device disposed on a substrate is provided. The semiconductor device includes two isolation structures, a first conductive layer, a charge trapping layer, a second conductive layer and a gate dielectric layer. The two isolation structures are disposed in the substrate to define an active area. The second conductive... Agent: Jianq Chyun Intellectual Property Office

20100052035 - Nonvolatile semiconductor memory apparatus: A nonvolatile semiconductor memory apparatus includes: a source and drain regions formed at a distance from each other in a semiconductor layer; a first insulating film formed on the semiconductor layer located between the source region and the drain region, the first insulating film including a first insulating layer and... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100052037 - Charge-trapping engineered flash non-volatile memory: This invention proposes a charge-trapping-engineered flash (CTEF) non-volatile memory (NVM) of electrode-[blocking oxide]-[trapping—1-trapping—2]-[tunneling oxide]-semiconductor. Dual trapping layers of higher energy bandgap (EG) trapping—1 and deeper-trapping-energy smaller EG trapping—2 dual blocking dielectrics and dual tunneling dielectrics are used to improve the retention characteristics at scaled equivalent-oxide-thickness (EOT).... Agent: Albert, Chin

20100052040 - Method for forming silicon nitride film, method for manufacturing nonvolatile semiconductor memory device, nonvolatile semiconductor memory device and plasma apparatus: A Plasma processing apparatus (100) introduces microwaves into a chamber (1) by a plane antenna (31) which has a plurality of holes. A material gas, which contains a nitrogen-containing compound and a silicon-containing compound, is introduced into the chamber (1) by using the plasma processing apparatus, and plasma is generated... Agent: Smith, Gambrell & Russell

20100052041 - Nonvolatile memory devices having charge-trap layers therein with relatively high election affinity: Provided is a nonvolatile memory device. The nonvolatile memory device may include a tunnel insulating layer on a semiconductor substrate; a charge trap layer disposed on the tunnel insulating layer and having an electron affinity greater than a silicon nitride layer; a barrier insulating layer on the charge trap layer;... Agent: Myers Bigel Sibley & Sajovec

20100052039 - Semiconductor device and method for manufacturing the same: A semiconductor device of an embodiment can prevent nitriding of the lower-layer insulating film and oxygen diffusion from the upper-layer insulating film, so as to minimize the decrease in charge capture density. This semiconductor device includes a semiconductor layer, a first insulating film provided on the semiconductor layer, a nitrogen-added... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100052038 - Semiconductor device and method for manufacturing thereof: A semiconductor device which includes two trenches formed in a semiconductor substrate, a charge storage layer as an insulator formed on each side surface of the trenches, and separated on a bottom surface thereof, and a bit line formed below the bottom surface of the trenches in the semiconductor substrate.... Agent: Spansion LLC C/o Murabito , Hao & Barnes LLP

20100052042 - Semiconductor memory device and manufacturing method thereof: The semiconductor memory device of the present invention includes a plurality of memory strings having a plurality of electrically reprogrammable memory cells connected in series, the memory strings having a column shaped semiconductor, a first insulation film formed around the column shaped semiconductor, a charge accumulation layer formed around the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100052043 - High density flash memory device and fabricating method thereof: The present invention provides a flash memory device having a high degree of integration and high performance. The flash memory device has a double/triple gate structure where a channel is formed in a wall-shaped body. The flash memory device has no source/drain regions. In addition, although the flash memory device... Agent: The Nath Law Group

20100052045 - Semiconductor device and manufacturing method of the same: Disclosed herein is a semiconductor device including: a main body transistor region; and an electrostatic discharge protection element region, wherein the main body transistor region includes, a drain region; a drift region; body regions; a gate insulating film; gate electrodes; source regions; channel regions; and potential extraction regions, and the... Agent: Sonnenschein Nath & Rosenthal LLP

20100052044 - Semiconductor device with a trench gate structure and method for the production thereof: A semiconductor device with a trench gate structure includes a semiconductor body with switching electrodes. At least gate electrode controls the off state and the on state between the switching electrodes. The at least one gate electrode in the trench gate structure controls at least one vertical switching channel through... Agent: Dicke, Billig & Czaja

20100052046 - Semiconductor structures formed on substrates and methods of manufacturing the same: A semiconductor apparatus includes a metal substrate, a doped silicon layer on the metal substrate, a semiconductor layer overlying the doped silicon layer, and semiconductor structures having one or more p-n junctions at least partially within the semiconductor layer formed by using layering, patterning, and doping steps. In an embodiment,... Agent: Townsend And Townsend And Crew, LLP

20100052047 - Semiconductor device and method for the production of a semiconductor device: The semiconductor device has a semiconductor body with a semiconductor device structure. The semiconductor device structure has a first electrode, a second electrode and a gate electrode. The gate electrode is designed to form a conductive channel region. An insulating layer at least partially surrounds the gate electrode. A semi-insulating... Agent: Dicke, Billig & Czaja

20100052048 - Semiconductor device and method of manufacturing the same: A semiconductor device and a method of manufacturing the same includes forming trenches in a semiconductor substrate, and then forming spacers composed of a first polysilicon layer in the trench, and then forming a second polysilicon layer over the spacers and filling the trench. Therefore, even in case of a... Agent: Sherr & Vaughn, PLLC

20100052049 - Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same: An integrated circuit with a transistor advantageously embodied in a laterally diffused metal oxide semiconductor device having a gate located over a channel region recessed into a semiconductor substrate and a method of forming the same. In one embodiment, the transistor includes a source/drain including a lightly or heavily doped... Agent: Slater & Matsil, L.L.P.

20100052050 - Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same: An integrated circuit with a transistor advantageously embodied in a laterally diffused metal oxide semiconductor device having a gate located over a channel region recessed into a semiconductor substrate and a method of forming the same. In one embodiment, the transistor includes a source/drain including a lightly or heavily doped... Agent: Slater & Matsil, L.L.P.

20100052051 - Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same: An integrated circuit with a transistor advantageously embodied in a laterally diffused metal oxide semiconductor device having a gate located over a channel region recessed into a semiconductor substrate and a method of forming the same. In one embodiment, the transistor includes a source/drain including a lightly or heavily doped... Agent: Slater & Matsil, L.L.P.

20100052052 - Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same: An integrated circuit with a transistor advantageously embodied in a laterally diffused metal oxide semiconductor device having a gate located over a channel region recessed into a semiconductor substrate and a method of forming the same. In one embodiment, the transistor includes a source/drain including a lightly or heavily doped... Agent: Slater & Matsil, L.L.P.

20100052054 - Method of manufacturing semiconductor device: The present invention relates to a method of manufacturing a semiconductor memory device and a semiconductor memory device manufactured using the same. A method of manufacturing a semiconductor device comprises defining source/drain regions in semiconductor substrate through an etch process using a mask, and forming a gate and source/drain by... Agent: Ampacc Law Group

20100052053 - Soi body contact using e-dram technology: A semiconductor structure is disclosed. The semiconductor structure includes an active semiconductor layer, a semiconductor device having a gate disposed on top of the active semiconductor layer, and source and drain regions and a body/channel region disposed within the active semiconductor layer, an insulator layer having a first and second... Agent: Cantor Colburn LLP-ibm Yorktown

20100052055 - Semiconductor device having vertical field effect transistor and method of manufacturing the same: A semiconductor device has: an insulating substrate; a first semiconductor layer of a first conductivity type formed on the insulating substrate; a first vertical field effect transistor of the first conductivity type, one of whose source and drain being formed on the first semiconductor layer; a second semiconductor layer of... Agent: Mcginn Intellectual Property Law Group, PLLC

20100052056 - Electrostatic discharge protection device: An ESD protection device includes a substrate with a doped well of a first conductive type, a first and a second doping region of the first conductive type and a third and a fourth doping region of a second conductive type respectively disposed in the doped well, a first gate... Agent: North America Intellectual Property Corporation

20100052057 - High voltage device with reduced leakage: A semiconductor device is provided which includes a semiconductor substrate, a gate structure formed on the substrate, sidewall spacers formed on each side of the gate structure, a source and a drain formed in the substrate on either side of the gate structure, the source and drain having a first... Agent: David M. O'dell Attorney For Applicants

20100052058 - Downsize polysilicon height for polysilicon resistor integration of replacement gate process: A semiconductor device and method for fabricating a semiconductor device protecting a resistive structure in gate replacement processing is disclosed. The method comprises providing a semiconductor substrate; forming at least one gate structure including a dummy gate over the semiconductor substrate; forming at least one resistive structure including a gate... Agent: Haynes And Boone, LLPIPSection

20100052060 - Dummy gate structure for gate last process: A semiconductor device is provided which includes a semiconductor substrate having a first portion and a second portion, transistors formed in the first portion of the substrate, each transistor having a gate structure with a high-k dielectric and a metal gate, a device element formed in the second portion of... Agent: Haynes And Boone, LLPIPSection

20100052059 - Finfet process compatible native transistor: Provided is a top-channel only finFET device. The methods and devices described herein may provide a native device that is compatible with a finFET process flow. A gate may be formed on the top of a fin providing the channel region of the device. In an embodiment, the gate is... Agent: Haynes And Boone, LLPIPSection

20100052061 - Semiconductor device and semiconductor device manufacturing method: A semiconductor device includes a plurality of first MOS transistors has a first gate electrode formed on a first gate insulating film provided on a semiconductor substrate, a plurality of second MOS transistors has a second gate electrode formed on a second gate insulating film which is provided on the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100052062 - Semiconductor device, and manufacturing method thereof: To provide a manufacturing method of a semiconductor device which can improve the reliability of the semiconductor device. A first insulating film for covering a semiconductor element formed in a semiconductor substrate is formed by a thermal CVD method or the like which has a good embedding property. A second... Agent: Mcdermott Will & Emery LLP

20100052070 - novel device scheme of hkmg gate-last process: The present disclosure provides a method for making metal gate stacks of a semiconductor device. The method includes forming a high k dielectric material layer on a semiconductor substrate; forming a conductive material layer on the high k dielectric material layer; forming a dummy gate in a n-type field-effect transistor... Agent: Haynes And Boone, LLPIPSection

20100052066 - structure and method for a cmos device with doped conducting metal oxide as the gate electrode: A semiconductor device and method for fabricating a semiconductor device for providing improved work function values and thermal stability is disclosed. The semiconductor device comprises a semiconductor substrate; an interfacial dielectric layer over the semiconductor substrate; a high-k gate dielectric layer over the interfacial dielectric layer; and a doped-conducting metal... Agent: Haynes And Boone, LLPIPSection

20100052068 - Drive current adjustment for transistors formed in the same active region by locally providing embedded strain-inducing semiconductor material in the active region: The drive current capability of a pull-down transistor and a pass transistor formed in a common active region may be adjusted on the basis of different strain levels obtained by providing at least one embedded semiconductor alloy in the active region, thereby providing a simplified overall geometric configuration of the... Agent: Williams, Morgan & Amerson

20100052071 - Engineered oxygen profile in metal gate electrode and nitrided high-k gate dielectrics structure for high performance pmos devices: A PMOS transistor is disclosed which includes a nitrogen containing barrier to oxygen diffusion between a gate dielectric layer and a metal gate in the PMOS transistor, in combination with a low oxygen region of the metal gate in direct contact with the nitrogen containing barrier and an oxygen rich... Agent: Texas Instruments Incorporated

20100052064 - Method for straining a semiconductor wafer and a wafer substrate unit used therein: The present invention provides a method for straining a semiconductor wafer, the method comprising: providing a semiconductor wafer, the semiconductor wafer having a first wafer surface and a second wafer surface arranged substantially opposite the first wafer surface; providing a substrate, the substrate having a substrate surface; adhering the first... Agent: Seed Intellectual Property Law Group PLLC

20100052067 - Method of fabricating dual high-k metal gates for mos devices: The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor substrate having a first region and a second region, forming a high-k dielectric layer over the semiconductor substrate, forming a capping layer over the high-k dielectric layer in the first region, forming a... Agent: Haynes And Boone, LLPIPSection

20100052063 - Method to improve dielectric quality in high-k metal gate technology: The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor substrate having a first active region and a second active region, providing a semiconductor substrate having a first region and a second region, forming a high-k dielectric layer over the semiconductor substrate, forming... Agent: Haynes And Boone, LLPIPSection

20100052065 - New method for mechanical stress enhancement in semiconductor devices: The present disclosure provides an integrated circuit. The integrated circuit includes a semiconductor substrate having an active region; at least one operational device on the active region, wherein the operational device include a strained channel; and at least one first dummy gate disposed at a side of the operational device... Agent: David M. O'dell Attorney For Applicants

20100052069 - Static ram cell design and multi-contact regime for connecting double channel transistors: A static RAM cell may be formed on the basis of two double channel transistors and a select transistor, wherein a body contact may be positioned laterally between the two double channel transistors in the form of a dummy gate electrode structure, while a further rectangular contact may connect the... Agent: Williams, Morgan & Amerson

20100052072 - Dual gate structure on a same chip for high-k metal gate technology: A semiconductor device and method for fabricating a semiconductor device is disclosed. The method includes providing semiconductor substrate having a first region and a second region, forming a high-k dielectric layer over the semiconductor substrate, forming a capping layer over the high-k dielectric layer, forming a metal layer over the... Agent: Haynes And Boone, LLPIPSection

20100052073 - Semiconductor integrated circuit device: In an LCD driver IC, a high-breakdown-voltage MISFET is mounted together with a typical low-breakdown-voltage MISFET. Because the high-breakdown-voltage MISFET has a gate oxide film thicker than that of the typical MISFET, the electrode of the high-breakdown-voltage MISFET is inevitably high in level. Accordingly, the depth of a gate contact... Agent: Miles & Stockbridge PC

20100052074 - Metal gate transistor and method for fabricating the same: A method for fabricating a transistor having metal gate is disclosed. First, a substrate is provided, in which the substrate includes a first transistor region and a second transistor region. A plurality of dummy gates is formed on the substrate, and a dielectric layer is deposited on the dummy gate.... Agent: North America Intellectual Property Corporation

20100052075 - Integrating a first contact structure in a gate last process: A semiconductor device is provided which includes a semiconductor substrate, a transistor formed on the substrate, the transistor having a gate stack including a metal gate and high-k gate dielectric and a dual first contact formed on the substrate. The dual first contact includes a first contact feature, a second... Agent: Haynes And Boone, LLPIPSection

20100052077 - High-k metal gate structure including buffer layer: A high-k metal gate structure including a buffer layer and method of fabrication of such, is provided. The buffer layer may interpose an interface oxide layer and a high-k gate dielectric layer. In one embodiment, the buffer layer includes aluminum oxide. The buffer layer and the high-k gate dielectric layer... Agent: Haynes And Boone, LLPIPSection

20100052076 - Method of fabricating high-k poly gate device: The present disclosure provides a semiconductor device that includes a semiconductor substrate, and a transistor formed in the substrate. The transistor has a gate structure that includes an interfacial layer formed on the substrate, a high-k dielectric layer formed on the interfacial layer, a capping layer formed on the high-k... Agent: Haynes And Boone, LLPIPSection

20100052078 - Multi-layer gate dielectric: A transistor gate dielectric including a first dielectric material having a first dielectric constant and a second dielectric material having a second dielectric constant different from the first dielectric constant.... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100052079 - Semiconductor devices and fabrication process thereof: A semiconductor device has an insulated gate transistor provided with a semiconductor substrate and a gate electrode arranged on the semiconductor substrate via a gate insulating film. The gate electrode includes an electrically-conductive buffer film for preventing any damage, which would occur if a main gate electrode portion were formed... Agent: Sonnenschein Nath & Rosenthal LLP

20100052080 - Biosensor chip and a method of manufacturing the same: A biosensor chip (100) for detecting biological particles, the biosensor chip (100) comprising a sensor active region (101) being sensitive for the biological particles and being arranged in a Back End of the Line portion (102) of the biosensor chip (100).... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100052081 - A sealing structure and method of manufacturing the same: A method of manufacturing a structure (1100), the method comprising forming a cap element (401) on a substrate (101), removing material (103) of the substrate (101) below the cap element (401) to thereby form a gap (802) between the cap element (401) and the substrate (101), and rearranging material of... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100052082 - Micro-electro-mechanical systems (mems) package and method for forming the mems package: A micro-electro-mechanical systems (MEMS) package includes a MEMS microphone device. The MEMS microphone device has a first substrate and at least a sensing element on the first substrate wherein a first chamber in the MEMS microphone device is connected to the sensing element. A second substrate is disposed over the... Agent: Jianq Chyun Intellectual Property Office

20100052083 - Photoconductive device: A photoconductive device comprising a photoconductive portion for generating carriers by applied excitation light; a resistance portion in contact with the photoconductive portion; a first conductive portion in contact with the resistance portion; and a second conductive portion that is provided so as to have a gap with respect to... Agent: Fitzpatrick Cella Harper & Scinto

20100052086 - Electronic device packages and methods of fabricating electronic device packages: Electronic device packages comprise transparent substrates covering an active surface of an optically interactive electronic device. In some embodiments, the optically interactive electronic device is bonded to conductive traces formed directly on the transparent substrate. In other embodiments, a secondary substrate comprising a plurality of conductive traces is disposed between... Agent: Trask Britt, P.C./ Micron Technology

20100052084 - Image sensor and manufacturing method thereof: Disclosed are an image sensor employing an annealing process and a manufacturing method thereof. According to the method, in one embodiment, a transistor structure is formed over a semiconductor substrate, a metal interconnection layer is formed over the transistor structure, a protective layer is formed over the metal interconnection layer,... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100052085 - Image sensor and manufacturing method thereof: An image sensor has a large bridge margin from a repulsive force between adjacent micro lenses having different surface properties. The image sensor has a larger bridge margin with a configuration of a stepped portion between two areas, where the first and the second group of micro lenses are formed,... Agent: Sherr & Vaughn, PLLC

20100052087 - Image sensor: An image sensor die includes a conformal dielectric coating over at least a die sidewall adjacent an interconnect edge and, in some embodiments, a conformal dielectric coating over the image array area of the front side of the die. The die can be connected to circuitry in a support by... Agent: Haynes Beffel & Wolfeld LLP

20100052088 - High sensitivity photodetectors, imaging arrays, and high efficiency photovoltaic devices produced using ion implantation and femtosecond laser irradiation: The present invention relates generally to methods for high throughput and controllable creation of high performance semiconductor substrates for use in devices such as high sensitivity photodetectors, imaging arrays, high efficiency solar cells and the like, to semiconductor substrates prepared according to the methods, and to an apparatus for performing... Agent: Pepper Hamilton LLP

20100052089 - Photoelectric structure and method of manufacturing thereof: A photoelectric structure is presented, comprising one or more PiN cells. The PiN cell is formed by an intrinsic semiconductor bulk having front and rear surfaces enclosed between p- and n-type regions extending along side surfaces of said semiconductor bulk. The front and rear surfaces of the intrinsic semiconductor bulk... Agent: Houston Eliseeva

20100052090 - Semiconductor device and method of manufacturing the same: The invention is directed to reduction of a manufacturing cost and enhancement of a breakdown voltage of a PN junction portion abutting on a guard ring. An N− type semiconductor layer is formed on a front surface of a semiconductor substrate, and a P type semiconductor layer is formed thereon.... Agent: Morrison & Foerster LLP

20100052091 - Semiconductor device and fabrication method of the same: A semiconductor device including a first conduction type semiconductor layer; a second conduction type element forming region formed above the first conduction type semiconductor layer and formed with at least one semiconductor element formed on a surface region of the second conduction type element forming region; a first conduction type... Agent: Rabin & Berdo, PC

20100052092 - Method for fabricating a semiconductor on insulator substrate with reduced secco defect density: The invention relates to a method for fabricating a semiconductor on insulator substrate, in particular a silicon on insulator substrate by providing a source substrate, providing a predetermined splitting area inside the source substrate by implanting atomic species, bonding the source substrate to a handle substrate, detaching a remainder of... Agent: Winston & Strawn LLP Patent Department

20100052093 - Semiconductor substrate and method of manufacturing the same: A semiconductor substrate is a semiconductor substrate used when an SOI substrate having an SOI structure is manufactured, in which a silicon oxide film and a silicon single crystal layer are formed on the surface of a silicon substrate. A region containing no nitrogen, which is made of a silicon... Agent: Greenblum & Bernstein, P.L.C

20100052094 - Semiconductor device with isolation trench liner, and related fabrication methods: A method of manufacturing a semiconductor device is provided herein, where the width effect is reduced in the resulting semiconductor device. The method involves providing a substrate having semiconductor material, forming an isolation trench in the semiconductor material, and lining the isolation trench with a liner material that substantially inhibits... Agent: Ingrassia Fisher & Lorenz, P.C. (amd)

20100052095 - Inductor for semiconductor device and method of fabricating the same: An inductor for semiconductor devices and a method of fabricating the same are disclosed. Through an improved electrical connection between a metal wiring and an inductor line, an improved Q-index and minimized energy loss in a substrate can be accomplished, and a parasitic capacitance can be minimized. For this, the... Agent: Sherr & Vaughn, PLLC

20100052096 - Stacked-chip device: A stacked-chip device includes a first inductive chip having a first function, a second inductive chip having a second function different from the first function, which is stacked on the first inductive chip, and a third inductive chip having the second function, which is stacked on the second inductive chip.... Agent: SprinkleIPLaw Group

20100052097 - Capacitor of semiconductor device and method for forming the same: A method for forming a capacitor of a semiconductor device includes f forming a cylindrical storage node over a semiconductor substrate; depositing a first dielectric layer over the cylindrical storage node; and etching the first dielectric layer to reduce a thickness of a portion of the first dielectric layer on... Agent: Marshall, Gerstein & Borun LLP

20100052098 - Semiconductor device having storage electrode and manufacturing method thereof: A semiconductor device includes a first storage electrode, a second storage electrode, a first landing pad, a capacitive insulating film, and a plate electrode. The second storage electrode is arranged above the first storage electrode. The first landing pad is arranged between a top surface of the first storage electrode... Agent: Mcginn Intellectual Property Law Group, PLLC

20100052099 - Capacitor device and method for manufacturing the same: This invention provides a capacitor device with a high dielectric constant material and multiple vertical electrode plates. The capacitor devices can be directly fabricated on a wafer with low temperature processes so as to be integrated with active devices formed on the wafer. This invention also forms vertical conducting lines... Agent: Birch Stewart Kolasch & Birch

20100052100 - Deep trench electrostatic discharge (esd) protect diode for silicon-on-insulator (soi) devices: A semiconductor structure is disclosed. The semiconductor structure includes a bulk substrate of a first polarity type, a buried insulator layer disposed on the bulk substrate, an active semiconductor layer disposed on top of the buried insulator layer including a shallow trench isolation region and a diffusion region of the... Agent: Cantor Colburn LLP-ibm Yorktown

20100052101 - Semiconductor device and manufacturing method thereof: A semiconductor integrated circuit is reduced in size by suppressing lateral extension of an impurity region when impurities in the impurity region are thermally diffused in a semiconductor substrate. A second photoresist is formed on an insulation film. The second photoresist is formed to have second openings K2 on both... Agent: Morrison & Foerster LLP

20100052102 - Semiconductor device: Emitter contact holes formed under emitter electrodes in a first layer and emitter through holes formed thereon are arranged so as not to overlap each other, and, for each emitter electrode, the multiple emitter contact holes and the multiple emitter through holes are provided so as to be separated from... Agent: Morrison & Foerster LLP

20100052103 - Silicon wafer and method for producing the same: A silicon wafer is produced through the steps of forming a silicon ingot by a CZ method with an interstitial oxygen concentration of not more than 7.0×1017 atoms/cm3, slicing a wafer from the silicon ingot after doping the silicon ingot with phosphorus, forming a polysilicon layer or a strained layer... Agent: Greenblum & Bernstein, P.L.C

20100052104 - Method for fabricating a locally passivated germanium-on-insulator substrate: The invention relates to a method for fabricating a locally passivated germanium-on-insulator substrate wherein, in order to achieve good electron mobility, nitridized regions are provided at localised positions. Nitridizing is achieved using a plasma treatment. The resulting substrates also form part of the invention.... Agent: Winston & Strawn LLP Patent Department

20100052105 - Free-standing thickness of single crystal material and method having carrier lifetimes: A method of fabricating a thickness of silicon material includes providing a silicon ingot material having a surface region and introducing a plurality of particles having an energy of about 1-5 MeV through the surface region to a depth to define a cleave region and a thickness of detachable material... Agent: Townsend And Townsend And Crew, LLP

20100052106 - Package device having crack arrest feature and method of forming: A package device has a package substrate, a semiconductor die on the package substrate, and a molding compound on the package substrate and over the semiconductor die. The semiconductor die has a last passivation layer, an active circuit region in an internal portion of the die, an edge seal region... Agent: Freescale Semiconductor, Inc. Law Department

20100052110 - Semiconductor device comprising a carbon-based material for through hole vias: In a semiconductor device, a through hole via extending through the substrate of the device may be formed on the basis of a carbon-containing material, thereby providing excellent compatibility with high temperature processes, while also providing superior electrical performance compared to doped semiconductor materials and the like. Thus, in some... Agent: Williams, Morgan & Amerson

20100052111 - Stacked-chip device: A stacked chip device includes a first chip having a first function, and a second chip having a second function which is different from the first function, which is stacked on the first chip. The first chip is a through-silicon-via chip which is comprised of a first semiconductor substrate having... Agent: SprinkleIPLaw Group

20100052109 - Substrate for semiconductor package and semiconductor package having the same: A semiconductor package includes a substrate including a substrate body having a first face and a second face opposing the first face. A first through electrode passes through the substrate body between the first face and the second face. An insulation member is disposed over the first face; and a... Agent: Ladas & Parry LLP

20100052108 - Vertical through-silicon via for a semiconductor structure: A semiconductor structure includes at least one silicon substrate having first and second planar surfaces, and at least one through silicon via filled with a conductive material and extending vertically through the first planar surface of the at least one silicon substrate to the second planar surface thereof. The through... Agent: Cantor Colburn LLP-ibm Yorktown

20100052107 - Vias and method of making: The invention relates to a method of providing a planar substrate with electrical through connections (vias). The method comprises providing a hole in said substrate and a treatment to render the substrate surface exhibiting a lower wettability than the walls inside the hole. The planar substrate is exposed to a... Agent: Kevin Farrell Pierce Atwood

20100052112 - Printable, flexible and stretchable diamond for thermal management: Various heat-sinked components and methods of making heat-sinked components are disclosed where diamond in thermal contact with one or more heat-generating components are capable of dissipating heat, thereby providing thermally-regulated components. Thermally conductive diamond is provided in patterns capable of providing efficient and maximum heat transfer away from components that... Agent: Greenlee Winner And Sullivan P C

20100052113 - Epitaxial film, piezoelectric element, ferroelectric element, manufacturing methods of the same, and liquid discharge head: r

20100052114 - Cyclic siloxane compound, a material for forming si-containing film, and its use:

20100052115 - Volatile precursors for deposition of c-linked sicoh dielectrics: Disclosed herein are precursors and methods for their use in the manufacture of semiconductor, photovoltaic, TFT-LCD, or flat panel type devices.... Agent: Air Liquide Intellectual Property

20100052116 - Fabrication of self-assembled nanowire-type interconnects on a semiconductor device: The present invention relates to a semiconductor device with nanowire-type interconnect elements and a method for fabricating the same. The device comprises a metal structure with at least one self-assembled metal dendrite and forming an interconnect element (424) between a first and a second metal structure. The fabrication comprises providing... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100052117 - Stackable multi-chip package system with support structure: A stackable multi-chip package system is provided including forming an external interconnect, having a base and a tip, and a paddle; mounting a first integrated circuit die over the paddle; stacking a second integrated circuit die over the first integrated circuit die in a active side to active side configuration;... Agent: Law Offices Of Mikio Ishimaru

20100052118 - Micro-layered lead frame semiconductor packages: Semiconductor packages and methods for making and using the same are described. The semiconductor packages contain a lead frame with a customized array of lands at the bottom of the package. The lands are connected to a series of leads that are located within the perimeter of the lands. The... Agent: Kenneth E. Horton Kirton & Mcconkle

20100052119 - Molded ultra thin semiconductor die packages, systems using the same, and methods of making the same: Disclosed are molded ultra-thin semiconductor die packages, systems that incorporate such packages, and methods of making such packages. An exemplary package comprises a leadframe having an aperture formed between the leadframe's first and second surfaces, and a plurality of leads disposed adjacent to the aperture. The package further comprises a... Agent: Townsend And Townsend And Crew, LLP

20100052120 - Semiconductor device having a suspended isolating interconnect: A semiconductor device is configured to provide current and voltage isolation inside an integrated circuit package. The semiconductor device includes first and second semiconductor dies, a first isolating block positioned on the first semiconductor die, and a second isolating block positioned on the second semiconductor die. The semiconductor device also... Agent: Mcdermott Will & Emery LLP

20100052121 - Semiconductor system-in-a-package containing micro-layered lead frame: Semiconductor packages that contain a system-in-a-package and methods for making such packages are described. The semiconductor packages contain a first semiconductor die resting on a middle of a land pad array, a second die disposed over the first die and resting on routing leads that are connected to the land... Agent: Kenneth E. Horton Kirton & Mcconkle

20100052126 - Apparatus and method for use in mounting electronic elements: Some embodiments provide surface mount devices that include a first electrode comprising a chip carrier part, a second electrode disposed proximate to the chip carrier part, and a casing encasing a portion of the first and second electrodes. The first electrode can extend from the chip carrier part toward a... Agent: Koppel, Patrick, Heybl & Dawson

20100052127 - Flip chip mlp with conductive ink: A flip chip molded leadless package (MLP) with electrical paths printed in conducting ink. The MLP includes a pre-molded leadframe with the electrical paths printed directly thereon. The present invention also provides a method of fabricating the semiconductor package.... Agent: Hiscock & Barclay, LLP

20100052123 - Low stress cavity package: The present invention relates to methods and arrangements for forming a low stress cavity package. Particular methods may be performed with existing packaging equipment. In one such method, a leadframe laminated with adhesive film is provided. Integrated circuit dice are connected to the leadframe by reflowing solder between bond pads... Agent: Beyer Law Group LLP/ Nsc

20100052125 - Resin sealing type semiconductor device and method of manufacturing the same, and lead frame: The invention is directed to firm bonding between semiconductor dies etc bonded to a lead frame and wire-bonding portions of the lead frame by ultrasonic Al wire bonding, and the prevention of shortcircuit between the semiconductor dies etc due to a remaining portion of the outer frame of the lead... Agent: Morrison & Foerster LLP

20100052124 - Resin sealing type semiconductor device and method of manufacturing the same, and resin sealing type electronic device: The invention provides a resin sealing type electronic device having high reliability by eliminating a solder burr formed when a tie bar is cut. The invention also prevents a welding failure between a lead of the resin sealing type electronic device and an external electrode, and provides a large area... Agent: Morrison & Foerster LLP

20100052122 - Wire bodning package structure: A chip package structure employing a die pad integrated with the ground/voltage pad is provided. The die pad for carrying the chip is split into at least two separate sections for accommodating the ground and the voltage. Due to the design of the die pad, the signal fingers may be... Agent: J C Patents

20100052128 - Device for detecting an attack against an integrated circuit: An integrated circuit including an intrusion attack detection device. The device includes a single-piece formed of a conductive material and surrounded with an insulating material and includes at least one stretched or compressed elongated conductive track, connected to a mobile element, at least one conductive portion distant from said piece... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20100052129 - Multi-chip package and manufacturing method: Manufacturing method and a multi-chip package, which comprises a conductor pattern (1) and insulation (2), and, inside the insulation, a first component (3), the contact terminals (4) of which face towards the conductor pattern (1) and are conductively connected to the conductor pattern (1). The multi-chip package also comprises inside... Agent: Birch Stewart Kolasch & Birch

20100052130 - Semiconductor package and methods for manufacturing the same: Provided is a semiconductor package. The semiconductor package includes a bonding wire electrically connecting a first package substrate and a second package substrate to each other and an insulating layer adhering the first package substrate and the second package substrate to each other and covering a portion of the bonding... Agent: F. Chau & Associates, LLC

20100052134 - 3-d integrated semiconductor device comprising intermediate heat spreading capabilities: In a three-dimensional chip configuration, a heat spreading material may be positioned between adjacent chips and also between a chip and a carrier substrate, thereby significantly enhancing heat dissipation capability. Furthermore, appropriately sized and positioned through holes in the heat spreading material may enable electrical chip-to-chip connections, while responding thermally... Agent: Williams, Morgan & Amerson

20100052131 - Integrated circuit package system with redistribution layer: An integrated circuit package system includes forming a first external interconnect having both a first side and a second side that is an opposing side to the first side; forming a first encapsulation around a first integrated circuit and the first external interconnect with the first side, the second side,... Agent: Law Offices Of Mikio Ishimaru

20100052135 - Semiconductor device and method of forming the device using sacrificial carrier: A semiconductor device is made by forming a photoresist layer over a metal carrier. A plurality of openings is formed in the photoresist layer extending to the metal carrier. A conductive material is selectively plated in the openings of the photoresist layer using the metal carrier as an electroplating current... Agent: Robert D. Atkins

20100052132 - Semiconductor package: Provided is a semiconductor package including a first substrate including a first substrate pad and a second substrate pad spaced apart from each other, first semiconductor chips stacked on the first substrate and having a first side surface and a second side surface, first chip pads disposed on the first... Agent: Harness, Dickey & Pierce, P.L.C

20100052133 - Stack type semiconductor device with reinforcing resin: A semiconductor device includes a plurality of semiconductor packages each with a semiconductor element and a flexible board. The flexible board is wider than the semiconductor element and is electrically connected to the semiconductor element. The plurality of semiconductor packages are stacked on one surface of a mother board. The... Agent: Young & Thompson

20100052136 - Three-dimensional package and method of making the same: A package comprises a first unit including a semiconductor body, a hole, an isolation layer, a conductive layer and a solder. The semiconductor body has a first surface having a pad and a protection layer exposing the pad. The hole penetrates the semiconductor body. The isolation layer is disposed on... Agent: Mccracken & Frank LLP

20100052137 - Enhanced wire bond stability on reactive metal surfaces of a semiconductor device by encapsulation of the bond structure: The wire bond structure of sophisticated metallization systems, for instance based on copper, may be provided without a terminal aluminum layer and without any passivation layers for exposed copper surfaces by providing a fill material after the wire bonding process in order to encapsulate at least the sensitive metal surfaces... Agent: Williams, Morgan & Amerson

20100052138 - Resin molded semiconductor device and manufacturing method thereof: This invention is directed to provide a method of manufacturing a resin molded semiconductor device with high reliability by preventing a resin leakage portion from occurring due to burrs on a lead frame formed by punching. The method of manufacturing the resin molded semiconductor device according to the invention includes... Agent: Morrison & Foerster LLP

20100052139 - Semiconductor device and method for manufacturing the same, and semiconductor sealing resin: The semiconductor device includes a semiconductor chip, a plurality of leads including a metal as a main constitutional material, electrically connected with the semiconductor chip, and a resin for sealing the semiconductor chip, wherein the plurality of leads each have an outer lead portion exposed from the resin and an... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100052143 - Electronic packaging structure and a manufacturing method thereof: A packaging structure includes a main substrate having a plurality of circuit lines thereon, and an electronic module having at least one conductive pad at the bottom thereof and having a plurality of conductive lines on the sides thereof. The pad and the conductive circuits are connected electrically to the... Agent: Rosenberg, Klein & Lee

20100052140 - Package structure: In the specification and drawing a package structure is described and shown with a first die including a high side driver, a second die including a low side driver and at least one conducting wire, wherein the conducting wire is coupled with the first die and the second die.... Agent: Brian M. Mcinnis

20100052141 - Qfn package: An improved Quad Flat No-Lead package is described. The package is formed by encapsulating a die mounted on a leadframe with a moulding compound using a mould chase. The mould chase comprises a number of internal projections which form openings in the mould compound to expose regions of the leadframe.... Agent: Greenberg Traurig, LLP

20100052142 - Semiconductor device and method for fabricating semiconductor device: According to an aspect of the present invention, there is provided a semiconductor device, including a semiconductor chip including a first electrode and a second electrode of a semiconductor element, the first electrode and the second electrode being configured on a first surface and a second surface of the semiconductor... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100052146 - Semiconductor package and fabrication method thereof: A semiconductor package and a fabrication method are disclosed. The fabrication method includes applying a sacrificial layer on one surface of a metal carrier, applying an insulation layer on the sacrificial layer, and forming through holes in the sacrificial layer and the insulation layer to expose the metal carrier; forming... Agent: Edwards Angell Palmer & Dodge LLP

20100052145 - Semiconductor package and method therefor: In one embodiment, a semiconductor package is formed to include a tamper barrier that is positioned between at least a portion of the connection terminals of the semiconductor package and an edge of the semiconductor package.... Agent: Mr. Jerry Chruma Semiconductor Components Industries, L.L.C.

20100052144 - Semiconductor package substrate and method, in particular for mems devices: A semiconductor package substrate suitable for supporting a damage-sensitive device, including a substrate core having a first and opposite surface; at least one pair of metal layers covering the first and opposite surfaces of the package substrate core, which define first and opposite metal layer groups, at least one of... Agent: Graybeal Jackson LLP

20100052151 - Ball grid array package having one or more stiffeners: Electrically and thermally enhanced die-up ball grid array (BGA) packages are described. A BGA package includes a stiffener, substrate, a silicon die, and solder balls. The die is mounted to the top of the stiffener. The stiffener is mounted to the top of the substrate. A plurality of solder balls... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20100052150 - Integrated circuit package system with package substrate having corner contacts and method of manufacture thereof: A method of manufacture of an integrated circuit package system includes: forming a package substrate with a top substrate side and a bottom substrate side; forming a corner contact in a first corner of the bottom substrate side, the corner contact extending to a substrate edge of the package substrate;... Agent: Law Offices Of Mikio Ishimaru

20100052148 - Package structure and package substrate: Provided are a package structure and a package substrate, including: a substrate body having a plurality of matrix-arranged electrical contact pads formed on at least one surface thereof, wherein a solder mask layer is formed on said surface and has a plurality of openings for exposing the electrical contact pads,... Agent: Edwards Angell Palmer & Dodge LLP

20100052149 - Semiconductor device and method of manufacturing the same: A semiconductor device includes: a die pad having a top surface; a plurality of leads arranged around the die pad; a semiconductor chip having a main surface, a back surface, and a plurality of pads formed to the main surface, and having the back surface fixedly adhered in opposing contact... Agent: Miles & Stockbridge PC

20100052147 - Semiconductor device including stress relaxation gaps for enhancing chip package interaction stability: By dividing a single chip area into individual sub-areas, a thermally induced stress in each of the sub-areas may be reduced during operation of complex integrated circuits, thereby enhancing the overall reliability of complex metallization systems comprising low-k dielectric materials or ULK material. Consequently, a high number of stacked metallization... Agent: Williams, Morgan & Amerson

20100052153 - Semiconductor package and method of manufacturing the same, and semiconductor device and method of manufacturing the same: A semiconductor package of the present invention, includes a wiring substrate, a lead pin fixed to a connection pad on one surface side of the wiring substrate by solder, and a reinforcing resin layer formed on a surface of the wiring substrate on which the lead pin is provided and... Agent: Kratz, Quintos & Hanson, LLP

20100052152 - Semiconductor package transformer: The present invention relates to a semiconductor package transformer. There is provided a semiconductor package transformer including: a case where an opening into which a semiconductor package having a chip mounted on a substrate is inserted is formed on its front surface and an open part exposing is formed on... Agent: Staas & Halsey LLP

20100052155 - Methods of promoting adhesion between transfer molded ic packages and injection molded plastics for creating over-molded memory cards: A flash memory card and methods of manufacturing same are disclosed. The card includes a semiconductor package fabricated to receive a single-sided or double-sided lid. A surface of the semiconductor package may be formed with holes, trenches and/or pockmarks. After the holes, trenches and/or pockmarks are formed, a lid may... Agent: Vierra Magen/sandisk Corporation

20100052154 - Surface smoothened ultrahigh conductivity composite lid for improved marking permanency of semiconductor packaged devices: A semiconductor-lid structure and method of forming a semiconductor-lid structure includes a semiconductor die, an ultrahigh thermal conductivity lid disposed on the semiconductor die, and a thermal interface layer between said semiconductor die and said ultrahigh thermal conductivity lid. The ultrahigh thermal conductivity lid includes a coupon having at least... Agent: Osha Liang L.L.P./sun

20100052157 - Channel for a semiconductor die and methods of formation: In semiconductor die packaging, stereo lithography cures a material around the die such that a channel is defined in the material. The channel exposes a portion of the die surface, and the channel is closed off above the die surface. The same stereo lithography process may also be used to... Agent: Micron Technology, Inc.

20100052156 - Chip scale package structure and fabrication method thereof: A chip scale package (CSP) structure and the packaging process thereof are described. By using a matrix of interlinked heat sink units compatible with the block substrate, the packaging process can be simplified and a plurality of packages units or chip scale packages with enhanced thermal performance can be obtained... Agent: J C Patents

20100052158 - Electronic device and method for coping with electrostatic discharge: According to an aspect of the present invention, there is provided an electronic device including: a substrate board; a semiconductor device mounted on the substrate board; a heat sink configured to radiate heat from the semiconductor device; a first conductive portion provided on the substrate board; and a second conductive... Agent: Patterson & Sheridan, L.L.P.

20100052160 - Bump structure and method for fabricating the same: The present invention discloses a bump structure and a method for fabricating the same. The bump structure of the present invention comprises a semiconductor substrate having a plurality of connection pads; a passivation layer covering the substrate and having openings each corresponding to one connection pad, wherein the openings reveal... Agent: Sinorica, LLC

20100052159 - Methods of forming c4 metal stud bump for fine pitch packaging applications and structures formed thereby: Methods of forming microelectronic device structures are described. Those methods may include forming a passivation layer on a substrate, wherein the substrate comprises an array of conductive structures, forming a first via in the passivation layer, forming a second via in the passivation layer that exposes at least one of... Agent: Intel Corporation C/o Cpa Global

20100052162 - Semiconductor device and method for fabricating semiconductor device: A semiconductor device, includes a semiconductor substrate; and a solder bump part, which is formed on the semiconductor substrate and in which no grain boundary extends equal to or over ⅓ of a diameter dimension of said solder bump part from an outer circumferential surface between an end of a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100052163 - Semiconductor device, method of manufacturing same and method of repairing same: A semiconductor device in which opposing electrodes of a semiconductor component and of a wiring board are arranged to conduct via bumps, comprises: a first conductive resin bump provided on the electrode of the semiconductor component; and a second conductive resin bump provided on the electrode of the wiring board.... Agent: Sughrue Mion, PLLC

20100052161 - Semiconductor wafer with adhesive protection layer: A semiconductor wafer with an adhesive protection layer includes: a wafer body having a first surface and an opposing second surface; a plurality of electrical connection pads formed on the second surface of the wafer body; and the adhesive protection layer formed on the second surface of the wafer body... Agent: Edwards Angell Palmer & Dodge LLP

20100052165 - Semiconductor device including columnar electrodes having planar size greater than that of connection pad portion of wiring line, and manufacturing method thereof: A plurality of wiring lines are provided on a first protective film, a second protective film having an opening in a part corresponding to a connection pad portion of a wring line is provided on the first protective film including the wiring line, a columnar electrode is provided on the... Agent: Frishauf, Holtz, Goodman & Chick, PC

20100052164 - Wafer level package and method of manufacturing the same: The present invention relates to a wafer level package and a method of manufacturing the same and provides a wafer level package structure including a wafer having a die pad; a redistribution line formed to be connected on a top surface of the die pad; a metal post connected to... Agent: Staas & Halsey LLP

20100052166 - Sandwiched metal structure silicidation for enhanced contact: Embodiments of an apparatus and methods for forming enhanced contacts using sandwiched metal structures are generally described herein. Other embodiments may be described and claimed.... Agent: Intel Corporation C/o Cpa Global

20100052167 - Metal line having a moxsiy/mo diffusion barrier of semiconductor device and method for forming the same: A metal line having a MoxSiy/Mo diffusion barrier of a semiconductor device and corresponding methods of fabricating the same are presented. The metal line includes an insulation layer, a diffusion barrier, and a metal layer. The insulation layer is formed on a semiconductor substrate and has a metal line forming... Agent: Ladas & Parry LLP

20100052171 - Cu wire in semiconductor device and production method thereof: A Cu wire in a semiconductor device according to the present invention is a Cu wire embedded into wiring gutters or interlayer connective channels formed in an insulating film on a semiconductor substrate and the Cu wire comprises: a barrier layer comprising TaN formed on the wiring gutter side or... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100052168 - Metal line having a multi-layered diffusion layer in a semiconductor device and method for forming the same: A metal line having a multi-layered diffusion layer in a resultant semiconductor device is presented along with corresponding methods of forming the same. The metal line includes an insulation layer, a multi-layered diffusion barrier, and a metal layer. The insulation layer is formed on a semiconductor substrate and has a... Agent: Ladas & Parry LLP

20100052169 - Metal line of semiconductor device having a diffusion barrier and method for forming the same: An insulation layer is formed on a semiconductor substrate so as to define a metal line forming region. A diffusion barrier having a multi-layered structure of an Mox1Si1-x1 layer, an Mox2Siy2Nz2 layer, and an Moy3N1-y3 layer is formed on a surface of the metal line forming region. A metal layer... Agent: Ladas & Parry LLP

20100052170 - Metal line of semiconductor device having a diffusion barrier and method for forming the same: A metal line of a semiconductor device includes an insulation layer formed on a semiconductor substrate. The insulation layer has a metal line forming region. A diffusion barrier is formed on a surface of the metal line forming region of the insulation layer. The diffusion barrier includes a multi-layered structure... Agent: Ladas & Parry LLP

20100052172 - Method of fabricating copper damascene and dual damascene interconnect wiring: An integrated circuit and a method of manufacturing the integrated circuit, the method including: (a) providing a substrate; (b) forming a copper diffusion barrier layer on the substrate; (c) forming a dielectric layer on a top surface of the copper diffusion barrier layer; (d) forming a copper damascene or dual... Agent: Schmeiser, Olsen & Watts

20100052173 - Semiconductor device and semiconductor device manufacturing method: A first impurity diffusion layer in a memory cell portion and a second impurity diffusion layer in a peripheral circuit portion are provided in a surface of a semiconductor substrate and having upper faces substantially flush with each other. First and second insulating films are formed to cover the upper... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100052174 - Copper pad for copper wire bonding: An integrated circuit package comprising an integrated circuit that includes transistors coupled to copper interconnect structures. The integrated circuit package also comprises copper pads located on the integrated circuit and directly contacting uppermost ones of the copper interconnect structures. Each of copper pads has a thickness of at least about... Agent: Hitt Gaines, PC Lsi Corporation

20100052175 - Reducing leakage and dielectric breakdown in dielectric materials of metallization systems of semiconductor devices by forming recesses: By recessing metal lines and/or the dielectric material of a metallization layer of sophisticated semiconductor devices, the time to dielectric breakdown may be increased due to reducing electrical fields and diffusion paths at the top of the metal lines.... Agent: Williams, Morgan & Amerson

20100052176 - Semiconductor device and manufacturing method thereof: A semiconductor device includes a first wiring extending in a first direction and a second wiring extending in a second direction which crosses the first direction and being disposed with a space interposed between the first wiring and the second wiring, and including a tantalum layer, a tantalum nitride layer... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100052179 - Mems structure and method for fabricating the same: A microelectromechanical system (MEMS) structure and a fabricating method thereof are described. The MEMS structure includes a fixed part and a movable part. The fixed part is disposed on and connects with a substrate. The movable part including at least two first metal layers, a first protection ring and a... Agent: J C Patents

20100052177 - Method for manufacturing a crossbar circuit device: Method for manufacturing a crossbar circuit on a substrate (1), the crossbar circuit comprising a first grid of first wires (10) and a second grid of second wires (17), the first wires extending in a first direction, the second wires extending in a second direction, the first direction and the... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100052183 - Microfeature workpiece substrates having through-substrate vias, and associated methods of formation: Microfeature workpiece substrates having through-substrate vias, and associated methods of formation are disclosed. A method in accordance with one embodiment for forming a support substrate for carrying microfeature dies includes exposing a support substrate to an electrolyte, with the support substrate having a first side with a first conductive layer,... Agent: Perkins Coie LLP Patent-sea

20100052178 - Semiconductor device and method for making same: One or more embodiments relate to a semiconductor device that includes: a conductive layer including a sidewall; a conductive capping layer disposed over the conductive layer and laterally extending beyond the sidewall of the conductive layer by a lateral overhang; and a conductive via in electrical contact with the conductive... Agent: Slater & Matsil LLP

20100052182 - Semiconductor device and method of producing the same: A lack of exposure margin is avoided in a region, where an interconnection is required in a direction different from that of an interconnection of a region where an exposure condition is optimized. A semiconductor device According to an aspect of the invention includes a semiconductor substrate 201; an interlayer... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100052180 - Semiconductor device for low-power applications and a method of manufacturing thereof: The invention relates to a semiconductor device manufactured in a process technology, the semiconductor device having at least one wire (135) located in an interconnect layer of said semiconductor device, the at least one wire (135) having a wire width (W) and a wire thickness (T), the wire width (W)... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100052181 - Using a cap layer in metallization systems of semiconductor devices as a cmp and etch stop layer: During the manufacture of advanced metallization systems, a dielectric cap layer formed on a sensitive dielectric material may be partially maintained during a CMP process for removing excess metal, thereby avoiding the necessity for depositing a dedicated etch stop material, as may be required in conventional approaches when substantially completely... Agent: Williams, Morgan & Amerson

20100052184 - Interconnects with improved tddb: A method for forming a semiconductor device is presented. A substrate prepared with a dielectric layer formed thereon is provided. A first upper etch stop layer is formed on the dielectric layer. The first upper etch stop layer includes a first dielectric material. The dielectric layer and first upper etch... Agent: HorizonIPPte Ltd

20100052185 - Semiconductor device and method for fabricating the same: According to an aspect of the present invention, there is provided a semiconductor device, including a semiconductor chip including a semiconductor element, a first electrode of the semiconductor chip being configured on a first surface of the semiconductor element, a second electrode of the semiconductor element being configured on a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100052187 - Stacked semiconductor package and method for fabricating the same: A stacked semiconductor package having a unit package, cover substrates, adhesive members and connection electrodes is presented. The unit package includes a substrate, a first circuit pattern and a second circuit pattern. The first circuit pattern is disposed over an upper face of the substrate. The second circuit pattern is... Agent: Ladas & Parry LLP

20100052186 - Stacked type chip package structure: A stacked type chip package structure employs a substrate having a pseudo-cavity or a keep-out zone at one side or both sides thereof. Through the pattern arrangement of the wiring layer and the solder mask layer, the thickness of the entire stacked type chip package structure is effectively reduced as... Agent: J C Patents

20100052189 - Electronic component mounting structure and method for manufacturing the same: Electronic component mounting structure (1) comprising electronic component (10) provided with a plurality of electrode terminals (10a), mounting substrate (12) provided with connector terminals (12a) in positions corresponding to electrode terminals (10a), wherein electrode terminal (10a) is connected to connector terminal (12a) via protrusion electrode (13) disposed on electrode terminal... Agent: Wenderoth, Lind & Ponack L.L.P.

20100052188 - Semiconductor chip with solder joint protection ring: Various semiconductor chip arrangements and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes coupling a semiconductor chip that has an external peripheral wall to a first side of a substrate. A first metallic ring is coupled to the first side... Agent: Timothy M Honeycutt Attorney At Law

20100052190 - Semiconductor device: A semiconductor device includes: a base plate; a semiconductor element provided on the base plate; a holder provided on an opposite side of the semiconductor element from the base plate and holding terminals electrically connected to the semiconductor element; a casing surrounding the semiconductor element and opposed to a side... Agent: Patterson & Sheridan, L.L.P.

20100052192 - Electronic element wafer module and method for manufacturing electronic element wafer module, electronic element module and method for manufacturing electronic element module, and electronic information device: An electronic element wafer module is provided, in which a transparent support substrate is disposed facing a plurality of electronic elements formed on a wafer and a plurality of wafer-shaped optical elements are disposed on the transparent support substrate, where a groove is formed along a dicing line between the... Agent: Edwards Angell Palmer & Dodge LLP

20100052191 - Metrology mark with elements arranged in a matrix, method of manufacturing same and alignment method: A method of manufacturing an integrated circuit provides a metrology mark (e.g., alignment mark or overlay mark). The method includes forming a first plurality of first structures arranged in a matrix in a substrate. Portions of the matrix are covered with a mask such that first portions of the matrix... Agent: Edell, Shapiro & Finnan, LLC