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Active solid-state devices (e.g., transistors, solid-state diodes) May archived by USPTO category 05/09

20090134379 - Phase-change nonvolatile memory and manufacturing method therefor: A phase-change nonvolatile memory (PRAM) is constituted of a semiconductor substrate, a lower electrode, a first interlayer insulating film having a first hole, an impurity diffusion layer embedded in the first hole, a second interlayer insulating film having a second hole whose diameter is smaller than the diameter of the... Agent: Mcginn Intellectual Property Law Group, PLLC

20090134380 - Solid-state lighting element: A solid-state lighting element includes a transparent electrically conductive substrate, a first type confinement layer disposed on the transparent electrically conductive substrate, an active layer disposed on the first type confinement layer, a second type confinement layer disposed on the active layer, an electrode contacting and disposed on the second... Agent: PCe Industry, Inc. Att. Steven Reiss

20090134381 - Semiconductor device and fabrication method thereof: A semiconductor device includes a gate electrode formed on a silicon substrate via a gate insulation film in correspondence to a channel region, source and drain regions of a p-type diffusion region formed in the silicon substrate at respective outer sides of sidewall insulation films of the gate electrode, and... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090134382 - Multilevel logic ballistic deflection transistor: A multilevel logic transistor including a ballistic channel, the ballistic channel formed in a substrate layer and configured to receive a flow of electrons generated by an emitter, a deflection barrier, the deflection barrier comprising at least two deflection surfaces and a deflection channel, and a deflection controller, the deflection... Agent: Carey, Rodriguez, Greenberg & Paul, LLP Steven M. Greenberg

20090134387 - Cmos semiconductor device: A CMOS semiconductor device includes a CMOS circuit that incorporates a P-channel field effect transistor connected to a first power source terminal and an N-channel field effect transistor connected to a second power source terminal that is lower in potential than the first power source terminal. The P-channel field effect... Agent: Mots Law, PLLC

20090134383 - Electrode for organic transistor, organic transistor, and semiconductor device: It is an object of the present invention, in a case of using a conductive material as part of an electrode for an organic transistor, to provide an organic transistor having a structure whose characteristics are not controlled by the work function of the conductive material. Moreover, it is other... Agent: Eric Robinson

20090134384 - Organic electroluminescent device and boric acid and borinic acid derivatives used therein: The present invention relates to the use of aromatic boronic acid or borinic acid derivatives in organic electronic devices, in particular electroluminescent devices.... Agent: Connolly Bove Lodge & Hutz, LLP

20090134386 - Organic field effect transistor: An organic field-effect transistor has a gate insulating layer comprising a cured epoxy resin. The epoxy resin has a lower concentration of trapping centres compared with a conventional epoxy resin in which trapping centres are provided by hydroxyl (OH) groups. The lower concentration of trapping centres can be achieved by... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090134385 - Organic line detector and method for the production thereof: A method for producing an organic line detector for applications in the field of computer tomography, includes the following steps: selective etching is carried out on an indium-tin-oxide (ITO) applied to a substrate; two separate ITO strips are formed by the etching; at least one structured mushroom photosensitive resist is... Agent: Young & Thompson

20090134388 - Semiconductor device and fabrication method of same: A semiconductor device having a metal insulator semiconductor field effect transistor (MISFET) with interface resistance-reduced source/drain electrodes is disclosed. This device includes a p-type MISFET formed on a semiconductor substrate. The p-MISFET has a channel region in the substrate, a gate insulating film on the channel region, a gate electrode... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090134390 - Image forming apparatus: An image forming apparatus including a substrate 12, pixel regions 14 that are arrayed on the substrate, data-input portions 38 and 40 that input image data to the pixel regions, and a current-supply portion 42 that supplies charge to the pixel regions. The pixel regions each include: thin-film transistors 30,... Agent: Moss & Burke, PLLC

20090134389 - Thin film field effect transistor and electroluminescence display using the same: A thin film field effect transistor that has on a substrate, at least a gate electrode, a gate insulating layer, an active layer, a source electrode and a drain electrode, wherein the active layer includes an amorphous oxide, a carrier concentration of the amorphous oxide decreases together with lowering of... Agent: Moss & Burke, PLLC

20090134391 - High performance sub-system design and assembly: A multiple integrated circuit chip structure provides interchip communication between integrated circuit chips of the structure with no ESD protection circuits and no input/output circuitry. The interchip communication is between internal circuits of the integrated circuit chips. The multiple integrated circuit chip structure has an interchip interface circuit to selectively... Agent: Mou-shiung Lin

20090134392 - Organic light emitting device: An organic light emitting device includes a transistor having gate, source, and drain electrodes, and first electrode connected to one of the source or drain electrodes. The device also includes an emitting layer positioned on the first electrode and a second electrode positioned on the emitting layer. Each of the... Agent: Ked & Associates, LLP

20090134393 - Thin film transistor substrate and display device: A thin-film transistor substrate in which an aluminum alloy film composing a source/drain wiring is directly connected with a transparent electrode. The thin-film transistor substrate includes a gate wiring, and source wiring and drain wiring, the gate wiring and the source and drain wiring being arranged orthogonally to each other.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090134394 - Crystal silicon array, and manufacturing method of thin film transistor: A crystal silicon array includes a crystallized unit region obtained by crystallizing at least a part of a non-single crystal semiconductor film. The crystallized unit region includes at least one square two-dimensional crystal portion having a size of 7 μm square or more, and at least one needle crystal portion... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090134395 - Active matrix liquid crystal display device: A first insulating thin film having a large dielectric constant such as a silicon nitride film is formed so as to cover a source line and a metal wiring that is in the same layer as the source line. A second insulating film that is high in flatness is formed... Agent: Eric Robinson

20090134398 - Array substrate for liquid crystal display device: An array substrate for an LCD device and a method of fabricating the same are disclosed. The array substrate includes: a substrate defining a display area and a non-display area; an n-type driving TFT and a p-type driving TFT in the non-display area; a switching TFT in the display region;... Agent: Mckenna Long & Aldridge LLP

20090134400 - Ltps-lcd structure and method for manufacturing the same: An LTPS-LCD structure and a method for manufacturing the structure are provided. The structure comprises a substrate where a plurality of pixels are formed thereon. Each of these pixels comprises a control area, a capacitance area, and a display area. The structure is initially formed with a transparent electrode on... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090134397 - Method for manufacturing semiconductor device, semiconductor device and electronic appliance: A non-single-crystal semiconductor layer is formed over a substrate, and then a single crystal semiconductor layer is formed over part of the non-single-crystal semiconductor layer. Thus, a semiconductor element of a region which requires a large area (e.g. a pixel region in a display device) can be formed using the... Agent: Fish & Richardson P.C.

20090134399 - Semiconductor device and method for manufacturing the same: A manufacturing method of an active matrix light emitting device in which the active matrix light emitting device can be manufactured in a shorter time with high yield at low cost compared with conventional ones will be provided. It is a feature of the present invention that a layered structure... Agent: Cook Alex Ltd

20090134396 - Semiconductor range-finding element and solid-state imaging device: To transfer signal charges generated by a semiconductor photoelectric conversion element in opposite directions, the center line of a first transfer gate electrode and that of a second transfer gate electrodes are arranged on the same straight line, and a U-shaped first exhausting gate electrode and a second exhausting gate... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090134401 - Thin film transistor and display device, method for manufacturing the same, and television system: In the invention, a component forming a thin film transistor, a display device, or the like is formed with a material which is the same as at least one of the substances forming the formation subject surface added (mixed); thus, adhesion between the component and the formation subject is improved.... Agent: Cook Alex Ltd

20090134403 - Diamond ultraviolet sensor: While avoiding complication of the device structure and exploiting the characteristics of a photoconductive sensing device, by using a carbide compound (TiC, ZrC, HfC, VC, NbC, TaC, CrC, MoC, and WC) of a high melting metal having a high mechanical strength for a rectifier electrode and/or a ohmic electrode, there... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090134405 - Semiconductor substrate and semiconductor device: A semiconductor substrate includes a silicon carbide substrate having a first impurity concentration, a first silicon carbide layer formed on the silicon carbide substrate and having a second impurity concentration, and a second silicon carbide layer of a first conductivity type formed on the first silicon carbide layer and having... Agent: Charles N.j. Ruggiero, Esq. Ohlandt , Greeley, Ruggiero & Perle, L.L.P.

20090134402 - Silicon carbide mos field-effect transistor and process for producing the same: In the SiC vertical MOSFET having a low-concentration p-type deposition film provided therein with a channel region and a base region resulting from reverse-implantation to n-type through ion implantation, dielectric breakdown of gate oxide film used to occur at the time of off, thereby preventing a further blocking voltage enhancement.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090134404 - Silicon carbide semiconductor device: On a major surface of an n-type silicon carbide inclined substrate (2) is formed an n-type voltage-blocking layer (3) made of silicon carbide by means of epitaxial growth. On the n-type voltage-blocking layer (3) is formed a p-type silicon carbide region (4) rectangular when viewed from above. On the surface... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090134406 - Light emitting diode of high quantum efficiency and system thereof: A light emitting diode (LED) includes a transparent substrate, a first type cladding layer, an active layer, a second type cladding layer, and first and second electrodes. The first type cladding layer is disposed on the transparent substrate. The active layer and the second electrode are juxtaposed on the first... Agent: PCe Industry, Inc. Att. Steven Reiss

20090134407 - A1 alloy film, electronic device, and active matrix substrate for use in electrooptic display device: In accordance with one aspect of the present invention, an Al alloy film contains a first additive element composed of Ni, and at least one type of second additive element selected from the group consisting of Group 2A alkaline earth metals and Groups 3B and 4B metalloids in Period 2... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090134408 - Light emitting diode package, method of fabricating the same and backlight assembly including the same: A light emitting diode (“LED”) package includes: a mold including an accommodating groove formed therein and which includes a side surface and a bottom surface; an electrode pattern disposed on the bottom surface; a plurality of LED chips disposed on the electrode pattern; and protective resin disposed in the accommodating... Agent: Cantor Colburn, LLP

20090134409 - Composite led modules: The present invention provides a composite multi-color light emitting diode device comprising a first light emitting diode unit and a second light emitting diode unit that is arranged on top of the first light emitting diode unit. Thereby, a composite light emitting diode device, capable of emitting two different wavelengths... Agent: Philips Intellectual Property & Standards

20090134410 - Semiconductor light emitting device and method of manufacturing the same: There is provided a method of manufacturing a nitride semiconductor light emitting device. A method of manufacturing a nitride semiconductor light emitting device according to an aspect of the invention may include: nitriding a surface of an m-plane sapphire substrate; forming a high-temperature buffer layer on the m-plane sapphire substrate;... Agent: Mcdermott Will & Emery LLP

20090134413 - Light emitting device: The present invention relates to a light emitting device comprising at least one light emitting diode which emits light in a predetermined wavelength region, copper-alkaline earth metal based inorganic mixed crystals activated by rare earths, which include copper-alkaline earth silicate phosphors which are disposed around the light emitting diode and... Agent: H.c. Park & Associates, PLC

20090134411 - Light emitting device and backlight unit using the same: An object of the present invention is to provide a light emitting device that shows high adhesion between a sealing member and a package member. A light emitting device 100 of the present invention comprises a package 20 with a recess 60 having a bottom face 20a and a side... Agent: Birch Stewart Kolasch & Birch

20090134414 - Light emitting device with phosphor wavelength conversion and methods of producing the same: A method of fabricating a light emitting device comprises: mounting a light emitting diode chip in a package; heating the light emitting diode chip package assembly to a pre-selected temperature; and dispensing a pre-selected volume of a mixture of at least one phosphor and a light transmissive thermosetting material (silicone,... Agent: Fliesler Meyer LLP

20090134415 - Light emitting element and method for producing the same: A light scattering section is formed on at least part of a surface of a sealing resin section including fluorescent bodies and covering light emitting diode chips. Light from the light emitting diode chips is scattered by the light scattering section, and then is returned to the sealing resin section... Agent: Morrison & Foerster LLP

20090134418 - Method for forming ohmic electrode and semiconductor light emitting element: The present invention relates to a method of forming an ohmic electrode in a semiconductor light emitting element, comprising: forming a semiconductor layer having a light emitting structure on a substrate, sequentially laminating a bonding layer, a reflective layer and a protective layer on the semiconductor layer, and forming an... Agent: H.c. Park & Associates, PLC

20090134419 - Reflective electrode for a semiconductor light emitting apparatus: A process is disclosed for forming a reflective electrode on a semiconductor light emitting device, the light emitting device having an active layer for generating light and a cladding layer in electrical contact with the active layer. The process involves depositing an intermediate layer of electrically conductive material on the... Agent: Philips Intellectual Property & Standards

20090134416 - Semiconductor light emitting device: Provided are a semiconductor light emitting device. The semiconductor light emitting device comprises: a light emitting structure; a light transmitting layer under a second portion of the light emitting structure; and a reflective electrode layer electrically connected to the light emitting structure, a portion of the reflective electrode layer being... Agent: Birch Stewart Kolasch & Birch

20090134417 - Semiconductor light emitting device and lighting device: A semiconductor light emitting device can include a light emitting element with a semiconductor epitaxial layer which has a light emitting portion, and an element substrate which supports the semiconductor epitaxial layer and does not transmit light from the light emitting portion. A resin layer can be provided on the... Agent: Cermak Kenealy Vaidya & Nakajima LLP

20090134420 - Semiconductor light emitting device, lighting module, lighting apparatus, display element, and manufacturing method for semiconductor light emitting device: In an LED array chip (2), LEDs (6) are connected together in series by a bridging wire (30). The LEDs (6) each have a semiconductor multilayer structure (8-18) including a light emitting layer (14). Here, the semiconductor multilayer structure (8-18) is epitaxially grown on a front surface of an SiC... Agent: Snell & Wilmer L.L.P. (panasonic)

20090134421 - Solid metal block semiconductor light emitting device mounting substrates and packages: A mounting substrate for a semiconductor light emitting device includes a solid metal block having first and second opposing metal faces. The first metal face includes an insulating layer and a conductive layer on the insulating layer. The conductive layer is patterned to provide first and second conductive traces that... Agent: Myers Bigel Sibley & Sajovec, P.A.

20090134412 - White light emitting diode and method of manufacturing the same: Provided is a white LED including a reflector cup; an LED chip mounted on the bottom surface of the reflector cup; transparent resin surrounding the LED chip; a phosphor layer formed above the transparent resin; and a reflecting film interposed between the transparent resin and the phosphor layer, the reflecting... Agent: Mcdermott Will & Emery LLP

20090134422 - Led package module and manufacturing method thereof: A light emitting diode (LED) package module includes a substrate, a first LED die, a second LED die, a connecting circuit and a repairing circuit. The first LED die and the second LED die are disposed on the substrate by wire bonding or flip-chip bonding. The second LED die and... Agent: Birch Stewart Kolasch & Birch

20090134423 - Light emitting diode device: A light emitting diode (LED) device comprises a first lead frame, a second lead frame, a LED die and at least one bump. The LED die is fixed on and electrically connected to the first lead frame. The second lead frame separated from the first lead frame with a distance... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20090134424 - Light emitting structure and securing device thereof: The light emitting structure disclosed includes a light emitting device, a metal frame, and a repressing fastener. The light emitting device has a plurality of first coupling terminals, and the metal frame has a plurality of second coupling portions. The light emitting device is disposed in the metal frame, and... Agent: Raymond R. Moser Jr., Esq. MoserIPLaw Group

20090134425 - Semiconductor light emitting device, method of manufacturing the same, and lighting apparatus and display apparatus using the same: In order to achieve the above object, the semiconductor light emitting device according to the present invention includes a luminous layer, a light transmission layer disposed over a main surface of the luminous layer, and having depressions on a surface facing away from the luminous layer, and a transmission membrane... Agent: Snell & Wilmer L.L.P. (panasonic)

20090134426 - Resin for optical-semiconductor-element encapsulation and optical semiconductor device obtained with the same: wherein R1 and R2 each independently represent an alkyl group, a cycloalkyl group, an alkenyl group, an alkynyl group, or an aryl group, in which a plurality of R1's are the same or different and a plurality of R2's are the same or different; X represents a hydroxy group, an... Agent: Sughrue-265550

20090134427 - Light emitting device and method of producing light emitting device: There has not been a DC drive type light emitting device capable of providing high brightness. The present invention provides a light emitting device, including: a pair of electrodes; a light emitter placed between the electrodes; and a semiconductor laminated to be adjacent to the light emitter, in which the... Agent: Fitzpatrick Cella Harper & Scinto

20090134428 - Nitride semiconductor device and manufacturing method thereof: A nitride semiconductor device includes: a semiconductor substrate; a p-type semiconductor layer formed over the semiconductor substrate, made of a nitride semiconductor, and containing first impurities; and an insulating film contacting the p-type semiconductor layer and having an impurity region containing second impurities for trapping hydrogen. Since residual hydrogen in... Agent: Mcdermott Will & Emery LLP

20090134429 - Transistor structure with minimized parasitics and method of fabricating the same: A transistor having minimized parasitics is provided including an emitter having a recessed extrinsic emitter portion atop an intrinsic emitter portion; a base including an intrinsic base portion in electrical contact with the intrinsic emitter portion and an extrinsic base portion in electrical contact with the intrinsic base portion and... Agent: Scully, Scott, Murphy & Presser, P.C.

20090134430 - Semiconductor device: A semiconductor device includes a substrate including an element region having a polygonal shape defined by a plurality of edges, and an isolation region surrounding the element region, and a plurality of gate electrodes provided on the substrate, crossing the element region, arranged in parallel with each other, and electrically... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090134431 - Nonvolatile semiconductor storage apparatus and method of manufacturing the same: A nonvolatile semiconductor storage apparatus includes: a plurality of first wirings; a plurality of second wirings which cross the plurality of first wirings; and a memory cell which is connected between both the wirings at an intersection of the first and second wirings, and includes a variable resistive element operative... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090134432 - Nonvolatile semiconductor memory device and method of manufacturing the same: A nonvolatile semiconductor memory device comprises a semiconductor substrate; a cell array block formed on the semiconductor substrate and including plural stacked cell array layers each with a plurality of first lines, a plurality of second lines crossing the plurality of first lines, and memory cells connected at intersections of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090134433 - Image sensor: An image sensor includes a substrate in which an active pixel region and an optical black region are defined, a plurality of active pixels in the active pixel region, each active pixel including a first charge-detection unit having a first conversion gain, and a plurality of black pixels in the... Agent: Mills & Onello LLP

20090134434 - Semiconductor device: A semiconductor device is disclosed. One embodiment provides a top surface. A first lateral semiconductor region is arranged adjacent to the top surface and includes a transistor structure. The transistor structure includes a drain zone of a first conductivity type. A second lateral semiconductor region is arranged below the first... Agent: Dicke, Billig & Czaja

20090134435 - Method to reduce excess noise in electronic devices and monolithic integrated circuits: This invention proposes the use of a thermodynamic screen placed under the electronic devices whose excess noise is to be reduced in order to block the transverse currents between said devices and subjacent layers that are responsible for the aforementioned excess noise. For epitaxial layers as those used in Microelectronics,... Agent: Merchant & Gould PC

20090134436 - Semiconductor device, its manufacturing method and electronic apparatus thereof: The present invention proposes a semiconductor device, its manufacturing method and to an electronic apparatus thereof equipped with the semiconductor device where it becomes possible to make a CMOS type solid-state imaging device, an imager area formed with a MOS transistor of an LDD structure without having a metal silicide... Agent: Robert J. Depke Lewis T. Steadman

20090134438 - Image sensor: A CMOS image sensor includes an impurity region provided under at least the first electrode, the second electrode and the third electrode for forming a path through which the signal charges transfer, wherein the impurity concentration of a region of the impurity region corresponding to a portion located under the... Agent: Ditthavong Mori & Steiner, P.C.

20090134437 - Image sensor and cmos image sensor: In an image sensor, a first electrode, a second electrode, a third electrode and a fourth electrode are formed between a photoelectric conversion portion and a voltage conversion portion and are provided so as not to overlap with at least a part of the photoelectric conversion portion in plan view.... Agent: Ditthavong Mori & Steiner, P.C.

20090134439 - Cmos image sensor and method for manufacturing the same: A CMOS Image Sensor (CIS) that minimizes light loss and achieves maximized performance. The CIS includes a plurality of metal wirings provided on and/or over a semiconductor substrate and surrounded, respectively, by a dielectric layer, a silicon layer deposited on and/or over the plurality of metal wirings, a photodiode and... Agent: Sherr & Vaughn, PLLC

20090134440 - Semiconductor device and method of manufacturing the same: A semiconductor device comprising a substrate and a ferroelectric capacitor formed on the substrate. The ferroelectric capacitor includes a lower electrode, an upper electrode and a ferroelectric film interposed between the lower and upper electrodes. The ferroelectric capacitor having sidewalls receded from sidewalls of the upper electrode.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090134441 - Integrated electronic circuit incorporating a capacitor: A non-volatile memory element includes a transistor for selecting the element and a capacitor for recording a binary value by electrical breakdown of an insulating layer of the capacitor. A structure of the memory element is modified in order to allow a higher degree of integration of the element within... Agent: Gardere Wynne Sewell LLP Intellectual Property Section

20090134442 - Recessed channel device and method thereof: A method for forming a recessed channel device includes providing a substrate with a plurality of trench capacitors formed therein, each of the trench capacitors including a plug protruding above the substrate; forming a spacer on each of the plugs; forming a plurality of trench isolations along a first direction... Agent: Ingrassia Fisher & Lorenz, P.C.

20090134443 - Floating-gate structure with dielectric component: Floating-gate memory cells having a floating gate with a conductive portion and a dielectric portion facilitate increased levels of charge trapping sites within the floating gate. The conductive portion includes a continuous component providing bulk conductivity to the floating gate. The dielectric portion is discontinuous within the conductive portion and... Agent: Micron Technology, Inc. Lefert Jay & Polgaze, P.a

20090134444 - Memory cells, and methods of forming memory cells: Some embodiments include methods of forming memory cells. Dopant is implanted into a semiconductor substrate to form a pair of source/drain regions that are spaced from one another by a channel region. The dopant is annealed within the source/drain regions, and then a plurality of charge trapping units are formed... Agent: Wells St. John P.s.

20090134445 - Semiconductor device with dielectric structure and method for fabricating the same: A semiconductor device with a dielectric structure and a method for fabricating the same are provided. A capacitor in the semiconductor device includes: a bottom electrode formed on a substrate; a first dielectric layer made of titanium dioxide (TiO2) in rutile phase and formed on the bottom electrode; and an... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090134447 - Flash memory device and method for manufacturing the same: A flash memory device, and a manufacturing method thereof, having advantages of protecting sidewalls of a floating gate and a control gate and preventing a recess of an active area of a source region are provided. The method includes forming a tunneling oxide layer on an active region of a... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20090134446 - Semiconductor device: A semiconductor device includes a tunnel insulating film formed on a semiconductor substrate, a floating gate electrode formed on the tunnel insulating film, an inter-electrode insulating film formed on the floating gate electrode, and a control gate electrode formed on the inter-electrode insulating film, wherein the inter-electrode insulating film includes... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090134448 - Non-volatile memory device and method of forming the same: Example embodiments provide a non-volatile semiconductor memory device and method of forming the same. The non-volatile memory device may include a tunnel insulation layer on a semiconductor substrate, a charge storage layer on the tunnel insulation layer, a first blocking insulation layer on the charge storage layer, and a gate... Agent: Harness, Dickey & Pierce, P.L.C

20090134449 - Non-volatile semiconductor memory device and method of manufacturing the same: Provided is a nonvolatile semiconductor memory device highly integrated and highly reliable. A plurality of memory cells are formed in a plurality of active regions sectioned by a plurality of isolations (silicon oxide films) extending in the Y direction and deeper than a well (p type semiconductor region). In each... Agent: Miles & Stockbridge PC

20090134452 - Non-volatile memory: A non-volatile memory includes a substrate, a memory unit array, (N+1) bit lines, M word lines, M first control gate lines, and M second control gate lines. The memory unit array includes N memory unit columns, and each memory unit column includes M memory units. The (N+1) bit lines are... Agent: Jianq Chyun Intellectual Property Office

20090134451 - Semiconductor device and method of fabricating the same: An example embodiment of a non-volatile memory device and an example embodiment of a method of fabricating the same are provided. The non-volatile memory devices includes a tunnel insulation layer on a semiconductor substrate, a charge storage layer on the tunnel insulation layer, a blocking insulation layer including at least... Agent: Harness, Dickey & Pierce, P.L.C

20090134450 - Tunneling insulating layer, flash memory device including the same, memory card and system including the flash memory device, and methods of manufacturing the same: Provided is a tunneling insulating layer, a flash memory device including the same that increases a program/erase operation speed of the flash memory device and has improved data retention in order to increase reliability of the flash memory device, a memory card and system including the flash memory device, and... Agent: Harness, Dickey & Pierce, P.L.C

20090134453 - Non-volatile memory device with improved immunity to erase saturation and method for manufacturing same: A non-volatile memory device having a control gate on top of the second dielectric (interpoly or blocking dielectric), at least a bottom layer of the control gate in contact with the second dielectric being constructed in a material having a predefined high work-function and showing a tendency to reduce its... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP

20090134454 - Fin-type field effect transistor, semiconductor device and manufacturing process therefor: A constant distance can be maintained between source/drain regions without providing a gate side wall by forming a gate electrode comprising an eaves structure, and a uniform dopant concentration is kept within a semiconductor by ion implantation. As a result, a FinFET excellent in element properties and operation properties can... Agent: Young & Thompson

20090134455 - Semiconductor device and manufacturing method: A semiconductor device including a substrate, a first well, a second well, a gate, a first doped region, and a second doped region. The substrate includes a first conductive type. The first well includes a second conductive type and is formed in the substrate. The second well includes the second... Agent: Quintero Law Office, PC

20090134456 - Semiconductor devices and method of manufacturing them: The present invention aims to suppress the diffusion of p-type impurities (typically magnesium), included in a semiconductor region of a III-V compound semiconductor, into an adjoining different semiconductor region. A semiconductor device 10 of the present invention comprises a first semiconductor region 28 of gallium nitride (GaN) including p-type impurities... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090134457 - Segmented pillar layout for a high-voltage vertical transistor: In one embodiment, a transistor fabricated on a semiconductor die includes a first section of transistor segments disposed in a first area of the semiconductor die, and a second section of transistor segments disposed in a second area of the semiconductor die adjacent the first area. Each of the transistor... Agent: The Law Offices Of Bradley J. Bereznak

20090134458 - Method of manufacturing a trench transistor having a heavy body region: A trenched field effect transistor is provided that includes (a) a semiconductor substrate, (b) a trench extending a predetermined depth into the semiconductor substrate, (c) a pair of doped source junctions, positioned on opposite sides of the trench, (d) a doped heavy body positioned adjacent each source junction on the... Agent: Townsend And Townsend And Crew, LLP

20090134459 - Semiconductor device and method of manufacturing the same: As well as achieving both downsizing and thickness reduction and sensitivity improvement of a semiconductor device that has: a MEMS sensor formed by bulk micromachining technique such as an acceleration sensor and an angular rate sensor; and an LSI circuit, a packaging structure of the semiconductor device having the MEMS... Agent: Brundidge & Stanger, P.C.

20090134460 - Strained semiconductor-on-insulator (ssoi) by a simox method: A strained (tensile or compressive) semiconductor-on-insulator material is provided in which a single semiconductor wafer and a separation by ion implantation of oxygen process are used. The separation by ion implantation of oxygen process, which includes oxygen ion implantation and annealing creates, a buried oxide layer within the material that... Agent: Scully, Scott, Murphy & Presser, P.C.

20090134461 - Method of manufacturing electronic apparatus and electronic apparatus: A method of manufacturing an electronic apparatus having a resist pattern provided over a substrate provided with a thin film transistor, the method includes the steps of forming by application a resist film over the substrate in the state of covering the thin film transistor, forming a resist pattern by... Agent: Sonnenschein Nath & Rosenthal LLP

20090134462 - Semiconductor integrated circuit and method of fabricating same: A semiconductor integrated circuit comprising thin-film transistors in each of which the second wiring is prevented from breaking at steps. A silicon nitride film is formed on gate electrodes and on gate wiring extending from the gate electrodes. Substantially triangular regions are formed out of an insulator over side surfaces... Agent: Eric Robinson

20090134463 - Semiconductor structure and system for fabricating an integrated circuit chip: A semiconductor structure and a system for fabricating an integrated circuit chip. The semiconductor structure includes: a buried oxide layer on a semiconductor wafer; a thin fin structure on the buried oxide layer, wherein the thin fin structure includes a first hard mask on a semiconductor fin, wherein the semiconductor... Agent: Schmeiser, Olsen & Watts

20090134466 - Dual work function semiconductor device and method for manufacturing the same: A method of manufacturing dual work function devices starting from a single metal electrode and the device resulting therefrom are disclosed. In one aspect, the method includes a single-metal-single-dielectric (SMSD) CMOS integration scheme. A single dielectric stack comprising a gate dielectric layer and a dielectric capping layer and one metal... Agent: Knobbe Martens Olson & Bear LLP

20090134467 - Semiconductor device and a method of manufacturing the same: A technique that makes it possible to suppress a crystal defect produced in an active area and thereby reduce the fraction defective of semiconductor devices is provided. A first embodiment relates to the planar configuration of SRAM. One of the features of the first embodiment is as illustrated in FIG.... Agent: Miles & Stockbridge PC

20090134468 - Semiconductor device and method for controlling semiconductor device: To provide a semiconductor device having a thin-film BOX-SOI structure and capable of realizing a high-speed operation of a logic circuit and a stable operation of a memory circuit. A semiconductor device according to the present invention includes a semiconductor support substrate, an insulation layer having a thickness of at... Agent: Mcdermott Will & Emery LLP

20090134465 - Semiconductor structure: A desired property for a metal gate electrode layer is that it can cover a three-dimensional semiconductor structure having a microstructure with high step coverage. Another desired property for the metal gate electrode layer is that the surface of a deposited electrode layer is flat on a nanometer scale, enables... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090134464 - Static random access memory and fabricating method thereof: A static random access memory at least includes: pluralities of transistors disposed on a substrate, each transistor at least includes a gate, a gate dielectric layer, a source doped region and a drain doped region, in which some of the source doped regions are used for connecting with a Vss... Agent: J C Patents, Inc.

20090134470 - High performance mosfet comprising a stressed gate metal silicide layer and method of fabricating the same: The present invention relates to a semiconductor device that comprises at least one field effect transistor (FET) containing a source region, a drain region, a channel region, a gate dielectric layer, a gate electrode, and one or more gate sidewall spacers. The gate electrode of such an FET contains an... Agent: Scully, Scott, Murphy & Presser, P.C.

20090134469 - Method of manufacturing a semiconductor device with dual fully silicided gate: A method of manufacturing a dual work function semiconductor device is disclosed. In one aspect, the method comprises providing a first metal layer over a first electrode in a first region, and at least a first work function tuning element. The method further comprises providing a second metal layer of... Agent: Knobbe Martens Olson & Bear LLP

20090134471 - Semiconductor interconnect: One embodiment relates to an integrated circuit that includes at least one semiconductor device. The integrated circuit includes a first contact associated with a first terminal of the semiconductor device. The first contact spans a dielectric layer and couples the first terminal to an interconnect line that communicates signals horizontally... Agent: Texas Instruments Incorporated

20090134472 - Semiconductor device: A semiconductor device according to an embodiment of the invention includes: a semiconductor substrate; device regions formed on the semiconductor substrate, the device regions having a length direction in a predetermined direction; a plurality of transistors having gate electrodes, respectively, the gate electrodes extending in a direction approximately perpendicular to... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090134473 - Semiconductor device: A semiconductor device has a pair of gate electrodes extending adjacent to and non-parallel to each other, a source and/or drain region located between the pair of gate electrodes for forming a pair of transistors with the gate electrodes, and a contact electrode disposed between the pair of gate electrodes... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090134474 - Constant current source device and method for manufacturing the same: The present invention discloses a constant current source device with over current and over voltage protection function that can be directly applied to AC power and DC power, and a method for manufacturing the constant current source device is also disclosed. The device includes a silicon substrate (1), an oxide... Agent: Kamrath & Associates P.A.

20090134475 - Transistor providing different threshold voltages and method of fabrication thereof: A transistor includes a channel region with a first portion and a second portion. A length of the first portion is smaller than a length of the second portion. The first portion has a higher threshold voltage than the second portion. The lower threshold voltage of the second portion allows... Agent: Baker Botts L.L.P.

20090134476 - Low temperature coefficient field effect transistors and design and fabrication methods: An accumulation mode field effect transistor includes a substrate, an insulated gate on the substrate, source and drain regions on the substrate on opposite sides of the insulated gate, a channel region that is doped a first conductivity type at a first doping concentration, and that extends into the substrate... Agent: Myers Bigel Sibley & Sajovec

20090134477 - Semiconductor device and method of fabricating the same: A semiconductor device and a method of fabricating the same include a gate electrode formed over the silicon substrate, the gate electrode including low-concentration conductive impurity regions, a high-concentration conductive impurity region formed between the low-concentration conductive impurity regions and a first silicide layer formed over the high-concentration conductive impurity... Agent: Sherr & Vaughn, PLLC

20090134478 - Semiconductor structure: A semiconductor structure including a substrate, a first well, a second well, a third well, a first doped region, and a second doped region. The substrate includes a first conductive type. The first well includes a second conductive type and is formed in the substrate. The second well includes the... Agent: Quintero Law Office, PC

20090134479 - Semiconductor device and method for manufacturing the same: It is possible to prevent the deterioration of device characteristic as much as possible. A semiconductor device includes: a semiconductor substrate; a gate insulating film provided above the semiconductor substrate and containing a metal, oxygen and an additive element; a gate electrode provided above the gate insulating film; and source/drain... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090134480 - Semiconductor device and method for manufacturing the same: It is possible to prevent the deterioration of device characteristic as much as possible. A semiconductor device includes: a semiconductor substrate; a gate insulating film provided above the semiconductor substrate and containing a metal, oxygen and an additive element; a gate electrode provided above the gate insulating film; and source/drain... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090134481 - Molded sensor package and assembly method: A method of forming a molded sensor includes providing a sensor assembly having a sensor, and a cap coupled to a portion of the sensor, the cap having an opening and forming an interior area. The method also includes blocking the opening in the cap, and molding a moldable material... Agent: Bromberg & Sunstein LLP

20090134482 - Power semiconductor module having a substrate and a pressure device: A power semiconductor module having a substrate, a housing and a pressure device. The substrate further includes a body formed of an insulating material and structured conductor tracks which are arranged thereon and have load and auxiliary potentials. The substrate also includes recesses in the region of the structured conductor... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20090134483 - Electronic assembly for image sensor device: An electronic assembly for an image sensor device is disclosed. The electronic assembly comprises a package module and a lens set mounted thereon. The package module comprises a device substrate comprising at least one grounding plug therein, in which the grounding plug is insulated from the device substrate and an... Agent: Joe Mckinney Muncy

20090134484 - Image sensor with correcting lens and fabrication thereof: An image sensor with at least one correcting lens and a method for fabricating the same are described. The image sensor includes a substrate with an array of microlenses thereon and at least one correcting lens disposed over the substrate covering the microlens array. In the fabricating method, a substrate... Agent: J C Patents, Inc.

20090134485 - Image sensor and method of manufacturing the same: An image sensor includes a semiconductor substrate including a pixel region and a peripheral circuit region; interlayer insulating films including metal wires arranged on the pixel region and the peripheral circuit region; and a photodiode and an upper electrode disposed on the interlayer insulating film of the pixel region. Further,... Agent: Sherr & Vaughn, PLLC

20090134486 - Photodiode, method for manufacturing such photodiode, optical communication device and optical interconnection module: Both high light receiving sensitivity and high speed of a photodiode are achieved at the same time. The photodiode is provided with a semiconductor layer (1) and a pair of metal electrodes (2) which are arranged on the surface of the semiconductor layer (1) at an interval (d) and form... Agent: Young & Thompson

20090134487 - Image sensor and method for manufacturing the same: An image sensor includes a first substrate, a lower metal line, a circuitry, a first insulating layer, a crystalline semiconductor layer, a photodiode, and a contact line. The lower metal line and the circuitry are formed on and/or over the first substrate and the first insulating layer is formed on... Agent: Sherr & Vaughn, PLLC

20090134488 - Immersion liquid, exposure apparatus, and exposure process: An immersion liquid is provided comprising an ion-forming component, e.g. an acid or a base, that has a relatively high vapor pressure. Also provided are lithography processes and lithography systems using the immersion liquid.... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20090134490 - Electronic component module: A ferrite substrate, a winding-embedded ferrite resin layer, and an IC-embedded ferrite resin layer are laminated, the ferrite substrate has a ferrite first protruding part that protrudes into the ferrite resin layer from the surface thereof, the winding inside the ferrite resin layer is arranged winding around the first protruding... Agent: Oliff & Berridge, PLC

20090134489 - System including an inter-chip communication system: A system including an inter-chip communication system is disclosed. One embodiment includes a base chip including a base chip transceiver network. At least one chip is stacked on the base chip, the at least one stacked chip including a substrate, a cavity formed in the substrate, a first surface, and... Agent: Dicke, Billig & Czaja

20090134492 - Methods and devices for fabricating tri-layer beams: Methods and devices for fabricating tri-layer beams are provided. In particular, disclosed are methods and structures that can be used for fabricating multilayer structures through the deposition and patterning of at least an insulation layer, a first metal layer, a beam oxide layer, a second metal layer, and an insulation... Agent: Jenkins, Wilson, Taylor & Hunt, P. A.

20090134491 - Semiconductor constructions, methods of forming capacitors, and methods of forming dram arrays: Some embodiments include methods of forming capacitors. A first section of a capacitor may be formed to include a first storage node, a first dielectric material, and a first plate material. A second section of the capacitor may be formed to include a second storage node, a second dielectric material,... Agent: Wells St. John P.s.

20090134493 - Semiconductor device and method of manufacturing the same: Provided is a semiconductor device including a MIM capacitor, and having excellent waterproof property and antioxidant property even when being formed between wiring layers. The semiconductor device includes a semiconductor substrate, a first insulating film formed on the semiconductor substrate, a first wiring layer embedded in the first insulating film,... Agent: Mcginn Intellectual Property Law Group, PLLC

20090134495 - Method of designing semiconductor device: A design method of a semiconductor device comprising forming a base wafer by using a plurality of semiconductor chips including a plurality of functional macros, generating macro test information by testing the plurality of function macros of the plurality of semiconductor devices; and picking a macro that is prohibited from... Agent: Mcginn Intellectual Property Law Group, PLLC

20090134494 - Semiconductor device and method of manufacturing the same: The present invention includes: a semiconductor element 1 including a circuit forming portion 11 formed on a central region of a principal surface of the semiconductor element 1 and a plurality of electrode pads 8 arranged on the principal surface outside the circuit forming portion 11; an interposer 3 on... Agent: Hamre, Schumann, Mueller & Larson P.C.

20090134496 - Wafer and method of forming alignment markers: A wafer comprises a multi-layer structure. The multi-layer structure includes a first device structure neighbouring an area for receiving alignment markers. A plurality of alignment markers extend into the multi-layer structure and are located within the area for receiving alignment markers. The plurality of alignment markers is arranged to prevent... Agent: Freescale Semiconductor, Inc. Law Department

20090134498 - Semiconductor apparatus: The present invention includes a semiconductor element provided with an electrode passing through front and back sides. The electrode is formed as a cylinder including a hollow portion, and stress relaxing material is provided in the hollow portion, which is used to reduce stress that is induced between the semiconductor... Agent: Young & Thompson

20090134497 - Through substrate via semiconductor components: A structure and method of forming landing pads for through substrate vias in forming stacked semiconductor components are described. In various embodiments, the current invention describes landing pad structures that includes multiple levels of conductive plates connected by vias such that the electrical connection between a through substrate etch and... Agent: Slater & Matsil LLP

20090134499 - Atomic layer deposition of hf3n4/hfo2 films as gate dielectrics: The use of atomic layer deposition (ALD) to form a dielectric layer of hafnium nitride (Hf3N4) and hafnium oxide (HfO2) and a method of fabricating such a combination gate and dielectric layer produces a reliable structure for use in a variety of electronic devices. Forming the dielectric structure includes depositing... Agent: Schwegman, Lundberg & Woessner/micron

20090134500 - Structures for preventing cross-talk between through-silicon vias and integrated circuits: A semiconductor chip includes a through-silicon via (TSV), a device region, and a cross-talk prevention ring encircling one of the device region and the TSV. The TSV is isolated from substantially all device regions comprising active devices by the cross-talk prevention ring.... Agent: Slater & Matsil, L.L.P.

20090134501 - Device and method including a soldering process: A device and method of making a device is disclosed. One embodiment provides a substrate. A semiconductor chip is provided having a first surface with a roughness of at least 100 nm. A diffusion soldering process is performed to join the first surface of the semiconductor chip to the substrate.... Agent: Dicke, Billig & Czaja

20090134502 - Leadframe based flash memory cards: A leadframe design for forming leadframe-based semiconductor packages having curvilinear shapes is disclosed. The leadframes may each include one or more curvilinear slots corresponding to curvilinear edges in the finished and singulated semiconductor package. After encapsulation, the integrated circuit packages on the panel may be singulated by cutting the integrated... Agent: Vierra Magen/sandisk Corporation

20090134503 - Semiconductor power device package having a lead frame-based integrated inductor: A semiconductor power device package having a lead frame-based integrated inductor is disclosed. The semiconductor power device package includes a lead frame having a plurality of leads, a inductor core attached to the lead frame such that a plurality of lead ends are exposed through a window formed in the... Agent: Schein & Cai LLP

20090134505 - Semiconductor device and method of manufacturing the same: According to the present invention, protrusions 4 are formed on electrodes 3 of semiconductor elements 6, and an optical member 7 is secured on the semiconductor element 6 with an adhesive 8 so as to be pressed onto the protrusions 4.... Agent: Steptoe & Johnson LLP

20090134504 - Semiconductor package and packaging method for balancing top and bottom mold flows from window: A window-type semiconductor package to balance top and bottom moldflows and its method are revealed. The package primarily comprises a substrate having a slot, a chip, and an encapsulant. After die attaching, an input opening and an output opening are formed and exposed from both ends of the slot. The... Agent: Joe Mckinney Muncy

20090134507 - Adhesive on wire stacked semiconductor package: A semiconductor package and a method of producing the same has a substrate. A first semiconductor chip is coupled to a surface of the substrate. The first semiconductor chip has a first and second surfaces which are substantially flat in nature. An adhesive layer is coupled to the second surface... Agent: Gunnison Mckay & Hodgson, LLP Garden West Office Plaza, Suite 220

20090134506 - Semiconductor device, method for manufacturing the same, and flexible substrate for mounting semiconductor: A semiconductor device includes a second semiconductor package, which includes a substrate and at least one semiconductor package. The substrate includes a terminal group formed on a surface thereof. At least one first semiconductor package is stacked on the substrate, and includes a plurality of flexible substrates, each of which... Agent: Young & Thompson

20090134508 - Integrated circuit with flexible planar leads: A microelectronic device including a microelectronic circuit and at least one planar flexible lead. These planar flexible leads are adapted to bend and flex during mechanical stress, allowing direct mounting of the device to a member and able withstand extreme thermal cycling between −20° C. to +80° C. encountered in... Agent: Michael A. Sileo, Jr.

20090134509 - Integrated circuit packaging system with carrier and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: forming a carrier having a top side and a bottom side; forming an edge terminal pad on the top side and an inner terminal pad on the bottom side; connecting an integrated circuit die to an inner portion of... Agent: Law Offices Of Mikio Ishimaru

20090134510 - Semiconductor package and method of fabricating the same, and electronic device using the semiconductor package: A semiconductor package and method of fabricating the same. The semiconductor package includes a first semiconductor package, a second semiconductor package stacked on the first semiconductor package, and a first electrical connector interposed between the first and second semiconductor packages to electrically connect the first and second semiconductor packages.... Agent: Stanzione & Kim, LLP

20090134512 - Method of producing multiple semiconductor devices: A method for producing multiple semiconductor devices. An electrically conductive layer is applied onto a semiconductor wafer. The semiconductor wafer is structured to produce multiple semiconductor chips. The electrically conductive layer is structured to produce multiple semiconductor devices.... Agent: Dicke, Billig & Czaja

20090134511 - Multiple size package socket: Various sockets for multiple sizes of chip package substrates are disclosed. In one aspect, an apparatus is provided that includes a socket that has a peripheral wall defining an interior space adapted to receive either of a first semiconductor chip package substrate and a second semiconductor chip package substrate. The... Agent: Timothy M Honeycutt Attorney At Law

20090134513 - Method and structures for fabricating mems devices on compliant layers: Methods and structures for fabricating MEMS devices on compliant layers are provided. In particular, disclosed are methods and structures that can include the use of a sacrificial layer composed of a material having material properties relative to one or more other layers. These methods and structures can reduce final device... Agent: Jenkins, Wilson, Taylor & Hunt, P. A.

20090134514 - Method for fabricating electrical bonding pads on a wafer: A method for fabricating electrical bonding pads on one face of a wafer includes the production of electrically conductive areas and electrical connection branches connecting these conductive areas. A layer of mask material is deposited and openings are produced in this mask layer which extend above said conductive areas and... Agent: Gardere Wynne Sewell LLP Intellectual Property Section

20090134516 - Method of manufacturing semiconductor device and semiconductor device: According to an embodiment of the present invention, a method of manufacturing a semiconductor device, comprising forming a conducting layer on a substrate; forming a resist mask having an opening in a prescribed position on the conducting layer; forming a first plated film in the opening by supplying an electric... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090134515 - Semiconductor package substrate: A semiconductor package substrate includes a main body with a surface having a first circuit layer thereon and a dielectric layer covering the first circuit layer, with a plurality of vias on a portion of the first circuit layer; a plurality of first conductive vias disposed in the vias; a... Agent: Pearne & Gordon LLP

20090134520 - Process integration scheme to lower overall dielectric constant in beol interconnect structures: Back-End of Line (BEoL) interconnect structures, and methods for their manufacture, are provided. The structures are characterized by narrower conductive lines and reduced overall dielectric constant values. Conformal diffusion barrier layers, and selectively formed capping layers, are used to isolate the conductive lines and vias from surrounding dielectric layers in... Agent: Schwegman, Lundberg & Woessner, P.A.

20090134519 - Semiconductor device: Embodiments relate to a semiconductor device. In embodiments, the semiconductor device may include a semiconductor substrate having a first metal line; a pre-metal dielectric (PMD) layer over the first metal line on the semiconductor substrate; a first metal layer formed in a first contact hole in the PMD layer; a... Agent: Sherr & Vaughn, PLLC

20090134518 - Semiconductor device and manufacturing method of semiconductor device: A semiconductor device of the present invention is provided with a substrate; an insulating film made of a fluorine-containing carbon film and formed on the substrate; a copper wiring buried in the insulating film; and a barrier film formed between the insulating film and the copper wiring. The barrier film... Agent: Pearne & Gordon LLP

20090134517 - Semiconductor device and method of manufacturing the same: A first insulating film is formed on a semiconductor substrate. A first interconnection is formed in a trench formed in the first insulating film. A first barrier film is formed between the first interconnection and first insulating film. A second insulating film is formed on the upper surface of the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090134521 - Integrated circuit and manufacturing method of copper germanide and copper silicide as copper capping layer: A method is provided for forming a capping layer comprising Cu, N, and also Si and/or Ge onto a copper conductive structure, said method comprising the sequential steps of: forming, at a temperature range between 200° C. up to 400° C., at least one capping layer onto said copper conductive... Agent: Knobbe Martens Olson & Bear LLP

20090134522 - Micro-electromechanical system memory device and method of making the same: A method of manufacturing a non-volatile memory bitcell comprises the steps of depositing a first layer of conductive material on a substrate and patterning and etching the first layer of conductive material to form three non-linearly disposed electrodes. The method also comprises the steps of depositing a first layer of... Agent: Cavendish Kinetics Attn: Legal Dept.

20090134523 - Semiconductor device and method of manufacturing the same: A semiconductor chip includes a semiconductor chip region provided with a plurality of internal circuits, and a plurality of electrode pads provided proximate to an outer edge of the semiconductor chip region and each electrically connected to any one of the plurality of internal circuits. The plurality of electrode pads... Agent: Mcginn Intellectual Property Law Group, PLLC

20090134524 - Semiconductor integrated circuit: A semiconductor device comprising a signal transmission line of a microstrip structure, capable of increasing the characteristic impedance of the signal transmission line and reducing coupling between a plurality of signal lines. In a signal transmission line of a microstrip structure composed of a signal line and a ground plate,... Agent: Sughrue Mion, PLLC

20090134526 - Interconnect structure to reduce stress induced voiding effect: An interconnect structure that may reduce or eliminate stress induced voids is provided. In an embodiment, a via is formed below a conductive line to provide an electrical connection to an underlying conductive region. The conductive line includes a widened region above the via. The widened region serves to reduce... Agent: Slater & Matsil, L.L.P.

20090134525 - Semiconductor device having a filling pattern around a storage structure and method of forming the same: A semiconductor device includes an interlayer insulating layer on a semiconductor substrate, at least one plug on the semiconductor substrate, the plug extending through the interlayer insulating layer toward an upper portion of the semiconductor substrate, the plug having a lower part with a first diameter and an upper part... Agent: Lee & Morse, P.C.

20090134528 - Semiconductor package, electronic device including the semiconductor package, and method of manufacturing the semiconductor package: Provided are a semiconductor package, an electronic device including the semiconductor package and a method of manufacturing the semiconductor package. The semiconductor package includes semiconductor chips mounted on a carrier, a first insulating layer sealing the semiconductor chips, first via-holes which are formed in the first insulating layer and expose... Agent: Marger Johnson & Mccollom, P.C.

20090134527 - Structure of three-dimensional stacked dice with vertical electrical self-interconnections and method for manufacturing the same: This invention provides a structure of three-dimensional stacked dice with vertical electrical self-interconnections and a method for manufacturing the same. A respective electrical conductive layer is formed in a buried layer of each of the stacked dice, and being extended and exposed to a sidewall of the respective die. An... Agent: Birch Stewart Kolasch & Birch

20090134529 - Circuit board module, electric device, and method for producing circuit board module: A circuit board module includes: a printed wiring board that is provided with a plurality of solder bonding pads; a semiconductor package that is provided with a plurality of solder bonding portions on a back face thereof to be mounted on the printed wiring board by soldering the solder bonding... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090134530 - Wiring substrate and method of manufacturing the same: There is provided a wiring substrate. The wiring substrate includes a wiring member and a reinforcing layer. The wiring member is formed by layering insulating layers and wiring layers and has connection pads thereon. The reinforcing layer is provided on the wiring member to surround the connection pads and has... Agent: Drinker Biddle & Reath (dc)

20090134531 - Overlay mark and method for forming the same: The invention is directed to an overlay mark in a first material layer in an overlay alignment region of a wafer and the first material layer is made from a first material. The overlay mark includes a plurality of mark regions and each of the mark regions comprises a plurality... Agent: J C Patents, Inc.

20090127535 - Phase change memory element and method for fabricating the same: A phase change memory device is disclosed, including a substrate. The phase change memory also includes a bottom electrode. A conductive structure with a cavity is provided to electrically contact the bottom electrode, wherein the conductive structure includes sidewalls with different thicknesses. A phase change spacer is formed to cross... Agent: Quintero Law Office, PC

20090127537 - Electric device with phase change resistor: An electric device has an electrically switchable resistor (2′) comprising a phase change material. The resistance value of the resistor can be changed between at least two values by changing the phase of the phase change material within a part of the resistor called the switching zone (12′) using Joule... Agent: Nxp, B.v. Nxp Intellectual Property Department

20090127536 - Integrated circuit having dielectric layer including nanocrystals: An integrated circuit includes a first electrode, resistivity changing material coupled to the first electrode, and a second electrode. The integrated circuit includes a dielectric material layer between the resistivity changing material and the second electrode. The dielectric material layer includes nanocrystals.... Agent: Dicke, Billig & Czaja

20090127538 - Phase-changeable memory devices having reduced susceptibility to thermal interference: A non-volatile memory array includes an array of phase-changeable memory elements that are electrically insulated from each other by at least a first electrically insulating region extending between the array of phase-changeable memory elements. The first electrically insulating region includes a plurality of voids therein. Each of these voids extends... Agent: Myers Bigel Sibley & Sajovec

20090127539 - Nitride semiconductor light emitting device: As an example of a nitride semiconductor light emitting device, on a sapphire substrate, a GaN buffer layer, an n-type GaN contact layer, an MQW active layer, and a p-type GaN contact layer are sequentially stacked, and a partial region from the p-type GaN contact layer to the middle of... Agent: Rabin & Berdo, PC

20090127541 - Reducing defects in semiconductor quantum well heterostructures: Reducing defects in semiconductor quantum well structures is generally described. In one example, an apparatus includes a semiconductor substrate including silicon, a buffer film epitaxially grown on the semiconductor substrate, the buffer film comprising silicon, germanium, and an impurity, and a first semiconductor film epitaxially grown on the buffer film... Agent: Cool Patent, P.C. C/o Cpa Global

20090127540 - Systems and methods for nanowire growth: The present invention is directed to systems and methods for nanowire growth. In an embodiment, methods for nanowire growth and doping are provided, including methods for epitaxial vertically oriented nanowire growth including providing a substrate material having one or more nucleating particles deposited thereon in a reaction chamber, introducing an... Agent: Nanosys Inc.

20090127542 - Negative resistance field effect element and high-frequency oscillation element: There is provided a 3-terminal negative differential resistance field effect element having a high output and high frequency characteristic, requiring low power consumption, and preferably having a high PVCR. The field effect element uses a compound hetero structure and forms a dual channel layer by connecting a high-transfer degree quantum... Agent: Franklin & Associates International LLC

20090127543 - Vertical gate-depleted single electron transistor: A vertical gate-depleted single electron transistor (SET) is fabricated on a conducting or insulating substrate. A plurality of lightly doped basic materials and tunneling barriers are fabricated on top of a substrate, wherein at least two of the layers of basic materials sandwich the layers of tunneling barriers and at... Agent: Gates & Cooper LLP Howard Hughes Center

20090127544 - Method for producing organic electronic devices on solvent-and/or temperature-sensitive plastic substrates: The invention relates to the production of organic field-effect transistors (OFETs), solar cells or light-emitting diodes (OLEDs) and circuits based thereon on the surface of solvent- and/or temperature-sensitive plastics, e.g. thermoplastic injection-moulded bodies. A protective layer, which comprises a polymer compound, such as polyacrylate, polyphenol, melamine resin or polyester resin,... Agent: Horst M Kasper

20090127545 - Organic light emitting device and method of fabricating the same: An organic light emitting device and a method for fabricating the same are discussed. According to an embodiment, the method includes forming a mother substrate structure including organic light emitting devices including TFTs and first electrodes, each first electrode electrically connected to the corresponding TFT and being a part of... Agent: Birch Stewart Kolasch & Birch

20090127546 - Organic light emitting diode and method for the production thereof: The invention relates to organic light emitting diodes (OLEDs) and to a method for the production thereof. The organic light emitting diodes according to the invention are distinguished in that a substance is integrated in the layer stack, the electrical conductivity of which is reduced by energy input, as a... Agent: Barnes & Thornburg LLP

20090127547 - Pi-conjugated organoboron polymers in thin-film organic electronic devices: Pi-conjugated organoboron polymers for use in thin-film organic polymer electronic devices. The polymers contain aromatic and or unsaturated repeat units and boron atoms. Pi-conjugated organoboron polymers which are end capped, derivatized with solubilizing groups or both exhibit improved solubility and handling properties beneficial for the formation of thin films useful... Agent: Greenlee Winner And Sullivan P C

20090127549 - Composite structure gap-diode thermopower generator or heat pump: A thermionic or thermotunneling generator or heat pump is disclosed, comprising electrodes substantially facing one another and separated by spacers disposed between the electrodes, wherein the substrate material for the cathode is preferably a single crystalline silicon wafer while the substrate for the anode is an organic wafer, and preferably... Agent: Borealis Technical Limited

20090127548 - Semiconductor thin film and process for producing the same: This invention provides a transparent oxide semiconductor, which comprises an oxide comprising indium oxide as a main component and cerium oxide as an additive and has such properties that light-derived malfunction does not occur, there is no variation in specific resistance of a thin film caused by heating and the... Agent: Millen, White, Zelano & Branigan, P.C.

20090127550 - Thin film field effect transistor and display using the same: A TFT is provided which includes, on a substrate, at least a gate electrode, a gate insulating layer; an active layer containing an amorphous oxide semiconductor, a source electrode, and a drain electrode, wherein a carrier concentration of the active layer is 3×1017 cm−3 or more and a film thickness... Agent: Moss & Burke, PLLC

20090127551 - Thin film field effect transistor and display using the same: A TFT is provided which includes on a substrate, at least a gate electrode, a gate insulating layer, an active layer containing an amorphous oxide semiconductor, a source electrode, and a drain electrode, wherein a mean square interface roughness between the gate insulating layer and the active layer is less... Agent: Moss & Burke, PLLC

20090127552 - Thin film transistor: A thin film transistor is disclosed comprising comprises a substrate, a dielectric layer, and a semiconductor layer. The semiconductor layer, which is crystalline zinc oxide preferentially oriented with the c-axis perpendicular to the plane of the dielectric layer or substrate, is prepared by liquid depositing a zinc oxide nanodisk composition.... Agent: Fay Sharpe / Xerox - Rochester

20090127553 - Wafer with scribe lanes comprising external pads and/or active circuits for die testing: A wafer (W) comprises i) at least one independent die (D1, D2) having internal integrated components (IC), a multiplicity of internal pads (IP1-IP3) connected to some of the internal integrated components (IC), ii) scribe lanes (SL) defined between and around each independent die (Di), and in part of which are... Agent: Nxp, B.v. Nxp Intellectual Property Department

20090127554 - Semiconductor structure having multilayer of polysilicon and display panel applied with the same: A semiconductor structure includes a substrate, a first polysilicon (polysilicon) region, a second polysilicon region, an insulating layer and a third polysilicon region. The first and second polysilicon regions are formed on the substrate and spaced apart by a gap. The insulating layer formed on the substrate covers the first... Agent: Birch Stewart Kolasch & Birch

20090127555 - Photoelectric conversion device and manufacturing method thereof: In order to form a metal thin film, a silicide film, or the like between an upper-layer unit cell and a lower-layer unit cell in stacked-layer photoelectric conversion devices, a step of forming the thin film is additionally needed. Therefore, a problem such as decline in productivity of the photoelectric... Agent: Fish & Richardson P.C.

20090127558 - Display device and method of manufacturing the same: A display device, and method for making the same, comprising a thin film transistor formed on a first insulating substrate, a pixel electrode electrically connected to the thin film transistor, an organic layer formed on the pixel electrode, a common electrode formed on the organic layer, a conductive layer formed... Agent: Cantor Colburn, LLP

20090127557 - Method for forming a polysilicon thin film layer: This invention provides a method for fabricating a polysilicon thin film layer, which performs a gas plasma treatment on channel regions defined in the polysilicon thin film layer after the polysilicon thin film layer is formed on a substrate. Threshold voltages for polysilicon thin film transistors formed subsequently are thus... Agent: Venable LLP

20090127559 - Organic luminescent display device having a semiconductor with an amorphous silicon layer: A display device includes a plurality of light emitting elements arranged in a matrix. A scan signal is made to flow into a gate signal line and a data signal is made to flow into a source signal line so that the data signal is applied to a source electrode... Agent: Arent Fox LLP

20090127556 - Semiconductor device having light emitting element, integrated circuit and adhesive layer (as amended): To realize a high-performance liquid crystal display device or light-emitting element using a plastic film. A CPU is formed over a first glass substrate and then, separated from the first substrate. A pixel portion having a light-emitting element is formed over a second glass substrate, and then, separated from the... Agent: Fish & Richardson P.C.

20090127560 - Poly-crystalline thin film, thin film transistor formed from a poly-crystalline thin film and methods of manufacturing the same: Example embodiments relate to a poly-crystalline silicon (Si) thin film, a thin film transistor (TFT) formed from a poly-crystalline silicon (Si) thin film and methods of manufacturing the same. The method of manufacturing the poly-crystalline Si thin film includes forming an active layer formed of amorphous Si on a substrate,... Agent: Harness, Dickey & Pierce, P.L.C

20090127561 - Semiconductor device, display device and mobile device: A semiconductor device of the present invention includes an insulating substrate, a nonvolatile memory formed above the insulating substrate and having a memory holding portion, and at least one light-shielding body covering an upper side, an under side, or both sides of the memory holding portion, wherein at least one... Agent: Birch Stewart Kolasch & Birch

20090127562 - Semiconductor device: To realize a semiconductor device including a capacitor element capable of obtaining a sufficient capacitor without reducing an opening ratio, in which a pixel electrode is flattened in order to control a defect in orientation of liquid crystal. A semiconductor device of the present invention includes a light-shielding film formed... Agent: Cook Alex Ltd

20090127563 - Thin film transistor array panel and manufacturing method thereof: According to an embodiment, the method of manufacturing a thin film transistor array panel includes forming a gate wire, a data wire, and a thin film transistor on a substrate and depositing an organic material layer on the gate wire, the data wire, and the thin film transistor. The method... Agent: Haynes And Boone, LLPIPSection

20090127564 - Gan substrate manufacturing method, gan substrate, and semiconductor device: A GaN substrate manufacturing method characterized in including a step of processing the surface of a substrate composed of a GaN single crystal into a concavely spherical form, based on differences in orientation of the crystallographic axis across the substrate surface. Processing the GaN substrate surface into a concavely spherical... Agent: Judge Patent Associates

20090127566 - Method of selectively forming atomically flat plane on diamond surface, diamond substrate produced by the method, and semiconductor device using the same: G

20090127565 - P-n junctions on mosaic diamond substrates: The present invention provides methods of making and using semiconductive single crystal diamond bodies, including semiconductive diamond bodies made by such methods. In one aspect, a method of making a semiconductive single crystal diamond layer may include placing a plurality of diamond segments in close proximity under high pressure in... Agent: Thorpe North & Western, LLP.

20090127567 - Led chip thermal management and fabrication methods: The present invention relates to a method of fabricating a high power light-emitting device using an electrolessly or electrolytically plated metal composite heat dissipation substrate having a high thermal conductivity and a thermal expansion coefficient matching with the device.... Agent: Kauth , Pomeroy , Peck & Bailey ,llp

20090127568 - Semiconductor light emitting element and method for fabricating the same: A semiconductor light emitting element includes a substrate 11 having a defect concentrated region 11a which has a crystal defect density higher than in the other region. On the substrate 11, a semiconductor layer 12 is formed. On the defect concentrated region 11a, a first electrode 13 is formed. On... Agent: Mcdermott Will & Emery LLP

20090127569 - Semiconductor light emitting module and image reader using the same: A semiconductor light emitting module is provided with a supporting conductor including a die bonding pad, and with a plurality of semiconductor light emitting elements bonded to the die bonding pad. The semiconductor light emitting elements are arranged in series along an arrangement line extending in a first direction. The... Agent: Hamre, Schumann, Mueller & Larson, P.C.

20090127570 - Double wavelength semiconductor light emitting device and method of manufacturing the same: Semiconductor lasers D1 and D2 as two light emitting elements having different wavelengths are integrally formed on a common substrate 1. A semiconductor laminate A is deposited on an n-type contact layer 21 in a semiconductor laser D1, and a semiconductor laminate B is deposited in a semiconductor laser D2.... Agent: Rabin & Berdo, PC

20090127571 - Method for fabricating semiconductor layer and light-emitting diode: A semiconductor layer containing defects only in a small density, possessing good quality and exhibiting a large ionic bonding property as to GaN, for example, is formed on a semiconductor layer, such as a silicon carbide layer, which is made of a material possessing a small ionicity and exhibiting a... Agent: Sughrue Mion, PLLC

20090127572 - Nitride semiconductor light emitting device: There is provided a nitride semiconductor light emitting device capable of inhibiting output deterioration of light emission caused by quality deterioration of a nitride semiconductor layer due to lattice-mismatching between a substrate and the nitride semiconductor layer, and utilizing light traveling to the substrate efficiently, while forming a light emitting... Agent: Rabin & Berdo, PC

20090127578 - Light-emitting diode: A light-emitting diode (10) has a main light-extracting surface and includes a compound semiconductor layer (13) including semiconductor layers (130 to 135), a light-emitting part (12) contained in the compound semiconductor layer, a light-emitting layer (133) contained in the light-emitting part, a transparent substrate (14) joined to the compound semiconductor... Agent: Sughrue Mion, PLLC

20090127575 - Light-emitting diode chip with high light extraction and method for manufacturing the same: This invention provides a light-emitting diode chip with high light extraction, which includes a substrate, an epitaxial-layer structure for generating light by electric-optical effect, a transparent reflective layer sandwiched between the substrate and the epitaxial-layer structure, and a pair of electrodes for providing power supply to the epitaxial-layer structure. A... Agent: Haynes And Boone, LLPIPSection

20090127576 - Nanocrystal light-emitting diode: A nanocrystal light-emitting diode with improved structural stability is disclosed. Specifically, the nanocrystal light-emitting diode comprises an excitation source, a nanocrystal-containing light conversion layer and an air layer formed therebetween to be exposed to the outside.... Agent: Cantor Colburn, LLP

20090127577 - Optical waveguide device production method, optical waveguide device produced by the method, and optical waveguide connection structure to be used for the device: An optical waveguide device production method which ensures that a receptacle structure can be easily and highly accurately produced in a single step, an optical waveguide device produced by the method, and an optical waveguide connection structure to be used for the optical waveguide device. The optical waveguide device includes... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090127573 - Optoelectronic component with a wireless contacting: An optoelectronic component contains a semiconductor chip (1) and a carrier body (10), which are provided with a transparent, electrically insulating encapsulation layer (3), the encapsulation layer (3) having two cutouts (11, 12) for uncovering a contact area (6) and a connection region (8) of the carrier body, and an... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20090127574 - Semiconductor structure and method of manufacturing a semiconductor structure: A semiconductor structure is formed of nitrides of group III metals having wurtzite crystal structure and grown in vapor phase on a (0001) oriented semiconductor substrate. The structure comprises a bottom cladding layer, a top cladding layer, and a diffusion region positioned between the cladding layers for diffusing light propagating... Agent: Fay Sharpe LLP

20090127580 - Luminescence diode chip with current spreading layer and method for producing the same: An LED chip is specified that comprises at least one current barrier. The current barrier is suitable for selectively preventing or reducing, by means of a reduced current density, the generation of radiation in a region laterally covered by the electrical connector body. The current spreading layer contains at least... Agent: Fish & Richardson PC

20090127579 - Optoelectronic device: An optoelectronic device includes a base, a first and a second stands mounted on the base, a chip mounted on the first stand, a copper wire for bonding the chip to the second stand, and a molding compound mounted on the base. The molding compound encapsulates the first and the... Agent: North America Intellectual Property Corporation

20090127581 - Nitride-based light-emitting device: A nitride-based light-emitting device includes a substrate and a plurality of layers formed over the substrate in the following sequence: a nitride-based buffer layer formed by nitrogen, a first group III element, and optionally, a second group III element, a first nitride-based semiconductor layer, a light-emitting layer, and a second... Agent: North America Intellectual Property Corporation

20090127582 - Semiconductor apparatus including a radiator for diffusing the heat generated therein: A semiconductor apparatus is provided that includes a radiator for efficiently radiating heat generated in a wiring layer used in a surge current path of an electrostatic discharge protection circuit, and also for protecting the wiring layer itself used as the surge current path. The semiconductor apparatus includes an input... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090127583 - Semiconductor device and method of manufacturing the same: Provided is a semiconductor device containing a silicon single crystal substrate 101, a silicon carbide layer 102 provided on a surface of the substrate, a Group III nitride semiconductor junction layer 103 provided in contact with the silicon carbide layer, and a superlattice-structured layer 104 constituted by Group III nitride... Agent: Sughrue Mion, PLLC

20090127584 - Transistor with a germanium-based channel encased by a gate electrode and method for producing one such transistor: Source and drain electrodes are each formed by an alternation of first and second layers made from a germanium and silicon compound. The first layers have a germanium concentration comprised between 0% and 10% and the second layers have a germanium concentration comprised between 10% and 50%. At least one... Agent: Oliff & Berridge, PLC

20090127585 - Integration of an npn device with phosphorus emitter and controlled emitter-base junction depth in a bicmos process: According to one exemplary embodiment, a heterojunction bipolar transistor includes a base situated on a substrate. The heterojunction bipolar transistor can be an NPN silicon-germanium heterojunction bipolar transistor, for example. The heterojunction bipolar transistor further includes a cap layer situated on the base, where the cap layer includes a barrier... Agent: Michael Farjami, Esq. Farjami & Farjami LLP

20090127586 - Integrated circuit having memory cells and method of manufacture: An integrated circuit having memory cells and a method of manufacture is disclosed. One embodiment provides a switching active volume and a selection transistor coupled in series between a first electrode and a second electrode. The selection transistor is a vertical transistor for at least partially guiding a substantially vertical... Agent: Dicke, Billig & Czaja

20090127587 - Tunable antifuse elements: A tunable antifuse element (102, 202, 204, 504, 952) includes a substrate material (101) having an active area (106) formed in a surface, a gate electrode (104) having at least a portion positioned above the active area (106), and a dielectric layer (110) disposed between the gate electrode (104) and... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20090127588 - Patterning techniques: A method of forming a patterned layer, including the steps of: (i) depositing via a liquid medium a first material onto a substrate to form a first body on said substrate; (ii) depositing via a liquid medium a second material onto said substrate to form a second body, wherein said... Agent: Sughrue Mion, PLLC

20090127589 - Methods and apparatus for measuring analytes using large scale fet arrays: Methods and apparatus relating to very large scale FET arrays for analyte measurements. ChemFET (e.g., ISFET) arrays may be fabricated using conventional CMOS processing techniques based on improved FET pixel and array designs that increase measurement sensitivity and accuracy, and at the same time facilitate significantly small pixel sizes and... Agent: Wolf Greenfield & Sacks, P.C.

20090127590 - Micro electro mechanical device, method for manufacturing the same, semiconductor device, and method for manufacturing the same: A micro electro mechanical device includes: a semiconductor layer; a source/drain region formed on both sides of a channel region within the semiconductor layer; a gate insulating film formed on the semiconductor layer; a cavity formed on the gate insulating film; and a gate electrode formed on the cavity, the... Agent: Oliff & Berridge, PLC

20090127591 - Semiconductor substrate, semiconductor device, and manufacturing method thereof: Manufacturing a semiconductor device with higher operating characteristics and achieve low power consumption of a semiconductor integrated circuit. A single crystal semiconductor layer is formed so that crystal plane directions of single crystal semiconductor layers which are used for channel regions of an n-channel TFT and a p-channel TFT and... Agent: Eric Robinson

20090127592 - Fin-jfet: Methods, devices, and systems integrating Fin-JFETs and Fin-MOSFETs are provided. One method embodiment includes forming at least on Fin-MOSFET on a substrate and forming at least on Fin-JFET on the substrate.... Agent: Brooks, Cameron & Huebsch , PLLC

20090127593 - Mos device: A semiconductor device includes a drain, an epitaxial layer overlaying the drain, a body disposed in the epitaxial layer, a source embedded in the body, a gate trench extending into the epitaxial layer, a gate disposed in the gate trench, an active region contact trench extending through the source, the... Agent: Van Pelt, Yi & James LLP

20090127594 - Mos transistors having niptsi contact layers and methods for fabricating the same: MOS transistors and methods for fabricating MOS transistors are provided. One exemplary method comprises providing a silicon substrate having an impurity-doped region disposed at a surface of the silicon substrate. A first layer is sputter-deposited onto the impurity-doped region using a first sputtering target comprising nickel and a first concentration... Agent: Ingrassia Fisher & Lorenz, P.C. (amd)

20090127596 - Photomask, semiconductor device, and method for manufacturing semiconductor device: A photomask includes a light-blocking section that blocks light and also includes a light intensity difference section that controls the intensity of light. The light-blocking section is disposed between the light intensity difference section and a light-transmissive region transmitting light.... Agent: Oliff & Berridge, PLC

20090127595 - Semiconductor structure with field shield and method of forming the structure: Disclosed is semiconductor structure that incorporates a field shield below a semiconductor device (e.g., a field effect transistor (FET) or a diode). The field shield is sandwiched between upper and lower isolation layers on a wafer. A local interconnect extends through the upper isolation layer and connects the field shield... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20090127600 - Image sensor and fabricating method thereof: An image sensor and fabricating method thereof are disclosed by which damage to a protective layer can be prevented in a manner of reducing thermal stress of an uppermost metal line in performing thermal treatment for enhancing the dark characteristic. Such damage can be prevented by forming a poly layer... Agent: Sherr & Vaughn, PLLC

20090127598 - Image sensor and method of fabricating the same: An image sensor includes a semiconductor substrate, a photodiode formed in the semiconductor substrate, a first impurity region formed in the semiconductor substrate spaced from the photodiode, a second impurity region formed in the semiconductor substrate spaced from the first impurity region, a first gate formed over the semiconductor substrate... Agent: Sherr & Vaughn, PLLC

20090127599 - Image sensor and method of manufacturing the same: Provided is an image sensor. The image sensor includes a semiconductor substrate, an interlayer dielectric, metal interconnections, a first electrode, a lower electrode, a second electrode, and a photodiode. The semiconductor substrate has at least one transistor thereon. The interlayer dielectric is on the semiconductor substrate. The metal interconnections pass... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20090127597 - Photodiode structure: A photodiode structure including a semiconductor of a first conductivity type, the semiconductor having a main surface, a first well formed in the semiconductor at the main surface thereof, the first well being of a second conductivity type opposite to the first conductivity type. A second well formed in the... Agent: Slater & Matsil LLP

20090127601 - Image sensor and method for manufacturing the same: An image sensor may include a device isolating layer and a photodiode on a substrate; a first dielectric layer on the photodiode; a first micro lens on the first dielectric layer; a second dielectric layer on the first micro lens; a color filter on the second dielectric layer; and a... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20090127604 - Ferroelectric memory device and method for manufacturing the same: A ferroelectric memory device includes: a substrate; a ferroelectric capacitor forming above the substrate, and having a lower electrode layer, a ferroelectric layer and an upper electrode layer; a first hydrogen barrier layer that covers the ferroelectric capacitor; an interlayer dielectric layer formed above the first hydrogen barrier layer; and... Agent: Harness, Dickey & Pierce, P.L.C

20090127602 - Semiconductor memory device and manufacturing method thereof: This disclosure concerns a memory including transistors provided on a substrate; ferroelectric capacitors provided on the transistors, the ferroelectric capacitors respectively including a ferroelectric film provided between a lower electrode and an upper electrode; and a barrier film covering a first side surface of the ferroelectric capacitor, and blocking passing... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090127603 - Semiconductor memory device and manufacturing method thereof: A semiconductor memory device according to an embodiment comprises: a field-effect transistor formed on a substrate; an interlayer insulation film formed on the substrate on which the field-effect transistor is formed; and a ferroelectric capacitor including a lower electrode connected via a plug to one of source/drain regions of the... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090127605 - Semiconductor device and method for manufacturing the same: A semiconductor device includes: n transistor elements; n resistive elements; and n capacitive elements, each kind of elements coupled in series between the first and second terminals. The gate of each transistor element has a gate pad, and each transistor element includes transistor pads disposed on both sides. Each resistive... Agent: Posz Law Group, PLC

20090127607 - Semiconductor device including a tcam having a storage element formed with a dram: In order to improve the discharging speed of potential from a match line, a semiconductor device includes a capacitor, a memory transistor having a source/drain region connected to a storage node of the capacitor, a search transistor having a gate electrode connected to the storage node, and a stacked contact... Agent: Mcdermott Will & Emery LLP

20090127606 - Semiconductor integrated circuit device: A driving circuit and a bus to transmit an output signal from the driving circuit are provided. The driving circuit includes a first P-channel transistor, a second P-channel transistor, an N-channel transistor and a capacitor. The first P-channel transistor includes a drain, a source to connect with a higher potential... Agent: SprinkleIPLaw Group

20090127608 - Integrated circuit and method of manufacturing an integrated circuit: An integrated circuit including a memory cell array is shown. The memory cell array comprises word lines extending in a first direction and bit lines extending in a second direction intersecting the first direction and memory cells. The memory cells may include storage elements, bit line contacts for coupling a... Agent: Thomas G. Eschweiler, Esq. Eschweiler & Associates, LLC

20090127609 - Method of fabricating recess channel transistor having locally thick dielectrics and related devices: Provided are a method of fabricating a recess channel transistor and a related semiconductor device. The method may include forming a first gate trench on a substrate, forming a dielectric spacer on a sidewall of the first gate trench, forming a second gate trench on the substrate under the first... Agent: Harness, Dickey & Pierce, P.L.C

20090127610 - Non-volatile memory and the manufacturing method thereof: A non-volatile memory disposed on a substrate includes active regions, a memory array, and contacts. The active regions defined by isolation structures disposed in the substrate are extended in a first direction. The memory array is disposed on the substrate and includes memory cell columns, control gate lines and select... Agent: Jianq Chyun Intellectual Property Office

20090127611 - Non-volatile memory device and memory card and system including the same: A non-volatile memory device includes a semiconductor layer including source and drain regions and a channel region between the source and drain regions; a tunneling insulating layer on the channel region of the semiconductor layer; a charge storage layer on the tunneling insulating layer; a blocking insulating layer on the... Agent: Myers Bigel Sibley & Sajovec

20090127613 - Nonvolatile semiconductor memory device and method of manufacturing the same: A nonvolatile semiconductor memory device comprises a memory cell array of plural memory cells arranged in matrix. Each memory cell includes a first gate insulator layer formed on a semiconductor substrate, a floating gate formed on the semiconductor substrate with the first gate insulator layer interposed therebetween, a second gate... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090127612 - Semiconductor device having a gate structure: A gate structure in a semiconductor device includes a dielectric layer pattern on a substrate, a floating gate on the dielectric layer pattern, a gate mask on the floating gate, a tunnel insulation layer on the substrate, and a word line on the tunnel insulation layer. The dielectric layer pattern... Agent: F. Chau & Associates, LLC

20090127614 - Scalable multi-functional and multi-level nano-crystal non-volatile memory device: A multi-functional and multi-level memory cell is comprised of a tunnel layer formed over a substrate. In one embodiment, the tunnel layer is comprised of two layers such as HfO2 and LaAlO3. A charge blocking layer is formed over the tunnel layer. In one embodiment, this layer is formed from... Agent: Leffert Jay & Polglaze, P.A.

20090127618 - Multi-fin field effect transistor: A multi-fin field effect transistor includes a substrate, an oxide layer, a conductive layer, a gate oxide layer, and a doped region. The substrate is surrounded by a trench, and there are at least two fin-type silicon layers formed in the substrate in a region prepared to form a gate... Agent: Jianq Chyun Intellectual Property Office

20090127616 - Power semiconductor device and method for manufacturing same: A vertical power semiconductor device includes a first semiconductor layer of a first conductivity type formed in both a cell section and a termination section, the termination section surrounding the cell section, a second semiconductor layer of a second conductivity type formed on the first semiconductor layer in the cell... Agent: Patterson & Sheridan, L.L.P.

20090127615 - Semiconductor device and method for manufacture: A semiconductor device is formed by forming a second trench 120 at the base of a first trench 18, depositing insulator 124 at the base of the second trench 120, and then etching cavities 26 laterally from the sidewalls of the second trench, but not the base which is protected... Agent: Nxp, B.v. Nxp Intellectual Property Department

20090127617 - Trench mosfet and manufacturing method thereof: This invention relates to a trench MOSFET, which can lower parasitic capacitance, thereby increasing a switching speed, and to a method of manufacturing the trench MOSFET. The trench MOSFET includes a substrate having an epi layer and a body layer sequentially formed thereon, a trench formed vertically in the central... Agent: Morgan Lewis & Bockius LLP

20090127619 - Deep trench semiconductor structure and method: An electrical structure and method of forming. The electrical structure includes a semiconductor substrate comprising a deep trench, an oxide liner layer is formed over an exterior surface of the deep trench, and a field effect transistor (FET) formed within the semiconductor substrate. The first FET includes a source structure,... Agent: Schmeiser, Olsen & Watts

20090127620 - Semiconductor doping with reduced gate edge diode leakage: Semiconductor doping techniques, along with related methods and structures, are disclosed that produce components having a more tightly controlled source and drain extension region dopant profiles without significantly inducing gate edge diode leakage. The technique follows the discovery that carbon, which may be used as a diffusion suppressant for dopants... Agent: Texas Instruments Incorporated

20090127623 - Semiconductor device and method for manufacturing semiconductor device: In a semiconductor device, a gate electrode, an impurity diffused region, a body potential fixing region, a first insulator, and a dummy gate electrode are provided on top of an SOI substrate consisting of an underlying silicon substrate, a buried insulator, and a semiconductor layer. The impurity diffused region is... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090127622 - Transparent thin-film transistor and manufacturing method of the transistor: A transparent thin-film transistor and a method of manufacturing the same includes a substrate composed of a transparent material, and a gate electrode, a gate dielectric layer, an activation layer, and source and drain electrodes, at least one of each being composed of an amorphous oxide material.... Agent: Sherr & Vaughn, PLLC

20090127621 - Zero capacitor ram with reliable drain voltage application and method for manufacturing the same: The following discloses and describes a zero capacitor RAM as well as a method for manufacturing the same. The zero capacitor RAM includes an SOI substrate. This SOI substrate is composed of a stacked structure of a silicon substrate, an embedded insulation film and a silicon layer. This layer is... Agent: Ladas & Parry LLP

20090127624 - Semiconductor device having soi substrate and method for manufacturing the same: A semiconductor device includes: a SOI substrate including a support layer, a first insulation film and a SOI layer; a first circuit; a second circuit; and a trench separation element. The SOI substrate further includes a first region and a second region. The first region has the support layer, the... Agent: Posz Law Group, PLC

20090127625 - Semiconductor device: A semiconductor device according to one embodiment includes: a substrate; a plurality of fins made of a semiconductor and formed on the substrate; a plurality of via contact regions formed between the fins, the plurality of via contact regions and the plurality of the fins constituting a closed loop structure;... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090127626 - Stress-generating shallow trench isolation structure having dual composition: A shallow trench isolation structure containing a first shallow trench isolation portion comprising the first shallow trench material and a second shallow trench isolation portion comprising the second shallow trench material is provided. A first biaxial stress on at least one first active area and a second bidirectional stress on... Agent: Scully, Scott, Murphy & Presser, P.C.

20090127628 - Product and method for integration of deep trench mesh and structures under a bond pad: A structure includes a substrate. A trench structure is arranged within the substrate. A film is placed under an interlevel dielectric pad and between portions of the trench structure.... Agent: Greenblum & Bernstein, P.L.C

20090127627 - Semiconductor device and manufacturing method of the same: A semiconductor device capable of improving the driving power and a manufacturing method therefor are provided. In a semiconductor device, a gate structure formed by successively stacking a gate oxide film and a silicon layer is arranged over a semiconductor substrate. An oxide film is arranged long the lateral side... Agent: Miles & Stockbridge PC

20090127630 - Method for fabricating isolated integrated semiconductor structures: An integrated semiconductor structure and a method for fabricating an integrated semiconductor structure in a bulk semiconductor wafer.... Agent: Texas Instruments Incorporated

20090127629 - Method of forming npn and pnp bipolar transistors in a cmos process flow that allows the collectors of the bipolar transistors to be biased differently than the substrate material: NPN and PNP bipolar junction transistors are formed in a semiconductor substrate material in a double polysilicon CMOS process flow in a manner that allows the collectors of both of the npn and pnp bipolar transistors to be biased differently than the bias that is placed on the semiconductor substrate... Agent: Law Office Of Mark C. Pickering

20090127631 - Semiconductor device having element isolation region and method for manufacture thereof: An n-type buried diffusion layer is formed on the surface layer of the prescribed area of a p-type silicon substrate, and a p-type first high-concentration isolation diffusion layer is formed in the silicon substrate so as to surround the buried diffusion layer. An n-type epitaxial layer is formed on the... Agent: Mcdermott Will & Emery LLP

20090127632 - Semiconductor device manufactured by removing sidewalls during replacement gate integration scheme: One aspect of the invention provides a semiconductor device that includes gate electrodes comprising a metal or metal alloy located over a semiconductor substrate, wherein the gate electrodes are free of spacer sidewalls. The device further includes source/drains having source/drain extensions associated therewith, located in the semiconductor substrate and adjacent... Agent: Texas Instruments Incorporated

20090127633 - Non-volatile memory devices and methods of forming the same: In one embodiment, a semiconductor memory device includes a substrate having first and second active regions. The first active region includes a first source and drain regions and the second active region includes a second source and drain regions. A first interlayer dielectric is located over the substrate. A first... Agent: Marger Johnson & Mccollom, P.C.

20090127634 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a semiconductor substrate having an active region, a plurality of gate electrodes formed on the active region with a gate insulating film therebetween, and a dummy pattern formed on the active region in at least a part thereof between the gate electrodes. The dummy pattern is... Agent: Sonnenschein Nath & Rosenthal LLP

20090127635 - Transistor including an active region and methods for fabricating the same: A transistor including an active region and methods thereof. The active region may include corners with at least one of a rectangular, curved or rounded shape. The methods may include isotropically etching at least a portion of the active region such that the portion includes a desired shape.... Agent: Harness, Dickey & Pierce, P.L.C

20090127636 - Diffusion variability control and transistor device sizing using threshold voltage implant: A transistor is defined to include a substrate portion and a diffusion region defined in the substrate portion so as to provide an operable transistor threshold voltage. An implant region is defined within a portion of the diffusion region so as to transform the operable transistor threshold voltage of the... Agent: Martine Penilla & Gencarella, LLP

20090127637 - Semiconductor device and method of manufacturing the same: The HVIC includes a dielectric layer and an SOI active layer stacked on a silicon substrate, a transistor formed in the surface of the SOI active layer, and a trench isolation region formed around the transistor. The dielectric layer includes a first buried oxide film formed in the surface of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090127638 - Electrical device and method: An electrical device and method is disclosed. One embodiment provides a substrate, a sensor chip disposed completely above a plane section of a surface of the substrate. A structurally homogeneous material layer is disposed above the substrate and the sensor chip. A cavity is formed between the substrate and the... Agent: Dicke, Billig & Czaja

20090127639 - Semiconductor apparatus: A semiconductor apparatus includes: a first chip including a MEMS device which has a structure supported in midair therein, and having first pads and a first joining region electrically connected to the MEMS device on a top face thereof; a second chip including a circuit having a semiconductor device electrically... Agent: Amin, Turocy & Calvin, LLP

20090127640 - Method for manufacturing a semiconductor component, as well as a semiconductor component, in particular a membrane sensor: A manufacturing method for a micromechanical semiconductor element includes providing on a semiconductor substrate a patterned stabilizing element having at least one opening. The opening is arranged such that it allows access to a first region in the semiconductor substrate, the first region having a first doping. Furthermore, a selective... Agent: Kenyon & Kenyon LLP

20090127641 - Semiconductor device: The invention provides a semiconductor device that power is stabilized by suppressing power consumption as much as possible. The semiconductor device of the invention includes a logic portion and a memory portion each including a plurality of transistors, a detecting portion for detecting one or both of operation frequencies of... Agent: Fish & Richardson P.C.

20090127642 - Photoelectric surface, electron tube comprising same, and method for producing photoelectric surface: A photoelectric element 10 includes a substrate 12 that transmits incident light, an intermediate layer 14 made of HfO2, an under layer 16, and a photoelectron emitting layer 18 containing an alkali metal. That is, the photoelectric element 10 includes the intermediate layer 14 formed between the substrate 12 and... Agent: Drinker Biddle & Reath (dc)

20090127646 - Image sensor and method of manufacturing the same: An image sensor and a manufacturing method thereof are provided. The image sensor can include a semiconductor substrate having a photodiode, an interlayer dielectric layer on the semiconductor substrate, and an upper insulating layer on the interlayer dielectric layer. A trench can be provided in the upper insulating layer and... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20090127645 - In-line light sensor: The sensor includes an optical waveguide defined in a light-transmitting medium. The waveguide includes a sensing portion and an non-sensing portion. The light-transmitting medium included in the sensing portion has defects that provide the light-transmitting medium with a deep band gap level between a valence band of the light-transmitting medium... Agent: Attn: Travis Dodd Gavrilovich, Dodd & Lindsey, LLP

20090127643 - Photodiode of an image sensor and fabricating method thereof: A method for fabricating a photodiode of an image sensor includes providing a substrate having a first conductive type and photo sensing regions, respectively forming photodiodes in the photo sensing region, and performing an ion implantation to form an implanted reflective layer having a second conductive type under the plurality... Agent: North America Intellectual Property Corporation

20090127644 - Semiconductor device comprising an image sensor, apparatus comprising such a semiconductor device and method of manufacturing such a semiconductor device: According to the invention the spacer structure is an open structure allowing the atmosphere above the optically active part of the image sensor to contact the atmosphere outside the spacer structure. The spacer structure may comprise a ring provided with at least one interruption and positioned around the optically active... Agent: Fisher Technology Law

20090127647 - Semiconductor device, solid-state imaging device, and method of manufacturing semiconductor device: A semiconductor device includes: a semiconductor substrate; an insulating layer; and a wiring layer that is a high-concentration impurity layer, in this order, wherein the semiconductor device further includes a contact portion that electrically connects the semiconductor substrate with the wiring layer, the contact portion is provided to pass through... Agent: Birch Stewart Kolasch & Birch

20090127648 - Hybrid gap-fill approach for sti formation: A method of forming a shallow trench isolation region is provided. The method includes providing a semiconductor substrate comprising a top surface; forming an opening extending from the top surface into the semiconductor substrate; performing a first deposition step to fill a first dielectric material into the opening using a... Agent: Slater & Matsil, L.L.P.

20090127651 - Robust shallow trench isolation structures and a method for forming shallow trench isolation structures: In a semiconductor substrate, a shallow trench isolation structure having a dielectric material disposed in voids of a trench-fill material and a method for forming the shallow trench isolation structure. The voids may be formed during a wet clean process after the dielectric material is formed in the trench. A... Agent: Hitt Gaines, PC Lsi Corporation

20090127649 - Semiconductor device and method for fabricating the same: According to the present invention, a semiconductor device includes a semiconductor layer; a device-isolation region formed in the semiconductor layer; an active region surrounded by the device isolation region; and a gap, formed at boundary between the device isolation region and the active region. The gap is not formed under... Agent: Rabin & Berdo, PC

20090127650 - Trench isolation structure in a semiconductor device and method for fabricating the same: A trench isolation structure in a semiconductor device is provided. A semiconductor substrate has cell regions and peripheral circuit regions. First trenches have a predetermined depth and are formed in the semiconductor substrate at the cell regions. A first sidewall oxide film is formed overlying the first trenches. A first... Agent: Townsend And Townsend And Crew, LLP

20090127652 - Structure of very high insertion loss of the substrate noise decoupling: A structure includes a substrate comprising a region having a circuit or device which is sensitive to electrical noise. Additionally, the structure includes a first isolation structure extending through an entire thickness of the substrate and surrounding the region and a second isolation structure extending through the entire thickness of... Agent: Greenblum & Bernstein, P.L.C

20090127653 - Phase-change random access memory device and method of manufacturing the same: A method of manufacturing a phase-change random access memory device includes forming an interlayer insulating film on a semiconductor substrate, on which a bottom structure is formed, and patterning the interlayer insulating film to form a contact hole, forming a spacer on the side wall of the contact hole; forming... Agent: Baker & Mckenzie LLP Patent Department

20090127654 - Fully differential, high q, on-chip, impedance matching section: An inductor circuit is disclosed. The inductor circuit includes a first in-silicon inductor and a second in-silicon inductor each having multiple turns. A portion of the multiple turns of the second in-silicon inductor is formed between turns of the first in-silicon inductor. The first and second in-silicon inductors are configured... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20090127655 - Capacitor for semiconductor device and method for fabricating the same: A capacitor for the semiconductor device may include a bottom electrode formed over a semiconductor substrate, a dielectric film pattern formed over the bottom electrode, an insulating member formed over a peripheral portion of the top surface of the dielectric film pattern, and a top electrode formed over the insulating... Agent: Sherr & Vaughn, PLLC

20090127656 - Dielectric relaxation memory: A capacitor structure having a dielectric layer disposed between two conductive electrodes, wherein the dielectric layer contains at least one charge trap site corresponding to a specific energy state. The energy states may be used to distinguish memory states for the capacitor structure, allowing the invention to be used as... Agent: Dickstein Shapiro LLP

20090127657 - Semiconductor device and method of manufacturing the same: There is provided a semiconductor device which comprises a first interlayer insulating film (first insulating film) formed over a silicon (semiconductor) substrate, a capacitor formed on the first interlayer insulating film and having a lower electrode, a dielectric film, and an upper electrode, a fourth interlayer insulating film (second insulating... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090127658 - Resistor in an integrated circuit: A resistive element having two vertical resistive portions placed in two holes formed in the upper portion of a substrate and a horizontal resistive portion placed in a buried cavity connecting the bottoms of the holes.... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20090127659 - Bipolar junction transistor with a low collector resistance and method of forming the bipolar junction transistor in a cmos process flow: The collector resistance of a bipolar junction transistor that is formed in a CMOS process is substantially reduced by forming a heavily-doped collector extension region that extends from a heavily-doped collector contact region down to a deep well of the same conductivity type to a point that lies close to... Agent: Law Office Of Mark C. Pickering

20090127660 - Structure and method for forming a guard ring to protect a control device in a power semiconductor ic: Provided is a power semiconductor device including a guard ring region to protect control devices. The power semiconductor device includes a semiconductor body layer extending over a semiconductor substrate of a first conductivity type. The semiconductor body layer has a second conductivity type opposite the first conductivity type. A well... Agent: Townsend And Townsend And Crew, LLP

20090127661 - Nitride semiconductor device and method of manufacturing the same: Semiconductor devices, in particular nitride semiconductor devices for use in the manufacture of laser diodes, prevent peeling-off of the electrode, and at the same time reduces the complexity of processes and a reduction in yield. A nitride semiconductor device according to the invention includes a P-type nitride semiconductor layer with... Agent: Leydig Voit & Mayer, Ltd

20090127664 - Group iii nitride semiconductor crystal growing method, group iii nitride semiconductor crystal substrate fabrication method, and group iii nitride semiconductor crystal substrate: A growing method of a group III nitride semiconductor crystal includes the steps of preparing an underlying substrate, and growing a first group III nitride semiconductor crystal doped with silicon by using silicon tetrachloride (SiCl4) gas as doping gas, on the underlying substrate by vapor phase growth. The growth rate... Agent: Drinker Biddle & Reath (dc)

20090127663 - Group iii nitride semiconductor crystal growing method, group iii nitride semiconductor crystal substrate fabrication method, and group iii nitride semiconductor crystal substrate: A growing method of a group III nitride semiconductor crystal includes the steps of preparing an underlying substrate, and growing a group III nitride semiconductor crystal doped with silicon by using silicon tetrafluoride gas as doping gas, on the underlying substrate by vapor phase growth.... Agent: Drinker Biddle & Reath (dc)

20090127662 - Group iii nitride semiconductor crystal substrate and semiconductor device: A group III nitride semiconductor crystal substrate has a diameter of at least 25 mm and not more than 160 mm. The resistivity of the group III nitride semiconductor crystal substrate is at least 1×10−4 Ω·m and not more than 0.1 Ω·cm. The resistivity distribution in the diameter direction of... Agent: Drinker Biddle & Reath (dc)

20090127665 - Semiconductor device and manufacturing method thereof: A method for manufacturing a semiconductor device has preparation step of preparing a semiconductor substrate having a plurality of semiconductor chip formation regions and a scribe region arranged between the plurality of the semiconductor chip formation regions and including a substrate cutting position, a semiconductor chip formation step of forming... Agent: Rankin, Hill & Clark LLP

20090127666 - Semiconductor device, method of manufacturing the same, and phase shift mask: A main wall part is provided so as to surround an integrated circuit part. A sub-wall part which is in “L” shape is provided between each corner of the main wall part and the integrated circuit part. Therefore, even if the stress is concentrated due to heat treatment or the... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090127667 - Semiconductor chip device having through-silicon-via (tsv) and its fabrication method: A semiconductor device with TSV and its fabrication method are revealed. The semiconductor device primarily comprises a chip and a flexible metal wire inside. A redistributed trace layer and a passivation layer are formed on the active surface of the chip. A through hole penetrates the chip from the active... Agent: Joe Mckinney Muncy

20090127668 - Stacked semiconductor device and method of forming serial path thereof: A stacked semiconductor device and a method of forming a serial path of the stacked semiconductor device are provided. The stacked semiconductor device includes a plurality of chips each having a first internal circuit for receiving an input signal, performing a designated operation and outputting an output signal. Each of... Agent: Myers Bigel Sibley & Sajovec

20090127669 - Method for forming interlayer dielectric film, interlayer dielectric film, semiconductor device and semiconductor manufacturing apparatus: A method for forming an interlayer dielectric film by a plasma CVD method, including turning off a radio frequency power and purging with an inert gas simultaneously.... Agent: Sughrue Mion, PLLC

20090127670 - Semiconductor device, method for manufacturing the same and mask pattern for manufacturing the same: A semiconductor device includes: a semiconductor substrate; and an insulating layer formed on at least a main surface of the semiconductor substrate; wherein a contact hole is formed at the insulating layer so as to expose the main surface of the semiconductor substrate through the insulating layer so that a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090127671 - Method for forming a gate insulating layer of a semiconductor device: Embodiments relate to a method for forming a gate insulating layer, which may include forming a device isolation layer being divided into a device active region and a device isolation region, growing a first oxide layer at an entire surface of the semiconductor substrate as a gate insulating layer, performing... Agent: Sherr & Vaughn, PLLC

20090127672 - Susceptor for epitaxial layer forming apparatus, epitaxial layer forming apparatus, epitaxial wafer, and method of manufacturing epitaxial wafer: A susceptor for epitaxial layer forming apparatus provided in a layer forming chamber of an epitaxial layer forming apparatus includes: a recessed portion which is provided to accommodate a semiconductor wafer therein and has an approximately circular shape in plan view; and a protruding portion which is provided in the... Agent: Greenblum & Bernstein, P.L.C

20090127673 - Method for producing semi-conducting devices and devices obtained with this method: A semi-conducting device has at least one layer doped with a doping agent and a layer of another type deposited on the doped layer in a single reaction chamber. An operation for avoiding the contamination of the other layer by the doping agent separates the steps of depositing each of... Agent: Pearne & Gordon LLP

20090127674 - Multilayer dielectric substrate and semiconductor package: A multilayer dielectric substrate that mounts a semiconductor device in a cavity formed on a substrate. The multilayer dielectric substrate includes an opening formed in a surface-layer grounding conductor on the substrate in the cavity, and an impedance transformer, with a length of about ¼ of an in-substrate effective wavelength... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090127675 - Semiconductor package: A semiconductor package includes a base substrate on which semiconductor elements are disposed; a covering member which is provided to the base substrate, which covers the semiconductor elements, and which includes an opening at an end thereof at the side of the base substrate; and a connector substrate which is... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090127676 - Back to back die assembly for semiconductor devices: Back to back die assemblies used in semiconductor devices and methods for making such devices are described. The die assemblies are made by stacking two dies together so that the back of one die (that does not contain any active electronic components) is attached to the back of another die.... Agent: Kenneth E. Horton Kirton & Mcconkle

20090127677 - Multi-terminal package assembly for semiconductor devices: Semiconductor packages that contain leads with multiple terminals are described. The leads have a side terminal that can extend between a top terminal and a bottom terminal. The multiple terminals in the leads allow the semiconductor package to be connected to more than one external substrate and give the package... Agent: Kirton & Mcconkie 1800 Eagle Gate Tower

20090127679 - Pop (package-on-package) device encapsulating soldered joints between externals leads: A POP (Package-On-Package) semiconductor device with encapsulating protection of soldered joints between the external leads, primarily comprises a plurality of stacked semiconductor packages and dielectric coating. Each semiconductor package includes at least a chip, a plurality of external leads of leadframe, and an encapsulant where the external leads are exposed... Agent: Joe Mckinney Muncy

20090127678 - Stacked assembly of semiconductor packages with fastening lead-cut ends of leadframe: A stacked assembly of semiconductor packages primarily comprises a plurality of stacked semiconductor packages. Each semiconductor package includes an encapsulant, at least a chip, and a plurality of external leads of a leadframe, where the external leads are exposed and extended from a plurality of sides of the encapsulant. Each... Agent: Joe Mckinney Muncy

20090127680 - Integrated circuit package-in-package system with wire-in-film encapsulant: A multiple encapsulation integrated circuit package-in-package system includes: dicing a top integrated circuit wafer having a bottom encapsulant thereon to form a top integrated circuit die with the bottom encapsulant; positioning internal leadfingers adjacent and connected to a bottom integrated circuit die; pressing the bottom encapsulant on to the bottom... Agent: Law Offices Of Mikio Ishimaru

20090127681 - Semiconductor package and method of fabricating the same: Provided are a semiconductor package and a method of fabricating the same. The semiconductor package includes a first die-pad on which a semiconductor chip is mounted on a bottom surface of the first die-pad, a support plate disposed adjacent to a lateral surface of the first die-pad, a support prop... Agent: Townsend And Townsend And Crew, LLP

20090127682 - Chip package structure and method of fabricating the same: A method of fabricating a chip package structure is provided. A metallic plate having a first surface, a second surface, and a first patterned metallic layer formed on the first surface thereof is provided. A half-etching process is performed to form first recesses on the first surface of the metallic... Agent: J C Patents, Inc.

20090127683 - Integrated circuit package system with insulator: An integrated circuit package system includes: providing a connection array; attaching a base integrated circuit adjacent the connection array; attaching a package integrated circuit over the base integrated circuit; attaching a package die connector to the package integrated circuit and the connection array; and applying a wire-in-film insulator over the... Agent: Law Offices Of Mikio Ishimaru

20090127684 - Leadframe for leadless package: A leadframe for a leadless package comprises a plurality of package areas, a plurality of slots, an insulating layer, and a tape (film). Each package area comprises a plurality of package units, each of which comprises a die pad and a plurality of leads surrounding the die pad. The plurality... Agent: Wpat, PC Intellectual Property Attorneys

20090127685 - Power device packages and methods of fabricating the same: Provided is a power device package including: a substrate including at least one first die attach region; at least one first power semiconductor chip and at least one second power semiconductor chip that are stacked in order on the first die attach region; at least one die attach paddle that... Agent: Townsend And Townsend And Crew, LLP

20090127689 - Microelectronic device packages, stacked microelectronic device packages, and methods for manufacturing microelectronic devices: A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second microelectronic die is attached to the first die on one side, and to a second substrate on the other side. Electrical connections are made between the first die and the... Agent: Perkins Coie LLP Patent-sea

20090127688 - Package-on-package with improved joint reliability: Provided is a package-on-package (POP) having an improved joint reliability. The POP includes a lower package, an upper package that is mounted on the lower package, and a plurality of joint members that electrically connect the lower package to the upper package. The lower package includes a lower substrate and... Agent: Marger Johnson & Mccollom, P.C.

20090127687 - Pop (package-on-package) semiconductor device: A semiconductor device having package-on-package (POP) configuration, primarily comprises a plurality of vertically stacked semiconductor packages and a plurality of electrical connecting components such as solder paste to electrically connect the external terminals of the semiconductor packages such as external leads of leadframes. Each semiconductor package has an encapsulant to... Agent: Joe Mckinney Muncy

20090127686 - Stacking die package structure for semiconductor devices and method of the same: The present invention disclosed a first multi-die package structure for semiconductor devices, the structure comprises a substrate having die receiving window and inter-connecting through holes formed therein; a first level semiconductor die formed under a second level semiconductor die by back-to-back scheme and within the die receiving window, wherein the... Agent: Birch Stewart Kolasch & Birch

20090127690 - Package and manufacturing method for a microelectronic component: The present invention relates to A package (50,70) for a microelectronic component, comprising: a carrier element (12) having a first side (16) that comprises conductor lines (14); —a microelectronic component (20) having a first surface (24) and a second surface (23) facing away from the first surface; the microelectronic component... Agent: Nxp, B.v. Nxp Intellectual Property Department

20090127691 - Semiconductor power module packages with simplified structure and methods of fabricating the same: Provided are semiconductor power module packages, which are structurally simplified by bonding electrodes onto substrates, and methods of fabricating the same. An exemplary package includes a substrate and semiconductor chips disposed on a top surface of the substrate. Electrodes are bonded to the top surface of the substrate and electrically... Agent: Townsend And Townsend And Crew, LLP

20090127692 - Method of connecting a semiconductor package to a printed wiring board: connecting the bump array package to the wiring board by arranging the flat surface comprising said metal bumps and said adhesive film on the wiring board, and heating the adhesive film at a temperature high enough for finishing the setting of said adhesive film and higher than the melting temperature... Agent: 3m Innovative Properties Company

20090127693 - Semiconductor module and image pickup apparatus: In a semiconductor module including multiple semiconductor devices, a signal that flows through a bonding wire connected to one semiconductor device is prevented from acting as noise which affects another semiconductor device, thereby improving the operation reliability of the semiconductor module. A second semiconductor device provided alongside a first semiconductor... Agent: Mcdermott Will & Emery LLP

20090127694 - Semiconductor module and image pickup apparatus: A semiconductor module including multiple semiconductor devices prevents a signal that flows through a bonding wire connected to one semiconductor device from acting as noise which affects the other semiconductor devices, thereby improving the operation reliability of the semiconductor module. A second semiconductor device layered on a first semiconductor device... Agent: Mcdermott Will & Emery LLP

20090127695 - Surface mount package with enhanced strength solder joint: A substrate pad in a semiconductor package having a geometry and structure that facilitates providing a solder joint to the pad that has enhanced structural integrity and resistance to mechanical impact. The pad may include a plated metal stud that anchors the solder to the pad interface, providing a more... Agent: Lowrie, Lando & Anastasi, LLP

20090127698 - Composite contact for fine pitch electrical interconnect assembly: An electrical interconnect assembly for electrically interconnecting terminals on a first circuit member with terminals on a second circuit member. The electrical interconnect includes a housing having a plurality of through openings extending between a first surface and a second surface. A plurality of composite contacts are positioned in a... Agent: Faegre & Benson LLP Patent Docketing - Intellectual Property

20090127697 - Housing with a cavity for a mechanically-sensitive electronic component and method for production: An element includes a hollow space for a mechanically sensitive electrical element. The element includes a first housing part and a second housing part rigidly connected to the first housing part via joint surfaces. The element also includes connection surfaces on a base of a recess in the first housing... Agent: Fish & Richardson PC

20090127696 - Piezoelectric resonator device: A package inner peripheral face 13 of a base 4 is made up of a vertical face 14 and a horizontal face 15, and electrode pads 7 (71 to 78) are formed on the vertical face vertical face 14 of the base 4. The electrode pads 71 to 78 are... Agent: Wenderoth, Lind & Ponack, L.L.P.

20090127699 - Low temperature co-fired ceramics substrate and semiconductor package: A low-temperature co-fired ceramics (LTCC) substrate includes a plurality of substrate units and at least one cutting pattern. The cutting pattern is disposed between neighboring two of the substrate units. A semiconductor package including the LTCC substrate is also disclosed.... Agent: Birch Stewart Kolasch & Birch

20090127700 - Thermal conductor lids for area array packaged multi-chip modules and methods to dissipate heat from multi-chip modules: Multi-chip modules and methods to form multi-chip modules are disclosed. A disclosed method to form a multi-chip module includes attaching a first integrated circuit to a top surface of a substrate, attaching a second integrated circuit to the top surface of the substrate, the top surface of the second integrated... Agent: Texas Instruments Incorporated

20090127702 - Package, subassembly and methods of manufacturing thereof: The package (100) of the invention comprises at least one semiconductor device (30) provided with bond pads (32); an encapsulation (40), an interconnect element (20) and a heatsink (90). This element comprises a system of electrical interconnects (12) and is at least substantially covered by a thermally conductive, electrically insulating... Agent: Philips Intellectual Property & Standards

20090127701 - Thermal attach for electronic device cooling: Embodiments of thermal cooling devices and systems including dies and thermal attaches having surface features are described in this application. The thermal attach may have a surface feature, such as a pattern, to limit movement of a thermal interface material, such as thermal grease, from between the die and the... Agent: Kirton & Mcconkie Attorneys At Law

20090127706 - Chip structure, substrate structure, chip package structure and process thereof: A chip package structure and process are provided; the structure includes a substrate, a chip, a solder layer and at least a stud bump. The substrate has at least a contact pad, and the chip has an active surface where at least a bonding pad is disposed. The stud bump... Agent: J C Patents, Inc.

20090127708 - Copper pillar tin bump on semiconductor chip and method of forming the same: Copper pillar tin bump on semiconductor chip comprises a copper layer composed on chip and a tin layer entirely wrapping whole outer surface of said copper layer. A method for forming of the copper pillar tin bump on semiconductor chip comprises: composing the first copper layer on said chip; applying... Agent: Ipla P.A.

20090127703 - Method and system for providing a low-profile semiconductor assembly: A semiconductor assembly is provided that includes a substrate that has a first surface. A chip is coupled to the substrate. The chip has a second surface that faces the first surface of the substrate. The chip is spaced apart from the substrate forming a gap. At least a portion... Agent: Baker Botts L.L.P.

20090127704 - Method and system for providing a reliable semiconductor assembly: A semiconductor assembly is provided that includes a substrate. A first set of non-conductive hedges is disposed on and protrudes from a first surface of the substrate. A chip is coupled to and spaced apart from the substrate. The chip has a second surface facing the first surface of the... Agent: Baker Botts L.L.P.

20090127705 - Semiconductor chip, method of manufacturing semiconductor chip, and semiconductor device: There are provided a semiconductor device capable of accurately determining whether a semiconductor chip is bonded to a solid-state device such as the other semiconductor chip parallelly with each other, a semiconductor chip used for the semiconductor device, and a method of manufacturing the semiconductor chip. The semiconductor chip includes... Agent: Rabin & Berdo, PC

20090127709 - Semiconductor device: A semiconductor device according to the present invention includes: a semiconductor chip; a wiring formed on the semiconductor chip; a passivation film, coating the wiring and having an opening for partially exposing the wiring from the passivation film; an interposing film, formed on a portion of the wiring facing the... Agent: Rabin & Berdo, PC

20090127707 - Semiconductor device and method for manufacturing the same: A semiconductor device having good radiation performance is provided. The semiconductor device is provided with a substrate having one surface in which external connection terminals are formed. The semiconductor device includes the substrate having a wiring layer; a semiconductor chip which is mounted on the one surface of the substrate;... Agent: Young & Thompson

20090127710 - Undercut-free blm process for pb-free and pb-reduced c4: A system and method for eliminating undercut when forming a C4 solder bump for BLM (Ball Limiting Metallurgy) and improving the C4 pitch. In the process, a barrier layer metal stack is deposited above a metal pad layer. A top layer of the barrier layer metals (e.g., Cu) is patterned... Agent: Scully, Scott, Murphy & Presser, P.C.

20090127711 - Interconnect structure and method of making same: A highly reliable copper interconnect structure and method of fabricating the same is provided. The interconnect structure comprises a metal layer buried between an adjacent upper copper layer and an adjacent lower copper layer structure. More specifically, the interconnect structure comprises a recess formed in a dielectric layer; a barrier... Agent: Greenblum & Bernstein, P.L.C

20090127712 - Nanotube-based directionally-conductive adhesive: A tape adhesive type material is directionally conductive. According to an example embodiment of the present invention, carbon nanotubes (212, 214, 216, 218) are configured in a generally parallel arrangement in a tape base type material (210). The carbon nanotubes conduct (e.g., electrically and/or thermally) in their generally parallel direction... Agent: Haynes And Boone, LLPIPSection

20090127713 - Semiconductor device: It is an object of the present invention to surely protect a predetermined semiconductor element or a predetermined semiconductor element group in an analog block from a noise generated from a digital block. A semiconductor device according to the present invention includes a semiconductor substrate, a digital block to be... Agent: Mcdermott Will & Emery LLP

20090127714 - Contact plug of semiconductor device and method of forming the same: The present invention relates to a contact plug of a semiconductor device and a method of forming the same. The method includes forming an insulating layer over a semiconductor substrate, forming contact holes in the insulating layer, forming a first conductive layer over the insulating layer including the contact holes,... Agent: Townsend And Townsend And Crew, LLP

20090127716 - Integrated circuit chip component, multi-chip module, their integration structure, and their fabrication method: A multi-chip module and an integrated structure of the present invention including: at least one of either a terminal unit formation area expanded type integrated circuit chip, or a terminal unit formation area identical type integrated circuit chip; terminal unit formation areas of these integrated circuits that are covered with... Agent: Lackenbach Siegel, LLP

20090127715 - Mountable integrated circuit package system with protrusion: A mountable integrated circuit package system includes: mounting a first integrated circuit device over a carrier; mounting a second integrated circuit device over the first integrated circuit device includes: attaching the second integrated circuit device to a first substrate side of a substrate, and connecting a first electrical interconnect between... Agent: Law Offices Of Mikio Ishimaru

20090127717 - Semiconductor module: A semiconductor module may include a circuit substrate with a first die on the circuit substrate and a second die on the first die. The first die may include at least one first data input/output pad on a first peripheral portion of the first die and at least one first... Agent: Harness, Dickey & Pierce, P.L.C

20090127718 - Flip chip wafer, flip chip die and manufacturing processes thereof: The invention relates to a flip chip wafer comprising an active surface having a plurality of bumps (40, 41, 42) formed thereon and having at least one layer of a cured underfill material (30, 35, 36) accommodated between said plurality of bumps (40, 41, 42). The invention further comprises a... Agent: Dalina Law Group, P.C.

20090127719 - Integrated circuit package system with package substrate having corner contacts: A integrated circuit package system includes: forming a package substrate with a top substrate side and a bottom substrate side; forming a corner contact in a first corner of the bottom substrate side, the corner contact extending to a substrate edge of the package substrate; mounting an integrated circuit device... Agent: Law Offices Of Mikio Ishimaru

20090127720 - Drop-mold conformable material as an encapsulation for an integrated circuit package system: An integrated circuit package system includes: providing an integrated circuit; mounting a lead on the periphery of the integrated circuit; connecting the integrated circuit to the lead with an interconnect; and forming a conformable material by pressing the conformable material on the integrated circuit, the lead, and the interconnect.... Agent: Law Offices Of Mikio Ishimaru

20090127721 - Semiconductor integrated circuit device: A semiconductor integrated circuit comprises a first and second common wiring layers common to a plurality of types of products and independent of a user circuit, a customized layer provided between the first common wiring layer and the second common wiring layer and which is configured to form the user... Agent: Sughrue Mion, PLLC

20090127723 - Aim-compatible targets for use with methods of inspecting and optionally reworking summed photolithography patterns resulting from plurally-overlaid patterning steps during mass production of semiconductor devices: Alignment targets include optically resolvable regions and SEM resolvable regions. SEM measurements taken of the SEM resolvable regions produce correction factors that can be applied to optical measurements taken of the optically resolvable regions where the correction factors improve the accuracy of the optical measurements. When one or more batches... Agent: Haynes And Boone, LLPIPSection

20090127722 - Method for processing a spacer structure, method of manufacturing an integrated circuit, semiconductor device and intermediate structure with at least one spacer structure: Method for processing at least one spacer structure in a manufacturing process of a semiconductor device, wherein the at least one spacer structure is subjected to at least one etch process step with an isotropic component and the spacer structure comprises at least one point on the surface with a... Agent: Slater & Matsil, L.L.P.

20090121208 - Nonvolatile semiconductor memory device and method of manufacturing the same: A nonvolatile semiconductor memory device comprises a plurality of first lines; a plurality of second lines crossing the plurality of first lines; a plurality of memory cells each connected at an intersection of the first and second lines between both lines and including a variable resistor operative to store information... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090121211 - solution-based deposition process for metal chalcogenides: A solution of a hydrazine-based precursor of a metal chalcogenide is prepared by adding an elemental metal and an elemental chalcogen to a hydrazine compound. The precursor solution can be used to form a film. The precursor solutions can be used in preparing field-effect transistors, photovoltaic devices and phase-change memory... Agent: Connolly Bove Lodge & Hutz LLP

20090121210 - Formation of self-assembled monolayers on silicon substrates: This invention provides a new method of forming a self-assembling monolayer (SAM) of alcohol-terminated or thiol-terminated organic molecules (e.g. ferrocenes, porphyrins, etc.) on a silicon or other group IV element surface. The assembly is based on the formation of an E-O— or an E-S— bond where E is the group... Agent: Weaver Austin Villeneuve & Sampson LLP

20090121209 - Semiconductor device with tunable energy band gap: The present invention relates to a semiconductor device in which energy band gap can be reversibly varied. An idea of the present invention is to provide a device, which is based on a semiconducting material (306) in mechanical contact with a material that exhibits a reversible volume change when properly... Agent: Philips Intellectual Property & Standards

20090121212 - Small electrode for phase change memories: A semiconductor device is disclosed. In one embodiment, the semiconductor device includes a memory cell, which in turn includes an electrode and a phase change material. The electrode may be disposed on a substrate and include a sublithographic lateral dimension parallel to the substrate. The phase change material may be... Agent: Fletcher Yoder (micron Technology, Inc.)

20090121214 - Iii-nitride semiconductor light-emitting device and manufacturing method thereof: A semiconductor light-emitting device comprises a substrate, a buffer layer, an n-type semiconductor layer, a conformational active layer and a p-type semiconductor layer. The n-type semiconductor layer includes a first surface and a second surface, and the first surface directly contacts the buffer layer. The second surface has a plurality... Agent: Wpat, PC Intellectual Property Attorneys

20090121213 - Semiconductor device with tunable energy band gap: The present invention relates to a semiconductor device in which energy band gap can be electrically varied. An idea of the present invention is to provide a device, which is based on nanowires (306) embedded in a material (307) that exhibits a deformation when properly addressed, e.g. a piezoelectric material... Agent: Philips Intellectual Property & Standards

20090121215 - Systems, devices, and methods for analog processing: A system employs a plurality of physical qubits, each having a respective bias operable to up to six differentiable inputs to solve a Quadratic Unconstrained Binary Optimization problem. Some physical qubit couplers are operated as intra-logical qubit couplers to ferromagnetically couple respective pairs of the physical qubits as a logical... Agent: Seed Intellectual Property Law Group PLLC

20090121218 - Method for programming an electronic circuit and electronic circuit: The invention relates to a method for producing an electronic circuit, and to an electronic circuit, having at least one organic electrical functional layer and at least one data storage unit, the data storage unit being configured with two electrically conductive layer contacts. The two electrically conductive layer contacts are... Agent: Carella, Byrne, Bain, Gilfillan, Cecchi, Stewart & Olstein

20090121217 - Nitride compound semiconductor device including organic semiconductor layer under gate electrode: A nitride compound semiconductor device includes a semiconductor layer including a group III nitride compound semiconductor, source and drain electrodes provided on the semiconductor layer, an insulating film provided on the semiconductor layer between the source electrode and the drain electrode, an organic semiconductor layer in contact with the semiconductor... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090121216 - Organic thin film transistor having surface-modified carbon nanotubes: An organic thin film transistor may comprise an organic semiconductor layer having surface-modified carbon nanotubes and an electrically-conductive polymer. The surfaces of the carbon nanotubes may be modified with curable functional groups, comprising oxirane groups and anhydride groups. A room-temperature solution process may be used to provide a relatively uniform... Agent: Harness, Dickey & Pierce, P.L.C

20090121219 - Carbon nanotubes, method of growing the same, hybrid structure and method of growing the hybrid structure, and light emitting device: Provided is a method of growing carbon nanotubes (CNTs) by forming a catalyst layer that is used to facilitate growth of CNTs to have a multi-layer structure; and injecting a carbon-containing gas to the catalyst layer to grow CNTs, and light emitting devices fabricated by incorporating the CNTs grown.... Agent: Robert E. Bushnell & Law Firm

20090121220 - High performance sub-system design and assembly: A multiple integrated circuit chip structure provides interchip communication between integrated circuit chips of the structure with no ESD protection circuits and no input/output circuitry. The interchip communication is between internal circuits of the integrated circuit chips. The multiple integrated circuit chip structure has an interchip interface circuit to selectively... Agent: Mou-shiung Lin

20090121221 - High performance sub-system design and assembly: A multiple integrated circuit chip structure provides interchip communication between integrated circuit chips of the structure with no ESD protection circuits and no input/output circuitry. The interchip communication is between internal circuits of the integrated circuit chips. The multiple integrated circuit chip structure has an interchip interface circuit to selectively... Agent: Mou-shiung Lin

20090121223 - Semiconductor device: Provided is a semiconductor device, in which: patterns for detecting displacement at probing are formed of a plurality of minute conductors formed below a protective film; each of the plurality of minute conductors formed below the protective film is electrically insulated and formed to be smaller than a bottom surface... Agent: Brinks Hofer Gilson & Lione/seiko Instruments Inc.

20090121222 - Test structure: A test structure to detect vertical leakage in a multi-layer flip chip pad stack or similar semiconductor device. The test structure is integrated into the semiconductor device when it is fabricated. A metal layer includes at least two portions that are electrically isolated from each other; one portion being disposed... Agent: Slater & Matsil, L.L.P.

20090121224 - Dual gate of semiconductor device capable of forming a layer doped in high concentration over a recessed portion of substrate for forming dual gate with recess channel structure and method for manufacturing the same: A dual gate of a semiconductor device includes a semiconductor substrate divided into a cell region with a recessed gate forming area and a peripheral region with PMOS and NMOS forming areas; first and second conductive type SiGe layers, the first conductive type SiGe layer being formed over the cell... Agent: Ladas & Parry LLP

20090121226 - Active-matrix device, electro-optical display device, and electronic apparatus: An active-matrix device includes a substrate; a plurality of pixel electrodes provided on a first surface of the substrate; a plurality of switching elements provided to correspond to each of the pixel electrodes, each of the switching elements including a fixed electrode connected to the each pixel electrode, a movable... Agent: Harness, Dickey & Pierce, P.L.C

20090121228 - Array substrate and method of manufacturing the same: A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed... Agent: Haynes And Boone, LLPIPSection

20090121229 - Display device: In a display device which includes: an insulation substrate; thin film transistors which are formed on the insulation substrate; and terminal portions which are configured to supply voltages to the thin film transistors, the thin film transistor includes a gate electrode and a gate line which is formed of a... Agent: Stanley P. Fisher Reed Smith LLP

20090121230 - Light emitting device: A light emitting device is disclosed. The light emitting device includes a substrate including a thin film transistor, an insulating film disposed over the thin film transistor, a first electrode disposed over the thin film transistor and connected to the thin film transistor, a function layer including at least one... Agent: Ked & Associates, LLP

20090121227 - Method of manufacturing thin film transistor array substrate and display device: A method of manufacturing a thin film transistor array substrate according to the present invention includes: forming a pattern made of a first conductive film; stacking a gate insulating film, a semiconductor layer, and a resist in the stated order; forming a resist pattern having a step structure in a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090121225 - Thin film transistor, method for manufacturing the same and display using the same: One embodiment of the present invention is a thin film transistor including a gate electrode formed on an insulating substrate, a gate insulator formed on the gate electrode, a drain electrode and a source electrode formed on the gate insulator, an oxide semiconductor pattern formed between the drain electrode and... Agent: Squire, Sanders & Dempsey L.L.P.

20090121231 - Thin film transistors, method of fabricating the same, and organic light-emitting diode device using the same: Aspects of the invention relate to thin film transistors, a method of fabricating the same, and an organic light-emitting diode device using the same. A thin film transistor according to an aspect of the invention includes a semiconductor layer formed from polysilicon in which a grain size deviation is within... Agent: Stein, Mcewen & Bui, LLP

20090121232 - Array substrate, method for manufacturing the same and display panel having the same: An array substrate, a method for manufacturing the array substrate and a display panel having the array substrate are presented. The method includes forming a thin-film transistor (TFT) on a base substrate. A passivation layer covers the TFT. A color filter layer is formed on the passivation layer. An organic... Agent: Haynes And Boone, LLPIPSection

20090121233 - Electro-optical device and electronic apparatus: An electro-optical device includes a semiconductor layer, a gate electrode, and a first insulating film, and a second insulating under the semiconductor layer. The first insulating film overlaps a junction region, but not a channel region, of the semiconductor layer. The gate electrode includes a first extended portion that continuously... Agent: Advantedge Law Group, LLC

20090121234 - Liquid crystal display device and fabrication method thereof: A liquid crystal display device including a gate electrode and a gate line formed on a first substrate, a first insulating layer formed on the first substrate, an active pattern, an ohmic-contact layer, and a diffusion preventing layer formed on the gate electrode, a data line to cross source and... Agent: Morgan Lewis & Bockius LLP

20090121235 - Method for fabricating a semiconductor device: A transistor of a semiconductor device includes a substrate, a gate over the substrate, a source/drain region formed in the substrate to have a channel region therebetween, and an epitaxial layer formed below the channel region to have a different lattice constant from the substrate. The epitaxial layer having a... Agent: Townsend And Townsend And Crew, LLP

20090121236 - Optocoupler using silicon based leds: This invention details how a low cost opto coupler can be made on Silicon On Insulator (SOI) using conventional integrated circuit processing methods. Specifically, metal and deposited insulating materials are use to realize a top reflector for directing light generated by a silicon PN junction diode to a silicon PN... Agent: Eugene R. Worley

20090121237 - Led array for microdisplays or like applications, and method of fabrication: An array of LEDs are grown by epitaxy on row-connecting conductor strips extending in parallel spaced relationship to one another on the surface of a semiconductor substrate and are thereby electrically interconnected in rows. The row-connecting conductor strips are formed by ion implantation of a p-type dopant into parts of... Agent: Woodcock Washburn LLP

20090121239 - Display device: A display device includes light emitting elements corresponding to respective colors disposed on a substrate. Each of the light emitting elements corresponding to the respective colors has a cavity structure in which a light emission functioning layer including a light emitting layer is held between a reflecting electrode and a... Agent: Sonnenschein Nath & Rosenthal LLP

20090121238 - Double collimator led color mixing system: The present invention is directed to a lighting apparatus. In one embodiment the lighting apparatus includes a plurality of light emitting diode (LED) chips. A first optic is coupled to the plurality of LED chips. A diffuser is coupled to the first optic. In addition, a second optic is coupled... Agent: Patterson & Sheridan L.L.P. Nj Office

20090121240 - Nitride semiconductor device and method for manufacturing the same: There is provided a nitride semiconductor device with low leakage current and high efficiency in which, while a zinc oxide based compound such as MgxZn1-xO (0≦x≦0.5) is used for a substrate, crystallinity of nitride semiconductor grown thereon is improved and film separation or cracks are prevented. The nitride semiconductor device... Agent: Rabin & Berdo, PC

20090121242 - Compound semiconductor light-emitting diode and method for fabrication thereof: A compound semiconductor light-emitting diode includes a light-emitting layer formed of aluminum-gallium-indium phosphide, a light-emitting part 13 having component layers individually formed of a Group III-V compound semiconductor, a transparent supporting layer 14 bonded to one of the outermost surface layers 135 of the light-emitting part 13 and transparent to... Agent: Sughrue Mion, PLLC

20090121243 - Light emitting devices: Light-emitting devices, and related components, systems and methods are disclosed.... Agent: Luminus Devices , Inc. C/o Wolf, Greenfield & Sacks , P.C.

20090121241 - Wire bond free wafer level led: A wire-bond free semiconductor device with two electrodes both of which are accessible from the bottom side of the device. The device is fabricated with two electrodes that are electrically connected to the oppositely doped epitaxial layers, each of these electrodes having leads with bottom-side access points. This structure allows... Agent: Koppel, Patrick, Heybl & Dawson

20090121250 - High light extraction efficiency light emitting diode (led) using glass packaging: An (Al, Ga, In)N and ZnO direct wafer bonded light emitting diode (LED) combined with a shaped optical element in which the directional light from the ZnO cone or any high refractive index material in contact with the LED surface entering the shaped optical element is extracted to air.... Agent: Gates & Cooper LLP Howard Hughes Center

20090121244 - Led packaging structure and production method thereof: An LED packaging structure and a production method thereof; the LED packaging structure includes an LED die placed on a metal substrate and packed with seal in conjunction with a transparent substrate to deliver advantages of compact, simplified process and long service life and provide significant advancement and industrial value... Agent: Hdls Patent & Trademark Services

20090121246 - Led with current confinement structure and surface roughening: An LED having a p-type layer of material with an associated p-contact, an n-type layer of material with an associated n-contact and an active region between the p-type layer and the n-type layer, includes a confinement structure that is formed within one of the p-type layer of material and the... Agent: Koppel, Patrick, Heybl & Dawson

20090121245 - Optoelectronic semiconductor chip: An optoelectronic semiconductor chip is disclosed which emits electromagnetic radiation from its front side (7) during operation, comprising: a semiconductor layer sequence (1) having an active region (4) suitable for generating the electromagnetic radiation, and a self-supporting and electrically conductive mechanical supporting layer (10) formed on the semiconductor layer sequence,... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20090121249 - Package structure of a light emitting diode device and method of fabricating the same: A package structure for light emitting diode devices comprises a substrate having a reflective cavity, a die mounted inside the reflective cavity, a reflective layer disposed on the surface of the reflective cavity, a plurality of electrodes disposed under the surface of the substrate which is opposite to the reflective... Agent: Wpat, PC Intellectual Property Attorneys

20090121247 - Semiconductor light emitting device: A semiconductor light emitting device includes: a base portion having a concaved portion; a light emitting element provided in the concaved portion; a resin filled in the concaved portion; and a phosphor contained resin layer containing a wave converting substance and provided to close an opening portion of the concaved... Agent: Wilmerhale/dc

20090121248 - Semiconductor light emitting device and planar light source: A semiconductor light emitting device includes: a base portion having a concave portion formed in one of major surfaces thereof; and a light emitting element mounted on a bottom surface of the concave portion of the base portion. The base portion comprises a side wall portion that surrounds the light... Agent: Wilmerhale/dc

20090121253 - Light-emitting apparatus and method of manufacturing the same: The present invention provides a light-emitting apparatus capable of improving brightness and reducing power consumption and a method of manufacturing the same. The light-emitting apparatus includes: a light-emitting device 2 including electrode pads 9 and 10; and a lead frame 3 including electrode leads 11 and 12. The electrode pads... Agent: Sughrue Mion, PLLC

20090121252 - Method for manufacturing flip-chip light emitting diode package: A method for manufacturing flip-chip light emitting diode (LED) package fabricates a silicon submount with at least one groove by wet etching. Two vias are defined on base of the groove, wherein each via has a contact pad thereon and a bottom electrode on bottom thereof. An LED die is... Agent: Hdls Patent & Trademark Services

20090121251 - Siloxane-hydantoin copolymer, optoelectronic device encapsulated therewith and method: The invention provides a siloxane-hydantoin copolymer, an optoelectronic device encapsulated therewith, and methods thereof. The siloxane-hydantoin copolymer comprises a unit selected from the group consisting of Y1—O1/2 and O1/2—Y2—O1/2, wherein Y1 and Y2 contain a hydantoin structure or derivative thereof. The new material exhibits improved properties such as high optical... Agent: Fay Sharpe LLP

20090121254 - Method for modification of built in potential of diodes: In broad terms the present invention is a semiconductor junction comprising a first material (102) and a second material (104), in which a surface of one or both of the junction materials has a periodically repeating structure that causes electron wave interference resulting in a change in the way electron... Agent: Borealis Technical Limited

20090121255 - Resin for optical-semiconductor-element encapsulation containing polyimide and optical semiconductor device obtained with the same: The present invention relates to a resin for optical-semiconductor-element encapsulation containing a polyimide which is produced by imidizing a polyimide precursor obtained by subjecting 5-norbornene-2,3-dicarboxylic anhydride or maleic anhydride, an aliphatic tetracarboxylic dianhydride, and an aliphatic diamine compound to a condensation polymerization reaction. The resin of the invention has excellent... Agent: Sughrue-265550

20090121256 - Semiconductor device with improved short channel effect of a pmos and stabilized current of an nmos and method for manufacturing the same: The present invention relates to a semiconductor device which is capable of simultaneously improving a short channel effect of a PMOS and the current of an NMOS and a method for manufacturing the same. The semiconductor device includes first and second gates formed over first and second areas of a... Agent: Ladas & Parry LLP

20090121257 - Semiconductor superjunction structure: Embodiments of semiconductor structures are provided for a semiconductor device employing a superjunction structure. The device includes interleaved regions of first and second semiconductor materials of, respectively, first and second conductivity types and first and second mobilities. The second conductivity type is opposite the first conductivity type and the second... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20090121258 - Field effect transistor containing a wide band gap semiconductor material in a drain: A field effect transistor comprising a silicon containing body is provided. After formation of a gate dielectric, gate electrode, and a first gate spacer, a drain side trench is formed and filled with a wide band gap semiconductor material. Optionally, a source side trench may be formed and filled with... Agent: Scully, Scott, Murphy & Presser, P.C.

20090121259 - Paired magnetic tunnel junction to a semiconductor field-effect transistor: A magnetic tunnel junction paired to a semiconductor field-effect transistor is described. In one embodiment, there is a circuit that comprises at least one semiconductor field-effect transistor and a magnetic tunnel junction coupled to the at least one semiconductor field-effect transistor. The magnetic tunnel junction has a control line that... Agent: Hoffman Warnick LLC

20090121260 - Double-sided integrated circuit chips: A double-sided integrated circuit chips, methods of fabricating the double-sided integrated circuit chips and design structures for double-sided integrated circuit chips. The method includes removing the backside silicon from two silicon-on-insulator wafers having devices fabricated therein and bonding them back to back utilizing the buried oxide layers. Contacts are then... Agent: Schmeiser, Olsen & Watts

20090121263 - Semiconductor device and its manufacturing method: A semiconductor device comprises a first conductive film formed downward, perpendicular to a substrate, penetrating through a first insulating film, a second conductive film formed downward along an outer wall of a second insulating film, a third insulating film formed from the bottom of the second conductive film to the... Agent: Nixon & Vanderhye, PC

20090121262 - Semiconductor device capable of improving contact resistance and method for manufacturing the same: A semiconductor device includes a gate formed over a semiconductor substrate; a junction region formed in a portion of the semiconductor substrate corresponding to both sides of the gate and including a projection, of which at least some portion thereof projects from the surface of the portion of the semiconductor... Agent: Ladas & Parry LLP

20090121261 - Structure and method for compact long-channel fets: A compact semiconductor structure including at least one FET located upon and within a surface of a semiconductor substrate in which the at least one FET includes a long channel length and/or a wide channel width and a method of fabricating the same are provided. In some embodiments, the ordered,... Agent: Scully, Scott, Murphy & Presser, P.C.

20090121264 - Cmos image sensor and method of forming the same: A CMOS image sensor is formed utilizing a through-poly implantation process. First, a substrate including a photo-sensing region and a transistor region is provided. Subsequently, at least a gate structure is formed on a surface of the substrate within the transistor region. Thereafter, an ion implantation process is performed on... Agent: North America Intellectual Property Corporation

20090121265 - Light modulating sensing mosfet transistor and process for manufacturing the same: A Light Modulating sensing MOSFET transistor includes: a substrate receiving light radiation, the substrate having two source and drain areas separated by a channel extending along a first direction; a gate conductive beam extending along a second direction being substantially perpendicular to the first direction, the beam being fixed at... Agent: Seed Intellectual Property Law Group PLLC

20090121266 - Methods and structures for exchange-coupled magnetic multi-layer structure with improved operating temperature behavior: Exchange-coupled magnetic multilayer structures for use with toggle MRAM devices and the like include a tunnel barrier layer (108) and a synthetic antiferromagnet (SAF) structure (300) formed on the tunnel barrier layer (108), wherein the SAF (300) includes a plurality (e.g., four or more) of ferromagnetic layers (302, 306, 310,... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20090121267 - Spin field effect transistor using half metal and method of manufacturing the same: A spin field effect transistor may include at least one gate electrode, a channel layer, a first stack and a second stack separate from each other on a substrate, wherein the channel layer is formed of a half metal. The half metal may be at least one material selected from... Agent: Harness, Dickey & Pierce, P.L.C

20090121268 - Semiconductor memory devices having vertical channel transistors and related methods: A semiconductor memory device may include a semiconductor substrate with an active region extending in a first direction parallel with respect to a surface of the semiconductor substrate. A pillar may extend from the active region in a direction perpendicular with respect to the surface of the semiconductor substrate with... Agent: Myers Bigel Sibley & Sajovec

20090121269 - Integrated circuit comprising a transistor and a capacitor, and fabrication method: An integrated circuit includes a substrate and at least one active region. A transistor produced in the active region separated from the substrate. This transistor includes a source or drain first region and a drain or source second region which are connected by a channel. A gate structure is position... Agent: Gardere Wynne Sewell LLP Intellectual Property Section

20090121270 - Design structure for a trench capacitor: A design structure of a trench capacitor with an isolation collar in a semiconductor substrate where the substrate adjacent to the isolation collar is free of dopants caused by auto-doping. The design structure resulting from the means for fabricating the trench capacitor includes the methods of forming a trench in... Agent: International Business Machines Corporation Dept. 18g

20090121272 - Fabrication method of nanoparticles by chemical curing: Disclosed is a method of producing nanoparticles by using chemical curing. The method includes depositing a metal thin film on a substrate, applying an insulator precursor on a metal thin film, and adding a curing agent and a catalyst to the insulator precursor to perform the chemical curing. The method... Agent: Dickstein Shapiro LLP

20090121271 - Vertical-type non-volatile memory devices: In a semiconductor device, and a method of manufacturing thereof, the device comprises a substrate of single-crystal semiconductor material extending in a horizontal direction and a plurality of interlayer dielectric layers on the substrate. A plurality of gate patterns are provided, each gate pattern being between a neighboring lower interlayer... Agent: Mills & Onello LLP

20090121273 - Low-voltage memory having flexible gate charging element: In a non-volatile semiconductor memory device including a source region separated from a drain region by a channel region and with an electrically floating gate electrode spaced from and overlying the channel region, a flexible member is spaced from the floating gate and capable of being flexed towards the floating... Agent: John P. O'banion O'banion & Ritchey LLP

20090121274 - Semiconductor memory device and method of manufacturing the same: A salicide treatment is performed on a common source line to reduce surface resistance and contact resistance, thereby improving a cell current characteristic. Therefore, a chip can be reduced in size and chips per wafer can be increased, thereby achieving high yield. In addition, it is possible to overcome the... Agent: Sherr & Vaughn, PLLC

20090121275 - Non-volatile memory devices including blocking and interface patterns between charge storage patterns and control electrodes and related methods: A non-volatile memory device may include a semiconductor substrate and an isolation layer on the semiconductor substrate wherein the isolation layer defines an active region of the semiconductor substrate. A tunnel insulation layer may be provided on the active region of the semiconductor substrate, and a charge storage pattern may... Agent: Myers Bigel Sibley & Sajovec

20090121277 - Nonvolatile memory device and method of manufacturing the same: The nonvolatile memory device includes a semiconductor substrate, and a device isolation layer defining an active region in the semiconductor substrate. The device isolation layer includes a top surface lower than a top surface of the semiconductor substrate, such that a side-upper surface of the active region is exposed. A... Agent: Harness, Dickey & Pierce, P.L.C

20090121276 - Nonvolatile memory devices with recessed word lines: A nonvolatile memory device includes a substrate, a device isolation region disposed in the substrate and abutting a sidewall of an active region defined in the substrate, the device isolation region having a recessed portion and a word line crossing the active region and the recessed portion of the device... Agent: Myers Bigel Sibley & Sajovec

20090121282 - Non-volatile memory device and method for manufacturing the same: An increase of charge storing capacity, prevention of an over-erase, and a reduction of ΔVth may be achieved when a 2-bit/cell non-volatile memory device includes a gate of a predetermined width above a semiconductor substrate, an insulating layer between the gate and the semiconductor substrate and at lateral sides of... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20090121279 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a single crystal silicon substrate an insulating layer partially formed on the single crystal silicon substrate, a single crystal silicon layer formed on the single crystal silicon substrate and the insulating layer, and containing a defect layer resulting from an excessive group IV element, and a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090121280 - Semiconductor devices, methods of forming the semiconductor devices and methods of operating the semiconductor devices: Described are a semiconductor device, methods of forming the semiconductor device and methods of operating the semiconductor device. The semiconductor device includes a gate electrode and laminated charge trap layers interposed between substrates. The methods of forming the semiconductor device include forming a gate stacked structure including insulating layers having... Agent: Marger Johnson & Mccollom, P.C.

20090121281 - Semiconductor memory device: A semiconductor memory device has an element isolation region between rewrite units of memory cells. A plurality of memory cells are memory cell groups arranged in a row direction, and each memory cell group consists of (8×N) memory cells arranged in a row direction as a unit to be used... Agent: Mcdermott Will & Emery LLP

20090121278 - Structure and fabrication method of flash memory: A method for forming a flash memory cell and the structure thereof is disclosed. The flash memory cell includes a substrate, a first raised source/drain region and a second raised source/drain region separated by a trench in-between, a first charge-trapping spacer and a second charge-trapping spacer respectively on the sidewall... Agent: J C Patents, Inc.

20090121283 - Semiconductor device and fabrication method of the same: A semiconductor device includes a substrate; a first insulating layer provided on the substrate; a conductive layer buried in the first insulating layer; a semiconductor pillar including a lower diffusion layer provided immediately above the conductive layer, the lower diffusion layer being electrically connected to the conductive layer, a semiconductor... Agent: Foley And Lardner LLP Suite 500

20090121284 - Semiconductor device and method for manufacturing the same: A sacrifice oxide film is formed in a Fin semiconductor substrate portion, and impurities are then implanted in the semiconductor substrate through a mask pattern as a mask. Thereafter, the sacrifice oxide film is removed to expose the semiconductor substrate. A gate insulating film is then formed on the exposed... Agent: Foley And Lardner LLP Suite 500

20090121285 - Semiconductor device: A semiconductor device includes: a semiconductor layer, a first semiconductor region provided on a major surface of the semiconductor layer, a second semiconductor region provided in a surface portion of the first semiconductor region, a trench extending through the second semiconductor region and the first semiconductor region to the semiconductor... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090121286 - Integrated circuit comprising a field effect transistor and method of fabricating the same: An integrated circuit includes a field effect transistor including: a gate electrode disposed adjacent to a surface of semiconductor substrate and a source/drain region disposed in the semiconductor substrate and adjacent to the surface. A net dopant concentration of a first section of the source/drain region decreases towards the gate... Agent: Edell, Shapiro & Finnan, LLC

20090121287 - Dual wired integrated circuit chips: A semiconductor device having wiring levels on opposite sides, a method of fabricating a semiconductor structure having contacts to devices and wiring levels on opposite sides, and a design structure of a semiconductor device having wiring levels on opposite sides. The method including fabricating a device on a silicon-on-insulator substrate... Agent: Schmeiser, Olsen & Watts

20090121289 - Field effect transistor with a heterostructure and associated production method: A field effect transistor with a heterostructure includes a strained monocrystalline semiconductor layer formed on a carrier material, which has a relaxed monocrystalline semiconductor layer made of a first semiconductor material (Si) as the topmost layer. The strained monocrystalline semiconductor layer has a semiconductor alloy (GexSi1 -x),where the proportion x... Agent: Brinks Hofer Gilson & Lione/infineon Infineon

20090121288 - Multiple gate field effect transistor structure and method for fabricating same: The present invention relates to a Multiple Gate Field Effect Transistor structure and a method for fabricating same. The Multiple Gate Field Effect Transistor structure includes a fin structure made from at least one active semiconductor layer of a silicon on insulator (SOI) structure on a buried insulator of the... Agent: Winston & Strawn LLP Patent Department

20090121290 - Semiconductor device with high-breakdown-voltage transistor: A semiconductor device includes a high-breakdown-voltage transistor having a semiconductor layer. The semiconductor layer has an element portion and a wiring portion. The element portion has a first wiring on a front side of the semiconductor layer and a backside electrode on a back side of the semiconductor layer. The... Agent: Posz Law Group, PLC

20090121291 - Dense chevron non-planar field effect transistors and method: Disclosed are embodiments of semiconductor structure and a method of forming the semiconductor structure that simultaneously maximizes device density and avoids contacted-gate pitch and fin pitch mismatch, when multiple parallel angled fins are formed within a limited area on a substrate and then traversed by multiple parallel gates (e.g., in... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20090121292 - Fabrication of local damascene finfets using contact type nitride damascene mask: Disclosed are methods for forming FinFETs using a first hard mask pattern to define active regions and a second hard mask to protect portions of the insulating regions between active regions. The resulting field insulating structure has three distinct regions distinguished by the vertical offset from a reference plane defined... Agent: Harness, Dickey & Pierce, P.L.C

20090121294 - Semiconductor device: A semiconductor device is disclosed. The semiconductor device includes a source offset type MOS transistor in which a source and a drain are formed on a semiconductor substrate by having a predetermined distance between the source and the drain, and a gate electrode is formed on the semiconductor substrate between... Agent: Cooper & Dunham, LLP

20090121293 - Semiconductor device and method for manufacturing same: The semiconductor device includes a semiconductor substrate, a plurality of source regions formed in a stripe shape on the semiconductor substrate, a plurality of gate electrodes formed in a stripe shape between a plurality of the stripe shaped source regions on the semiconductor substrate, an insulating film for covering the... Agent: Rabin & Berdo, PC

20090121295 - Method and structure for reducing induced mechanical stresses: Methods and structures for relieving stresses in stressed semiconductor liners. A stress liner that enhances performance of either an NFET or a PFET is deposited over a semiconductor to cover the NFET and PFET. A disposable layer is deposited to entirely cover the stress liner, NFET and PFET. This disposable... Agent: Law Office Of Delio & Peterson, LLC.

20090121296 - Semiconductor device including dummy gate part and method of fabricating the same: In a reliable semiconductor device and a method of fabricating the semiconductor device, a difference in height between upper surfaces of a cell region and a peripheral region (also referred to as a level difference) is minimized by optimizing dummy gate parts. The semiconductor device includes a semiconductor substrate including... Agent: Mills & Onello LLP

20090121297 - Gate electrode having a capping layer: A method of manufacturing a semiconductor device and a novel semiconductor device are disclosed herein. An exemplary method includes sputtering a capping layer in-situ on a gate dielectric layer, before any high temperature processing steps are performed.... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20090121298 - Field effect transistor: A transistor. The transistor including: a well region in a substrate; a gate dielectric layer on a top surface of the well region; a polysilicon gate electrode on a top surface of the gate dielectric layer; spacers formed on opposite sidewalls of the polysilicon gate electrode; source/drain regions formed on... Agent: Schmeiser, Olsen & Watts

20090121299 - Wafer level sensing package and manufacturing process thereof: A wafer level sensing package and manufacturing process thereof are described. The process includes providing a wafer having sensing chips, in which each sensing chip has a sensing area and pads; forming a stress release layer on a wafer surface; cladding a photoresist layer on the stress release layer; patterning... Agent: Rabin & Berdo, PC

20090121302 - Chip package: A chip package includes a bump connecting said semiconductor chip and said circuitry component, wherein the semiconductor chip has a photosensitive area used to sense light. The chip package may include a ring-shaped protrusion connecting a transparent substrate and the semiconductor chip.... Agent: Mou-shiung Lin

20090121301 - Image capture module: An image capture module includes an image sensor and a photochromic glass plate. The image sensor includes a photosensitive area. The photochromic glass plate is positioned in front of the photosensitive area, adjusting light transmittance therethrough according to current ambient light conditions, thereby adjusting exposure value of the image sensor.... Agent: PCe Industry, Inc. Att. Steven Reiss

20090121300 - Microelectronic imager packages and associated methods of packaging: The microelectronic imager packages include a semiconductor die having a plurality of photo sensors, a cover spaced apart from the semiconductor die and facing the photo sensors, and a coupling structure between the semiconductor die and the cover. The coupling structure has a spacer separating the semiconductor die and the... Agent: Perkins Coie LLP Patent-sea

20090121303 - Semiconductor package: A semiconductor package. The semiconductor package of the invention comprises: a substrate comprising at least one exposed area with photosensitive devices; a cover for isolating the exposed area from the external atmosphere, wherein one of either the substrate or the cover is a base, and the other is a top... Agent: Joe Mckinney Muncy

20090121304 - Solid-state image pickup device, process for producing the same and electronic device: A camera module 10 comprises a solid-state image sensor 11 including a light receiving unit 11a and a cover glass 12 covering the light receiving unit 11a of the solid-state image sensor 11. A rough-surfaced side surface of the cover glass 12 reduces flare light by scattering light incident to... Agent: Edwards Angell Palmer & Dodge LLP

20090121305 - Front-illuminated avalanche photodiode: The present invention provides a front-illuminated avalanche photodiode (APD) with improved intrinsic responsivity, as well as a method of fabricating such a front-illuminated APD. The front-illuminated APD comprises an APD body of semiconductor material, which includes a substrate and a layer stack disposed on a front surface of the substrate.... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist P.A.

20090121306 - Photodiode array: The present invention provides a photodiode array which can secure a sufficient aperture ratio with respect to light to be detected while restraining crosstalk between photodetecting channels even during operation in Geiger mode. In a photodiode array 1, resistors 42 and wirings 43 to be electrically connected to avalanche multipliers... Agent: Drinker Biddle & Reath (dc)

20090121307 - Simultaneous unipolar multispectral integrated technology (sumit) detectors: A multi-color photo sensor having a first photodiode with a first p-type layer and a first n-type layer, the first photodiode generates charge when illuminated with photons of a first wavelength range, a second photodiode with a second p-type layer and a second n-type layer, the second photodiode generates charge... Agent: Greenberg Traurig LLP (la)

20090121308 - Image sensing device and method of: A two-dimensional, temporally modulated electromagnetic wavefield, preferably in the ultraviolet, visible or infrared spectral range, can be locally detected and demodulated with one or more sensing elements. Each sensing element consists of a resistive, transparent electrode (E) on top of an insulated layer (O) that is produced over a semiconducting... Agent: Houston Eliseeva

20090121309 - Semiconductor device and method for fabricating the same: A method for fabricating a semiconductor device includes forming a device isolation structure on a semiconductor substrate to define an active region. A hard mask pattern defining a recess region is formed over the semiconductor substrate. The semiconductor substrate is selectively etched using the hard mask pattern to form a... Agent: Townsend And Townsend And Crew, LLP

20090121310 - Semiconductor device and manufacturing method for the same: A method for manufacturing a semiconductor device comprising the steps of: forming a first insulating film to be used as a mask for forming a trench region directly above a semiconductor substrate; forming the trench region on the semiconductor substrate using the mask; forming a second insulating film directly above... Agent: Morrison & Foerster LLP

20090121311 - Semiconductor device and method of fabricating the same: A semiconductor device according to an embodiment of the invention includes: a semiconductor substrate; a well, having a well contact connection region, formed in the semiconductor substrate; a transistor formed on the well; an isolation region formed between the transistor formed on the well, and the well contact connection region;... Agent: Foley And Lardner LLP Suite 500

20090121312 - Method and apparatus for making coplanar isolated regions of different semiconductor materials on a substrate: A semiconductor processing method includes providing a substrate, forming a plurality of semiconductor layers in the substrate, each of the semiconductor layers being distinct and selected from different groups of semiconductor element types. The semiconductor layers include a first, second, and third semiconductor layers. The method further includes forming a... Agent: Ibm Corporation, T.j. Watson Research Center

20090121313 - Semiconductor device with at least one air gap provided in chip outer area: One air gap structure is disposed so as to circle around the outer wall of a seal ring in a loop by arranging, within first insulating films located in a chip outer area corresponding to an outer area of the seal ring, air gaps into a line in parallel to... Agent: Mcdermott Will & Emery LLP

20090121314 - Manufacturing method for forming an integrated circuit device and corresponding integrated circuit device: The present invention provides a manufacturing method for forming an integrated circuit device and to a corresponding integrated circuit device. The manufacturing method for forming an integrated circuit device comprises the steps of: forming a first level on a substrate; forming a second level above the first level; forming a... Agent: Fay Kaplun & Marcin, LLP

20090121316 - Electronic component with reactive barrier and hermetic passivation layer: An electronic component is provided on a substrate. A thin-film capacitor is attached to the substrate, the thin-film capacitor includes a pyrochlore or perovskite dielectric layer between a plurality of electrode layers, the electrode layers being formed from a conductive thin-film material. A reactive barrier layer is deposited over the... Agent: Patent Group 2n Jones Day

20090121315 - Method for producing an integrated circuit and arrangement comprising a substrate: Embodiments of the invention relate to an integrated circuit comprising a carrier, having a capacitor with a first electrode and a second electrode. The first electrode has a dielectric layer A layer sequence is arranged on the carrier, the capacitor being introduced in said layer sequence, wherein the layer sequence... Agent: Patterson & Sheridan, LLP Gero Mcclellan / Qimonda

20090121317 - Semiconductor device and method for fabricating the same: A method for fabricating a three dimensional type capacitor is provided. The method includes forming a first insulation layer including first contact layers over a substrate, forming a second insulation layer over the first insulation layer, forming second contact layers by using a material having an etch selectivity different from... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090121318 - Semiconductor device, dram integrated circuit device, and method of producing the same: A semiconductor device with a multi-layer wiring structure includes a first conductive region: a second conductive region that has an upper surface located in a higher position than the first conductive region with respect to the substrate; an insulating that covers the first and second conductive regions; a wiring groove... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090121319 - Power semiconductor devices with mesa structures and buffer layers including mesa steps: A bipolar junction transistor includes a collector having a first conductivity type, a drift layer having the first conductivity type on the collector, a base layer on the drift layer and having a second conductivity type opposite the first conductivity type, a lightly doped buffer layer having the first conductivity... Agent: Myers Bigel Sibley & Sajovec, P.A.

20090121320 - Method of manufacturing p-type nitride semiconductor and semiconductor device fabricated by the method: The present invention includes a first step of forming a nitride semiconductor layer by metal organic chemical vapor deposition by using a first carrier gas containing a nitrogen carrier gas and a hydrogen carrier gas of a flow quantity larger than that of the nitrogen carrier gas to thereby supply... Agent: Harness, Dickey & Pierce, P.L.C

20090121321 - Wafer and a method of dicing a wafer: A wafer includes a plurality of chips, each of the chips being spaced from each other by kerf-line regions including a reduced width.... Agent: Slater & Matsil LLP

20090121322 - Semiconductor chip and semiconductor device: A semiconductor chip comprises a semiconductor substrate, a multi-layer wiring structure on the semiconductor substrate, a seal ring structure on the semiconductor substrate, and a semiconductor element arranged in an inner region of said semiconductor chip and in a frame region of said semiconductor chip. The semiconductor element comprises a... Agent: Mcginn Intellectual Property Law Group, PLLC

20090121323 - Semiconductor device and method of fabricating the same: A semiconductor device and a method of fabricating the same. The semiconductor device includes a semiconductor substrate including an active surface and an inactive surface which faces the active surface, a device isolation layer and a pad stacked on the active surface; and a through electrode disposed in a first... Agent: Stanzione & Kim, LLP

20090121324 - Etch with striation control: A method for etching a feature in an etch layer is provided. A patterned photoresist mask is formed over the etch layer with photoresist features with sidewalls wherein the sidewalls of the photoresist features have striations forming peaks and valleys. The striations of the sidewalls of the photoresist features are... Agent: Beyer Law Group LLP

20090121325 - Method for producing a thin film transistor and a device of the same: A method for producing a thin film transistor and including the following steps for preparing a glass substrate; having a positive photosensitive coating on the glass substrate; providing a transparent mold plate, having a plurality of ladder opaque protrusions in accordance with a predetermined pattern having different depth; controlling the... Agent: Rabin & Berdo, PC

20090121327 - Semiconductor device having spacer formed on semiconductor chip connected with wire: A semiconductor device includes a semiconductor chip, a supporting body that is disposed below the semiconductor chip and supports the semiconductor chip, a spacer that is fixed onto the first semiconductor chip, and a substrate that is located below the first semiconductor chip and electrically connected to the semiconductor chip... Agent: Mcginn Intellectual Property Law Group, PLLC

20090121326 - Semiconductor package module: A semiconductor package module includes a circuit board including a board body having a receiving portion and conductive patterns formed on the board body; a semiconductor package received in the receiving portion and having conductive terminals electrically connected to the conductive patterns and an s semiconductor chip electrically connected to... Agent: Ladas & Parry LLP

20090121328 - Glass substrate of flat panel display and display integrated circuit chip: An exemplary glass substrate of flat panel display is adapted for an integrated circuit (IC) chip. The IC chip has two opposite long sides and two opposite short sides. The glass substrate includes a display area and a plurality of conductive wires. The display area has a plurality of display... Agent: Hdls Patent & Trademark Services

20090121329 - Lead frame structure and applications thereof: A lead frame structure comprises a side rail, a first paddle, a second paddle, a plurality of leads, and an downset anchor bar. The first paddle is connected to the side rail via at least one first tie bar, and the second paddle is connected to the side rail via... Agent: Patterson & Sheridan, L.L.P.

20090121330 - Clip mount for integrated circuit leadframes: A leadframe having a die thereon connects a high current conductive area on the die to a leadframe contact using copper clip that include a structure portion that is received with a recess-like “tub” that is formed in the leadframe contact which tub is shaped to conform to the geometric... Agent: Wallace G. Walter

20090121331 - Self-aligning structures and method for integrated circuits: A lead frame having a die thereon connects a high current conductive area on the die to a lead frame contact using a copper clip that includes a structure portion that is received with a recess-like “tub” formed in the lead frame contact. In the preferred embodiment, a lead frame... Agent: Wallace G. Walter

20090121332 - Semiconductor chip package: A semiconductor chip package includes a lead frame, an insulation member, a chip, bonding wires and a sealing member. The lead frame includes a plurality of first leads and a plurality of second leads. The second leads have a chip adhesion region. The insulation member fills a space between the... Agent: Stanzione & Kim, LLP

20090121333 - Flexible substrates having a thin-film barrier: Methods and apparatus provide for: applying an inorganic barrier layer to at least a portion of a flexible substrate, the barrier layer being formed from a low liquidus temperature (LLT) material; and sintering the inorganic barrier layer while maintaining the flexible substrate below a critical temperature.... Agent: Corning Incorporated

20090121334 - Manufacturing method of semiconductor apparatus and semiconductor apparatus: A required number of wiring layers 32 are formed on a temporary substrate 31 of which thermal expansion coefficient differs from that of a semiconductor chip 38 by 2×10−6/° C. or less and a part of the wiring layer of the uppermost layer is exposed to an opening part of... Agent: Rankin, Hill & Clark LLP

20090121335 - Integrated circuit package system with package integration: An integrated circuit package system comprising: providing a substrate having a cavity; sealing a package over the cavity of the substrate; and forming an encapsulant over the package and a portion of the substrate substantially preventing the encapsulant from forming in the cavity.... Agent: Law Offices Of Mikio Ishimaru

20090121338 - Assemblies and multi chip modules including stacked semiconductor dice having centrally located, wire bonded bond pads: An assembly method that includes providing a first semiconductor device and positioning a second semiconductor device at least partially over the first semiconductor device is disclosed. Spacers space the active surface of the first semiconductor device substantially a predetermined distance apart from the back side of the second semiconductor device.... Agent: Trask Britt, P.C./ Micron Technology

20090121337 - Semiconductor device manufacturing method and semiconductor: To divide a semiconductor wafer by stealth dicing, a test pad in a cutting region and an alignment target are collectively arranged along one side in a width direction of the cutting region, and a laser beam for forming a modified region is irradiated to a position away in plane... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20090121336 - Stacked semiconductor package: A stacked semiconductor package provides an enhanced data storage capacity along with an improved data processing speed. The stacked semiconductor package includes a substrate having chip selection pads and a connection pad; a semiconductor chip module including a plurality of semiconductor chips including data bonding pads, a chip selection bonding... Agent: Ladas & Parry LLP

20090121339 - Semiconductor module and image pickup apparatus: In a semiconductor module including multiple semiconductor devices, a signal that flows through a bonding wire connected to one semiconductor device is prevented from acting as noise which affects another semiconductor device, thereby improving the operation reliability of the semiconductor module. A second semiconductor device provided alongside a first semiconductor... Agent: Mcdermott Will & Emery LLP

20090121340 - Fully testable surface mount die package configured for two-sided cooling: A power semiconductor die is sandwiched between upper and lower heat conducting laminate structures to form a surface mount component that is configured for double-sided cooling. The upper heat conducting laminate structure electrically couples top-side die terminal(s) to conductors formed on the inboard face of the lower heat conducting laminate... Agent: Delphi Technologies, Inc.

20090121341 - Component for semiconductor package and manufacturing method of component for semiconductor package: A component for semiconductor package which has a protective insulating layer on at least one surface of a component body and exposes a conductive material of the component body to an opening part of the protective insulating layer is manufactured by a method including the steps of (a) forming a... Agent: Rankin, Hill & Clark LLP

20090121342 - Semiconductor device including main substrate and sub substrates and fabrication method of the same: A semiconductor device according to a preferred embodiment of the present invention is a semiconductor device including a main substrate and one or more sub substrates, and the semiconductor device includes first heat generating devices mounted on the sub substrates, sub-substrate heatsinks mounted to the first heat generating devices, and... Agent: Mark D. Saralino (general) Renner, Otto, Boisselle & Sklar, LLP

20090121343 - Carbon nanotube structures for enhancement of thermal dissipation from semiconductor modules: Disclosed are embodiments of an improved semiconductor wafer structure having protected clusters of carbon nanotubes (CNTs) on the back surface and a method of forming the improved semiconductor wafer structure. Also disclosed are embodiments of a semiconductor module with exposed CNTs on the back surface for providing enhanced thermal dissipation... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20090121344 - Silicon interposer and semiconductor device package and semiconductor device incorporating the same: A silicon interposer 30 being held between a wiring board 40 and a semiconductor element 60 to electrically connect the wiring board 40 to the semiconductor element 60, wherein through-hole electrodes 17 for electrically connecting the wiring board 40 to the semiconductor element 60 are each formed of a base... Agent: Drinker Biddle & Reath (dc)

20090121345 - Silicon interposer producing method, silicon interposer and semiconductor device package and semiconductor device incorporating silicon interposer: A silicon interposer producing method comprising the steps of forming through holes 12 in a silicon wafer 11, forming an oxide coating 13 on the silicon wafer 11, providing a power feeding layer 14 for plating on one of the surfaces of the through holes 12, supplying a low thermal... Agent: Drinker Biddle & Reath (dc)

20090121346 - Flexible interposer for stacking semiconductor chips and connecting same to substrate: A semiconductor device with a first (101) and a second (111) semiconductor chip assembled on an insulating flexible interposer (120). The interposer, preferably about 25 to 50 μm thick, has conductive traces (121), a central planar rectangular area and on each side of the rectangle a wing bent at an... Agent: Texas Instruments Incorporated

20090121347 - Semiconductor device and semiconductor device assembly: Disclosed are a semiconductor device wherein warping of a semiconductor chip due to a sudden temperature change can be prevented without increasing the thickness, and a semiconductor device assembly. The semiconductor device comprises a semiconductor chip, a front side resin layer formed on the front surface of the semiconductor chip... Agent: Rabin & Berdo, PC

20090121350 - Board adapted to mount an electronic device, semiconductor module and manufacturing method therefore, and portable device: A board adapted to mount an electronic device includes an insulating resin layer, a wiring layer of a predetermined pattern provided on one surface of the insulating resin layer, a bump electrode provided on an insulating-resin-layer-side surface of the wiring layer, and a covering, formed of a metal layer, which... Agent: Mcdermott Will & Emery LLP

20090121348 - Chip structure and process thereof and stacked structure of chips and process thereof: A chip structure and a stacked structure composed of the chip structures are provided. The chip structure has a substrate and at least one compliant contact. Furthermore, the chip structure may further have a redistribution layer for redistributing pads originally disposed around the substrate in a specific arrangement. The substrate... Agent: Jianq Chyun Intellectual Property Office

20090121352 - Mutli-package module and electronic device using the same: A package substrate for a multi-package module. The package substrate comprises a substrate having a die region and at least one thermal channel region outwardly extending to an edge of the substrate from the die region. An array of bumps is arranged on the substrate except in the die and... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090121351 - Process for forming a bump structure and bump structure: A method for forming a bump structure and a bump structure for conductive interconnection with another element having at least one of microelectronic devices or wiring thereon, used as an electric connection in an electronic circuit, includes the steps of forming a mandrel by steps including forming at least one... Agent: Tessera Lerner David Et Al.

20090121349 - Semiconductor device and a method of manufacturing the same: A technique which improves the reliability in coupling between a bump electrode of a semiconductor chip and wiring of a mounting substrate, more particularly a technique which guarantees the flatness of a bump electrode even when wiring lies in a top wiring layer under the bump electrode, thereby improving the... Agent: Miles & Stockbridge PC

20090121353 - Dual damascene beol integration without dummy fill structures to reduce parasitic capacitance: In accordance with the invention, there are methods of making semiconductor devices. The method can include forming a hard mask layer over a dielectric layer, forming a via through the hard mask layer and the dielectric layer, and depositing an anti-reflective coating in the via and over the hard mask... Agent: Texas Instruments Incorporated

20090121355 - Semiconductor device and method for manufacturing the same: A semiconductor device includes a semiconductor substrate, an oxygen-containing insulating film disposed above the above-described semiconductor substrate, a concave portion disposed in the above-described insulating film, a copper-containing first film disposed on an inner wall of the above-described concave portion, a copper-containing second film disposed above the above-described first film... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090121354 - Semiconductor device and method of fabricating the same: In a method of fabricating a semiconductor device a plurality of metal lines is formed over a semiconductor substrate. A reaction-prevention layer is formed on the metal line of a region in which a via hole will be formed. An interlayer insulating layer is formed over the semiconductor substrate including... Agent: Marshall, Gerstein & Borun LLP

20090121356 - Semiconductor device and method of manufacturing semiconductor device: The semiconductor device according to the present invention includes a first interlayer dielectric film, a plurality of copper damascene wires embedded in the first interlayer dielectric film at an interval from each other, and a diffusion preventing film stacked on the first interlayer dielectric film for preventing diffusion of copper... Agent: Rabin & Berdo, PC

20090121357 - Design structure for bridge of a seminconductor internal node: A design structure for forming connections within a semiconductor device is disclosed. The semiconductor device incorporates a contact bridge between transistor contacts in close proximity. The contact bridge comprises a plurality of metal pillars each having a lower end in electrical contact with first and second transistor elements, respectively; one... Agent: International Business Machines Corporation Dept. 18g

20090121358 - Dual depth trench termination method for improving cu-based interconnect integrity: A trench is formed in a low K dielectric (100) over a plurality of vias (120) also formed in the low K dielectric layer (100). The vias are separated by a distance of less than XV and the edge of the trench is greater than XTO from the edge α... Agent: Texas Instruments Incorporated

20090121359 - Semiconductor device and method for fabricating the same: A semiconductor device includes: a semiconductor substrate; a first insulating film (third insulating film 24) formed on the semiconductor substrate, having a first trench (second interconnect trench 28), and having a composition ratio varying along the depth from an upper face of the first insulating film; and a first metal... Agent: Mcdermott Will & Emery LLP

20090121360 - Semiconductor device having dual damascene structure: The semiconductor device includes multilayer wirings of a dual damascene structure. The multilayer wirings include a first wiring layer formed on a semiconductor substrate and a second wiring layer formed on the first wiring layer. The first wiring layer includes a first insulation film, plural first vias provided in the... Agent: Mcginn Intellectual Property Law Group, PLLC

20090121361 - Semiconductor device and method for manufacturing thereof: A semiconductor device has a first semiconductor chip 10 molded with a resin 12, a first metal 14 provided in the resin 12 in a circumference of the first semiconductor chip 10, and being exposed on a lower surface of the resin 12, a second metal 16 provided in the... Agent: Ingrassia Fisher & Lorenz, P.C.

20090121362 - Semiconductor package and mounting method thereof: A semiconductor package and mounting method of improving reliability by strengthening adhesive strength of both a printed circuit board and a surface mounting package, includes a chip pad on which a semiconductor device is disposed, and lead terminals, wherein at least one of the chip pad and the lead terminals... Agent: Stein, Mcewen & Bui, LLP

20090121363 - Process for producing circuit substrate and circuit substrate obtained in accordance with the process: A process for producing a circuit substrate having a resin sheet having embedded circuit chips which is obtained by embedding circuit chips into a resin sheet, which comprises steps of (a) arranging and fixing circuit chips on a substrate for processing, (b) coating the substrate for processing on which the... Agent: Frishauf, Holtz, Goodman & Chick, PC

20090114896 - Memory device using abrupt metal-insulator transition and method of operating the same: Provided are a memory device that undergoes no structural phase change, maintains a uniform thin film, and can perform a high-speed switching operation, and a method of operating the same. The memory device includes a substrate, an abrupt MIT material layer, and a plurality of electrodes. The abrupt MIT material... Agent: Cantor Colburn, LLP

20090114897 - Phase change memory device capable of increasing sensing margin and method for manufacturing the same: A phase change memory device capable of increasing a sensing margin and a method for manufacturing the same. The phase change memory device includes a semiconductor substrate formed with a device isolation structure which defines active regions; first conductivity type impurity regions formed in surfaces of the active regions and... Agent: Ladas & Parry LLP

20090114898 - Method and apparatus for reducing programmed volume of phase change memory: A phase change memory includes a volume of phase change material disposed between, and coupled to, two electrodes, with the composition of a region of at least one of the two electrodes or phase change material having been compositionally altered to reduce the programmed volume of the phase change material.... Agent: Ovonyx, Inc

20090114899 - Resistance memory and method for manufacturing the same: A resistance memory is manufactured using semiconductor processing to comprise planar dual-tip electrodes so that the electric field in the resistance memory is concentrated to reduce the number of fuses in the dielectric material and improve the device characteristics. The resistance memory comprises: a first memory cell including a first... Agent: Wpat, PC

20090114900 - Semiconductor light-emitting diode: A semiconductor light-emitting diode 20 is provided with a silicon single crystal substrate 201, an intervening layer 203 formed of a Group III nitride semiconductor and stacked on the silicon single crystal substrate 201, and a light-emitting part (205, 206, 207) formed with a p-n-junction hetero-junction structure and stacked on... Agent: Sughrue Mion, PLLC

20090114901 - Room temperature carbon nanotubes integrated on cmos: Embodiments of the invention integrate carbon nanotubes on a CMOS substrate using localized heating. An embodiment can allow the CMOS substrate to be in a room-temperature environment during the carbon nanotube growth process. Specific embodiments utilize a maskless post-CMOS microelectromechanical systems (MEMS) process. The post-CMOS MEMS process according to an... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20090114902 - Tensile strained ge for electronic and optoelectronic applications: A semiconductor structure is provided. The semiconductor structure includes one or more III-IV material-based semiconductor layers. A tensile-strained Ge layer is formed on the one or more a III-IV material-based semiconductor layers. The tensile-strained Ge layer is produced through lattice-mismatched heteroepitaxy on the one or more a III-IV material-based semiconductor... Agent: Gauthier & Connors, LLP

20090114903 - Integrated nanotube and cmos devices for system-on-chip (soc) applications and method for forming the same: An integrated, multilayer nanotube and complementary metal oxide semiconductor (CMOS) device is provided along with a method of forming the same. The device includes at least one CMOS device formed on at least one layer of the device, a first metal wiring layer that is electrically connected to the least... Agent: Greenberg Traurig LLP (la)

20090114904 - Semiconductor devices having nano-line channels: A semiconductor device includes a substrate, a gate electrode on the substrate and source and drain electrodes disposed at respective sides of the gate electrode. The device further includes a nano-line passing through the gate electrode and extending into the source and drain electrodes and having semiconductor characteristics. The nano-line... Agent: Myers Bigel Sibley & Sajovec

20090114909 - Device containing polymer having indolocarbazole- repeat unit and divalent linkage: An electronic device comprising a polymer comprising at least one type of repeat unit comprising at least one type of an optionally substituted indolocarbazole moiety and at least one divalent linkage.... Agent: Patent Documentation Center

20090114907 - Field effect type organic transistor and process for production thereof: A field effect type organic transistor is provided which comprises a source electrode, a drain electrode, and a gate electrode, a gate insulating layer, and an organic semiconductor layer, wherein the gate insulating layer contains an optical anisotropic material having an anisotropic structure formed by light irradiation, and the organic... Agent: Fitzpatrick Cella Harper & Scinto

20090114906 - Materials for n-doping the electron-transporting layers in organic electronic components: f

20090114905 - Organic electrical or electric component with increased lifetime: In order to increase the lifetime of organic electrical or electronic components, the invention provides an organic electrical or electronic component comprising at least one organic functional layer, wherein the component contains an (e-v) quenching substance for singlet oxygen.... Agent: Demont & Breyer, LLC

20090114908 - Organic semiconductor thin film, organic thin film transistor and method of manufacturing organic thin film transistor: Disclosed is an organic semiconductor thin film having excellent coating property and high carrier mobility. Also disclosed are an organic thin film transistor using such an organic semiconductor thin film, and a method for manufacturing such an organic thin film transistor. Specifically disclosed is an organic semiconductor thin film formed... Agent: Cantor Colburn, LLP

20090114911 - Electronic device semiconductor device and manufacturing method thereof: The present invention provides a manufacturing process using a droplet-discharging method that is suitable for manufacturing a large substrate in mass production. A photosensitive material solution of a conductive film is selectively discharged by a droplet-discharging method, selectively exposed to laser light, and developed or etched, thereby allowing only the... Agent: Nixon Peabody, LLP

20090114910 - Semiconductor device: In the present invention, a thin film transistor is formed on a plastic film substrate (1) having anisotropy of thermal shrinkage rate or coefficient of thermal expansion in in-plane directions of the substrate. A channel is formed such thatthe direction (7) in which the thermal shrinkage rate or the coefficient... Agent: Fitzpatrick Cella Harper & Scinto

20090114914 - High performance sub-system design and assembly: A multiple integrated circuit chip structure provides interchip communication between integrated circuit chips of the structure with no ESD protection circuits and no input/output circuitry. The interchip communication is between internal circuits of the integrated circuit chips. The multiple integrated circuit chip structure has an interchip interface circuit to selectively... Agent: Mou-shiung Lin

20090114912 - Mask design elements to aid circuit editing and mask redesign: An integrated circuit (IC) includes a substrate having a device layer and a plurality of metal layers formed thereon. The plurality of metal layers include patterned upper metal layers and lower metal layers, a multi-level metal interconnect structure formed using the plurality of metal layers, where the interconnect structure is... Agent: Texas Instruments Incorporated

20090114913 - Test structure and methodology for three-dimensional semiconductor structures: A plurality of peripheral test structure substrate (PTSS) through vias is formed within a peripheral test structure substrate. A peripheral test structure layer and at least one functional layer are formed on one side of the plurality of the PTSS through vias. The other side of the plurality of the... Agent: Scully, Scott, Murphy & Presser, P.C.

20090114915 - Semiconductor device and manufacturing method thereof: A separation layer containing a halogen element is formed over a glass substrate by a plasma CVD method; a semiconductor element is formed over the separation layer; and separation is then performed inside the separation layer or at its interface, so that the large-area glass substrate and the semiconductor element... Agent: Nixon Peabody, LLP

20090114916 - Photoelectric conversion device and photodetector apparatus having the same: A photoelectric conversion device includes an intrinsic semiconductor layer, a first conductive type semiconductor layer disposed on a first side of the intrinsic semiconductor layer, and a second conductive type semiconductor layer disposed on a second side of the intrinsic semiconductor layer opposite the first side. The intrinsic semiconductor layer... Agent: Cantor Colburn, LLP

20090114918 - Panel structure and manufacturing method thereof: A panel structure and a manufacturing method thereof are provided. The panel structure is disposed in a display device. The panel structure includes a substrate, several first transistors and second transistors. The substrate has a display circuit and a control circuit. The first transistors are disposed at the display circuit... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090114919 - Semiconductor range-finding element and solid-state imaging device: A semiconductor range-finding element and a solid-state imaging device, which can provide a smaller dark current and a removal of reset noise. With n-type buried charge-generation region, buried charge-transfer regions, buried charge read-out regions buried in a surface of p-type semiconductor layer, an insulating film covering these regions, transfer gate... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090114920 - Tft substrate and liquid cyrstal display device having the same: An LCD device includes a first substrate having a first base substrate, patterns disposed at different heights with respect to the first base substrate, and an insulation layer formed on the first base substrate and the patterns. The insulation layer has raised portions corresponding to the patterns. A side of... Agent: Haynes And Boone, LLPIPSection

20090114917 - Thin film transistor and display device having the thin film transistor: A thin film transistor includes a gate electrode, a gate insulating layer covering the gate electrode, a microcrystalline semiconductor layer over the gate insulating layer, an amorphous semiconductor layer over the microcrystalline semiconductor layer, source and drain regions over the amorphous semiconductor layer, source and drain electrodes in contact with... Agent: Eric Robinson

20090114922 - Semiconductor device and method for manufacturing the same, liquid crystal television, and el television: An object of the present invention is to provide a method for manufacturing a semiconductor device having a semiconductor element capable of reducing a cost and improving a throughput with a minute structure, and further, a method for manufacturing a liquid crystal television and an EL television. According to one... Agent: Nixon Peabody, LLP

20090114921 - Thin film transistor, and display device having the thin film transistor: The thin film transistor includes a gate insulating film formed over a gate electrode; a microcrystalline semiconductor film including an impurity element which serves as a donor, formed over the gate insulating film; a pair of buffer layers formed over the microcrystalline semiconductor film; a pair of semiconductor films to... Agent: Eric Robinson

20090114924 - Lightly doped silicon carbide wafer and use thereof in high power devices: A method for manufacturing a silicon carbide single crystal. A silicon carbide single crystal is grown. The crystal has a boron concentration less than 5×1014 cm−3, and a concentration of transition metals impurities less than 5×1014 cm−3. Intrinsic defects in the crystal are minimised. The intrinsic defects include silicon vacancies... Agent: Venable LLP

20090114923 - Semiconductor device: A semiconductor device includes a peripheral voltage withstanding structure, which includes an n− SiC layer, an n SiC layer and a p SiC layer are provided successively on an n+ SiC layer. A trench is formed in the peripheral voltage withstanding structure portion so that the trench passes through the... Agent: Rossi, Kimms & Mcdowell LLP.

20090114926 - Light-emitting device: A light-emitting device includes a pixel having a transistor provided over a substrate, and a light-emitting element. The transistor includes a single-crystal semiconductor layer which forms a channel formation region, a silicon oxide layer is provided between the substrate and the single-crystal semiconductor layer, a source or a drain of... Agent: Eric Robinson

20090114925 - Photon pair generating device: A photon pair generating device capable of further increasing generation efficiency of a correlation photon pair is provided, the photon pair generating device generating the correlation photon pair by a hyper-parametric scattering. A quantum well (4) is provided in a resonator (2). An incident light radiated from a light source... Agent: Nixon & Vanderhye, PC

20090114927 - Multi-chips with an optical interconnection unit: A multi-chip having an optical interconnection unit is provided. The multi-chip having an optical interconnection unit includes a plurality of silicon chips sequentially stacked, a plurality of optical device arrays on a side of each of the plurality of the silicon chips such that the optical device arrays correspond to... Agent: Harness, Dickey & Pierce, P.L.C

20090114930 - Light-emitting diode and light-emitting diode array light source: A light-emitting diode (LED) includes a substrate, a metallic buffer layer, a first type doped semiconductor layer, a light-emitting layer, a second type doped semiconductor layer, a first electrode, and a second electrode. The substrate has a plurality of bowl-shaped concaves or convexes on a surface thereof. The metallic buffer... Agent: Jianq Chyun Intellectual Property Office

20090114928 - Lighting structure comprising at least one light-emitting diode, method for making same and uses thereof: A luminous structure based on light-emitting diodes, which includes: a first dielectric element with a substantially plane main face associated with a first electrode; a second dielectric element with a substantially plane main face associated with a second electrode that faces the first electrode and lies in a different plane;... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090114929 - White light emitting device: There is provided a white light emitting device that prevents a red phosphor from resorbing wavelength-converted light to improve white luminous efficiency. A white light emitting device according to an aspect of the invention includes a package body; at least two LED chips mounted to the package body and emitting... Agent: Mcdermott Will & Emery LLP

20090114931 - Light emitting module and method of forming the same: A method for forming a pixel of an LED light source is provided. The method includes following steps: forming a first layer on a substrate; forming a second layer and a first light-emitting active layer on the first layer; exposing a portion of an upper surface of the first layer;... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090114932 - Light source and method of controlling light spectrum of an led light engine: A light emitting diode (LED) light engine includes a substrate for supporting the LED light engine. Conductive traces are formed over the substrate using a thick film screen printing, physical vapor deposition, chemical vapor deposition, electrolytic plating, printed circuit board fabricating, or electroless plating process. The conductive traces include mounting... Agent: Robert D. Atkins

20090114933 - Gan based semiconductor light emitting device and lamp: A method for producing a gallium nitride based compound semiconductor light emitting device which is excellent in terms of the light emitting properties and the light emission efficiency and a lamp is provided. In such a method for producing a gallium nitride based compound semiconductor light emitting device, which is... Agent: Sughrue Mion, PLLC

20090114939 - Illumination system comprising a radiation source and a luminescent material: An illumination system, comprising a radiation source and a luminescent material comprising at least one phosphor capable of absorbing a part of the light emitted by the radiation source and emitting light having a wavelength different from that of the absorbed light; wherein said at least one phosphor is a... Agent: Philips Intellectual Property & Standards

20090114934 - Led light emitter with heat sink holder and method for manufacturing the same: An LED light emitter with heat sink holder and a method for manufacturing it are both disclosed. The LED light emitter with heat sink holder includes a heat sink holder and at least an LED chip. The heat sink holder is made of high thermal conductivity coefficient, and includes a... Agent: Rosenberg, Klein & Lee

20090114936 - Light emitting device: The light emitting device 10 of the present invention comprises a light emitting element 30, connecting terminals 21a, 21b connected with the light emitting element30, a package 12 which has a recess 40 wherein the light emitting element 30 is mounted and from which a part of each connecting terminal... Agent: Birch Stewart Kolasch & Birch

20090114935 - Light emitting diode and process for fabricating the same: A light emitting diode (LED) is provided. The LED at least includes a substrate, a saw-toothed multilayer, a first type semiconductor layer, an active emitting layer and a second type semiconductor layer. In the LED, the saw-tooth multilayer is formed opposite the active emitting layer below the first type semiconductor... Agent: J.c. Patents Suite 250

20090114938 - Light emitting diode with sealant having filling particles: An exemplary light emitting diode (LED) includes an LED chip and a transparent sealant covering the LED chip. The sealant contains transparent filling particles and phosphor particles, wherein the filling particles are adjacent each other. Intervals are defined between the filling particles, and the phosphor particles are located in the... Agent: Wei Te Chung Foxconn International, Inc.

20090114937 - Resin-sealed light emitting device and its manufacturing method: An LED package is formed by separating a sealed body containing a substrate having a plurality of regions into individual bodies. The LED package includes an LED chip mounted on a recessed part in an upper surface of a substrate, a sealing resin to cover an entire surface of the... Agent: Birch Stewart Kolasch & Birch

20090114940 - Light-emitting device: The invention provides a light-emitting device, comprising a light-emitting element and a surface plasmon coupling element connected to the light-emitting element. In an embodiment of the invention, the surface plasmon coupling element comprises a dielectric layer connected to the light-emitting element and a metal layer on the dielectric layer. In... Agent: Quintero Law Office, PC

20090114942 - Apparatus for manufacturing group-iii nitride semiconductor layer, method of manufacturing group-iii nitride semiconductor layer, group-iii nitride semiconductor light-emitting device, method of manufacturing group-iii nitride semiconductor light-emitting: The present invention provides an apparatus for manufacturing a group-III nitride semiconductor layer having high crystallinity. An embodiment of the present invention provides an apparatus for manufacturing a group-III nitride semiconductor layer on a substrate 11 using a sputtering method. The apparatus includes: a chamber 41; a target 47 that... Agent: Sughrue Mion, PLLC

20090114944 - Method for fine processing of substrate, method for fabrication of substrate, and light emitting device: (V) forming a hole with a diameter equivalent to the inner diameter of the hole of the mask on the substrate below the hole of the mask by etching the substrate using the mask. The light emitting device is made of a nitride semiconductor and is formed with a fine... Agent: Fitch, Even, Tabin & Flannery

20090114943 - Nitride semiconductor free-standing substrateand device using the same: A nitride semiconductor free-standing substrate includes a surface inclined in a range of 0.03° to 1.0° from a C-plane, and an off-orientation that an angle defined between a C-axis and a tangent at each point on a whole surface of the substrate becomes maximum is displaced in a range of... Agent: Mcginn Intellectual Property Law Group, PLLC

20090114941 - Semiconductor device and method of fabricating the same and method of forming nitride based semiconductor layer: A GaN layer is grown on a sapphire substrate, an SiO2 film is formed on the GaN layer, and a GaN semiconductor layer including an MQW active layer is then grown on the GaN layer and the SiO2 film using epitaxial lateral overgrowth. The GaN based semiconductor layer is removed... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090114945 - Spintronics components without non-magnetic interplayers: A spintronics element comprises two ferromagnetic layers without a non-magnetic interlayer between them. The two ferromagnetic layers may be independently switched by various means such as but not limited to applying one or more external magnetic fields, and/or employing current induced switching, and/or applying optical spin-pumping.... Agent: Browdy And Neimark, P.l.l.c. 624 Ninth Street, Nw

20090114946 - Semiconductor device having a control circuit and method of its manufacture: A semiconductor has an IGBT active section and a control circuit section for detecting an IGBT abnormal state. A collector region is formed on the back surface side (i.e., on the IGBT collector side) in a selective manner, namely right under the IGBT active section.... Agent: Rossi, Kimms & Mcdowell LLP.

20090114947 - Semiconductor device and inverter circiut having the same: A semiconductor device includes a semiconductor substrate, an insulated gate transistor formed to the semiconductor substrate, a diode formed to the semiconductor substrate, and a control transistor formed to the semiconductor substrate. A first current terminal of the insulated gate transistor is coupled to a cathode of the diode at... Agent: Posz Law Group, PLC

20090114948 - Semiconductor device: To provide a semiconductor device that has a sufficiently low on-resistance and excellent low-capacitance and high-speed characteristics as compared with conventional GaN-based diodes. The semiconductor device includes: a substrate (101); a buffer layer (102); a stack structure (103 and 104) including at least one heterojunction unit (103 and 104) that... Agent: Greenblum & Bernstein, P.L.C

20090114949 - High-mobility trench mosfets: High-mobility vertical trench DMOSFETs and methods for manufacturing are disclosed. A source region, a drain region or a channel region of a high-mobility vertical trench DMOSFET may comprise silicon germanium (SiGe) that increases the mobility of the charge carriers in the channel region. In some embodiments the channel region may... Agent: Joshua D. Isenberg Jdi Patent

20090114950 - Semiconductor device and method of manufacturing such a device: The invention relates to a semiconductor device (10) comprising a substrate (11) and a semiconductor body (1) of silicon having a semiconductor layer structure comprising, in succession, a first and a second semiconductor layer (2, 3), and having a surface region of a first conductivity type which is provided with... Agent: Nxp, B.v. Nxp Intellectual Property Department

20090114951 - Memory device: A memory device can be implemented including word lines connected to an array of memory transistors. Each memory transistor is also connected to bit lines and a select transistor. The select transistors each have their sources connected to a conductive source line, by a shunt and the gate of each... Agent: Fish & Richardson P.C.

20090114952 - Interconnect components of a semiconductor device: Embodiments comprise an adjusted polysilicon gate pitch to metal wire pitch relationship to improve area scalars while increasing ACLV tolerance with a fixed polysilicon gate pitch. In some embodiments, the wire pitch for at least one metallization layer is adjusted to match the pitch for the polysilicon gate. In one... Agent: Ibm Coporation (rtp) C/o Schubert Osterrieder & Nickelson PLLC

20090114953 - Method for achieving uniform etch depth using ion implantation and a timed etch: A method of performing a timed etch of a material to a precise depth is provided. In this method, ion implantation of the material is performed before the timed etch. This ion implantation process substantially enhances the etch rate of the material within a precisely controlled depth range corresponding to... Agent: Bever, Hoffman & Harms, LLP

20090114954 - Method of forming a device by removing a conductive layer of a wafer: A method of forming a MEMS device provides a wafer having a base with a conductive portion. The wafer also has an intermediate conductive layer. After it provides the wafer, the method adds a diaphragm layer to the wafer. The method removes at least a portion of the intermediate conductive... Agent: Bromberg & Sunstein LLP

20090114955 - Method for fabricating a fin-shaped semiconductor structure and a fin-shaped semiconductor structure: A fin-shaped structure is formed from a semiconductor material. The fin-shaped structure is processed to generate a tensile strain within the semiconductor material along a longitudinal direction of the fin.... Agent: Slater & Matsil LLP

20090114956 - Semiconductor device and manufacturing method thereof: A semiconductor device includes a semiconductor substrate, a gate insulating film formed over the semiconductor substrate, a gate electrode formed on the gate insulating film, a first semiconductor layer which is embedded into a portion on both sides of the gate electrode in the semiconductor substrate, and which includes Si... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090114957 - Semiconductor device and method of manufacturing the same: A semiconductor device and a method thereof that maximizes DC and AC parameter properties of a MOS transistor having a buried channel. The device includes a semiconductor substrate having a device separation film, a gate pattern formed over the semiconductor substrate, a well region formed in the semiconductor substrate, the... Agent: Sherr & Vaughn, PLLC

20090114958 - Wiring board and method for manufacturing the same: A wiring board with an electronic device comprising a plurality of trenches arranged in parallel on a substrate, a common trench communicating the plurality of trenches with each other at one of their ends on the substrate, a metal layer formed at the bottom of the plurality of trenches, and... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090114961 - Image sensor: Provided is an image sensor. According to embodiments, the subject image sensor can include a photodiode for converting incident light into electrical signals, a reset transistor for resetting a voltage value of a unit pixel, a drive transistor for providing an output voltage, a select transistor for selecting the unit... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20090114960 - Image sensor and a method for manufacturing the same: An image sensor and method for manufacturing the same are provided. According to an embodiment, the image sensor includes a photodiode on a semiconductor substrate according to unit pixels; an insulating layer arranged on the semiconductor substrate; and an inter metal dielectric (IMD) including metal wirings arranged on the insulating... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20090114963 - Image sensor and method for manufacturing the same: An image sensor and a method for manufacturing the same are provided. The image sensor can include a lower interconnection for connecting transistor circuitry provided on a substrate to a photodiode element provided above the transistor circuitry, a lower electrode on the lower interconnection, and the photodiode element including an... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20090114964 - Image sensor and method for manufacturing the same: An image sensor includes a first substrate having a lower wiring line and electric circuitry formed therein, a bonding layer formed over the first substrate, a second substrate bonded to the first substrate via the bonding layer, a vertical-type photodiode formed in the second substrate, and a contact plug formed... Agent: Sherr & Vaughn, PLLC

20090114962 - Image sensor and method for manufacturing thereof: Disclosed are an image sensor and a method for manufacturing the same. The image sensor can include a first pixel including a first photodiode and a first gate; a second pixel adjacent the first pixel and including a second photodiode and a second gate; and a barrier layer between the... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20090114965 - Image sensor and method of manufacturing the same: An image sensor and a method of manufacturing the same that includes providing a semiconductor substrate having a photodiode, forming a color filter over the photodiode, forming a micro lens over the color filter and then forming at least one metal layer vertically extending through the microlens at an outer... Agent: Sherr & Vaughn, PLLC

20090114959 - Low dark current image sensors with epitaxial sic and/or carbonated channels for array transistors: A pixel cell having a substrate with a isolation channel formed of higher carbon concentrate such as SiC or carbonated silicon. The channel comprising SiC or carbonated silicon is provided over the substrate of the pixel cell to reduce the dark current leakage.... Agent: Dickstein Shapiro LLP

20090114966 - Dram device having a gate dielectric layer with multiple thicknesses: A transistor device employed in a support circuit of a DRAM includes a semiconductor substrate having thereon a gate trench, a recessed gate embedded in the gate trench, a source doping region disposed at one side of the recessed gate, a drain doping region disposed at the other side of... Agent: North America Intellectual Property Corporation

20090114967 - Transistors having a channel region between channel-portion holes and methods of forming the same: According to some embodiments of the invention, transistors have channel regions between channel-portion holes. Methods of forming the same include at least two channel-portion holes disposed in a semiconductor substrate. Line patterns are formed in parallel to be spaced apart from each other on a main surface of the semiconductor... Agent: Marger Johnson & Mccollom, P.C.

20090114968 - Recessed-gate transistor device having a dielectric layer with multi thicknesses and method of making the same: A recessed-gate transistor device includes a gate electrode embedded in a gate trench formed in a semiconductor substrate, wherein the gate trench includes a vertical sidewall and a U-shaped bottom. A source region is provided at one side of the gate trench within the semiconductor substrate. A drain region is... Agent: North America Intellectual Property Corporation

20090114969 - Silicon carbide semiconductor device and related manufacturing method: An SiC semiconductor device and a related manufacturing method are disclosed having a structure provided with a p+-type deep layer formed in a depth equal to or greater than that of a trench to cause a depletion layer between at a PN junction between the p+-type deep layer and an... Agent: Posz Law Group, PLC

20090114970 - Embedded dram with increased capacitance and method of manufacturing same: An embedded DRAM memory device comprising one or more cylinder type cell capacitors. Contact pillars (25) are provided in a PMD layer (27) on a substrate (10), and the lower (or storage mode) electrodes of the capacitors are formed by depositing an end stop layer (40) over the contact pillars... Agent: Nxp, B.v. Nxp Intellectual Property Department

20090114971 - Cmos eprom and eeprom devices and programmable cmos inverters: A CMOS EPROM, EEPROM or inverter device includes an nFET device with a thin gate dielectric layer and a pFET device juxtaposed with the nFET device with a thick gate dielectric layer and a floating gate electrode. The thick gate dielectric layer is substantially thicker than the thin gate dielectric... Agent: Graham S. Jones, Ii

20090114972 - Integrated circuit embedded with non-volatile one-time-programmable and multiple-time programmable memory: A programmable non-volatile device uses a floating gate that functions as a FET gate that overlaps a portion of a source/drain region. This allows a programming voltage for the device to be imparted to the floating gate through capacitive coupling, thus changing the state of the device. The invention can... Agent: J. Nicholas Gross, Attorney

20090114973 - Method for forming self-aligned contacts and local interconnects simultaneously: The present invention relates generally to semiconductors, and more specifically to semiconductor memory device structures and an improved fabrication process for making the same. The improved fabrication process allows the self-aligned contacts and local interconnects to the processed simultaneously. The process allows the minimal distance requirement between the self-aligned contacts... Agent: Stout, Uxa, Buyan & Mullins LLP

20090114975 - Semiconductor device: The present invention provides a semiconductor device, which includes a substrate and a sensing memory device. The substrate includes a metal-oxide-semiconductor transistor having a gate. The sensing memory device is disposed on the gate of the metal-oxide-semiconductor transistor and includes followings. The second conductive layer is covering the first conductive... Agent: Jianq Chyun Intellectual Property Office

20090114974 - Semiconductor device including a plurality of memory cells and method of manufacturing semiconductor device: A semiconductor device includes a semiconductor substrate, a plurality of memory cells, a plurality of bit lines, and a plurality of source lines. The memory cells are located in the semiconductor substrate. Each of the memory cells includes a trench provided in the semiconductor substrate, an oxide layer disposed on... Agent: Posz Law Group, PLC

20090114976 - Programming and erasing method for charge-trapping memory devices: A method for programming and erasing charge-trapping memory device is provided. The method includes applying a first negative voltage to a gate causing a dynamic balance state (RESET\ERASE state). Next, a positive voltage is applied to the gate to program the device. Then, a second negative voltage is applied to... Agent: Stout, Uxa, Buyan & Mullins LLP

20090114977 - Nonvolatile memory device having charge trapping layer and method for fabricating the same: Disclosed herein is a nonvolatile memory device having a charge trapping layer and a method of making the same. The nonvolatile memory device includes a substrate, a tunneling layer disposed on the substrate, a charge trapping layer disposed on the tunneling layer, a first blocking layer disposed on the charge... Agent: Marshall, Gerstein & Borun LLP

20090114979 - Finfet device with gate electrode and spacers: A semiconductor device includes a source region, a drain region, and a fin that connects the source region to the drain region. A gate electrode having a substantially planar surface overlies the fin and is positioned between the drain region and the source region. A first set of spacers is... Agent: Slater & Matsil LLP

20090114978 - Vertical transistor and method for forming the same: A vertical transistor and a method for forming the same. The vertical transistor includes a semiconductor substrate having pillar type active patterns formed on a surface thereof; first junction regions formed in the surface of the semiconductor substrate on both sides of the active patterns; screening layers formed on sidewalls... Agent: Ladas & Parry LLP

20090114980 - Semiconductor device having vertical and horizontal type gates and method for fabricating the same: A semiconductor device having both vertical and horizontal type gates and a method for fabricating the same for obtaining high integration of the semiconductor device and integration with other devices while also maximizing the breakdown voltage and operational speed and preventing damage to the semiconductor device.... Agent: Sherr & Vaughn, PLLC

20090114981 - Semiconductor device with vertical channel transistor and method for fabricating the same: In a high speed vertical channel transistor, a pillar structure is formed over a substrate, a gate electrode surrounds an outer wall of a lower portion of the pillar structure; and a word line extends in a direction to partially contact an outer wall of the gate electrode. The word... Agent: Townsend And Townsend And Crew, LLP

20090114982 - Semiconductor device and manufacturing method thereof: A disclosed semiconductor device provided with a power MOSFET includes: a semiconductor substrate constituting a drain; a trench formed on a surface of the semiconductor substrate; a gate electrode in the trench; a body diffusion layer on a surface side of the semiconductor substrate, the body diffusion layer being positioned... Agent: Cooper & Dunham, LLP

20090114983 - Power transistor capable of decreasing capacitance between gate and drain: A power transistor capable of decreasing capacitance between a gate and a drain includes a backside mental layer, a substrate formed on the backside mental layer, a semiconductor layer formed on the substrate, and a frontside mental layer formed on the semiconductor layer. The semiconductor layer comprises a first trench... Agent: North America Intellectual Property Corporation

20090114986 - Field plate trench transistor and method for producing it: A field plate trench transistor having a semiconductor body. In one embodiment the semiconductor has a trench structure and an electrode structure embedded in the trench structure. The electrode structure being electrically insulated from the semiconductor body by an insulation structure and having a gate electrode structure and a field... Agent: Dicke, Billig & Czaja

20090114984 - Power device and a method for producing a power device: A power device with improved reliability and a method for producing the same is disclosed. One embodiment provides an active area having an electrical power dissipation characteristic, a metallization layer portion configured with respect to the active area so that the dissipation characteristic of the active area results in heating... Agent: Dicke, Billig & Czaja

20090114985 - Semiconductor apparatus and method for manufacturing the same: A semiconductor apparatus is disclosed. The semiconductor apparatus includes a semiconductor substrate that has a first surface and a second surface opposite to each other. The semiconductor apparatus further includes multiple double-sided electrode elements each having a pair of electrodes located respectively on the first and second surfaces of the... Agent: Posz Law Group, PLC

20090114987 - Semiconductor device and manufacturing method thereof: A semiconductor device includes a semiconductor layer with an impurity of a first conductivity type diffused therein, and a local insulating layer, source layer, and a drain layer formed therein. The drain layer has an impurity of a second conductivity type opposite to the first conductivity type. A gate electrode... Agent: Rabin & Berdo, PC

20090114988 - Semiconductor integrated circuit device and method for manufacturing same: A semiconductor integrated circuit device (10) which has a layered structure is composed of a plurality of semiconductor layers (L1, L2, L3) in which an integrated circuit is formed on a substrate. Each of the semiconductor layers (L1, L2, L3) has a semiconductor integrated circuit portion (16) that includes the... Agent: Birch Stewart Kolasch & Birch

20090114989 - Semiconductor memory device and manufacturing method thereof: This disclosure concerns a semiconductor memory device including a semiconductor substrate; a buried insulation film provided on the semiconductor substrate; a semiconductor layer provided on the buried insulation film; a source layer and a drain layer provided in the semiconductor layer; a body region provided in the semiconductor layer between... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090114990 - High voltage semiconductor device and method for manufacturing the same: A semiconductor device, particularly, a method for manufacturing a high voltage semiconductor device is disclosed. The method includes forming a high voltage gate oxide film on a semiconductor substrate having a high voltage device region and a low voltage device region, forming a gate electrode on the semiconductor substrate having... Agent: Sherr & Vaughn, PLLC

20090114991 - Semiconductor devices having a contact structure and methods of fabricating the same: A semiconductor device includes an isolation region formed in a semiconductor substrate to define an active region. First and second impurity regions spaced apart from each other are formed in the active region. A gate trench region crosses the active region between the first and second impurity regions and extends... Agent: Myers Bigel Sibley & Sajovec

20090114995 - Complementary semiconductor device and method of manufacturing the same: A complementary semiconductor device includes a semiconductor substrate, a first semiconductor region formed on a surface of the semiconductor substrate, a second semiconductor region formed on the surface of the semiconductor substrate apart from the first semiconductor region, an n-MIS transistor having a first gate insulating film including La and... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090114992 - Mixed gate cmos with single poly deposition: A method for fabricating metal gate and polysilicon gate FET devices on the same chip is disclosed. The method avoids the use of two separate masks during gate stack fabrication of the differing gates. By using a single mask, tighter NFET to PFET distances can be achieved, and the fabrication... Agent: Innovation Interface, LLC

20090114996 - Semiconductor device and manufacturing method thereof: A semiconductor device includes a substrate having first and second regions on a surface thereof, a first conductivity type first MISFET formed in the first region and a second conductivity type second MISFET formed in the second region. The first MISFET includes a silicon oxide film or a silicon oxynitride... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090114993 - Semiconductor device and method for manufacturing same: A semiconductor device includes a silicon substrate; a P channel type field effect transistor including a first gate insulating film on the substrate, a first gate electrode on the first gate insulating film and a first source/drain region; and an N channel type field effect transistor including a second gate... Agent: Young & Thompson

20090114994 - Structure of mtcmos cell and method for fabricating the mtcmos cell: An architecture of the layout of the MTCMOS standard cell designed for low power consumption is supplemented so that the pick-up cells are included in the power line of the MTCMOS cell. Therefore, when the logic circuit is constructed using the library layout of the MTCMOS cell in which the... Agent: Sherr & Vaughn, PLLC

20090114997 - Reduced metal pipe formation in metal silicide contacts: Formation of metal pipes resulting from formation of metal silicide contacts are reduced or avoided. To reduce formation of metal pipes, an epitaxial layer is formed over the diffusion region on which the metal silicide contact is formed. The epitaxial layer reduces defects which enhances diffusion of metal atoms or... Agent: HorizonIPPte Ltd

20090114998 - Semiconductor device and method for fabricating same: A first MIS transistor is formed in a low voltage transistor formation region and includes a gate insulating film and a first gate electrode composed of a metal film and a polycrystalline silicon film. A second MIS transistor is formed in a high voltage transistor formation region and includes a... Agent: Mcdermott Will & Emery LLP

20090114999 - Transistors of semiconductor device having channel region in a channel-portion hole and methods of forming the same: According to some embodiments of the invention, transistors of a semiconductor device have a channel region in a channel-portion hole. Methods include forming embodiments of the transistor having a channel-portion hole disposed in a semiconductor substrate. A channel-portion trench pad and a channel-portion layer are sequentially formed at a lower... Agent: Marger Johnson & Mccollom, P.C.

20090115000 - Semiconductor device and method for manufacturing the same: A semiconductor device and a method for manufacturing the same includes forming a poly-gate including a first poly-gate portion and a second poly-gate portion on and/or over a semiconductor substrate, forming a trench having a predetermined depth in the poly-gate, implanting dopant ions into the entire surface of the semiconductor... Agent: Sherr & Vaughn, PLLC

20090115001 - Mos devices with multi-layer gate stack: An embodiment of a semiconductor device includes a semiconductor substrate having a principal surface, spaced-apart source and drain regions separated by a channel region at the principal surface, and a multilayered gate structure located over the channel region. The multilayered gate structure includes a gate dielectric layer in contact with... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20090115002 - Semiconductor device: There is provided a semiconductor device including: a first field effect transistor region including a gate insulating film, a gate electrode and gate sidewalls formed in a P channel forming region; and a second field effect transistor region including a gate insulating film, a gate electrode and gate sidewalls formed... Agent: Mcginn Intellectual Property Law Group, PLLC

20090115003 - Semiconductor device and method for fabricating the same: A method for fabricating a semiconductor device includes forming a stacked layer including a tungsten layer, forming a hard mask pattern over the stacked layer, and oxidizing a surface of the hard mask pattern to form a stress buffer layer. A portion of the stacked layer uncovered by the hard... Agent: Townsend And Townsend And Crew, LLP

20090115004 - Surface acoustic wave sensor assemblies: The invention is directed to a surface acoustic wave sensor assembly that makes use of a Z-axis conductive layer, such as a Z-axis conductive elastomer, or the like. In particular, a Z-axis conductive elastomer couples a circuit layer to a surface acoustic wave (SAW) sensor in order to form a... Agent: 3m Innovative Properties Company

20090115008 - Manufacturing method of an electronic device including overmolded mems devices: A method manufactures an electronic device comprising a MEMS device overmolded in a protective casing. The MEMS device includes an active surface wherein a portion of the MEMS device is integrated, and is sensitive, through a membrane, to chemical/physical variations of a fluid. Prior to the molding step, at least... Agent: Seed Intellectual Property Law Group PLLC

20090115007 - Memes package structure: A package structure including a chip, a lid, a substrate, a plurality of wires, an encapsulant, and a moisture resistive layer is provided. The chip has an active area where at least one MEMS device is disposed. The lid is covered on the chip, and the substrate is used to... Agent: J C Patents, Inc.

20090115009 - Multibit electro-mechanical memory device and manufacturing method thereof: Provided are a multibit electro-mechanical memory device and a method of manufacturing the same. The device may include at least one bit line in a first direction on a substrate; at least one gate line and at least one lower word line in parallel by a given interval and in... Agent: Harness, Dickey & Pierce, P.L.C

20090115005 - Semiconductor ic and manufacturing method of the same: There are disclosed a semiconductor IC whose constitution can be miniaturized to facilitate manufacturing and improve a production efficiency, and a manufacturing method of the semiconductor IC. The manufacturing method of the semiconductor IC includes: forming a wiring line and a circuit element at a front surface of a silicon... Agent: Jacobson Holman PLLC

20090115006 - Soi substrate and semiconductor acceleration sensor using the same: According to the present invention, a SOI substrate includes a first silicon substrate having first and second surfaces; a second silicon substrate having first and second surfaces; and a first insulating layer formed between first surface of the first silicon substrate and the first surface of the second silicon substrates.... Agent: Rabin & Berdo, PC

20090115010 - Package for strain sensor: The invention relates to a package for a strain sensor. The package includes a base part (10) from a strain hardened material, a central part (20) from an annealed material which carries glass fritted leadthroughs, and a lid part (30), wherein the base part, the central part and the lid... Agent: Taylor & Aust, P.C.

20090115012 - Dual image sensor and manufacturing method thereof: Embodiments relate to a dual image sensor which includes a first device including a first wafer having a first inclined step, a first reflective face on an inclined plane on the first inclined step, at least one first microlens over a lower end surface adjacent the first inclined step, and... Agent: Sherr & Vaughn, PLLC

20090115013 - Image sensor and method for manufacturing the same: Disclosed is a method for manufacturing an image sensor capable of inhibiting bridge formation between microlenses and minimizing gaps between microlenses. A photodiode and circuitry can be formed on a substrate according to unit pixel. A color filter layer can be formed on the substrate with color filters corresponding to... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20090115011 - Solid-state imaging device and production method thereof: A solid-state imaging device includes a plurality of photodiode regions arranged in an array, a non-transparent border region existing around each photodiode region, and a microlens array including a plurality of microlenses arranged in an array corresponding to the plurality of photodiode regions; wherein each microlens functions to converge incident... Agent: Venable LLP

20090115014 - Image sensor and method for manufacturing the same: Provided is an image sensor and a method for manufacturing the same. The image sensor includes a substrate on which a circuitry including a first lower metal line and a second lower metal line is formed. A lower electrode is formed on the first lower metal line. A separation metal... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20090115015 - Image sensor and method for manufacturing the same: An image sensor includes defining an active region in a substrate by forming a device isolating layer; and then sequentially forming a photodiode and a logic unit in the active region; and then forming a first passivation layer on the photodiode and the logic unit; and then forming a trench... Agent: Sherr & Vaughn, PLLC

20090115016 - Optical semiconductor device and method for manufacturing the same: An optical semiconductor device is provided with an n-type epitaxial layer (second epitaxial layer) 24 having a low dopant concentration formed on a low concentration p-type silicon substrate 1; a p-type anode layer (first diffusion layer) 25 having a low dopant concentration selectively formed in the n-type epitaxial layer 24... Agent: Mcdermott Will & Emery LLP

20090115017 - Selective formation of trenches in wafers: A wafer substrate, such as a silicon wafer substrate, includes at least one selectively formed substrate trench that may be filled with an isolation material to form an isolation surface. The forming process includes converting at least one silicon wall etched into the wafer substrate into a silicon dioxide wall,... Agent: Honeywell International Inc.

20090115018 - Transient voltage suppressor manufactured in silicon on oxide (soi) layer: A transient voltage-suppressing (TVS) device supported on a semiconductor substrate is applied to protect an electronic device from a transient voltage. The TVS device includes a clamp diode functions with a high-side and a low side diodes for clamping a transient voltage disposed on a top layer of the semiconductor... Agent: Bo-in Lin

20090115019 - Semiconductor device having air gap and method for manufacturing the same: The semiconductor device having an air gap includes an insulation layer formed on a semiconductor substrate and having a metal line forming region. A metal line is formed to fill the metal line forming region of the insulation layer. An air gap is formed between the insulation layer and the... Agent: Ladas & Parry LLP

20090115020 - Electrical fuse and method of making: A semiconductor fuse and methods of making the same. The fuse includes a fuse element and a compressive stress liner that reduces the electro-migration resistance of the fuse element. The method includes forming a substrate, forming a trench feature in the substrate, depositing fuse material in the trench feature, depositing... Agent: Greenblum & Bernstein, P.L.C

20090115021 - Antifuse element in which more than two values of information can be written: An antifuse element includes a plurality of MOS transistors; a first electrode to which source electrodes of the plurality of MOS transistors are commonly connected; a second electrode to which gate electrodes of the plurality of MOS transistors are commonly connected; a third electrode to which at least one of... Agent: Young & Thompson

20090115022 - Semiconductor device: A semiconductor device 1 includes: a copper interconnect layer 14 that has an interconnect containing an inductor 141, which is buried in an interconnect trench formed in an insulating layer 21; and copper interconnect layers 11 to 13, which include no inductor and are buried in interconnect trenches formed in... Agent: Young & Thompson

20090115023 - Capacitor of semiconductor device and method for manufacturing the same: A capacitor of a semiconductor device and a method for manufacturing the same. In one example embodiment, a capacitor of a semiconductor device includes a first electrode, first dielectric layer, second electrode, second dielectric layer, and third electrode sequentially formed on a semiconductor substrate. The capacitor also includes a first... Agent: Workman Nydegger 1000 Eagle Gate Tower

20090115024 - Seal ring structure with improved cracking protection and reduced problems: An integrated circuit structure includes a lower dielectric layer; an upper dielectric layer over the lower dielectric layer; and a seal ring. The seal ring includes an upper metal line in the upper dielectric layer; a continuous via bar underlying and abutting the upper metal line, wherein the continuous via... Agent: Slater & Matsil, L.L.P.

20090115025 - Semiconductor device and method for manufacturing the same: A semiconductor device may include a chip including a chip including a silicon substrate having a semiconductor device area, a pad area and a scribe lane defining an outer contour of the chip. A semiconductor device may be formed in the semiconductor device area, and a pad electrically connected with... Agent: Sherr & Vaughn, PLLC

20090115026 - Semiconductor device having through-silicon vias for high current,high frequency, and heat dissipation: An integrated circuit device (100) with a semiconductor chip (101) having vias (103) two-dimensionally arrayed across the chip area. The metal-filled via core is suitable for electrical power and ground and heat dissipation, or for high frequency signals; at the top, the core is connected to transistors (102), and at... Agent: Texas Instruments Incorporated

20090115027 - Method of fabricating an integrated circuit: A method of fabricating an integrated circuit is disclosed. An etching process is performed in order to create a structure in a substrate. A material layer is generated during the etching process. The material layer is formed from at least one of the group of a Si/C/O composition and/or a... Agent: Slater & Matsil, L.L.P.

20090115028 - Method for manufacturing semiconductor substrate, semiconductor device and electronic device: A semiconductor substrate including a single crystal semiconductor layer with a buffer layer interposed therebetween is manufactured. A semiconductor substrate is doped with hydrogen to form a damaged layer containing a large amount of hydrogen. After the single crystal semiconductor substrate and a supporting substrate are bonded, the semiconductor substrate... Agent: Eric Robinson

20090115030 - N2 based plasma treatment for enhanced sidewall smoothing and pore sealing of porous low-k dielectric films: A method of forming a semiconductor device including forming a low-k dielectric material over a substrate, depositing a liner on a portion of the low-k dielectric material, and exposing the liner to a plasma. The method also includes depositing a layer over the liner.... Agent: Texas Instruments Incorporated

20090115029 - Semiconductor substrate and method for manufacturing the same, and method for manufacturing semiconductor device: A semiconductor substrate is irradiated with accelerated hydrogen ions, thereby forming a damaged region including a large amount of hydrogen. After a single crystal semiconductor substrate and a supporting substrate are bonded to each other, the semiconductor substrate is heated, so that the single crystal semiconductor substrate is separated in... Agent: Eric Robinson

20090115031 - Semiconductor device including a coupled dielectric layer and metal layer, method of fabrication thereof, and passivating coupling material comprising multiple organic components for use in a semiconductor device: A material for passivating a dielectric layer in a semiconductor device has a molecular structure permitting or at least promoting liquid phase metal deposition thereon in a subsequent process step. The contemplated material may be constituted by multiple organic components. A semiconductor device including a layer of the passivating coupling... Agent: Freescale Semiconductor, Inc. Law Department

20090115032 - Integrated circuit package system with dual connectivity: An integrated circuit package system includes: forming a lead having a both top contact portion and a bottom contact portion; connecting an integrated circuit die and the lead; and forming a package encapsulation, having a top side and a bottom side, over the integrated circuit die. The forming the package... Agent: Law Offices Of Mikio Ishimaru

20090115033 - Reduction of package height in a stacked die configuration: A method and structure for reducing the size of semiconductor package is disclosed. In one example embodiment, a method for stacking dies of a semiconductor package includes forming a set of insulated bonding wires between respective bonding pads of a first semiconductor integrated circuit die and a conductive layer electrically... Agent: Spansion LLC C/o Murabito , Hao & Barnes LLP

20090115034 - Semiconductor device: A semiconductor device according to the present invention includes a base tape (film carrier tape); a semiconductor chip mounted on the base tape; conducting leads formed on the base tape to be connected to the semiconductor chip; input terminals and output terminals connected to the conducting leads; and a protecting... Agent: Rabin & Berdo, PC

20090115035 - Integrated circuit package: Integrated circuit (IC) packages are described. Each IC package includes a die having an exposed metallic layer deposited on its back surface. Solder joints are arranged to physically and electrically connect I/O pads on the active surface of the die with associated leads. A molding material encapsulates portions of the... Agent: Beyer Law Group LLP/ Nsc

20090115036 - Semiconductor chip package having metal bump and method of fabricating same: A semiconductor chip package having a metal bump and related method of fabrication are provided. The semiconductor chip package includes first and second bonding pads separated on a substrate, an insulating layer from on the substrate with first and second openings respectively exposing the first and second bonding pads, and... Agent: Volentine & Whitt PLLC

20090115037 - Integrated circuit package with integrated heat sink: An IC package and methods for making the same are described. The IC package includes a die and a heat sink that is attached to the back surface of the die with a thermal interface material layer. The heat sink includes a base and a partition. The partition extends around... Agent: Beyer Law Group LLP/ Nsc

20090115038 - Semiconductor packages and methods of fabricating the same: Provided are semiconductor packages and methods of fabricating the same. An exemplary semiconductor package includes a die pad including a dimple filled with an insulating material in an upper surface or a lower surface thereof. A semiconductor chip is mounted on the upper surface of the first die pad. A... Agent: Townsend And Townsend And Crew, LLP

20090115039 - High bond line thickness for semiconductor devices: Die attach methods used in making semiconductor devices and the semiconductor devices resulting from those methods are described. The methods include providing a leadframe with a die attach pad, using boundary features to define a perimeter on the die pad, depositing a conductive material (such as solder) within the perimeter,... Agent: Kenneth E. Horton Kirton & Mcconkle

20090115040 - Integrated circuit package system with array of external interconnects: An integrated circuit package system includes: forming an array of external interconnects with an intersecting region between the external interconnects; removing the intersecting region for forming an isolation hole between the external interconnects; mounting an integrated circuit die over the external interconnects; connecting an internal interconnect between the integrated circuit... Agent: Law Offices Of Mikio Ishimaru

20090115041 - Semiconductor package and semiconductor device: A semiconductor package includes an insulating substrate configured to be provided for mounting a semiconductor chip which processes a signal with a frequency in a radio frequency band. The insulating substrate includes a first external connecting electrode, a second external connecting electrode, and a partial antenna wiring. The first external... Agent: Mcginn Intellectual Property Law Group, PLLC

20090115043 - Mountable integrated circuit package system with mounting interconnects: A mountable integrated circuit package system includes: mounting a first integrated circuit device over a carrier; mounting a substrate over the first integrated circuit device, the substrate having a mounting interconnect; connecting a first electrical interconnect between the carrier and the substrate; and forming a package encapsulation covering the carrier,... Agent: Law Offices Of Mikio Ishimaru

20090115042 - Semiconductor device having three-dimensional stacked structure and method of fabricating the same: After fixing semiconductor chips 37 to a support substrate 31 with bump electrodes, gaps between the chips 37 are filled with an electrically insulative adhesive 38. Then, by polishing the reverses of the chips 37, the chips 37 are thinned to expose buried interconnections in the chips 37, thereby forming... Agent: Griffin & Szipl, PC

20090115045 - Stacked package module and method for fabricating the same: The present invention relates to a stacked package module and a method for fabricating the same. The stacked package module comprises: a first package structure, a second package structure, a ceramic-surfaced aluminum plate, and a metal paste. Herein, the ceramic-surfaced aluminum plate has a plurality of through holes filled with... Agent: Bacon & Thomas, PLLC

20090115044 - Structures and methods for stack type semiconductor packaging: Methods and structures for stack type semiconductor packaging are disclosed. In one embodiment, a semiconductor device includes a semiconductor chip mounted onto a substrate, a first resin molding portion formed on the substrate for sealing the semiconductor chip, and a through metal mounted on the substrate so as to pierce... Agent: Spansion LLC C/o Murabito , Hao & Barnes LLP

20090115046 - Micro-electro-mechanical system device and method for making same: According to the present invention, a method for making a micro-electro-mechanical system (MEMS) device comprises: providing a substrate with devices and interconnection formed thereon, the substrate having a to-be-etched region; depositing and patterning an etch stop layer; depositing and patterning metal and via layers to form an MEMS structure, the... Agent: Tung & Associates / Randy W. Tung, Esq.

20090115048 - Multipiece apparatus for thermal and electromagnetic interference (emi) shielding enhancement in die-up array packages and method of making the same: An integrated circuit (IC) device package is presented. A frame body has opposing first and second surfaces and a central opening that is open at the first and second surfaces. The second frame body surface is mounted to a first stiffener surface. An IC die is mounted to the first... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20090115047 - Robust multi-layer wiring elements and assemblies with embedded microelectronic elements: An interconnect element 130 can include a dielectric layer 116 having a top face 116b and a bottom face 116a remote from the top face, a first metal layer defining a plane extending along the bottom face and a second metal layer extending along the top face. One of the... Agent: Tessera Lerner David Et Al.

20090115049 - Semiconductor package: A semiconductor package in which an electronic device chip is provided in a cavity of a silicon substrate stacked product constituted by stacking a plurality of silicon substrates.... Agent: Rankin, Hill & Clark LLP

20090115051 - Electronic circuit package: An electronic circuit package has a thin-film circuit integrated with the ceramic substrate. The thin-film circuit includes at least two passive circuit elements joined by an integrated electrical interconnect. At least one active power electronic component mounted on the ceramic substrate and is electrically connected with the integrated thin-film circuit.... Agent: Wells St. John P.s.

20090115050 - Interposer and semiconductor device: An interposer and a semiconductor device including the interposer are provided, which can prevent thermal warpage of an insulative substrate thereof. The interposer is to be provided together with a semiconductor chip in a semiconductor device and, when the semiconductor device is mounted on a mount board, disposed between the... Agent: Rabin & Berdo, PC

20090115052 - Hybrid silicon/non-silicon electronic device with heat spreader: A hybrid electronic device incorporating both Si and non-Si semiconductor components, utilizing SiC, diamond, or another highly thermally conductive material as an underlying heat spreader. The hybrid electronic device is comprised of some combination of components fabricated in: (1) the underlying heat spreader itself; (2) a thin Si layer attached... Agent: Sheridan Ross PC

20090115053 - Semiconductor package thermal performance enhancement and method: A semiconductor device package and related method are disclosed for providing a semiconductor device encapsulated in a protective package body. The device has an exposed surface to which a thermal compound is applied for improving a thermal path for the egress of heat from the device. Preferred embodiments are disclosed... Agent: Texas Instruments Incorporated

20090115057 - C4 joint reliability: In one embodiment, the invention provides a method comprising fabricating a die bump on a die, the die bump being shaped and dimensioned to at least reduce the flow of solder material used, to attach the die bump to a package substrate, towards an under bump metallurgy (UBM) layer located... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20090115056 - Device mounting board, semiconductor module, and mobile device: A device mounting board includes an insulating layer formed of an insulating resin, a glass cloth covering the surface of the insulating layer, and an electrode provided in a through hole extending through the glass cloth. The angle of contact with solder of the glass cloth is larger than that... Agent: Mcdermott Will & Emery LLP

20090115054 - Electronic component: An electronic component includes: an active surface; a plurality of external connection terminals included in the active surface; a bump electrode disposed to the active surface, the bump electrode including: an internal resin formed on the active surface as a core; and a conductive film on a surface of the... Agent: Harness, Dickey & Pierce, P.L.C

20090115055 - Mounting structure of electronic component: A mounting structure of an electronic component includes: a substrate having a terminal and the electronic component which is mounted on the substrate; and a bump electrode included in the electronic component. This bump electrode has an underlying resin provided on an active surface of the electronic component, and a... Agent: Harness, Dickey & Pierce, P.L.C

20090115058 - Back end integrated wlcsp structure without aluminum pads: An integrated circuit structure includes a passivation layer; a via opening in the passivation layer; a copper-containing via in the via opening; a polymer layer over the passivation layer, wherein the polymer layer comprises an aperture, and wherein the copper-containing via is exposed through the aperture; a post-passivation interconnect (PPI)... Agent: Slater & Matsil, L.L.P.

20090115059 - Gold wire for semiconductor element connection: A gold wire for semiconductor element connection having high strength and bondability. The connection has a limited amount of at least one element selected from calcium and rare earth elements, and a limited amount of at least one element selected from a group consisting of titanium, vanadium, chromium, hafnium, niobium,... Agent: Darby & Darby P.C.

20090115060 - Integrated circuit device and method: An integrated circuit device includes a semiconductor chip with a metallization layer on the chip. A gas-phase deposited insulation layer is disposed on the metallization layer.... Agent: Dicke, Billig & Czaja

20090115061 - Solving via-misalignment issues in interconnect structures having air-gaps: An integrated circuit structure is provided. The integrated circuit structure includes a semiconductor substrate; and a metallization layer over the semiconductor substrate. The metallization layer includes a conductive line; a low-k dielectric region adjacent and horizontally spaced apart from the conductive line by a space; and a filler dielectric material... Agent: Slater & Matsil, L.L.P.

20090115062 - Semiconductor device: A semiconductor device according to the present invention includes: a lower layer wiring made of a conductive material; an etching stopper film laminated on the lower layer wiring; an interlayer insulating film laminated on the etching stopper film; an intermediate film laminated on the interlayer insulating film and made of... Agent: Rabin & Berdo, PC

20090115063 - Semiconductor integrated circuit device and a method of manufacturing the same: In manufacturing a semiconductor integrated circuit device, an interconnect trench and a contact hole are formed in an interlayer insulating film formed over a first-level interconnect on a semiconductor substrate, a barrier film is formed inside of the trench and contact hole so that its film thickness increases from the... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090115066 - Metal wiring layer and method of fabricating the same: A metal wiring layer and a method of fabricating the metal wiring layer are provided. The method includes forming a dielectric layer on a substrate, forming a plurality of dielectric layer patterns and holes therein on the substrate by etching part of the dielectric layer, with a cross sectional area... Agent: Haynes And Boone, LLPIPSection

20090115065 - Semiconductor device and manufacturing method thereof: Embodiments relate to a semiconductor device that may include a semiconductor substrate including a cell area and a pad area, a first insulating layer on and/or over the semiconductor substrate, and a first interconnection trench formed in the first insulating layer on and/or over a cell area having a first... Agent: Sherr & Vaughn, PLLC

20090115064 - Spacer process for on pitch contacts and related structures: Methods are disclosed, such as those involving increasing the density of isolated features in an integrated circuit. Also disclosed are structures associated with the methods. In one or more embodiments, contacts are formed on pitch with other structures, such as conductive interconnects. The interconnects may be formed by pitch multiplication.... Agent: Knobbe Martens Olson & Bear LLP

20090115067 - Module having built-in electronic component and method for manufacturing such module: An electronic component embedded module that can improve reliability of electric connection of inner vias, and a manufacturing method therefor are provided. A first electronic component (11) is embedded in a second electrical insulating layer (13) and connected electrically to a first wiring pattern (14) through first inner vias (16)... Agent: Hamre, Schumann, Mueller & Larson P.C.

20090115068 - Semiconductor device and method of manufacturing the same: Provided are a semiconductor device and a method of manufacturing the same. In the method, a metal interconnection can be formed on a substrate. A dielectric can be formed on the metal interconnection. A photoresist pattern can be formed on the dielectric. The dielectric can be etched using the photoresist... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20090115069 - Semiconductor chip package and method of manufacturing the same: A semiconductor chip package having a molding layer is provided. The semiconductor chip package includes a semiconductor chip, a plurality of external connection terminals, and the molding layer. The semiconductor chip comprises a backside surface, side surfaces, and an active surface having a plurality of chip pads disposed thereon. The... Agent: Marger Johnson & Mccollom, P.C.

20090115070 - Semiconductor device and method for manufacturing thereof: A semiconductor device includes a semiconductor chip 10, a connector terminal 30 electrically coupled with the semiconductor chip 10, a resin section 40 for molding the semiconductor chip 10 and the connector terminal 30 such that a lower surface of the semiconductor chip 10 opposite a surface on which a... Agent: Spansion LLC C/o Murabito , Hao & Barnes LLP

20090115072 - Bga package with traces for plating pads under the chip: A semiconductor flip-chip ball grid array package (600) with one-metal-layered substrate. The sites (611) of a two-dimensional array become usable for attaching solder balls of the signal (non-common net assignment) I/O type to the substrate under the chip area (601), when the sites can be routed for metal plating (620).... Agent: Texas Instruments Incorporated

20090115071 - Flip chip mounting method and method for connecting substrates: A flip chip mounting method which is applicable to the flip chip mounting of a next-generation LSI and high in productivity and reliability as well as a method for connecting substrates are provided. A circuit board 10 having a plurality of connecting terminals 11 and a semiconductor chip 20 having... Agent: Mcdermott Will & Emery LLP

20090115073 - Wiring substrate and semiconductor device and method of manufacturing the same: In a wiring substrate of a semiconductor device, a hollow portion is provided under a pad wiring portion including a connection pad, and thus a wiring layer has a cantilever structure in which the pad wiring portion is formed as an aerial wiring, and a semiconductor chip is flip-chip connected... Agent: Kratz, Quintos & Hanson, LLP

20090115074 - Method of processing a contact pad, method of manufacturing a contact pad, and integrated circuit element: In a method of processing a contact pad, a passivation layer stack including at least one passivation layer is formed on at least an upper surface of a contact pad region. A first portion of the passivation layer stack is removed from above the contact pad region, wherein a second... Agent: Slater & Matsil LLP

20090115075 - Method for manufacturing thin substrate using a laminate body: Provided is a laminated body comprising a substrate to be ground and a support, where the substrate may be ground to a very small (thin) thickness and can then be separated from the support without damaging the substrate. One embodiment is a laminated body comprising a substrate to be ground,... Agent: 3m Innovative Properties Company