Active solid-state devices (e.g., transistors, solid-state diodes) inventions 01/09

20090026432 - Method and structure for uniform contact area between heater and phase change material in pcram device: A PCM (phase change memory) cell in a PCRAM (phase change random access memory) semiconductor device includes a phase change material subjacently contacted by a heater film. The phase change material is formed over a surface that is a generally planar surface with at least a downwardly extending recess. The... Agent: Duane Morris LLP (tsmc)IPDepartment

20090026433 - Multistate nonvolatile memory elements: Multistate nonvolatile memory elements are provided. The multistate nonvolatile memory elements contain multiple layers. Each layer may be based on a different bistable material. The bistable materials may be resistive switching materials such as resistive switching metal oxides. Optional conductor layers and current steering elements may be connected in series... Agent: G. Victor Treyz

20090026434 - Nonvolatile memory elements: Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a... Agent: G. Victor Treyz

20090026436 - Phase change memory devices and methods of forming the same: A method of forming a phase change memory device includes forming a core pattern on a substrate, conformally forming a heat conductive layer on the substrate including the core pattern, anisotropically etching the heat conductive layer down to a top surface of the core pattern to form a heat electrode... Agent: Lee & Morse, P.C.

20090026435 - Phase change random access meomory and semiconductor device: A phase change random access memory comprises an under electrode; an interlayer insulating layer which is formed on the under electrode; an impurity diffusion layer which is embedded into a pore through the interlayer insulating layer; a phase change recording layer which is formed on the interlayer insulating layer; an... Agent: Mcginn Intellectual Property Law Group, PLLC

20090026437 - Copper compatible chalcogenide phase change memory with adjustable threshold voltage: A phase change memory cell may include two or more stacked or unstacked series connected memory elements. The cell has a higher, adjustable threshold voltage. A copper diffusion plug may be provided within a pore over a copper line. By positioning the plug below the subsequent chalcogenide layer, the plug... Agent: Trop Pruner & Hu, PC

20090026439 - Phase change memory cells having a cell diode and a bottom electrode self-aligned with each other: Integrated circuit devices are provide having a vertical diode therein. The devices include an integrated circuit substrate and an insulating layer on the integrated circuit substrate. A contact hole penetrates the insulating layer. A vertical diode is in lower region of the contact hole and a bottom electrode in the... Agent: Myers Bigel Sibley & Sajovec

20090026438 - Solid state electrolyte memory device and method of fabricating the same: A method of fabricating a solid state electrolytes memory device is provided. An insulator layer is formed on a substrate. A conductive layer is formed on the insulator layer. At least two openings partially overlapped and capable of communicating with each other are formed in the conductive layer, so that... Agent: Jianq Chyun Intellectual Property Office

20090026440 - Nitride semiconductor light-emitting element: A nitride semiconductor light-emitting element 11 is one for generating light containing a wavelength component in an ultraviolet region. The nitride semiconductor light-emitting element 11 has an active region 17 including InX1AlY1Ga1-X1-Y1N well layers 13 (1>X1>0 and 1>Y1>0) and InX2AlY2Ga1-X2-Y2N barrier layers 15 (1>X2>0 and 1>Y2>0). An energy gap difference... Agent: Mcdermott Will & Emery LLP

20090026441 - Continuous plane of thin-film materials for a two-terminal cross-point memory: A structure for a memory device including a plurality of substantially planar thin-film layers or a plurality of conformal thin-film layers is disclosed. The thin-film layers form a memory element that is electrically in series with first and second cladded conductors and operative to store data as a plurality of... Agent: Unity Semiconductor Corporation

20090026442 - Continuous plane of thin-film materials for a two-terminal cross-point memory: A structure for a memory device including a plurality of substantially planar thin-film layers or a plurality of conformal thin-film layers is disclosed. The thin-film layers form a memory element that is electrically in series with first and second cladded conductors and operative to store data as a plurality of... Agent: Unity Semiconductor Corporation

20090026448 - Electronic component, method for its production and its use: The present invention relates to an electronic component having at least one anode, at least one cathode, at least one charge injection layer, at least one layer of an organic semiconductor and at least one layer situated between the charge injection layer and the organic semiconductor layer, which component is... Agent: Connolly Bove Lodge & Hutz, LLP

20090026447 - Light emitting device: An organic EL display device having a long lifetime is provided. The light emitting device includes at least one organic compound layer between a pair of electrodes, and the content of an impurity generated from an organic compound in the at least one organic compound layer is 10 ng/cm2 or... Agent: Stanley P. Fisher Reed Smith LLP

20090026446 - Organic light emitting device and manufacturing method thereof: An organic light emitting device according to an embodiment includes a thin film transistor substrate including a plurality of thin film transistors and an over-coating film formed on the thin film transistors. The over-coating film includes a curved surface on at least two pixels among pixels of different colors and... Agent: Macpherson Kwok Chen & Heid LLP

20090026444 - Organic thin film transistor array panel and manufacturing method of the same: An organic thin film transistor array panel includes a substrate, a gate line formed on the substrate and including a gate electrode. A gate insulating layer is formed on the gate electrode and a data line is formed on the gate insulating layer, intersecting the gate line, and including a... Agent: Macpherson Kwok Chen & Heid LLP

20090026445 - Organic thin film transistor array panel and method for manufacturing the same: A method for manufacturing an organic thin film transistor array panel includes forming a data line including a source electrode and a drain electrode apart from the data line on a substrate and forming a bank insulating layer including a first opening and a second opening on the data line... Agent: Macpherson Kwok Chen & Heid LLP

20090026443 - Organic thin-film transistor and method of manufacture thereof: A durable organic thin-film transistor and a method of manufacture thereof, the organic thin-film transistor having: a source electrode and a drain electrode arranged mutually separated; an organic semiconductor layer interposed between the source electrode and the drain electrode; and a gate electrode arranged to face said organic semiconductor layer... Agent: Sughrue Mion, PLLC

20090026457 - Active matrix substrate, method of making the substrate, and display device: An active matrix substrate includes base substrate, gate lines, data lines, thin-film transistors and pixel electrodes. The gate lines are formed on the base substrate. The data lines are formed over the gate lines. Each of the data lines crosses all of the gate lines with an insulating film interposed... Agent: Edwards Angell Palmer & Dodge LLP

20090026454 - Display device: To provide a display device including a protection circuit having a thin film transistor which has small size and high withstand voltage. In the protection circuit of the display device, a thin film transistor is used in which an amorphous semiconductor layer, a microcrystalline semiconductor layer, a gate insulating layer... Agent: Eric Robinson

20090026453 - Display device and manufacturing method thereof: A gate insulating film is formed over a gate electrode; a microcrystalline semiconductor is formed over the gate insulating film; an impurity element for controlling the threshold value is added into the microcrystalline semiconductor film by an ion implantation method; the microcrystalline semiconductor film is irradiated with a laser beam... Agent: Eric Robinson

20090026452 - Liquid crystal display device and electronic device provided with the same: A liquid crystal display device provided with a thin film transistor with excellent electrical characteristics and reduced off current, for which increase in manufacturing costs can be suppressed while suppressing reduction in yield. A thin film transistor includes a gate electrode provided over a substrate; a gate insulating film provided... Agent: Eric Robinson

20090026455 - Liquid crystal display device and its manufacturing method: The occurrence of the poor electric connection between the outer circuit and the liquid crystal display device can be reduced in the manufacturing method of the outer circuit and liquid display device of this invention. The liquid crystal display device has the pixel region 100P and the outer connection region... Agent: Morrison & Foerster LLP

20090026449 - Pixel structure and method of fabricating the same: A method for fabricating pixel structures is disclosed. Specifically, the present invention deposits a conductive layer, a gate dielectric layer, and an aluminum layer on a gate dielectric layer, and performs an isotropic etching process to evenly etch a portion of the aluminum layer in the horizontal and vertical direction.... Agent: North America Intellectual Property Corporation

20090026451 - Thin film transistor array substrate and method for manufacturing the same: A thin film transistor array substrate and a method for manufacturing the same are disclosed. The thin film transistor array substrate includes a plurality of gate lines and a plurality of data lines on a substrate, to define pixel regions crossing each other, thin film transistors, each formed at the... Agent: Birch Stewart Kolasch & Birch

20090026450 - Thin film transistor substrate and method of manufacturing the same: A thin film transistor array substrate comprising a base substrate, a first wire on the base substrate, a first insulating layer on the base substrate to cover the first wire, a semiconductor layer on the first insulating layer, a second insulating layer on the first insulating layer on which the... Agent: Macpherson Kwok Chen & Heid LLP

20090026456 - Transistor array panel, liquid crystal display panel, and method of manufacturing liquid crystal display panel: A transistor array panel includes switching elements provided in intersecting portions between gate and data lines, and display electrodes connected to the switching elements. A conductive film pattern is provided to be electrically insulated from the gate and data lines, and display electrodes, and to be overlapped on the display... Agent: Frishauf, Holtz, Goodman & Chick, PC

20090026458 - Porous semiconductive film and process for its production: t

20090026459 - Epitaxial and polycrystalline growth of si1-x-ygexcy and si1-ycy alloy layers on si by uhv-cvd: A method and apparatus for depositing single crystal, epitaxial films of silicon carbon and silicon germanium carbon on a plurality of substrates in a hot wall, isothermal UHV-CVD system is described. In particular, a multiple wafer low temperature growth technique in the range from 350° C. to 750° C. is... Agent: Scully, Scott, Murphy & Presser, P.C.

20090026460 - Vertical non-volatile memory and manufacturing method thereof: A manufacturing method of a vertical non-volatile memory is provided. A first semiconductor layer, a first barrier, a second semiconductor layer, a second barrier and a third semiconductor layer are formed on a substrate sequentially. The first and the third semiconductor layers have a first conductive state, while the second... Agent: J C Patents, Inc.

20090026463 - Array substrate for a display device and method of manufacturing the same: An array substrate includes a thin-film transistor (TFT), a first insulation layer and a second insulation layer. The TFT is formed on the substrate. The TFT includes an active pattern, a gate metal pattern and a data metal pattern. The first insulation layer insulates the active pattern from the gate... Agent: Cantor Colburn, LLP

20090026464 - Semiconductor device and manufacturing method thereof: By performing the formation of the pixel electrode 127, the source region 123 and the drain region 124 by using three photomasks in three photolithography steps, a liquid crystal display device prepared with a pixel TFT portion, having a reverse stagger type n-channel TFT, and a storage capacitor can be... Agent: Eric Robinson

20090026461 - Semiconductor device including semiconductor circuit made from semiconductor element and manufacturing method thereof: In the present invention, a semiconductor film is formed through a sputtering method, and then, the semiconductor film is crystallized. After the crystallization, a patterning step is carried out to form an active layer with a desired shape. The present invention is also characterized by forming a semiconductor film through... Agent: Eric Robinson

20090026462 - Wiring substrate and method of manufacturing same, and display device: A wiring substrate includes a plurality of lines provided on the substrate, and a plurality of mounting terminals each for respective one of the plurality of lines, the plurality of mounting terminals being arranged in several rows in a staggered pattern, wherein the mounting terminal includes a first conductive film... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090026465 - Polysilicon film having smooth surface and method of forming the same: A method of forming a polysilicon film having smooth surface using a lateral growth and a step-and-repeat laser process. Amorphous silicon formed in a first irradiation region of a substrate is crystallized to form a first polysilicon region by a first laser shot. Then, the substrate is moved a predetermined... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090026466 - Quasi single crystal nitride semiconductor layer grown over polycrystalline sic substrate: A compound semiconductor device is manufactured by using a polycrystalline SiC substrate, the compound semiconductor device having a buffer layer being formed on the substrate and having a high thermal conductivity of SiC and aligned orientations of crystal axes. The method for manufacturing the compound semiconductor device includes: forming a... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090026467 - Electrooptical device, electronic apparatus, and method for producing electrooptical device: An electrooptical device having a plurality of light-emitting regions includes a substrate, a bank disposed in a region other than the light-emitting regions on the substrate so as to surround the light-emitting regions, and a functional layer disposed in openings surrounded by the bank. The bank includes an upper bank... Agent: Oliff & Berridge, PLC

20090026468 - Semiconductor light emitting element:

20090026469 - Light-emitting device and method for manufacturing same: The light-emitting device of the present invention is a light-emitting device having a plurality of pixels that comprises a light-emitting function layer of at least one layer that emits light in accordance with a supplied current, a first electrode layer of a conductive material provided at one surface of the... Agent: Frishauf, Holtz, Goodman & Chick, PC

20090026473 - Ingaaln light-emitting device and manufacturing method thereof: There is provided an InGaAlN light-emitting device and a manufacturing method thereof. The light emitting device includes a conductive substrate having a main surface and a back surface, a metal bonding layer formed on the main surface of the substrate, a light reflecting layer formed on the bonding layer, a... Agent: Park, Vaughan & Fleming LLP

20090026480 - Light emitting device and method of manufacturing the same: Provided is a light emitting device with high extraction efficiency, in which absorption of light by a conductive wire is prevented effectively. The light emitting device includes a conductive wire electrically connecting an electrode of a light emitting element and an electrically conductive member. The surface of the bonding portion... Agent: Birch Stewart Kolasch & Birch

20090026471 - Light-scattering structure, light emitting device comprising the same and method of forming the same: A light-scattering structure with micron-scale or submicron-scale protruding portions is provided to improve the light extraction efficiency of light emitting devices. The protruding portions function as scattering sites and can be assembled closely. A method of forming a light-scattering structure is also provided, wherein all the conventional substrate materials can... Agent: Wpat, PC Intellectual Property Attorneys

20090026481 - Nitride semiconductor light-emitting device and method of manufacturing nitride semiconductor light-emitting device: A nitride semiconductor light-emitting device including a coating film and a reflectance control film successively formed on a light-emitting portion, in which the light-emitting portion is formed of a nitride semiconductor, the coating film is formed of an aluminum oxynitride film or an aluminum nitride film, and the reflectance control... Agent: Harness, Dickey & Pierce, P.L.C

20090026477 - Novel phosphor and fabrication of the same: wherein A is at least one element selected from Mg and Zn; B is at least one element selected from the group consisting of La, Y and Gd; each of m, n, y and z is the number larger than 0 provided that 2m+3n+4y=2z; and x is in the range... Agent: Stein, Mcewen & Bui, LLP

20090026479 - Optical waveguide device and manufacturing method thereof: An optical waveguide device including a substrate; a light emitting element provided on a light emitting element provision region of an upper surface of the substrate; an under-cladding layer provided on a portion of the upper surface of the substrate except for the light emitting element provision region; and a... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090026482 - Optoelectronic component: An optoelectronic component having a basic housing or frame and at least one semiconductor chip, specifically a radiation-emitting or-receiving semiconductor chip, in a cavity of the basic housing. In order to increase the efficiency of the optoelectronic component, reflectors are provided in the cavity in the region around the semiconductor... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20090026474 - Radiation-emitting element and method for producing a radiation-emitting element: A radiation-emitting component comprises an optical element and a housing body that has a fastening device that engages with or wraps around the optical element, wherein the fastening device is bent or is provided with projections in such a way that the optical element is irreversibly fixed on the housing... Agent: Fish & Richardson PC

20090026478 - Semiconductor light emitting device: There is provided a semiconductor light emitting device having excellent light extraction efficiency to efficiently reflect light moving into the device by increasing the total reflectivity of a reflective layer. A semiconductor light emitting device according to an aspect of the invention includes: a substrate, a reflective electrode, a first... Agent: Mcdermott Will & Emery LLP

20090026475 - Semiconductor light emitting device and method for manufacturing the same: Concaves and convexes are formed in a light transmitting conductive layer provided on a surface of a light emitting device made of nitride semiconductor, thereby light emitted from a light emitting layer is totally reflected repeatedly in a semiconductor lamination portion and a substrate and can be effectively taken out... Agent: Rabin & Berdo, PC

20090026476 - Semiconductor light-emitting element and semiconductor light-emitting element manufacturing method: An aspect of the present invention inheres in a semiconductor light-emitting element includes a light-emitting functional stacked body including a light-emitting region having a light-emitting function, and including a light extraction surface for extracting light emitted from the light-emitting region, and an upward convex lens disposed on the light extraction... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090026472 - Silicon led package having horn and contact edge with (111) planes: A (100) silicon substrate is prepared having an insulating film formed on front and back surfaces of the silicon substrate. A resist pattern is formed on the insulating film and partially etched to form an etching mask on the front and back surfaces. The silicon substrate is subjected to anisotropical... Agent: Frishauf, Holtz, Goodman & Chick, PC

20090026470 - Super thin side-view light-emitting diode (led) package and fabrication method thereof: A fabrication method of a side-view LED package is provided. A chip carrier is provided. An opaque housing is bonded with the chip carrier. An LED chip electrically connects the chip carrier by performing a chip-bonding process and the opaque housing has a cavity for accommodating the LED chip. A... Agent: Jianq Chyun Intellectual Property Office

20090026483 - High-power led package: A high-power LED package includes a thermally conductive substrate, a plurality of electric contact pins, and at least one high-power LED. The thermally conductive substrate has a circuit board, a metal plate, and a connecting member connected between the circuit board and the metal plate. The substrate is provided with... Agent: Browdy And Neimark, P.l.l.c. 624 Ninth Street, Nw

20090026484 - Light emitting diode device: A light emitting diode device is disclosed, and the light emitting diode device includes a base, a substrate, a lead frame, a chip, a first mixed layer and a second mixed layer. The first mixed layer and the second mixed layer respectively contain a glue and a thermal conductance insulating... Agent: Pai Patent & Trademark Law Firm

20090026485 - Light-emitting device: A light-emitting device of the present invention includes: a LED chip 10; a chip mounting member 70 having a conductive plate (heat transfer plate) 71 one surface side of which the LED chip 10 is mounted on and a conductor patterns 73, 73 which is formed on the one surface... Agent: Cheng Law Group, PLLC

20090026487 - Light-emitting devices having an active region with electrical contacts coupled to opposing surfaces thereof and methods of forming the same: A light-emitting device includes a substrate having first and second opposing surfaces, an active region on the first surface of the substrate, a via in the substrate between the first and second opposing surfaces, a contact plug in the via, a first electrical contact on the active region, and a... Agent: Myers Bigel Sibley & Sajovec, P.A.

20090026486 - Nitride based compound semiconductor light emitting device and method of manufacturing the same: A nitride based compound semiconductor light emitting device having a first substrate and a nitride based compound semiconductor part including a p-type nitride based compound semiconductor layer, an active layer, and an n-type nitride based compound semiconductor layer in this order from the first substrate side, in which the first... Agent: Harness, Dickey & Pierce, P.L.C

20090026490 - Light emitting device and manufacturing method thereof: Provided is a light emitting device. The light emitting device comprises a second electrode layer, a second conduction type semiconductor layer, an active layer, a first conduction type semiconductor layer, a first electrode layer, and an insulating layer. The second conduction type semiconductor layer is formed on the second electrode... Agent: Birch Stewart Kolasch & Birch

20090026488 - Nitride semiconductor material and production process of nitride semiconductor crystal: A nitride semiconductor material comprising a semiconductor or dielectric substrate having thereon a first nitride semiconductor layer group, wherein the surface of the first nitride semiconductor layer group has an RMS of 5 nm or less, a variation of X-ray half-width within ±30%, a light reflectance of the surface of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090026489 - Semiconductor light emitting device: A semiconductor light emitting device has an active layer of a gallium nitride compound semiconductor material, a first semiconductor layer of Inx1Aly1Ga1-x1-y1N (0≦x1≦1, 0≦y1≦1), on a p-layer side of the active layer, and which is subjected to tensile strain, a second semiconductor layer of Inx2Aly2Ga1-x2-y2N, wherein (0≦x2≦1, 0≦y2≦1), and which... Agent: Leydig Voit & Mayer, Ltd

20090026491 - Tunneling effect transistor with self-aligned gate: In one embodiment, a mandrel and an outer dummy spacer may be employed to form a first conductivity type region. The mandrel is removed to form a recessed region wherein a second conductivity type region is formed. In another embodiment, a mandrel is removed from within shallow trench isolation to... Agent: Scully, Scott, Murphy & Presser, P.C.

20090026493 - Electrostatic protection circuit: An electrostatic protection circuit includes a thyristor that discharges an excess charge generated between a first power supply terminal and a second power supply terminal having a lower voltage than the first power supply terminal, a trigger device that supplies a current turning on the thyristor, and an electrostatic discharge... Agent: Dla Piper US LLP

20090026492 - Lateral junction breakdown triggered silicon controlled rectifier based electrostatic discharge protection device: The components of a silicon controlled rectifier, which are a p-doped anode, an n-well middle region, a p-well middle region, and an n-doped cathode, are formed along sidewalls and a bottom surface of a shallow trench isolation structure. The p-doped anode and the n-doped cathode are formed directly underneath a... Agent: Scully, Scott, Murphy & Presser, P.C.

20090026494 - Avalanche photodiode having controlled breakdown voltage: Avalanche photodiodes and methods for forming them are disclosed. The breakdown voltage of an avalanche photodiode is controlled through the inclusion of a diffusion sink that is formed at the same time as the device region of the photodiode. The device region and diffusion sink are formed by diffusing a... Agent: Demont & Breyer, LLC

20090026495 - Layer transfer of low defect sige using an etch-back process: A method for forming strained Si or SiGe on relaxed SiGe on insulator (SGOI) or a SiGe on Si heterostructure is described incorporating growing epitaxial Si1-yGey layers on a semiconductor substrate, smoothing surfaces by Chemo-Mechanical Polishing, bonding two substrates together via thermal treatments and transferring the SiGe layer from one... Agent: Scully, Scott, Murphy & Presser, P.C.

20090026496 - Methods of making substitutionally carbon-doped crystalline si-containing materials by chemical vapor deposition: Methods of making Si-containing films that contain relatively high levels of substitutional dopants involve chemical vapor deposition using trisilane and a dopant precursor. Extremely high levels of substitutional incorporation may be obtained, including crystalline silicon films that contain 2.4 atomic % or greater substitutional carbon. Substitutionally doped Si-containing films may... Agent: Knobbe, Martens, Olson & Bear LLP

20090026498 - Field effect transistor and method for fabricating the same: A field effect transistor includes: a nitride semiconductor layer having a channel layer; a gate electrode including a Schottky electrode that contacts the nitride semiconductor layer and includes a gallium doped zinc oxide (GZO) layer annealed in an inactive gas atmosphere; and ohmic electrodes connecting with the channel layer.... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090026497 - Method for producing semiconductor device: A method for producing a semiconductor device (20) is disclosed. The semiconductor device (20) includes: 1) a semiconductor substrate (1, 2), 2) a hetero semiconductor area (3) configured to contact a first main face (1A) of the semiconductor substrate (1, 2) and different from the semiconductor substrate (1, 2) in... Agent: Mcdermott Will & Emery LLP

20090026500 - Semiconductor device and method of manufacturing such a device: A semiconductor device includes a substrate of a first conductivity type, and a first semiconductor region that includes a plurality of sub-regions of the first conductivity type that have a first doping concentration and a further semiconductor region of a second conductivity type opposite to the first conductivity type. The... Agent: Nxp, B.v. Nxp Intellectual Property Department

20090026499 - Semiconductor integrated circuit device and semiconductor switching device using thereof: A semiconductor integrated circuit device having a plurality of semiconductor electronic members including a field effect transistor, intended for suppressing a sidegating effect on the field effect transistor, wherein accumulation of majority carriers of the field effect transistor is suppressed at the interface of heterojunction in the buffering compound semiconductor... Agent: Miles & Stockbridge PC

20090026501 - Enhancement - depletion semiconductor structure and method for making it: A ED-HEMT structure includes a buffer layer (4) including a doped layer (18), a channel layer (6), a barrier layer (8), and a second doped layer (20). An enhancement mode HEMT gate (12) is formed in a via extending through the second doped layer (20) and a depletion mode HEMT... Agent: Scully Scott Murphy & Presser, PC

20090026502 - Via antenna fix in deep sub-micron circuit designs: A filler cell for use in fabricating an integrated circuit. The filler cell couples a power supply rail of an adjacent logic cell to a power supply rail of another adjacent logic cell. The filler cell also has a diode to bleed charge accumulated on the power rails of the... Agent: Sun Microsystems, Inc. C/o Dorsey & Whitney LLP

20090026503 - Semiconductor device: CMOS inverters are included in a standard cell. Power supply lines are electrically connected to CMOS inverters, and include lower layer interconnects and upper layer interconnect. Lower layer interconnects extend along a boundary of standard cells adjacent to each other and on the boundary. Upper layer interconnects are positioned more... Agent: Mcdermott Will & Emery LLP

20090026505 - Semiconductor device and method of fabricating the same: A semiconductor device according to an embodiment includes: a semiconductor substrate; a fin formed on the semiconductor substrate; a gate electrode formed so as to sandwich both side faces of the fin between its opposite portions via a gate insulating film; an extension layer formed on a region of a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090026504 - Semiconductor device and method of manufacturing semiconductor device: On a silicon substrate, a device isolation region 102, a gate insulating film 103, a gate electrode 104, an extension 105, and a sidewall insulating film 106 are formed. After that, an elevated region is formed, and a source/drain region 108 and a silicide layer 109 are formed. Subsequently, the... Agent: Mcginn Intellectual Property Law Group, PLLC

20090026506 - Semiconductor device: In the semiconductor device, a gate region is formed in a mesh pattern having first polygonal shapes and second polygonal shapes the area of which is smaller than that of the first polygonal shapes, and drain regions and source regions are disposed within the first polygonal shapes and the second... Agent: Morrison & Foerster LLP

20090026507 - Semiconductor device and method of fabricating same: There are disclosed TFTs that have excellent characteristics and can be fabricated with a high yield. The TFTs are fabricated, using an active layer crystallized by making use of nickel. Gate electrodes are comprising tantalum. Phosphorus is introduced into source/drain regions. Then, a heat treatment is performed to getter nickel... Agent: Eric Robinson

20090026512 - Cmos image sensor and method for manufacturing the same: A CMOS image sensor and a method for manufacturing the same improve light-receiving efficiency and maintain a margin in the design of a metal line. The CMOS image sensor includes a transparent substrate including an active area having a photodiode region and a transistor region and a field area for... Agent: Mckenna Long & Aldridge LLP

20090026510 - Image sensor and method for fabricating the same: An image sensor includes an epi-layer of a first conductivity type formed in a substrate, a photodiode formed in the epi-layer, and a first doping region of a second conductivity type formed under the photodiode to separate the first doping region from the photodiode.... Agent: Morgan Lewis & Bockius LLP

20090026511 - Isolation process and structure for cmos imagers: A barrier implanted region of a first conductivity type formed in lieu of an isolation region of a pixel sensor cell that provides physical and electrical isolation of photosensitive elements of adjacent pixel sensor cells of a CMOS imager. The barrier implanted region comprises a first region having a first... Agent: Dickstein Shapiro LLP

20090026509 - Photosensor: For a photosensor, an array substrate is provided, wherein the edge of a photodiode is enclosed by the opening edge of a contact hole formed on a drain electrode.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090026508 - Solid-state photosensor with electronic aperture control: The effective photosensitive area of a solid-state photosensor is controlled with a multitude of electrodes (E1, . . . , Ei, . . . , En) on top of an insulator layer (O) covering a semiconductor substrate (S). Photogenerated charge carriers move laterally under the influence of the voltage distribution... Agent: Weingarten, Schurgin, Gagnebin & Lebovici LLP

20090026513 - Method for forming ferroelectric thin films, the use of the method and a memory with a ferroelectric oligomer memory material: In a method for forming ferroelectric thin films of vinylidene fluoride oligomer or vinylidene fluoride co-oligomer, oligomer material is evaporated in vacuum chamber and deposited as a thin film on a substrate which is cooled to a temperature in a range determined by process parameters and physical properties of the... Agent: Birch Stewart Kolasch & Birch

20090026514 - Semiconductor device and manufacturing method thereof: A ferroelectric memory is constituted to comprise a capacitor being formed above a semiconductor substrate (61) and having a ferroelectric film (78) held between a lower electrode (77) and an upper electrode (79), a W plug (72b) electrically connected on its upper surface with the lower electrode (77), and a... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090026515 - Semiconductor memory device and method of forming the same: Example embodiments relate to a semiconductor memory device and a method of forming the semiconductor memory device. The semiconductor memory device may include a first interlayer insulating layer on a semiconductor substrate. A bit line may be arranged in a first direction on the first interlayer insulating layer. A bit... Agent: Harness, Dickey & Pierce, P.L.C

20090026516 - Semiconductor memory device and fabrication method thereof: A method for fabricating a semiconductor memory device. A pair of neighboring trench capacitors is formed in a substrate. An insulating layer having a pair of connecting structures therein is formed on the substrate, in which the pair of connecting structures is electrically connected to the pair of neighboring trench... Agent: Quintero Law Office, PC

20090026518 - Dram cylindrical capacitor: A structure of a DRAM cylindrical capacitor includes a substrate, a dielectric layer, an amorphous silicon spacer, a polysilicon plug, a HSG layer, a conductive layer and a capacitor dielectric layer. The dielectric layer is disposed on the substrate and includes an opening. The amorphous silicon spacer is disposed on... Agent: Jianq Chyun Intellectual Property Office

20090026517 - Semiconductor device and method of fabricating the same: A semiconductor device includes: a transistor including source and drain diffusion-layers, a gate insulating film and a gate electrode; first and second plugs formed in a first interlayer-insulating film and connected to the source and drain diffusion-layers, respectively; a third plug extending through a second interlayer-insulating film and connected to... Agent: Young & Thompson

20090026519 - Capacitorless dram and methods of manufacturing and operating the same: A capacitorless DRAM and methods of manufacturing and operating the same are provided. The capacitorless DRAM includes a source, a drain and a channel layer, formed on a substrate. A charge reserving layer is formed on the channel layer. The capacitorless DRAM includes a gate that contacts the channel layer... Agent: Harness, Dickey & Pierce, P.L.C

20090026521 - Self-biasing transistor structure and an sram cell having less than six transistors: By providing a self-biasing semiconductor switch, an SRAM cell having a reduced number of individual active components may be realized. In particular embodiments, the self-biasing semiconductor device may be provided in the form of a double channel field effect transistor that allows the formation of an SRAM cell with less... Agent: Williams, Morgan & Amerson

20090026520 - Semiconductor device and manufacturing method thereof for reducing the area of the memory cell region: A structure is adopted for a layout of an SRAM cell which provides a local wiring 3a between a gate 2a and gate 2b and connects an active region 1a and an active region 1b. This eliminates the necessity for providing a contact between the gate 2a and the gate... Agent: Mcdermott Will & Emery LLP

20090026522 - Semiconductor device comprising transistor structures and methods for forming same: A method for forming an opening within a semiconductor material comprises forming a neck portion, a rounded portion below the neck portion and, in some embodiments, a protruding portion below the rounded portion. This opening may be filled with a conductor, a dielectric, or both. Embodiments to form a transistor... Agent: Kevin D. Martin Micron Technology, Inc.

20090026528 - Flash memory cell and method of manufacturing the same and programming/erasing reading method of flash memory cell: Disclosed is a flash memory cell and method of manufacturing the same, and programming/erasing/reading method thereof. The flash memory cell comprises a first tunnel oxide film formed at a given region of a semiconductor substrate, a first floating gate formed on the first tunnel oxide film, a second tunnel oxide... Agent: Marshall, Gerstein & Borun LLP

20090026526 - Integrated circuit devices including a multi-layer structure with a contact extending therethrough and methods of forming the same: Integrated circuit devices have a first substrate layer and a first transistor on the first substrate layer. A first interlayer insulating film covers the first transistor. A second substrate layer is on the first interlayer insulating film and a second transistor is on the second substrate layer. A second interlayer... Agent: Myers Bigel Sibley & Sajovec

20090026525 - Memory and method for fabricating the same: A method for fabricating a memory is provided. A tunneling dielectric layer, a first conductive layer, and a mask layer are formed on a substrate. The mask layer, the first conductive layer, the tunneling dielectric layer, and the substrate are patterned to form trenches in the substrate. A passivation layer... Agent: Jianq Chyun Intellectual Property Office

20090026527 - Method for manufacturing semiconductor device and semiconductor device: According to an aspect of the present invention, there is provided a method for manufacturing a semiconductor device including: sequentially forming a first insulating film, a first electrode film, a second insulating film, and a second electrode film on a substrate; forming a groove that separates the second electrode film,... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090026523 - Partially gated finfet: A gate dielectric and a gate conductor layer are formed on sidewalls of at least one semiconductor fin. The gate conductor layer is patterned so that a gate electrode is formed on a first sidewall of a portion of the semiconductor fin, while a second sidewall on the opposite side... Agent: Scully, Scott, Murphy & Presser, P.C.

20090026524 - Stacked circuits: An integrated circuit includes a first integrated circuit layer including at least one first transistor channel region and having a wafer bonding interface. The integrated circuit may further include at least one second integrated circuit layer including at least one second transistor channel region and being arranged at the wafer... Agent: Slater & Matsil, L.L.P.

20090026529 - Semiconductor device and method for manufacturing the same: A semiconductor device includes a silicon substrate having a main surface, the main surface including a region in which a groove structure or a concavity and convexity structure is formed, and a nonvolatile memory cell provided on the main surface of the silicon substrate, the nonvolatile memory cell including a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090026530 - Methods of fabricating dual fin structures and semiconductor device structures with dual fins: Fin-FET (fin field effect transistor) devices and methods of fabrication are disclosed. The Fin-FET devices include dual fin structures that may form a channel region between a source region and a drain region. In some embodiments, the dual fin structures are formed by forming shallow trench isolation structures, using a... Agent: Trask Britt, P.C./ Micron Technology

20090026531 - Method for insulating a semiconducting material in a trench from a substrate: A method for insulating a semiconducting material in a trench from a substrate, wherein the trench is formed in the substrate and comprising an upper portion and a lower portion, the lower portion being lined with a first insulating layer and filled, at least partially, with a semiconducting material, comprises... Agent: Dicke, Billig & Czaja

20090026535 - Semiconductor device: The technology of preventing lowering of the element breakdown voltage of a trench gate control type semiconductor element is offered. n− type epitaxial layer (drift region) formed in the main surface side of the substrate, p type semiconductor layer (channel region) formed in n− type epitaxial layer, and p− type... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20090026537 - Semiconductor device and method of manufacturing the same: Provided is a semiconductor device formed with a trench portion for providing a concave portion in a gate width direction and with a gate electrode provided within and on a top surface of the trench portion via a gate insulating film. At least a part of a surface of each... Agent: Brinks Hofer Gilson & Lione

20090026538 - Semiconductor device and method of manufacturing the same: Provided is a semiconductor device formed with a trench portion for providing a concave portion having a continually varying depth in a gate width direction and with a gate electrode provided within the trench portion and on a top surface thereof via a gate insulating film. Before the formation of... Agent: Brinks Hofer Gilson & Lione

20090026532 - Short circuit limiting in power semiconductor devices: A power semiconductor device includes a semiconductor body. The semiconductor body includes a body region of a first conductivity type for forming therein a conductive channel of a second conductivity type; a gate electrode arranged next to the body region; and a floating electrode arranged between the gate electrode and... Agent: Dickstein Shapiro LLP

20090026536 - Trench gate semiconductor device and method for fabricating the same: A trench gate semiconductor device and a method for fabricating the same, which are capable of securing a sufficient margin for a photo process while achieving an enhancement in gate-source leakage characteristics, are disclosed. Embodiments relate to a method for fabricating a trench gate semiconductor device including forming a trench... Agent: Sherr & Vaughn, PLLC

20090026534 - Trench mosfet and method of making the same: A trench MOSFET structure formed in a semiconductor substrate and method of forming the same are disclosed. The trench MOSFET includes a capacitor having a capacitor dielectric layer formed of an oxide-un-doped poly-oxide in the trench bottom. Firstly, the trenches are formed in a p-well of the epi-layer of an... Agent: Birch Stewart Kolasch & Birch

20090026533 - Trench mosfet with multiple p-bodies for ruggedness and on-resistance improvements: A vertical semiconductor power device includes a plurality of semiconductor power cells having a drain disposed at a bottom of a semiconductor substrate. Each of the cells includes a gate surrounded by a body region encompassing a source region. The body region further includes multiple body-dopant implanted regions having a... Agent: Bo-in Lin

20090026539 - Method and layout of semiconductor device with reduced parasitics: An semiconductor device is disclosed. The device includes a semiconductor body, a layer of insulating material disposed over the semiconductor body, and a region of gate electrode material disposed over the layer of insulating material. Also included are a source region adjacent to gate region and a drain region adjacent... Agent: Slater & Matsil LLP

20090026540 - Semiconductor device and method for producing the same: A semiconductor device includes: a first semiconductor region formed on a substrate and having an upper surface and a side surface; a first impurity region of a first conductivity type formed in an upper portion of the first semiconductor region; a second impurity region of a first conductivity type formed... Agent: Mcdermott Will & Emery LLP

20090026541 - Vertical floating body cell of a semiconductor device and method for fabricating the same: A semiconductor device includes a tube-type channel formed over a semiconductor substrate. The tube-type channel is connected to first and second conductive lines. A bias electrode is formed in the tube-type channel. The bias electrode is connected to the semiconductor substrate. An insulating film is disposed between the tube-type channel... Agent: Townsend And Townsend And Crew, LLP

20090026542 - Integrated circuit including a semiconductor assembly in thin-soi technology: An integrated circuit including a semiconductor assembly in thin-film SOI technology is disclosed. One embodiment provides a semiconductor assembly in thin-film SOI technology including a first semiconductor substrate structure of a second conductivity type inverse to a first conductivity type in a semiconductor substrate below a first semiconductor layer, a... Agent: Dicke, Billig & Czaja

20090026543 - Finfet with sublithographic fin width: At least one recessed region having two parallel edges is formed in an insulator layer over a semiconductor layer such that the lengthwise direction of the recessed region coincides with optimal carrier mobility surfaces of the semiconductor material in the semiconductor layer for finFETs to be formed. Self-assembling block copolymers... Agent: Scully, Scott, Murphy & Presser, P.C.

20090026544 - Semiconductor device: A non-insulated DC-DC converter has a power MOS•FET for a highside switch and a power MOS•FET for a lowside switch. In the non-insulated DC-DC converter, the power MOS•FET for the highside switch and the power MOS•FET for the lowside switch, driver circuits that control operations of these elements, respectively, and... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090026545 - Integrated circuit employing variable thickness film: An integrated circuit that includes: providing a substrate including a support structure, a dielectric layer, and a variable thickness film processed to include the dielectric layer within a recess of the variable thickness film; forming a gate over the variable thickness film; and forming a channel and a source/drain within... Agent: Farjami & Farjami LLP

20090026546 - Semiconductor device: To provide a technique capable of achieving high integration of semiconductor devices. A standard cell is provided in an n-type well, and includes a p+-type diffusion layer and n+-type diffusion layer covered with a metal silicide film. The p+-type diffusion layer constitutes a source/drain of an MIS transistor, and the... Agent: Miles & Stockbridge PC

20090026547 - Semiconductor device and method of manufacturing the same: A semiconductor device includes an active region extending along a first direction on a semiconductor substrate, the active region having a first sidewall and a second sidewall spaced apart and facing each other, a distance between the first and second sidewalls extending along a second direction, and a gate on... Agent: Lee & Morse, P.C.

20090026549 - Method to remove spacer after salicidation to enhance contact etch stop liner stress on mos: An example process to remove spacers from the gate of a NMOS transistor. A stress creating layer is formed over the NMOS and PMOS transistors and the substrate. In an embodiment, the spacers on gate are removed so that stress layer is closer to the channel of the device. The... Agent: HorizonIPPte Ltd

20090026550 - Semiconductor device and manufacturing method thereof: A semiconductor device includes: a silicon substrate; and a field effect transistor including a gate insulating film over the silicon substrate, a gate electrode on the gate insulating film, and source and drain regions. The gate electrode includes, in part in contact with the gate insulating film, a crystallized Ni... Agent: Young & Thompson

20090026548 - Systems and methods for fabricating nanometric-scale semiconductor devices with dual-stress layers using double-stress oxide/nitride stacks: Systems and methods for fabricating semiconductor devices with dual-stress layers using double-stress oxide/nitride stacks. A method comprises providing NMOS and PMOS regions, selectively forming a dual-stack tensile stress layer over the NMOS region by depositing a tensile silicon nitride layer over the NMOS and PMOS regions, depositing a tensile silicon... Agent: Fulbright & Jaworski L.L.P.

20090026551 - Semiconductor device and method for fabricating the same: A semiconductor device includes: an isolation region formed in a semiconductor substrate; active regions surrounded by the isolation region and including p-type and n-type regions, respectively; an NMOS transistor formed in the active region including the p-type region and including an n-type gate electrode; a PMOS transistor formed in the... Agent: Mcdermott Will & Emery LLP

20090026552 - Method for forming a transistor having gate dielectric protection and structure: A transistor structure is formed by providing a semiconductor substrate and providing a gate above the semiconductor substrate. The gate is separated from the semiconductor substrate by a gate insulating layer. A source and a drain are provided adjacent the gate to define a transistor channel underlying the gate and... Agent: Freescale Semiconductor, Inc. Law Department

20090026553 - Tunnel field-effect transistor with narrow band-gap channel and strong gate coupling: A semiconductor device and the methods of forming the same are provided. The semiconductor device includes a low energy band-gap layer comprising a semiconductor material; a gate dielectric on the low energy band-gap layer; a gate electrode over the gate dielectric; a first source/drain region adjacent the gate dielectric, wherein... Agent: Slater & Matsil, L.L.P.

20090026554 - Source/drain stressors formed using in-situ epitaxial growth: A method for forming a semiconductor device is provided. The method includes forming a semiconductor layer. The method further includes forming a gate structure overlying the semiconductor layer. The method further includes forming a high-k sidewall spacer adjacent to the gate structure. The method further includes forming a recess in... Agent: Freescale Semiconductor, Inc. Law Department

20090026555 - Transistor with dopant-bearing metal in source and drain: A transistor and method of manufacturing thereof. A gate dielectric and gate are formed over a workpiece, and the source and drain regions of a transistor are recessed. The recesses are filled with a dopant-bearing metal, and a low-temperature anneal process is used to form doped regions within the workpiece... Agent: Slater & Matsil LLP

20090026556 - Nitride semiconductor device and method for producing nitride semiconductor device: A method for producing a nitride semiconductor device according to the present invention includes the steps of: forming an insulating film containing oxygen on the surface of a group III nitride semiconductor; and placing the group III nitride semiconductor under a nitrogen atmosphere in advance of the step of forming... Agent: Rabin & Berdo, PC

20090026557 - Semiconductor device and method of manufacturing the same: The method of manufacturing a semiconductor device comprises; forming an HfSiO film 36 on a silicon substrate 26; exposing the HfSiO film 36 to NH3 gas to thereby form an HfSiON film 38; forming an HfSiO film 40 on the HfSiON film 38; adhering Al to the surface of the... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090026559 - Boron doped shell for mems device: A wafer for use in a MEMS device having two doped layers surrounding an undoped layer of silicon is described. By providing two doped layers around an undoped core, the stress in the lattice structure of the silicon is reduced as compared to a solidly doped layer. Thus, problems associated... Agent: Honeywell International Inc.

20090026558 - Semiconductor device having a sensor chip, and method for producing the same: A semiconductor sensor device and method is disclosed. In one embodiment, the semiconductor device includes a cavity housing and a sensor chip. In one embodiment, the cavity housing has an opening to the surroundings. The sensor region of the sensor chip faces said opening. The sensor chip is mechanically decoupled... Agent: Dicke, Billig & Czaja

20090026560 - Sensor package: A sensor package is disclosed. One embodiment provides a sensor device having a carrier, a semiconductor sensor mounted on the carrier and an active surface. Contact elements are electrically connecting the carrier with the semiconductor sensor. A protective layer made of an inorganic material covers at least the active surface... Agent: Dicke, Billig & Czaja

20090026561 - Micromechanical component and corresponding method for its manufacture: A micromechanical component having a conductive substrate, an elastically deflectable diaphragm including at least one conductive layer, which is provided over a front side of the substrate, the conductive layer being electrically insulated from the substrate, a hollow space, which is provided between the substrate and the diaphragm and is... Agent: Kenyon & Kenyon LLP

20090026565 - Optical module: The present invention includes: photoelectric conversion element 103 that converts electrical signals into optical signals and optical signals into electrical signals; and optical communication LSI 102 electrically connected to photoelectric conversion element 103. Also, the present invention includes electrical wiring substrate 101 including a plurality of electrodes 201 and 202... Agent: Mcginn Intellectual Property Law Group, PLLC

20090026562 - Package structure for optoelectronic device: A package structure for an optoelectronic device. The package structure comprises a device chip interposed between a lower transparent substrate and an upper transparent substrate. The device chip comprises a semiconductor substrate comprising a device region surrounded by a pad region, in which the pad region comprises a plurality of... Agent: Birch Stewart Kolasch & Birch

20090026564 - Semiconductor component, lighting unit for matrix screens, and method for manufacturing a semiconductor component: A semiconductor component, lighting unit for matrix screens, and method for manufacturing a semiconductor component is provided. The semiconductor component includes an integrated circuit, which has at least one light detector provided with a silicon-containing coating, particularly a coating of silicon nitride or silicon dioxide. A layer thickness of the... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20090026563 - Solid-state imaging device: A solid-state imaging device includes a first wiring layer, a second wiring layer, a substrate contact, and a first contact. The arrangement of the substrate contact with respect to a light-receiving section forming a peripheral pixel is shifted, or not shifted, from the arrangement of the substrate contact with respect... Agent: Mcdermott Will & Emery LLP

20090026566 - Semiconductor device having backside redistribution layers and method for fabricating the same: Present embodiments relate to a semiconductor device having a backside redistribution layer and a method for forming such a layer. Specifically, one embodiment includes providing a substrate comprising a via formed therein. The substrate has a front side and a backside. The embodiment may further include forming a trench on... Agent: Fletcher Yoder (micron Technology, Inc.)

20090026567 - Image sensor package structure and method for fabricating the same: A method for fabricating an image sensor package is disclosed, comprising: providing a wafer having a plurality of image sensor integrated circuits, each of which has a photosensitive active region and at least one first bonding pad; joining a transparent protecting material to the wafer wherein the photosensitive active region... Agent: Bacon & Thomas, PLLC

20090026568 - Optical color sensor system: An optical color sensor system is provided including providing a substrate having an optical sensor therein and forming a passivation layer over the substrate. The passivation layer is planarized and color filters are formed over the passivation layer. A planar transparent layer is formed over the color filters and microlenses... Agent: Law Offices Of Mikio Ishimaru

20090026569 - Ultra high-resolution radiation detector (uhrd) and method for fabrication thereof: An ultra high-resolution radiation detector and method for fabrication thereof, has a detector chip, comprising the so-called drift rings and an amplifier integrated with the diode component, centrally located n-type anode on one surface, the depletion region. The detector chip has a circular field of view, the depletion region which... Agent: Daniel M. Gurfinkel Welsh & Katz, Ltd.

20090026570 - Methods and structures for discharging plasma formed during the fabrication of semiconuctor device: Methods and structures for discharging plasma formed during the fabrication of semiconductor device are disclosed. The semiconductor device includes a wordline, a common ground line and a fuse structure for electrically coupling the wordline and the common ground line until a break signal is applied via the fuse structure.... Agent: Spansion LLC C/o Murabito , Hao & Barnes LLP

20090026571 - Solid-state imaging device: A solid-state imaging device includes first pixels and second pixels. Each of the first pixels and the second pixels includes a p-type diffusion layer formed in a semiconductor substrate and an n-type diffusion layer formed on the p-type diffusion layer. A first p-type implantation layer is formed on a surface... Agent: Mcdermott Will & Emery LLP

20090026572 - Method of manufacturing a semiconductor device, method of manufacturing a soi device, semiconductor device, and soi device: According to one embodiment of the present invention, a SOI device includes a first composite structure including a substrate layer, a substrate isolation layer being disposed on or above the substrate layer, a buried layer being disposed on or above the substrate isolation layer, and a semiconductor layer being disposed... Agent: Slater & Matsil LLP

20090026573 - Semiconductor memory device and method for manufacturing the same: A nonvolatile semiconductor memory device and a method for manufacturing the same that may include forming an isolation pattern in a substrate, and then etching a portion of the isolation pattern to expose a portion of an active region of the substrate, and then forming high-density second-type ion implantation regions... Agent: Sherr & Vaughn, PLLC

20090026574 - Electrical fuse having sublithographic cavities thereupon: An electrical fuse and a first dielectric layer thereupon are formed on a semiconductor substrate. Self-assembling block copolymers containing two or more different polymeric block components are applied into a recessed region surrounded by a dielectric template layer. The self-assembling block copolymers are then annealed to form a pattern of... Agent: Scully, Scott, Murphy & Presser, P.C.

20090026575 - Semiconductor device and method of manufacturing the same: Provided are a semiconductor device which substantially prevents repair failure and a method of manufacturing the same. The semiconductor device includes a plurality of first fuses formed apart from each other on a semiconductor substrate, and on which a protective layer is formed; a first insulating layer filled in between... Agent: Mills & Onello LLP

20090026576 - Anti-fuse: An anti-fuse is provided. The anti-fuse includes a substrate, a gate disposed over the substrate, a gate dielectric layer sandwiched between the substrate and the gate, and two source/drain regions in the substrate at respective sides of the gate. The gate and the substrate have the same conductive type, but... Agent: J C Patents, Inc.

20090026577 - Antifuse element and semiconductor device including same: To provide an antifuse element comprising a gate electrode, a depletion channel region, a gate insulating film between the gate electrode and the channel region, and a diffusion layer region forming a junction with the channel region. An end of the gate electrode coincides substantially with a boundary between the... Agent: Mcginn Intellectual Property Law Group, PLLC

20090026578 - Vertical npn transistor fabricated in a cmos process with improved electrical characteristics: A vertical NPN bipolar transistor includes a P-type semiconductor structure, an N-well as the collector, a P-Base region in the N-well and an N-type region as the emitter. The transistor further includes P-type region formed in the P-Base region and underneath the field oxide layer where the P-type region has... Agent: Patent Law Group LLP

20090026579 - Em rectifying antenna suitable for use in conjunction with a natural breakdown device: A rectenna capable of power conversion from electromagnetic (EM) waves of high frequencies is provided. In one embodiment, a rectenna element generates currents from two sources—based upon the power of the incident EM wave and from an n-type semiconductor, or another electron source attached to a maximum voltage point of... Agent: Macpherson Kwok Chen & Heid LLP

20090026581 - Flash memory device and method of manufacturing the same: A method includes forming trenches in a semiconductor substrate by etching the semiconductor substrate; and then forming a first ion injection layer in sidewalls of the trenches at an active region of the semiconductor substrate; and then forming a second ion injection layer in a substantially horizontally extending surface of... Agent: Sherr & Vaughn, PLLC

20090026580 - Semiconductor device and manufacturing method: A semiconductor device and its manufacturing method are disclosed. The semiconductor device includes at least one integrated circuit on a semiconductor substrate having an active side and a back side. The lattice constant of the semiconductor material is increased. The manufacturing method includes stretching the semiconductor lattice in near-surface areas... Agent: Slater & Matsil, L.L.P.

20090026582 - Deposited semiconductor structure to minimize n-type dopant diffusion and method of making: In deposited silicon, n-type dopants such as phosphorus and arsenic tend to seek the surface of the silicon, rising as the layer is deposited. When a second undoped or p-doped silicon layer is deposited on n-doped silicon with no n-type dopant provided, a first thickness of this second silicon layer... Agent: Dugan & Dugan, PC

20090026584 - Method for manufacturing semiconductor device: A method for manufacturing a semiconductor device which includes fine patterns having various critical dimensions (CDs) by adjusting a thickness of spacer used as an etching mask in Spacer Patterning Technology (SPT). The method for manufacturing a semiconductor device includes forming spacers at a different level over an etching target... Agent: Marshall, Gerstein & Borun LLP

20090026583 - Method of producing 3-d mold, method of producing finely processed product, method of producing fine-pattern molded product, 3-d mold, finely processed product, fine-pattern molded product and optical component: A method of producing a 3-D mold that is configured to control depth within 10 nm and form a line width of 200 nm or less, wherein an irradiation step, which irradiates an electron beam to a resist layer of an object of processing that has the resist layer constituted... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090026585 - Semiconductor device and method for manufacturing the same: A semiconductor device consistent with the present invention includes a semiconductor substrate having a semiconductor chip region and a scribe region; a first insulating layer formed in the semiconductor chip region of the semiconductor substrate; a metal contact plug formed in the first insulating layer; a metal sidewall formed on... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090026586 - Superjunction device having oxide lined trenches and method for manufacturing a superjunction device having oxide lined trenches: A method of manufacturing a semiconductor device includes providing semiconductor substrate having trenches and mesas. At least one mesa has first and second sidewalls. The method includes doping with a dopant of a second conductivity the first sidewall of the mesa, and doping with a dopant of a second conductivity... Agent: Panitch Schwarze Belisario & Nadel LLP

20090026587 - Gradient deposition of low-k cvd materials: A dielectric layer for a semiconductor device having a low overall dielectric constant, good adhesion to the semiconductor substrate, and good resistance to cracking due to thermal cycling. The dielectric layer is made by a process involving continuous variation of dielectric material deposition conditions to provide a dielectric layer having... Agent: International Business Machines Corporation Dept. 18g

20090026588 - Plasma processing method for forming a film and an electronic component manufactured by the method: A plasma processing method for forming a film on a substrate using a gas processed by a plasma. The plasma processing method for forming a film includes the steps of forming a CF film on the substrate by using a CaFb gas (here, a is a counting number, and b... Agent: Masuvalley & Partners

20090026589 - Semiconductor device and method of manufacturing the same: Aiming at providing a semiconductor device advanced in performance of transistors, and improved in reliability, a semiconductor device of the present invention has a semiconductor element, a frame component provided over the semiconductor element, while forming a cavity therein, and a molding resin layer covering around the frame component, wherein... Agent: Young & Thompson

20090026590 - Leadframe panel: An improved leadframe panel suitable for use in packaging IC dice is described. The described leadframe panel is configured such that the amount of leadframe material that is removed during singulation of the leadframe panel is reduced.... Agent: Beyer Law Group LLP

20090026596 - Lead frame, semiconductor package, and stacked semiconductor package having the same: In certain embodiments, a lead frame includes a paddle, a plurality of inner leads, first outer leads, and a second outer lead. The plurality of inner leads can be arranged at a side face of the paddle. The first outer leads can extend from the inner leads along a first... Agent: Marger Johnson & Mccollom, P.C.

20090026595 - Semiconductor device package: A surface of a lead frame of a semiconductor device package, on which a semiconductor chip is mounted, is formed to have a mesh structure, whereby a connecting area between the lead frame and a molding resin can be increased to have strong bonding. Further, only filler particles having a... Agent: Brinks Hofer Gilson & Lione

20090026592 - Semiconductor dies with recesses, associated leadframes, and associated systems and methods: Semiconductor dies with recesses, associated leadframes, and associated systems and methods are disclosed. A semiconductor system in accordance with one embodiment includes a semiconductor die having a first surface and a second surface facing opposite from the first surface, with the first surface having a die recess. The system can... Agent: Perkins Coie LLP Patent-sea

20090026591 - Semiconductor package adapted for high-speed data processing and damage prevention of chips packaged therein and method for fabricating the same: A semiconductor package includes a semiconductor chip provided with a first surface having a bonding pad, a second surface opposing to the first surface and side surfaces; a first redistribution pattern connected with the bonding pad and extending along the first surface from the bonding pad to an end portion... Agent: Ladas & Parry LLP

20090026597 - Stacked integrated circuit leadframe package system: A stacked integrated circuit leadframe package system including forming a leadframe, packaging a top integrated circuit on a one side of the leadframe, packaging a bottom integrated circuit on an opposite side of the leadframe, and forming external electrical interconnects on the leadframe.... Agent: Law Offices Of Mikio Ishimaru

20090026594 - Thin plastic leadless package with exposed metal die paddle: A method of making electronic packages includes providing a leadframe strip that includes a plurality of leadframes, wherein the leadframes comprise a plurality of leads, etching a surface of each of the leadframes to form an opening, wherein each of the leads has a lead tip that connects to a... Agent: Townsend And Townsend And Crew, LLP

20090026593 - Thin semiconductor die packages and associated systems and methods: Thin semiconductor die packages and associated systems and methods are disclosed. A package in accordance with a particular embodiment includes a semiconductor die having die bond sites, a conductive structure positioned proximate to the semiconductor die and having first bond sites and second bond sites spaced apart from the first... Agent: Perkins Coie LLP Patent-sea

20090026598 - Wafer level packaging integrated hydrogen getter: A wafer-level package that employs one or more integrated hydrogen getters within the wafer-level package on a substrate wafer or a cover wafer. The hydrogen getters are provided between and among the integrated circuits on the substrate wafer or the cover wafer, and are deposited during the integrated circuit fabrication... Agent: MillerIPGroup, PLC Northrop Grumman Corporation

20090026599 - Memory module capable of lessening shock stress: A memory module capable of lessening shock stresses, primarily comprises a multi-layer printed circuit board (PCB), a plurality of memory packages, and a stress-buffering layer. The memory packages are disposed at least on one of the rectangular surfaces of the PCB. The stress-buffering layer is disposed at least on both... Agent: Joe Mckinney Muncy

20090026600 - Microelectronic die packages with metal leads, including metal leads for stacked die packages, and associated systems and methods: Microelectronic die packages, stacked systems of die packages, and methods of manufacturing them are disclosed herein. In one embodiment, a system of stacked packages includes a first die package having a bottom side, a first dielectric casing, and first metal leads; a second die package having a top side attached... Agent: Perkins Coie LLP Patent-sea

20090026602 - Method for manufacturing and making planar contact with an electronic apparatus, and correspondingly manufactured apparatus: Reliable electrical contact is made with electronic components and effective electrical isolation is produced between the top and bottom of the electronic components. An electronic component is arranged inside a window in a first layer on a substrate. Next, a second layer is put on such that contact areas on... Agent: Staas & Halsey LLP

20090026601 - Semiconductor module: A semiconductor module is disclosed. One embodiment provides a first semiconductor chip having a first contact pad on a first main surface and a second contact pad on a second main surface, a first electrically conductive layer applied to the first main surface, a second electrically conductive layer applied to... Agent: Dicke, Billig & Czaja

20090026603 - Electronic component package and method of manufacturing same: An electronic component package includes: a base having a top surface and a side surface; and a plurality of layer portions stacked on the top surface of the base, each of the layer portions including at least one electronic component chip. The base includes a plurality of external connecting terminals,... Agent: Oliff & Berridge, PLC

20090026604 - Semiconductor plastic package and fabricating method thereof: A semiconductor plastic package and a method of fabricating the semiconductor plastic package are disclosed. A method of fabricating a semiconductor plastic package can include: providing a core board, which includes at least one pad, and which has a coefficient of thermal expansion of 9 ppm/° C. or lower; stacking... Agent: Staas & Halsey LLP

20090026605 - Heat extraction from packaged semiconductor chips, scalable with chip area: A semiconductor device (100A) with plastic encapsulation compound (102) and metal sheets (103a and 104) on both surfaces, acting as heat spreaders. One or more thermal conductors (103a) of preferably uniform height connect one sheet (103b) and the chip surface (101a); the number of conductors is scalable with the chip... Agent: Texas Instruments Incorporated

20090026606 - Semiconductor device and method for manufacturing the same: A semiconductor device and a method for manufacturing the same are described. The semiconductor device comprises: a heat sink having at least one opening passing through the heat sink; at least one semiconductor chip disposed in the opening, wherein the semiconductor chip includes a first side and a second side... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090026608 - Crosstalk-free wlcsp structure for high frequency application: A structure, a system, and a method for manufacture of crosstalk-free wafer level chip scale packaging (WLCSP) structure for high frequency applications is provided. An illustrative embodiment comprises a substrate on which various layers and structures form circuitry, a signal pin formed on the substrate and coupled with the circuitry,... Agent: Slater & Matsil, L.L.P.

20090026611 - Electronic assembly having a multilayer adhesive structure: An electronic device comprises a substrate and a number of bump units over the substrate, wherein each of the bump units includes an electrically insulating bump-forming body extending in a first direction, and at least two conductive layers separated from each other on the electrically insulating bump-forming body, the at... Agent: Alston & Bird LLP

20090026607 - Electronic device and method of manufacturing same: It is proposed a method of manufacturing an electronic system wherein a first substrate comprising first connection elements on a first surface of the first substrate is provided; a second substrate comprising second connection elements on a first surface of the second substrate is provided; a polymer layer is applied... Agent: Infineon Technologies Ag Patent Department

20090026609 - Semiconductor device and method for manufacturing the same: A semiconductor device includes a semiconductor chip, a connection electrode including a first land electrode electrically coupled with the semiconductor chip, and a through electrode formed on an upper surface of the first land electrode to be electrically coupled with the first land electrode using a stud bump, and a... Agent: Murabito, Hao & Barnes LLP

20090026610 - Semiconductor device and method of manufacturing the same: The invention provides a semiconductor device having high reliability and a method of manufacturing the same. The semiconductor device of the invention has pad electrodes formed on a semiconductor die near the side surface portion thereof and connected to a semiconductor integrated circuit or the like in the semiconductor die,... Agent: Morrison & Foerster LLP

20090026615 - Semiconductor device having external connection terminals and method of manufacturing the same: In one embodiment, a semiconductor device has a semiconductor element made up of a semiconductor chip, first solder balls provided on the semiconductor chip and a BGA substrate on which the semiconductor chip is mounted via the first solder balls. Furthermore, the semiconductor device has external terminals on a surface... Agent: Young & Thompson

20090026613 - Semiconductor package and method for manufacturing the same: A semiconductor package and a method for manufacturing the same. The semiconductor package includes a semiconductor chip having bonding pads; a first insulation layer pattern; redistribution line patterns; a second insulation layer pattern; and conductive balls. The first insulation layer pattern having first openings exposing the bonding pads. The redistribution... Agent: Ladas & Parry LLP

20090026612 - Semiconductor package having an improved connection structure and method for manufacturing the same: A semiconductor package having an improved connection structure and a method for manufacturing the same is described. The semiconductor package includes a substrate having a substrate body, connection pads that are located on one surface of the substrate body, and ball lands that are located on the other surface of... Agent: Ladas & Parry LLP

20090026614 - System in package and method for fabricating the same: A system device package that includes a semiconductor substrate, a metal line formed on the semiconductor substrate, a passivation film formed over the semiconductor substrate including the metal line, wherein the passivation film includes first and second openings, a pad formed over the passivation film and covering the first and... Agent: Sherr & Vaughn, PLLC

20090026616 - Integrated circuit having a semiconductor substrate with a barrier layer: An integrated circuit having a semiconductor substrate with a barrier layer is disclosed. The arrangement includes a semiconductor substrate and a metallic element. A carbon-based barrier layer is disposed between the semiconductor substrate and the metallic element.... Agent: Dicke, Billig & Czaja

20090026617 - Semiconductor device having a copper metal line and method of forming the same: A semiconductor device having a copper line and a method of forming the same so as to prevent a bridge phenomenon between neighboring upper lines are described. The method may include the steps of forming a capping layer and an intermetal dielectric layer in a stacked configuration over a substrate... Agent: Workman Nydegger 1000 Eagle Gate Tower

20090026618 - Semiconductor device including interlayer interconnecting structures and methods of forming the same: In a method of forming a semiconductor device, and a semiconductor device formed according to the method, an insulating layer is provided on an underlying contact region of the semiconductor device. An opening is formed in the insulating layer to expose the underlying contact region. A seed layer is provided... Agent: Mills & Onello LLP

20090026619 - Method for backside metallization for semiconductor substrate: A wafer circuit, such as a wafer-level package, that includes a semiconductor substrate on which is fabricated one or more integrated circuits. A backside metal layer is deposited on the semiconductor substrate, and is electrically coupled to the integrated circuit by metallized vias extending through the substrate wafer. The backside... Agent: MillerIPGroup, PLC Northrop Grumman Corporation

20090026620 - Method for cutting multilayer substrate, method for manufacturing semiconductor device, semiconductor device, light emitting device, and backlight device: In order to cut off, without causing any burr, a multilayer substrate having a metal layer on a front surface and a second metal layer on a back surface, a method for cutting the multilayer substrate is a method for cutting the multilayer substrate having a metal layer on the... Agent: Morrison & Foerster LLP

20090026621 - Bond pad stacks for esd under pad and active under pad bonding: A combination of layout improvements and inner layer dielectric (ILD) material improvements provides a bond pad stack that is robust for both gold (Au) and copper (Cu) wires in circuits with only one or two pad metal layers. The layout improvements involve removing all vias between the top metal layer... Agent: Stallman & Pollock LLP

20090026625 - Adhesion enhancement for metal/dielectric interface: An interconnect structure and method of fabricating the same in which the adhesion between a chemically etched dielectric material and a noble metal liner is improved are provided. In accordance with the present invention, a chemically etching dielectric material is subjected to a treatment step which modified the chemical nature... Agent: Scully, Scott, Murphy & Presser, P.C.

20090026623 - Buried metal-semiconductor alloy layers and structures and methods for fabrication thereof: A method for forming a metal-semiconductor alloy layer uses particular thermal annealing conditions to provide a stress free metal-semiconductor alloy layer through interdiffusion of a buried semiconductor material layer and a metal-semiconductor alloy forming metal layer that contacts the buried semiconductor material layer within an aperture through a capping layer... Agent: Scully, Scott, Murphy & Presser, P.C.

20090026624 - Semiconductor device and method for manufacturing metal line thereof: A method for manufacturing a metal line of a semiconductor device includes forming an interlayer dielectric layer over the whole surface of a semiconductor substrate including a first metal line. A plurality of trenches are formed in trench areas each having a predetermined depth from a surface thereof by selectively... Agent: Sherr & Vaughn, PLLC

20090026622 - Semiconductor device and method for manufacturing same: A multilayered wiring is formed in a prescribed area in an insulating film that is formed on a semiconductor substrate. Dual damascene wiring that is positioned on at least one layer of the multilayered wiring is composed of an alloy having copper as a principal component. The concentration of at... Agent: Mcginn Intellectual Property Law Group, PLLC

20090026626 - Method for fabricating semiconductor device and semiconductor device: A method for fabricating a semiconductor device includes forming a dielectric film on a semiconductor substrate; forming an opening in the dielectric film; forming a refractory metal film in the opening; performing a nitriding process to the refractory metal film; removing a nitride of the refractory metal film formed on... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090026627 - Support structures for on-wafer testing of wafer-level packages and multiple wafer stacked structures: A semiconductor structure, such as a wafer-level package or a vertically stacked structure. The wafer-level package includes a substrate wafer on which an integrated circuit is formed. A cover wafer is bonded to the substrate wafer to provide a cavity between the substrate wafer and the cover wafer in which... Agent: MillerIPGroup, PLC Northrop Grumman Corporation

20090026632 - Chip-to-chip package and process thereof: A wafer treating method for making adhesive chips is provided. A liquid adhesive with two-stage property is coated on a surface of a wafer. Then, the wafer is pre-cured to make the liquid adhesive transform an adhesive film having B-stage property which has a glass transition temperature between −40 and... Agent: J C Patents, Inc.

20090026628 - Electrical connections for multichip modules: A semiconductor package includes a first semiconductor chip mounted on a substrate and a second semiconductor chip mounted on top of the first semiconductor chip. A plurality of metal lines is deposited on the top of the first chip, and the metal lines are isolated from circuitry in the first... Agent: Marger Johnson & Mccollom, P.C.

20090026631 - Electronic component and semiconductor device, method of fabricating the same, circuit board mounted with the same, and electronic appliance comprising the circuit board: An integrated type semiconductor device that is capable of reducing cost or improving the reliability of connecting semiconductor chips together or chips to a circuit board. One embodiment of such an integrated type semiconductor device comprises a first semiconductor device (10) having a semiconductor chip (12) with electrodes (16), a... Agent: Oliff & Berridge, PLC

20090026630 - Semiconductor device and method for manufacturing same: The present invention provides a semiconductor device capable of preventing chip cracks in a manufacturing process as much as possible, wherein the semiconductor device includes: a substrate main body provided with an inner surface internal to the semiconductor device and an outer surface external to the semiconductor device opposed to... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090026629 - Semiconductor package having a stacked wafer level package and method for fabricating the same: A semiconductor package having a stacked wafer level structure includes a base substrate; a semiconductor chip; a redistribution pattern; and a second insulation layer pattern. The base substrate having a chip region and a peripheral region disposed at the periphery of the chip region. The semiconductor chip is disposed over... Agent: Ladas & Parry LLP

20090026634 - Electronic part mounting structure and its manufacturing method: An electronic part mounting structure includes electronic part (2) having a plurality of electrode terminals (3), a substrate provided with connection terminals (6) in locations corresponding to these electrode terminals (3), and protruding electrode (7) for connecting one of electrode terminals (3) and one of connection terminals (6), where electrode... Agent: Mcdermott Will & Emery LLP

20090026633 - Flip chip package structure and method for manufacturing the same: A flip chip package structure and a method for manufacturing the same are disclosed. The method for manufacturing a flip chip package structure comprises following steps: (a) providing a semiconductor chip including a plurality of electrode pads and a plurality of first solders, and providing a packaging substrate having a... Agent: Bacon & Thomas, PLLC

20090026635 - Semiconductor device and manufacturing method thereof: A method of manufacturing a semiconductor device comprises: a step of forming an inter-layer insulating film on a semiconductor substrate; a step of forming a first metal film on the inter-layer insulating film; a step of forming a first resist on the first metal film and patterning the first resist;... Agent: Mcdermott Will & Emery LLP

20090026636 - Semiconductor device and method of manufacturing same: Semiconductor device has a semiconductor chip embedded in an insulating layer. A semiconductor device comprises a semiconductor chip formed to have external connection pads and a positioning mark that is for via formation; an insulating layer containing a non-photosensitive resin as an ingredient and having a plurality of vias; and... Agent: Young & Thompson

20090020738 - Integrated circuit including force-filled resistivity changing material: An integrated circuit includes a first electrode, a second electrode, and force-filled resistivity changing material electrically coupled to the first electrode and the second electrode.... Agent: Dicke, Billig & Czaja

20090020739 - Method for delineation of phase change memory cell via film resistivity modification: A PCM cell structure comprises a lower electrode composed of a Phase Change Memory (PCM) layer and a conductive encapsulating upper electrode layer. The PCM is protected from damage by a conductive encapsulating layer. Electrical isolation between adjacent cells is provided by modifying the conductivity of the PCM layer and... Agent: Graham S. Jones, Ii

20090020740 - Resistive memory structure with buffer layer: A memory device comprises first and second electrodes with a memory element and a buffer layer located between and electrically coupled to them. The memory element comprises one or more metal oxygen compounds. The buffer layer comprises at least one of an oxide and a nitride. Another memory device comprises... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20090020741 - Phase change memory device with reinforced adhesion force: A phase change memory device includes a semiconductor substrate having a plurality of phase change cell regions. A bottom electrode is formed in each phase change cell region of the semiconductor substrate. An insulation layer is formed on the semiconductor substrate to cover the bottom electrode, and the insulation layer... Agent: Ladas & Parry LLP

20090020745 - Method of manufacturing semiconductor device having transition metal oxide layer and related device: Provided is a method of manufacturing a semiconductor device having a switching device capable of preventing a snake current. First, a transition metal oxide layer and a leakage control layer are alternately stacked on a substrate 1 to 20 times to form a varistor layer. The transition metal oxide layer... Agent: Myers Bigel Sibley & Sajovec

20090020746 - Self-aligned structure and method for confining a melting point in a resistor random access memory: A process in the manufacturing of a resistor random access memory with a confined melting area for switching a phase change in the programmable resistive memory. The process initially formed a pillar comprising a substrate body, a first conductive material overlying the substrate body, a programmable resistive memory material overlying... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20090020743 - Semiconductor structure, in particular phase change memory device having a uniform height heater: A phase change memory formed by a plurality of phase change memory devices having a chalcogenide memory region extending over an own heater. The heaters have all a relatively uniform height. The height uniformity is achieved by forming the heaters within pores in an insulator that includes an etch stop... Agent: Seed Intellectual Property Law Group Pllc

20090020742 - Solid electrolyte switching element, and fabrication method of the solid electrolyte element, and integrated circuit: The switching element of the present invention is of a configuration that includes: a first electrode (14) and a second electrode (15) provided separated by a prescribed distance; a solid electrolyte layer (16) provided in contact with the first electrode (14) and the second electrode (15); a third electrode (18)... Agent: Sughrue Mion, Pllc

20090020744 - Stacked multilayer structure and manufacturing method thereof: A stacked multilayer structure according to an embodiment of the present invention comprises: a stacked layer part including a plurality of conducting layers and a plurality of insulating layers, said plurality of insulating layers being stacked alternately with each layer of said plurality of conducting layers, one of said plurality... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c.

20090020747 - Method for realizing a hosting structure of nanometric elements: A nanometric device comprising a substrate; a plurality of conductive spacers of a conductive material, each conductive spacer being arranged on top of and transverse to the substrate, the conductive spacers including respective pairs of conductive spacers defining respective hosting seats each of less than 30 nm wide; and a... Agent: Seed Intellectual Property Law Group Pllc

20090020748 - Si/sige interband tunneling diodes with tensile strain: Some disclosed interband tunneling diodes comprise a plurality of substantially coherently strained layers including layers selected from a group consisting of silicon, germanium, and alloys of silicon and germanium, wherein at least one of said substantially coherently strained layers is tensile strained. Some disclosed resonant interband tunneling diodes comprise a... Agent: Fay Sharpe LLP

20090020750 - Active semiconductor devices: Apparatus including a support body; an organic semiconductor composition body on the support body, —and a first body including a hydrogenated vinylaromatic-diene block copolymer on the organic semiconductor composition body. Apparatus including a support body, —a first body including a hydrogenated vinylaromatic-diene block copolymer on the support body; and an... Agent: Connolly Bove Lodge & Hutz, LLP

20090020751 - Method of forming thin film patterning substrate including formation of banks: Display devices such as EL elements or LED elements, are formed from thin film elements having banks of prescribed height and a thin film layer formed by an ink jet method in areas to be coated that are partitioned by those banks. The banks may be formed of an organic... Agent: Oliff & Berridge, Plc

20090020749 - Semiconductive crosslinkable polymer composition: The present invention relates to a crosslinkable polymer composition which is useful for the preparation of semiconductive layers of electric cables, the polymer composition comprising (a) an unsaturated polyolefm having at least 0.15 vinyl groups/1000 carbon atoms and (b) carbon black.... Agent: Fay Sharpe LLP

20090020753 - Method of manufacturing semiconductor active layer, method of manufacturing thin film transistor using the same and thin film transistor having semiconductor active layer: A method of manufacturing an IGZO active layer includes depositing ions including In, Ga, and Zn from a first target, and depositing ions including In from a second target having a different atomic composition from the first target. The deposition of ions from the second target may be controlled to... Agent: Lee & Morse, P.c.

20090020752 - Resistance-switching oxide thin film devices: Resistance-switching oxide films, and devices therewith, are disclosed. Resistance-switching oxide films, according to certain preferred aspects of the present invention, include at least about 75 atomic percent of an insulator oxide matrix having a conducting material dopant in an amount up to about 25 atomic percent. The matrix and dopant... Agent: Woodcock Washburn LLP

20090020754 - Test structure for determining gate-to-body tunneling current in a floating body fet: In one disclosed embodiment, the present test structure for determining gate-to-body current in a floating body FET includes a floating body FET situated over a semiconductor layer, where the floating body FET includes a first gate and first and second source/drain regions. The floating body test structure further includes a... Agent: Farjami & Farjami LLP

20090020755 - Test structure of a semiconductor device and semiconductor device: A test structure includes a transistor, a dummy transistor and a pad unit. The transistor is formed on a first active region of a substrate. The dummy transistor is formed on a second active region of the substrate and electrically connected to the transistor. The pad unit is electrically connected... Agent: Volentine & Whitt Pllc

20090020756 - Test structures of a semiconductor device and methods of forming the same: A test structure including a transistor, a conductive pattern and a pad unit is provided. The transistor may be formed on a substrate having circuit patterns. The conductive pattern is electrically connected to the transistor. The conductive pattern may be used in aligning the circuit patterns and/or sensing plasma damage... Agent: Harness, Dickey & Pierce, P.L.C

20090020757 - Flash anneal for a pai, nisi process: A structure and a method for mitigation of the damage arising in the source/drain region of a MOSFET is presented. A substrate is provided having a gate structure comprising a gate oxide layer and a gate electrode layer, and a source and drain region into which impurity ions have been... Agent: Slater & Matsil, L.l.p.

20090020758 - Display substrate and method of manufacturing the same: A display substrate includes a base substrate, a first metal pattern, a second metal pattern, a first transparent conductive layer and a second transparent conductive layer. The first metal pattern is formed on the base substrate, and includes a gate line and a gate electrode connected to the gate line.... Agent: Macpherson Kwok Chen & Heid LLP

20090020759 - Light-emitting device: It is an object to provide a light-emitting device including a thin film transistor with high electric characteristics and high reliability, and a method for manufacturing the light-emitting device with high productivity. As for a light-emitting device including an inverted staggered thin film transistor of a channel stop type, the... Agent: Eric Robinson

20090020760 - Methods for forming materials using micro-heaters and electronic devices including such materials: Nano-sized materials and/or polysilicon are formed using heat generated from a micro-heater, the micro-heater may include a substrate, a heating element unit formed on the substrate, and a support structure formed between the substrate and the heating element unit. Two or more of the heating element units may be connected... Agent: Harness, Dickey & Pierce, P.L.C

20090020761 - Semiconductor device and method for manufacturing the same: A separation layer is formed over a substrate, an insulating film 107 is formed over the separation layer, a bottom gate insulating film 103 is formed over the insulating film 107, an amorphous semiconductor film is formed over the bottom gate insulating film 103, the amorphous semiconductor film is crystallized... Agent: Nixon Peabody, LLP

20090020762 - Display device and method of fabricating the same: To achieve promotion of stability of operational function of display device and enlargement of design margin in circuit design, in a display device including a pixel portion having a semiconductor element and a plurality of pixels provided with pixel electrodes connected to the semiconductor element on a substrate, the semiconductor... Agent: Nixon Peabody, LLP

20090020763 - Poly silicon layer and structure for forming the same: A method of fabricating a poly silicon layer comprising the following steps is provided. First, a substrate is provided and an amorphous silicon layer is formed on the substrate. A patterned metal layer is formed on the amorphous silicon layer. Next, a pulsed rapid thermal annealing process is performed to... Agent: Jianq Chyun Intellectual Property Office

20090020764 - Graphene-based transistor: A graphene layer is formed on a surface of a silicon carbide substrate. A dummy gate structure is formed over the fin, in the trench, or on a portion of the planar graphene layer to implant dopants into source and drain regions. The dummy gate structure is thereafter removed to... Agent: Scully, Scott, Murphy & Presser, P.c.

20090020766 - Power semiconductor device: A power semiconductor device less prone to cause a reaction between a metal material for interconnection and an electrode or the like connected to a semiconductor region during the high-temperature operation thereof and less prone to be strained during the high-temperature operation thereof. The power semiconductor device can be an... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c.

20090020765 - Semiconductor device and method for manufacturing same: A semiconductor device includes a first conductive type SiC semiconductor substrate; a second conductive type well formed on the SiC semiconductor substrate; a first impurity diffusion layer formed by introducing a first conductive type impurity so as to be partly overlapped with the well in a region surrounding the well;... Agent: Rabin & Berdo, Pc

20090020767 - Active matrix substrate: An active matrix substrate is provided. Within the field of the probe contact area of the pad portion, a buffer layer is arranged on a pad in order to increase the thickness of the pad portion; or, to hollow out the pad and form an opening within the probe contract... Agent: Intellectual Property Law Group LLP

20090020768 - Buried contact devices for nitride-based films and manufacture thereof: A semiconductor device comprising: a substrate; a first contact; a first layer of doped semiconductor material deposited on the substrate; a semiconductor junction region deposited on the first layer; a second layer of doped semiconductor material deposited on the junction region, the second layer having opposite semiconductor doping polarity to... Agent: Townsend And Townsend And Crew, LLP

20090020769 - Semiconductor light emitting element: A semiconductor light emitting element having a rectangular shape in plan view comprising at least a first side and a second side adjacent to the first side, the semiconductor light emitting element including a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, a plurality of first electrodes having a... Agent: Birch Stewart Kolasch & Birch

20090020770 - Led chip package structure with high-efficiency light-emitting effect and method of packaging the same: An LED chip package structure with high-efficiency light-emitting effect includes a substrate unit, a light-emitting unit, and a package colloid unit. The substrate unit has a substrate body, and a positive electrode trace and a negative electrode trace respectively formed on the substrate body. The light-emitting unit has a plurality... Agent: Rosenberg, Klein & Lee

20090020771 - Iii-nitride semiconductor light emitting device and method for manufacturing the same: The present disclosure relates to an III-nitride compound semiconductor light emitting device and a method of manufacturing the same. The III-nitride compound semiconductor light emitting device includes a substrate with a groove formed therein, a plurality of nitride compound semiconductor layers being grown on the substrate, and including an active... Agent: Harness, Dickey, & Pierce, P.l.c

20090020776 - Light-emitting device: A light-emitting device comprises a channel structure in the semiconductor layer for connecting an electrode and an ohmic contact layer by means of a substrate transfer process including a wafer-bonding process and a substrate-lifting-off process. The channel structure is formed in the semiconductor stack for electrically connecting the ohmic contact... Agent: Bacon & Thomas, Pllc

20090020772 - Light-emitting device and method for making the same: A light-emitting device is capable of emitting a light having a wavelength ranging from 300 to 550 nm, and includes: a substrate; a p-type semiconductor layer disposed on the substrate; an active layer disposed on the p-type semiconductor layer; a n-type semiconductor layer disposed on the active layer and having... Agent: Rosenberg, Klein & Lee

20090020774 - Package of light emitting diode and method for manufacturing the same: Provided is a package of a light emitting diode. The package includes a metal plate, a light-emitting diode chip, an insulating layer, a lead frame, a reflective coating layer, and a molding material. The light-emitting diode chip is surface-mounted on the metal plate, and the insulating layer is formed on... Agent: Birch Stewart Kolasch & Birch

20090020775 - Red line emitting complex fluoride phosphors activated with mn4+: New phosphor materials including a complex fluoride phosphor activated with Mn4+ which may include at least one of (A) A2[MF7]:Mn4+, wherein A=Li, Na, K, Rb, Cs, NH4, or a combination thereof, and M=Nb, Ta or a combination thereof; and (B) A3[XF6]:Mn4+, wherein A=Li, Na, K, Rb, Cs, NH4, or a... Agent: Fay Sharpe LLP

20090020773 - Semiconductor light emitting device and method of manufacturing the same: A method of manufacturing a semiconductor light emitting device. The method includes: mounting a semiconductor light emitting element on a flat substrate; covering the semiconductor light emitting element on the flat substrate by a cover layer in a domed shape to form a light emitting device, the cover layer including... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090020777 - Vertical resonator type light emitting diode: A novel vertical resonator type light emitting diode of which has a simplified structure of the reflector layer of its light emitting side an which is resistant to declination of its emission output power towards a high temperature range, has an active layer 5, and a first reflector layer 3... Agent: Masao Yoshimura, Chen Yoshimura, LLP

20090020778 - Light emitting device and method of manufacturing the same: The light emitting device 100 includes a light emitting element 101, a package for arranging the light emitting element 101, and an electrically conductive wire 106 for connecting an electrode disposed on the package and an electrode of the light emitting element. The package includes a support member 108 having... Agent: Ditthavong Mori & Steiner, P.c.

20090020779 - Method of preparing a sealed light-emitting diode chip: A method for producing a light emitting diode chip encapsulation product, the method comprising covering a light emitting diode chip connected onto a substrate with a thermosetting film, and thermally curing the thermosetting film.... Agent: Frishauf, Holtz, Goodman & Chick, Pc

20090020780 - Light emitting diode with improved structure: Disclosed is a light emitting diode (LED) with an improved structure. The LED comprises an N-type semiconductor layer, a P-type semiconductor layer and an active layer interposed between the N-type and P-type semiconductor layers. The P-type compound semiconductor layer has a laminated structure comprising a P-type clad layer positioned on... Agent: H.c. Park & Associates, Plc

20090020781 - Nitride-based semiconductor light emitting device and method for fabricating same: An exemplary nitride-based semiconductor light emitting device includes a substrate, a nitride-based multi-layered structure epitaxially formed on the substrate, a first-type electrode and a second-type electrode. The multi-layered structure includes a first-type layer, an active layer, and a second-type layer. The multi-layered structure has a developed mesa structure which at... Agent: Pce Industry, Inc. Att. Cheng-ju Chiang

20090020782 - Avalanche photodiode with edge breakdown suppression: The invention relates to an avalanche photodiode having enhanced gain uniformity enabled by a tailored diffused p-n junction profile. The tailoring is achieved by a two stage doping process incorporating a solid source diffusion in combination with conventional gas source diffusion. The solid source diffusion material is selected for its... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist P.a.

20090020783 - Transistor with differently doped strained current electrode region: A transistor is formed by providing a semiconductor layer and forming a control electrode overlying the semiconductor layer. A portion of the semiconductor layer is removed lateral to the control electrode to form a first recess and a second recess on opposing sides of the control electrode. A first stressor... Agent: Freescale Semiconductor, Inc. Law Department

20090020784 - Method for designing semiconductor device and semiconductor device: A method for designing a semiconductor device and a semiconductor device of the present invention permits the achievement of a predetermined pattern area ratio while power supply lines are reinforced by connecting a dummy metal line, which is formed in an unoccupied region of a wiring layer for the purpose... Agent: Mcdermott Will & Emery LLP

20090020785 - Semiconductor integrated circuit device: A semiconductor integrated circuit device includes: a semiconductor substrate, on which diffusion layers are formed; and multilayered wirings stacked above the semiconductor substrate to be connected to the diffusion layers via contact plugs, wherein a first wring and a second wiring formed thereabove are connected to the diffusion layers via... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c.

20090020786 - Semiconductor device: A method for forming a semiconductor device on a substrate having a first major surface lying in a plane and the semiconductor device are disclosed. In one aspect, the method comprises, after patterning the substrate to form at least one structure extending from the substrate in a direction substantially perpendicular... Agent: Knobbe Martens Olson & Bear LLP

20090020787 - Semiconductor device using semiconductor nanowire and display apparatus and image pick-up apparatus using the same: A semiconductor device, comprising a semiconductor nanowire having a first region with one of a PN junction and a PIN junction and a second region with a field effect transistor structure, a pair of electrodes connected to both ends of the semiconductor nanowire, and a gate electrode provided in at... Agent: Morgan & Finnegan, L.l.p.

20090020788 - Method of improving solid-state image sensor sensitivity: An imaging apparatus includes (a) a full-frame, charge-coupled device having (i) a conductive layer of a first dopant type; (ii) a plurality of pixels arranged as a charge-coupled device in the conductive layer that collects charge in response to incident light and transfers the collected charge; (iii) an overflow drain... Agent: Pedro P. Hernandez Patent Legal Staff

20090020789 - Charge transfer device and imaging apparatus: A fixed DC voltage is applied to branch electrodes 12a, 12b above the channel 22. The channel 22 has protrusion portions 19 that protrude inward from an outer circumference, which connects T1 and T2, and an outer circumference, which connects T3 and T4. The protrusion portions 19 causes charges below... Agent: Birch Stewart Kolasch & Birch

20090020790 - Method for fabricating polysilicon film, a gas phase deposition apparatus and an electronic device formed thereby: A method of directly depositing a polysilicon film at a low temperature is disclosed. The method comprises providing a substrate and performing a sequential deposition process. The sequential deposition process comprises first and second deposition steps. In the first deposition step, a first bias voltage is applied to the substrate,... Agent: Quintero Law Office, Pc

20090020793 - Field effect transistor: m

20090020792 - Isolated tri-gate transistor fabricated on bulk substrate: A method of forming an isolated tri-gate semiconductor body comprises patterning a bulk substrate to form a fin structure, depositing an insulating material around the fin structure, recessing the insulating material to expose a portion of the fin structure that will be used for the tri-gate semiconductor body, depositing a... Agent: Intel Corporation C/o Intellevate, Llc

20090020791 - Process method to fabricate cmos circuits with dual stress contact etch-stop liner layers: Exemplary embodiments provide IC CMOS devices having dual stress layers and methods for their manufacture using a buffer layer stack between the two types of the stress layers. The buffer layer stack can include multiple buffer layers formed between a first type stress layer (e.g., a tensile stress layer) and... Agent: Texas Instruments Incorporated

20090020794 - Image sensor and method of manufacturing the same: Provided are an image sensor and a method of manufacturing the same. The image sensor can be vertically arranged image sensor where the photodiode is provided above the circuitry on the substrate. The photodiode can be formed on a lower electrode provided electrically connected to a CMOS circuit on a... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20090020795 - Solid-state imaging element and method for fabricating the same: A solid-state imaging element includes a photodiode formed in an upper portion of a semiconductor substrate to perform a photoelectric conversion, a silicon dioxide film formed on the substrate to cover the photodiode, and a silicon nitride film formed on the silicon dioxide film. The silicon nitride film has a... Agent: Mcdermott Will & Emery LLP

20090020796 - Photoelectric conversion device and imaging system using photoelectric conversion device: A photoelectric conversion device includes photoelectric conversion elements and element isolation regions, both of which are arranged on a semiconductor substrate. The photoelectric conversion device further includes a plurality of interlayer insulation layers including a first interlayer insulation layer arranged nearest to the semiconductor substrate, and a second interlayer insulation... Agent: Fitzpatrick Cella Harper & Scinto

20090020797 - Semiconductor device and method of manufacturing the same: An FeRAM is produced by a method including the steps of forming a lower electrode layer (24), forming a first ferroelectric film (25a) on the lower electrode layer (24), forming on the first ferroelectric film (25a) a second ferroelectric film (25b) in an amorphous state containing iridium inside, thermally treating... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090020798 - Transistor structure and method of making the same: A transistor structure includes a gate trench. The gate trench includes a bottle-shape bottom. The bottle-shape bottom includes a first conductive material wider than its top. The top includes a second material in a substrate, a gate structure on the gate trench and electrically connected to the first conductive material,... Agent: North America Intellectual Property Corporation

20090020799 - Semiconductor device and method of manufacturing the same: One embodiment in accordance with the invention can include a semiconductor device that includes: a groove that is formed in a semiconductor substrate; bottom oxide films that are formed on both side faces of the groove; two charge storage layers that are formed on side faces of the bottom oxide... Agent: Spansion Llc C/o Murabito , Hao & Barnes LLP

20090020803 - Aging device: An aging device according to an embodiment of the present invention includes a semiconductor substrate, first and second diffusion layers provided in a first element region, a floating gate provided above a channel region between the first and second diffusion layers, and a control gate electrode provided beside the floating... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c.

20090020802 - Integrated scheme for forming inter-poly dielectrics for non-volatile memory devices: Electronic devices and methods for forming electronic devices that allow for a reduction in device dimensions while also maintaining or reducing leakage current for non-volatile memory devices are provided. In one embodiment, a method of fabricating a non-volatile memory device is provided. The method comprises depositing a floating gate polysilicon... Agent: Patterson & Sheridan, LLP - - Appm/tx

20090020800 - Semiconductor device and method of making same: A semiconductor device and method of making a semiconductor device are disclosed. A semiconductor body, a floating gate poly and a source/drain region are provided. A metal interconnect region with a control gate node is provided that capacitively couples to the floating gate poly.... Agent: Slater & Matsil LLP

20090020801 - Two-bit flash memory cell structure and method of making the same: A flash memory cell includes a control gate oxide layer on a substrate, a T-shaped control gate on the control gate oxide layer, a floating gate disposed on two recessed sidewalls of the T-shaped control gate, an insulating layer between the control gate and the floating gate, a dielectric layer... Agent: North America Intellectual Property Corporation

20090020804 - Semiconductor device and method for fabricating the same: A semiconductor device and a method for fabricating the same. The semiconductor device includes a gate pattern formed on a semiconductor substrate, a first impurity-doped region formed in the substrate on one side of the gate pattern and a second impurity-doped region formed in the substrate on the other side... Agent: Workman Nydegger 1000 Eagle Gate Tower

20090020805 - Non-volatile memory devices and methods of forming the same: A non-volatile memory device includes a dielectric layer between a charge storage layer and a substrate. Free bonds of the dielectric layer can be reduced to reduce/prevent charges from leaking through the free bonds and/or from being trapped by the free bonds. As a result, data retention properties and/or durability... Agent: Myers Bigel Sibley & Sajovec

20090020806 - Asymmetric field effect transistor structure and method: Disclosed are embodiments of an asymmetric field effect transistor structure and a method of forming the structure in which both series resistance in the source region (Rs) and gate to drain capacitance (Cgd) are reduced in order to provide optimal performance (i.e., to provide improved drive current with minimal circuit... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, Llc

20090020807 - Semiconductor device and method for fabricating the same: Disclosed are a semiconductor device and a method for fabrication of the same. The fabrication method may include selectively forming an oxide layer pattern on a semiconductor substrate, forming an insulation layer pattern on the same substrate to cover edge portions of the oxide layer pattern, etching the oxide layer... Agent: Workman Nydegger 1000 Eagle Gate Tower

20090020809 - Semiconductor device including trench gate transistor and method of forming the same: A semiconductor device includes an active region having a groove, a gate insulating film, and a gate electrode. The gate electrode may include first and second layers. The first layer extends along the gate insulating film. The first layer is electrically conductive. The second layer extends along the first layer.... Agent: Mcginn Intellectual Property Law Group, Pllc

20090020808 - Semiconductor integrated circuit devices and fabrication methods thereof: A memory cell of memory device, comprises an active region of a memory cell defined in a semiconductor substrate, and a conductive gate electrode in a trench of the active region. The gate electrode is isolated from the semiconductor substrate. An insulation layer is on the active region and on... Agent: Mills & Onello LLP

20090020810 - Method of forming power device utilizing chemical mechanical planarization: A trench-gated field effect transistor (FET) is formed as follows. Using one mask, a plurality of active gate trenches and at least one gate runner trench are defined and simultaneously formed in a silicon region such that (i) the at least one gate runner trench has a width greater than... Agent: Townsend And Townsend And Crew, LLP

20090020811 - Guard ring structures for high voltage cmos/low voltage cmos technology using ldmos (lateral double-diffused metal oxide semiconductor) device fabrication: A semiconductor structure and a method for forming the same. The method includes providing a semiconductor structure. The semiconductor structure includes a semiconductor substrate. The method further includes simultaneously forming a first doped transistor region of a first transistor and a first doped guard-ring region of a guard ring on... Agent: Schmeiser, Olsen & Watts

20090020812 - Metal-oxide-semiconductor device: A MOS device includes a semiconductor substrate having a first conductive type, a source region, a gate structure, and a drain region having a second conductive type. The gate structure is formed on the semiconductor substrate and substantially parallel to a first direction. The source region and the drain region... Agent: North America Intellectual Property Corporation

20090020813 - Formation of lateral trench fets (field effect transistors) using steps of ldmos (lateral double-diffused metal oxide semiconductor) technology: A semiconductor structure and a method forming the same. The method includes providing a semiconductor structure which includes a semiconductor substrate. The semiconductor substrate includes a top substrate surface which defines a reference direction perpendicular to the top substrate surface. The method further includes simultaneously forming a first doped transistor... Agent: Schmeiser, Olsen & Watts

20090020814 - High voltage semiconductor device with floating regions for reducing electric field concentration: A high voltage semiconductor device includes a source region of a first conductivity type having an elongated projection with two sides and a rounded tip in a semiconductor substrate. A drain region of the first conductivity type is laterally spaced from the source region in the semiconductor substrate. A gate... Agent: Townsend And Townsend And Crew, LLP

20090020815 - Semiconductor device and manufacturing method of the same: An object of the present invention is to provide a semiconductor device having a structure which can realize not only suppressing a punch-through current but also reusing a silicon wafer which is used for bonding, in manufacturing a semiconductor device using an SOI technique, and a manufacturing method thereof. The... Agent: Eric Robinson

20090020816 - Semiconductor device and method of forming the same: One embodiment generally described herein can be characterized as a semiconductor device. The semiconductor device can include a first transistor on a semiconductor substrate. A first interlayer insulating layer may be disposed over the first transistor and includes a first recess region. A single-crystalline semiconductor pattern may be disposed in... Agent: Marger Johnson & Mccollom, P.c.

20090020817 - Semiconductor device having a plurality of stacked transistors and method of fabricating the same: A semiconductor device according to example embodiments may have a plurality of stacked transistors. The semiconductor device may have a lower insulating layer formed on a semiconductor substrate and an upper channel body pattern formed on the lower insulating layer. A source region and a drain region may be formed... Agent: Harness, Dickey & Pierce, P.L.C

20090020818 - Semiconductor diode structures: A semiconductor structure and a method for operating the same. The method includes providing a semiconductor structure. The semiconductor structure includes first, second, third, and fourth doped semiconductor regions. The second doped semiconductor region is in direct physical contact with the first and third doped semiconductor regions. The fourth doped... Agent: Schmeiser, Olsen & Watts

20090020819 - Fin-type field effect transistor structure with merged source/drain silicide and method of forming the structure: Disclosed herein are embodiments of a multiple fin fin-type field effect transistor (i.e., a multiple fin dual-gate or tri-gate field effect transistor) in which the multiple fins are partially or completely merged by a highly conductive material (e.g., a metal silicide). Merging the fins in this manner allow series resistance... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, Llc

20090020820 - Channel-stressed semiconductor devices and methods of fabrication: In one aspect, a method of fabricating a semiconductor device is provided. The method includes forming at least one capping layer over epitaxial source/drain regions of a PMOS device, forming a stress memorization (SM) layer over the PMOS device including the at least one capping layer and over an adjacent... Agent: Volentine & Whitt Pllc

20090020821 - Dual workfunction semiconductor device: A dual workfunction semiconductor device which comprises a first and second control electrode comprising a metal-semiconductor compound, e.g. a silicide or a germanide, and a dual workfunction semiconductor device thus obtained are disclosed. In one aspect, the method comprises forming a blocking region for preventing diffusion of metal from the... Agent: Knobbe Martens Olson & Bear LLP

20090020825 - Forming dual metal complementary metal oxide semiconductor integrated circuits: Complementary metal oxide semiconductor metal gate transistors may be formed by depositing a metal layer in trenches formerly inhabited by patterned gate structures. The patterned gate structures may have been formed of polysilicon in one embodiment. The metal layer may have a workfunction most suitable for forming one type of... Agent: Trop Pruner & Hu, Pc

20090020822 - Semiconductor device and method for fabricating the same: A semiconductor device includes an n-type MIS transistor and a p-type MIS transistor. The n-type MIS transistor includes a first gate electrode formed on a first active region and a first sidewall formed on the side face of the first gate electrode. The p-type MIS transistor includes a second gate... Agent: Mcdermott Will & Emery LLP

20090020823 - Semiconductor device and method for manufacturing the same: A semiconductor device of the present invention includes a first transistor, a first stress-inducing film, a first insulating film, and a second insulating film. The first transistor is formed in a first active region of a semiconductor substrate, and includes a first gate electrode. The first stress-inducing film is formed... Agent: Mcdermott Will & Emery LLP

20090020824 - Semiconductor device and method for producing the same: A complementary semiconductor device comprising an n-channel transistor and a p-channel transistor, including: the n-channel transistor including a gate insulating film and a first metal gate electrode formed on the gate insulating film and having a first compound layer including a first metal (M1) and silicon (Si); and the p-channel... Agent: Mcdermott Will & Emery LLP

20090020826 - Integrated schottky diode and power mosfet: A semiconductor structure includes a semiconductor substrate; a first well region of a first conductivity type in the semiconductor substrate; a metal-containing layer on the first well region, wherein the metal-containing layer and the first well region form a Schottky barrier; and a first heavily doped region of the first... Agent: Slater & Matsil, L.l.p.

20090020827 - Thin gate electrode cmos devices and methods of fabricating same: A CMOS device and method of forming the CMOS device. The device including a source and a drain formed in a semiconductor substrate, the source and the drain and separated by a channel region of the substrate; a gate dielectric formed on a top surface of the substrate and a... Agent: Schmeiser, Olsen & Watts

20090020828 - Semiconductor device and its manufacturing method: A first MIS transistor includes a first source/drain region formed outside a first sidewall spacer in a first active region, a first silicide film formed on the first source/drain region, and a stressor insulating film formed on a first gate electrode, the first sidewall spacer, and the first silicide film.... Agent: Mcdermott Will & Emery LLP

20090020829 - Printing of contact metal and interconnect metal via seed printing and plating: Methods of forming contacts (and optionally, local interconnects) using an ink comprising a silicide-forming metal, electrical devices such as diodes and/or transistors including such contacts and (optional) local interconnects, and methods for forming such devices are disclosed. The method of forming contacts includes depositing an ink of a silicide-forming metal... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.c.

20090020830 - Asymmetric field effect transistor structure and method: Disclosed are embodiments for a design structure of an asymmetric field effect transistor structure and a method of forming the structure in which both series resistance in the source region (Rs) and gate to drain capacitance (Cgd) are reduced in order to provide optimal performance (i.e., to provide improved drive... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, Llc

20090020831 - Deuterated film encapsulation of nonvolatile charge trap memory device: A nonvolatile charge trap memory device with deuterium passivation of charge traps and method of manufacture. Deuterated gate layer, deuterated gate cap layer and deuterated spacers are employed in various combinations to encapsulate the device with deuterium sources proximate to the interfaces within the gate stack and on the surface... Agent: Cypress/blakely Blakely Sokoloff Taylor & Zafman LLP

20090020833 - Semiconductor device and method of fabricating the same: A method of fabricating a semiconductor device includes forming first spacers formed of a TEOS layer and second spacers formed of a first nitride layer on sidewalls of a gate electrode formed on a semiconductor substrate, and then forming source/drain regions in the semiconductor substrate using the first and second... Agent: Sherr & Vaughn, Pllc

20090020832 - Semiconductor devices and the manufacture thereof: A power semiconductor device includes a semiconductor body (10), the semiconductor body comprising source and drain regions (13, 14, 14a) of a first conductivity type, and a channel-accommodating region (15) of a second, opposite conductivity type which separates the source and drain regions. The drain region comprises a drain contact... Agent: Nxp, B.v. Nxp Intellectual Property Department

20090020834 - Semiconductor device and manufacturing method thereof: In a MOSFET using SiC a p-type channel is formed by epitaxial growth, so that the depletion layer produced in the p-type region right under the channel is reduced, even when the device is formed in a self-aligned manner. Thus, a high breakdown voltage is obtained. Also, since the device... Agent: Leydig Voit & Mayer, Ltd

20090020835 - Insulating film and electronic device: An electronic device including a semiconductor layer containing silicon as a major component; and a dielectric film epitaxially grown directly on a major surface of the semiconductor layer, a difference between 21/2 times lattice constant of the dielectric film along the major plane and a lattice constant of the semiconductor... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c.

20090020836 - Method for making a semiconductor device having a high-k gate dielectric: A method for making a semiconductor device is described. That method comprises forming an oxide layer on a substrate, and forming a high-k dielectric layer on the oxide layer. The oxide layer and the high-k dielectric layer are then annealed at a sufficient temperature for a sufficient time to generate... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20090020837 - Semiconductor device and manufacturing method thereof: A long channel semiconductor device and a manufacturing method thereof are provided. The method for forming a long channel semiconductor device includes: providing a substrate; forming a trench in the substrate with a trench bottom defining a first channel length; forming a spacer on a sidewall of the trench; recessing... Agent: Attn: Juan Carlos A. Marquez Reed Smith LLP

20090020838 - Apparatus and method for reducing optical cross-talk in image sensors: An image sensor device includes a semiconductor substrate having a front surface and a back surface; an array of pixels formed on the front surface of the semiconductor substrate, each pixel being adapted for sensing light radiation; an array of color filters formed over the plurality of pixels, each color... Agent: Haynes And Boone, LLP Ip Section

20090020839 - Semiconductor light receiving device and method for manufacturing same: A semiconductor light receiving device includes a light receiving section made of a semiconductor provided on a substrate, an electrode provided on the substrate and configured to apply an electric field to the light receiving section, a resin layer provided above the substrate, the resin layer having an inverted conical... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c.

20090020840 - Solid-state imaging device, solid-state imaging apparatus and manufacturing method thereof: A solid-state imaging apparatus includes a plurality of unit pixels with associated microlenses arranged in a two-dimensional array. Each microlens includes a distributed index lens with a modulated effective refractive index distribution obtained by including a combination of a plurality of patterns having a concentric structure, the plurality of patterns... Agent: Greenblum & Bernstein, P.L.C

20090020841 - Mesa-type photodetectors with lateral diffusion junctions: The present invention relates to a stable mesa-type photodetector with lateral diffusion junctions. The invention has found that without resorting to the complicated regrowth approach, a simple Zn diffusion process can be used to create high-quality semiconductor junction interfaces at the exposed critical surface or to terminate the narrow-bandgap photon... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist P.a.

20090020842 - Embedded bonding pad for backside illuminated image sensor: The present disclosure provide a microelectronic device. The microelectronic device includes a sensing element formed in the semiconductor substrate; a trench isolation feature formed in the semiconductor substrate; a bonding pad formed at least partially in the trench isolation feature; and interconnect features formed over the sensing element and the... Agent: Haynes And Boone, LLP Ip Section

20090020843 - Bottom anode schottky diode structure and method: This invention discloses a bottom-anode Schottky (BAS) diode that includes an anode electrode disposed on a bottom surface of a semiconductor substrate. The bottom-anode Schottky diode further includes a sinker dopant region disposed at a depth in the semiconductor substrate extending substantially to the anode electrode disposed on the bottom... Agent: Bo-in Lin

20090020844 - Semiconductor device having electrostatic discharge protection circuit and method of manufacturing the same: Semiconductor device having an on-chip type electrostatic discharge (ESD) protection circuit and a method of manufacturing the same are provided. The on-chip type ESD protection circuit may include a first junction diode having a first conductive type region contacting a second conductive type region in a semiconductor substrate, and a... Agent: Harness, Dickey & Pierce, P.L.C

20090020846 - Diode for adjusting pin resistance of a semiconductor device: A diode comprises a P-type well formed in a semiconductor substrate, at least one N-type impurity doping area formed in the P-type well, an isolation area formed to surround the N-type impurity doping area, a P-type impurity doping area formed to surround the isolation area, first contacts formed in the... Agent: Baker & Mckenzie LLP Patent Department

20090020845 - Shallow trench isolation structures for semiconductor devices including doped oxide film liners and methods of manufacturing the same: A semiconductor device includes a substrate having a trench, a sidewall liner that covers inner walls of the trench, a doped oxide film liner on the sidewall liner in the trench, and a gap-fill insulating film that buries the trench on the doped oxide film liner. In order to form... Agent: Myers Bigel Sibley & Sajovec

20090020847 - Semiconductor device having trench isolation region and methods of fabricating the same: A semiconductor device having a trench isolation region and methods of fabricating the same are provided. The method includes forming a first trench region in a substrate, and a second trench region having a larger width than the first trench region in the substrate. A lower material layer may fill... Agent: Harness, Dickey & Pierce, P.L.C

20090020848 - High-frequency transistor: A high-frequency transistor includes an intrinsic region provided to form an active element on the substrate, plural source and drain fingers alternately located with each other in the intrinsic region in parallel, each including a strip-form interconnect metal layer and contacts formed thereon, plural gate fingers respectively formed between the... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090020849 - Electronic device including a capacitor and a process of forming the same: An electronic device can include electronic components and an insulating layer overlying the electronic components. The electronic device can also include a capacitor overlying the insulating layer, wherein the capacitor includes a first electrode and a second electrode. The second electrode can include an opening, wherein from a top view,... Agent: Larson Newman Abel Polansky & White, LLP

20090020850 - Semiconductor design apparatus, semiconductor circuit and semiconductor design method: According to an aspect of the present invention, there is provided a semiconductor design apparatus including: a determination section that determines a connection position of a capacitor to suppress a noise on a layout data in which a layout of circuit cells are completed; a calculation section that calculates a... Agent: Gregory Turocy Amin, Turocy & Calvin, LLP

20090020851 - Bicmos devices with a self-aligned emitter and methods of fabricating such bicmos devices: A method of fabricating an heterojunction bipolar transistor (HBT) structure in a bipolar complementary metal-oxide-semiconductor (BiCMOS) process selectively thickens an oxide layer overlying a base region in areas that are not covered by a temporary emitter and spacers such that the temporary emitter can be removed and the base-emitter junction... Agent: Wood, Herron & Evans, LLP (ibm-bur)

20090020852 - Semiconductor device: An emitter layer is provided in stripes in a direction orthogonal to an effective gate trench region connected to a gate electrode and a dummy trench region isolated from the gate electrode. A width of the emitter layer is determined to satisfy a predetermined relational expression so as not to... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c.

20090020853 - Structures of and methods for forming vertically aligned si wire arrays: A structure consisting of vertically aligned wire arrays on a Si substrate and a method for producing such wire arrays. The wire arrays are fabricated and positioned on a substrate with an orientation and density particularly adapted for conversion of received light to energy. A patterned oxide layer is used... Agent: Steinfl & Bruno

20090020854 - Process of forming ultra thin wafers having an edge support ring: A process of forming ultra thin wafers having an edge support ring is disclosed. The process provides an edge support ring having an angled inner wall compatible with spin etch processes.... Agent: Schein & Cai LLP

20090020855 - Method for stacking serially-connected integrated circuits and multi-chip device made from same: A multi-chip device and method of stacking a plurality substantially identical chips to produce the device are provided. The multi-chip device, or circuit, includes at least one through-chip via providing a parallel connection between signal pads from at least two chips, and at least one through-chip via providing a serial... Agent: Borden Ladner Gervais LLP Anne Kinsman

20090020856 - Semiconductor device structures and methods for shielding a bond pad from electrical noise: Semiconductor device structures and methods for shielding a bond pad from electrical noise generated by active circuitry of an integrated circuit carried on a substrate. The structure includes electrically characterized devices placed in a pre-determined arrangement under the bond pad. The pre-determined arrangement of the electrically characterized devices provides for... Agent: Wood, Herron & Evans, LLP (ibm-bur)

20090020857 - System and method for routing supply voltages or other signals between side-by-side die and a lead frame for system in a package (sip) devices: An integrated circuit or chip includes a first die and a second die positioned on a lead frame of a package including a lead frame, such as a QFP, DIP, PLCC, TSOP, or any other type of package including a lead frame. The integrated circuit further includes a redistribution layer... Agent: Schwabe, Williamson & Wyatt, P.c.

20090020858 - Tape carrier substrate and semiconductor device: The present invention provides a tape carrier substrate that can prevent a conductor wire on the tape carrier substrate from being broken at the boundary portion between the conductor wire and a slit formed in a folding portion of the tape carrier substrate. The slit is formed in the folding... Agent: Steptoe & Johnson LLP

20090020859 - Quad flat package with exposed common electrode bars: An electronic package is provided. The electronic package comprises a die pad having a die attached thereon. A plurality of leads surrounds the die pad and spaced therefrom to define a ring gap therebetween. At least one first common electrode bar is in the ring gap and substantially coplanar to... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090020860 - Semiconductor device and manufacturing method of the same: A semiconductor device of a multi-pin structure using a lead frame is provided. The semiconductor device comprises a tab having a chip supporting surface, the chip supporting surface whose dimension is smaller than a back surface of a semiconductor chip, a plurality of leads arranged around the tab, the semiconductor... Agent: Miles & Stockbridge Pc

20090020862 - Device structure with preformed ring and method therefor: A device structure with preformed ring includes a sensor chip and a ring disposed and surrounded on periphery of sensitive area of an active surface thereof. The device structure with preformed ring may batchly bind and electrically connect to a carrier by a way of two-dimension array, and then a... Agent: Workman Nydegger 1000 Eagle Gate Tower

20090020861 - Semiconductor device: A module including a carrier and a semiconductor chip applied to the carrier. An external contact element is provided having a first portion and a second portion extending perpendicular to the first portion, wherein a thickness of the second portion is smaller than a thickness of the carrier.... Agent: Dicke, Billig & Czaja

20090020863 - Stacked semiconductor devices and signal distribution methods thereof: A stacked semiconductor device includes a plurality of stacked chips, each having a plurality of elements to receive a signal. At least one first ladder main signal line for receiving the signal is arranged to pass through the chips. At least one second ladder main signal line is arranged to... Agent: Harness, Dickey & Pierce, P.L.C

20090020864 - Wafer level package structure and fabrication methods: A method of forming a package structure with reduced damage to semiconductor dies is provided. The method includes providing a die comprising bond pads on a top surface of the die; forming bumps on the bond pads of the die, wherein the bumps have top surfaces higher than the top... Agent: Slater & Matsil, L.l.p.

20090020865 - Method for packaging semiconductor dies having through-silicon vias: An integrated circuit structure is provided. The integrated circuit structure includes a die and an anisotropic conducing film (ACF) adjoining the back surface of the die. The die includes a front surface; a back surface on an opposite side of the die than the front surface; and a through-silicon via... Agent: Slater & Matsil, L.l.p.

20090020866 - Semiconductor devices and manufacturing methods therefor: A semiconductor device includes: a package case in which a semiconductor element is mounted, the package case having a bonding portion; a cap having a bonding portion bonded to the bonding portion of the package case so as to hermetically seal the semiconductor element; and one or more bonding/sealing wires... Agent: Leydig Voit & Mayer, Ltd

20090020867 - Semiconductor device: A semiconductor device, includes: a wiring substrate having a wiring pattern on a front surface thereof; a first semiconductor chip mounted on the front surface of the wiring substrate; a first heat radiator having a first recess housing the first semiconductor chip and making contact with the front surface of... Agent: Harness, Dickey & Pierce, P.L.C

20090020868 - Integrated circuit package and system interface: An apparatus for enhancing the performance of an IC package and media interface. Adding a fissure to a Flip-Chip type package improves the crosstalk performance of the package for both high and low frequencies. The wall of the fissure can be implemented with a heat spreader layer and can be... Agent: Ortiz And Lopez, Pllc

20090020870 - Electronic device provided with wiring board, method for manufacturing such electronic device and wiring board for such electronic device: An electronic device (1) is provided with a wiring board (2) and a semiconductor chip (5). The wiring board (2) is provided with a first resin layer (3a) and a second resin layer (3b) stacked one over another by having a wiring (4) in between. The semiconductor chip (5) has... Agent: Sughrue Mion, Pllc

20090020869 - Interconnect joint: An interconnect joint comprises a substrate (110), a solder resist layer (120) over the substrate, a solder resist opening (130) (having a top surface (131)) in the solder resist layer, a solder material (140) in the solder resist opening, and an electrically conducting structure (150) having a portion that extends... Agent: Intel Corporation C/o Intellevate, Llc

20090020873 - Semiconductor apparatus, and method of manufacturing semiconductor apparatus: A semiconductor apparatus includes a semiconductor chip in which a plurality of electrode pads are provided on a main surface, and a plurality of bump electrodes are provided on the electrode pads of the semiconductor chip. The semiconductor apparatus also includes a wired board which is allocated in a side... Agent: Young & Thompson

20090020871 - Semiconductor chip with solder bump suppressing growth of inter-metallic compound and method of fabricating the same: A semiconductor chip having a solder bump and a method of fabricating the same are provided. Conventionally, an inter-metallic compound (IMC) unexpectedly grows at an interface of the solder bump by means of heat generated during operation of the semiconductor chip, thereby weakening mechanical property of the semiconductor chip. To... Agent: Marger Johnson & Mccollom, P.c.

20090020874 - Semiconductor device and method for manufacturing semiconductor device: A semiconductor device according to the present invention is provided with a semiconductor chip in which a plurality of electrode pads is provided on a principal surface, a plurality of bump electrodes provided on the electrode pads of the semiconductor chip, a square-shaped wiring board which is disposed on a... Agent: Young & Thompson

20090020872 - Wire bonding method and semiconductor device: In order to prevent bonded wires from being damaged during another wire bonding in a semiconductor device, there is provided a wire bonding method for wire-connecting pads on a semiconductor chip and multiple leads corresponding to the pads in a semiconductor device to be manufactured by sealing the semiconductor chip... Agent: Katten Muchin Rosenman LLP

20090020875 - Semiconductor device and manufacturing method thereof: A semiconductor device is provided. The semiconductor device includes a substrate in which a first interlayer insulation layer having a first via hole and a first trench is formed. The semiconductor device also includes a first via plug and a first metal line respectively formed by filling the first via... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090020876 - High temperature packaging for semiconductor devices: A method of forming multiple bonds on an electronic device includes heating first bonding metals at a predetermined temperature to form a first bond comprising a first melting temperature above the predetermined temperature. The first bond and second bonding metals are then heated at the predetermined temperature to form a... Agent: Carlson, Gaskey & Olds, P.c.

20090020882 - Semiconductor device and method of producing the same: A semiconductor device includes a package substrate having a front surface and a backside surface; an electrode pad formed on the front surface; an outer connection pad formed on the backside surface and electrically connected to the electrode pad; a semiconductor chip mounted on the front surface and having an... Agent: Kubotera & Associates, Llc

20090020881 - Semiconductor device package and fabricating method thereof: A semiconductor device package and fabricating method thereof are disclosed, by which heat-dissipation efficiency is enhanced in a system by interconnection (SBI) structure. An exemplary semiconductor device package may include a substrate, at least two chips mounted on the substrate to have a space between one or more of the... Agent: Workman Nydegger 1000 Eagle Gate Tower

20090020878 - Semiconductor packages and methods of fabricating the same: A semiconductor package is provided. The semiconductor package includes a semiconductor device having a bonding pad and an interlayer insulating layer disposed on the semiconductor device. The interlayer insulating layer has an opening which exposes the bonding pad and has at least one cavity therein. A redistributed interconnection is disposed... Agent: Marger Johnson & Mccollom, P.c.

20090020877 - Transmission line structure and signal transmission structure: A transmission line structure includes a routing trace, a doped region and a first guard trace. The routing trace is disposed over a substrate. The doped region is disposed in the substrate and the projection of at least the partial routing trace falls within the doped region. The first guard... Agent: J C Patents, Inc.

20090020880 - Wiring structure in a semiconductor device and method of forming a wiring structure in a semiconductor device: A wiring structure includes a first insulation layer located on a substrate, and first and second plugs located on the substrate and extending through the first insulation layer. The first plug includes an upper peripheral portion that defines a recess and the second plug is adjacent to the first plug.... Agent: Volentine & Whitt Pllc

20090020879 - Wiring structure in semiconductor device and method of fabricating wiring structure in semiconductor device: A wiring structure in a semiconductor device includes a first insulation layer formed on a substrate having first and second contact regions, and first and second pads extending through the first insulation layer and contacting the first and the second contact regions. The first and the second pads are higher... Agent: Volentine & Whitt Pllc

20090020883 - Semiconductor device and method for fabricating semiconductor device: A semiconductor device includes a first contact plug arranged above a semiconductor substrate and using aluminum (Al) as a material; a second contact plug arranged on and in contact with the first contact plug and using a refractory metal material; a first dielectric film arranged on a flank side of... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090020884 - Surface treatment method, semiconductor device and method of forming the semiconductor device: Provided are methods of surface treatment, semiconductor devices and methods of forming the semiconductor device. The methods of forming the semiconductor device include forming a first oxide layer and a second oxide layer on a substrate. The first and second oxide layers are patterned to form a contact hole exposing... Agent: Marger Johnson & Mccollom, P.c.

20090020888 - Circuit module and electrical component: In an electrical component including a solid-state circuit portion and a substrate connecting portion, the solid-state circuit portion includes: a supporting surface faced to and supported by the substrate connecting portion; and an opposing surface which is widened outside the supporting surface and which has an area enough to be... Agent: Young & Thompson

20090020887 - Semiconductor apparatus and manufacturing method thereof: In a semiconductor apparatus in which plural semiconductor elements are stacked, metal wires whose one ends are connected to electrode terminals of the semiconductor elements are extended to the side surfaces of the semiconductor elements in an abutment state and the metal wires extended to the side surfaces of the... Agent: Drinker Biddle & Reath (dc)

20090020889 - Semiconductor apparatus and manufacturing method thereof: A plurality of quadrilateral-shaped semiconductor elements are stacked on the one surface of a circuit substrate. A side surface wiring for making electrical connection between each of the electrode terminals of the semiconductor elements and a pad formed on the circuit substrate is formed by applying a conductive paste containing... Agent: Drinker Biddle & Reath (dc)

20090020886 - Semiconductor device and method of fabricating the same: Embodiments relate to a semiconductor device, which adopts no wiring or contact for electric connection of a plurality of chips, achieving improved fabrication efficiency and reducing fabrication costs thereof, and a method of fabricating the same. A System In Package (SIP) semiconductor device includes a plurality of first and second... Agent: Sherr & Vaughn, Pllc

20090020885 - Semiconductor device and method of manufacturing the same: One embodiment in accordance with the invention can include a semiconductor device that includes a first substrate, a projection portion that has a first semiconductor chip mounted on the first substrate, a second substrate that is provided on the first substrate and is electrically coupled to the first substrate, and... Agent: Spansion Llc C/o Murabito , Hao & Barnes LLP

20090020891 - Methods to achieve precision alignment for wafter scale packages: Methods for manufacturing an integrated wafer scale package that reduces a potential misalignment between a chip and a pocket of a carrier substrate. According to one aspect of the present invention, a method for manufacturing a semiconductor device includes a photoresist layer disposed on a carrier substrate, a chip placed... Agent: Frank Chau, Esq. F. Chau & Associates, Llc

20090020890 - Semiconductor device and method for manufacturing the same: A semiconductor device includes a first semiconductor chip having a pad electrode formed on an upper surface thereof; a resin section sealing the first semiconductor chip with the upper surface and a side surface of the first semiconductor chip being covered and a lower surface of the first semiconductor chip... Agent: Ingrassia Fisher & Lorenz, P.c.

20090020893 - Integrated circuit package system with triple film spacer: An integrated circuit package in package system includes: providing a substrate with a first wire-bonded die mounted thereover, and connected to the substrate with bond wires; mounting a triple film spacer above the first wire-bonded die, the triple film spacer having fillers in a first film and in a third... Agent: Law Offices Of Mikio Ishimaru

20090020892 - Selectively altering a predetermined portion or an external member in contact with the predetermined portion: A method for selectively altering a predetermined portion of an object or an external member in contact with the predetermined portion of the object is disclosed. The method includes selectively electrically addressing the predetermined portion, thereby locally resistive heating the predetermined portion, and exposing the object, including the predetermined portion,... Agent: Hewlett Packard Company

20090014703 - Semiconductor memory device: A semiconductor memory device includes the first transistor having first and second source/drain diffusion regions positioned below a second bit line to sandwich the first word line therebetween, and the second source/drain diffusion region positioned between the first and second word lines and connected to a first bit line, a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090014704 - Current constricting phase change memory element structure: A layer of nanopaiticles having a dimension on the order of 10 nm is employed to form a current constricting layer or as a hardmask for forming a current constricting layer from an underlying insulator layer. The nanoparticles are preferably self-aligning and/or self-planarizing on the underlying surface. The current constricting... Agent: Scully, Scott, Murphy & Presser, P.C.

20090014705 - Phase change memory device and method for fabricating the same: A phase change memory device is provided. The phase change memory device comprises a substrate. A first conductive layer is formed on the substrate. A heating electrode is formed on the first conductive layer, and electrically connected to the first conductive layer, wherein the heating electrode comprises a carbon nanotube... Agent: Quintero Law Office, PC

20090014706 - 4f2 self align fin bottom electrodes fet drive phase change memory: Arrays of memory cells are described along with devices thereof and method for manufacturing. Memory cells described herein include memory elements comprising programmable resistive material and self-aligned bottom electrodes. In preferred embodiments the area of the memory cell is 4F2, F being the feature size for a lithographic process used... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20090014707 - Non-volatile solid state resistive switching devices: Non-crystalline silicon non-volatile resistive switching devices include a metal electrode, a non-crystalline silicon layer and a planar doped silicon electrode. An electrical signal applied to the metal electrode drives metal ions from the metal electrode into the non-crystalline silicon layer to form a conducting filament from the metal electrode to... Agent: Brooks Kushman P.C.

20090014708 - Semiconductor device: A nonvolatile, sophisticated semiconductor device with a small surface area and a simple structure capable of switching connections between three or more electrodes. In a semiconductor device at least one of the electrodes contains atoms such as copper or silver in the solid electrolyte capable of easily moving within the... Agent: Miles & Stockbridge PC

20090014710 - Nonvolatile memory element, nonvolatile memory apparatus, and method of manufacture thereof: A lower electrode layer 2, an upper electrode layer 4 formed above the lower electrode layer 2, and a metal oxide thin film layer 3 formed between the lower electrode layer 2 and the upper electrode layer 4 are provided. The metal oxide thin film layer 3 includes a first... Agent: Mcdermott Will & Emery LLP

20090014709 - Process for manufacturing an array of cells including selection bipolar junction transistors with projecting conduction regions: A process manufactures an array of cells in a body of semiconductor material wherein a common conduction region of a first conductivity type and a plurality of shared control regions, of a second conductivity type, are formed in the body. The shared control regions extend on the common conduction region... Agent: Seed Intellectual Property Law Group PLLC

20090014711 - Nanowhiskers with pn junctions, doped nanowhiskers, and methods for preparing them: Nano-engineered structures are disclosed, incorporating nanowhiskers of high mobility conductivity and incorporating pn junctions. In one embodiment, a nanowhisker of a first semiconducting material has a first band gap, and an enclosure comprising at least one second material with a second band gap encloses said nanoelement along at least part... Agent: Foley And Lardner LLP Suite 500

20090014713 - Nitride semiconductor light emitting device and fabrication method thereof: The present invention relates to a GaN based nitride based light emitting device improved in Electrostatic Discharge (ESD) tolerance (withstanding property) and a method for fabricating the same including a substrate and a V-shaped distortion structure made of an n-type nitride semiconductor layer, an active layer and a p-type nitride... Agent: Mcdermott Will & Emery LLP

20090014712 - Tunnel junction light emitting device: A tunnel junction light emitting device according to the present invention is provided with an active layer and an electron tunneling region supplying the active layer with carriers. The electron tunneling region has a first p-type semiconductor layer, a second p-type semiconductor layer and an n-type semiconductor layer. The second... Agent: Sughrue Mion, PLLC

20090014714 - Control system architecture for qubits: A control system architecture for quantum computing includes an array of qubits, which is divided into a plurality of sub-arrays based on a first direction and a second direction, the second direction intersecting the first direction, a plurality of control lines each coupled to a corresponding sub-array of qubits in... Agent: F. Chau & Associates, LLC

20090014716 - Organic thin-film transistor and method of manufacturing the same: A disclosed organic thin-film transistor includes a gate electrode formed on a substrate, a gate insulation film formed on the gate electrode, a source electrode and a drain electrode formed, with a gap inbetween, at least over the gate electrode on which the gate insulation film is formed, an organic... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090014715 - Organic transistor, organic transistor array, and display apparatus: An off-current is reduced in an organic transistor, with which an organic transistor array is formed. A display apparatus is constructed using the organic transistor array. The organic transistor includes a substrate, a gate electrode, a separating electrode, a gate insulating film, a source electrode, a drain electrode, and an... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090014718 - Test element group for monitoring leakage current in semiconductor device and method of manufacturing the same: A test element group for monitoring leakage current in a semiconductor device and a method of manufacturing the same are disclosed. The test element group for monitoring leakage current in a semiconductor device includes device isolation layers formed over a first conductivity type semiconductor substrate. A second conductivity type well... Agent: Sherr & Vaughn, PLLC

20090014717 - Test ic structure: A test IC structure is described, which is disposed in a scribe line region of a wafer and includes first and second test keys, first and second conductive plugs, first and second test pads, and a passivation layer over the scribe line region. The first/second test key includes a first/second... Agent: J C Patents, Inc.

20090014719 - Semiconductor device with large blocking voltage: A junction FET having a large gate noise margin is provided. The junction FET comprises an n− layer forming a drift region of the junction FET formed over a main surface of an n+ substrate made of silicon carbide, a p+ layer forming a gate region formed in contact with... Agent: Miles & Stockbridge PC

20090014720 - Method of treating interface defects in a substrate: The present invention relates to a method of treating a structure produced from semiconductor materials, wherein the structure includes a first and second substrates defining a common interface that has defects. The method includes forming a layer, called the disorganized layer, which includes the interface, in which at least a... Agent: Winston & Strawn LLP Patent Department

20090014722 - Active-matrix-drive display unit including tft: An active-matrix-drive LCD includes a TFT substrate, on which a TFT is formed. The TFT includes a gate electrode layer, a gate insulating film, a patterned semiconductor layer, and a source/drain electrode layer, which are consecutively formed on an insulating substrate of the TFT substrate. The gate electrode layer has... Agent: Sughrue Mion, PLLC

20090014724 - Semiconductor device and fabrication method thereof: This invention provides a semiconductor device having high operation performance and high reliability. An LDD region 707 overlapping with a gate wiring is arranged in an n-channel TFT 802 forming a driving circuit, and a TFT structure highly resistant to hot carrier injection is achieved. LDD regions 717, 718, 719... Agent: Eric Robinson

20090014721 - Thin film transistor and manufacturing method of the same: To achieve TFT having a high light-resistance characteristic with a suppressed light leak current at low cost by simplifying the manufacturing processes. The TFT basically includes a light-shielding film formed on a glass substrate that serves as an insulating substrate; an insulating film formed on the light-shielding film; a semiconductor... Agent: Young & Thompson

20090014723 - Thin film transistor array of horizontal electronic field applying type and method for fabricating the same: A thin film transistor array of a horizontal electronic field applying type enhances brightness. The thin film transistor array includes a gate line and common line separated from the gate line; a data line crossing with the gate line to define pixel region and insulated from the gate line by... Agent: Morgan Lewis & Bockius LLP

20090014725 - Ion doping apparatus, ion doping method, semiconductor device and method of fabricating semiconductor device: An ion doping apparatus includes: a chamber 11; a discharge section 13 for discharging a gaseous content from within the chamber 11; an ion source 12 being provided in the chamber 11 and including an inlet 14 through which to introduce a gas containing an element to be used for... Agent: Birch Stewart Kolasch & Birch

20090014726 - Active device array substrate: An active device array substrate including a substrate, a pixel array, pads, first switching devices, and second switching devices is provided. The pixel array is disposed on a display region of the substrate. The pads, the first and the second switching devices are disposed on a peripheral circuit region of... Agent: Jianq Chyun Intellectual Property Office

20090014727 - Thin film array panel and manufacturing method thereof: A thin film array panel is provided, which includes: a plurality of signal lines including contact parts for contact with an external device; a plurality of thin film transistors connected to the signal lines; an insulating layer formed on the signal lines and the thin film transistors; and a plurality... Agent: Cantor Colburn, LLP

20090014728 - Semiconductor device: A semiconductor device includes a first semiconductor layer and a first semiconductor element located in the first semiconductor layer. The semiconductor device also includes a second semiconductor layer of a transparent semiconductor material. The second semiconductor layer is disposed on the first semiconductor layer covering the first semiconductor element. The... Agent: Leydig Voit & Mayer, Ltd

20090014729 - Semiconductor light emitting device including group iii nitride semiconductor: A semiconductor light emitting device comprises: a substrate; a semiconductor stack formed on one of surfaces of the substrate, the semiconductor stack including an active layer composed of a group III nitride semiconductor having a substantially nonpolar or substantially semipolar plane as a main surface; a first electrode formed in... Agent: Rabin & Berdo, PC

20090014730 - Silicon carbide transistors and methods for fabricating the same: An exemplary method for forming an insulator layer over a silicon carbide substrate includes providing a silicon carbide substrate and anodizing the silicon carbide substrate in a liquid ambient at a temperature of not more than 200° C. to form a silicon dioxide layer thereon. Also provided are silicon carbide... Agent: Quintero Law Office, PC

20090014731 - Led chip design for white conversion: A light emitting diode is disclosed, together with associated wafer structures, and fabrication and mapping techniques. The diode includes an active portion, a raised border on the top surface of the active portion and around the perimeter of the top surface of the active portion, a resin in the space... Agent: Summa, Additon & Ashe, P.A.

20090014732 - Chip-type light emitting device and wiring substrate for the same: For providing a chip-type light emitting device, having a plural number of light emitting elements therein, so as to enable to obtain a high optical output with preferable conversion efficiency thereof, and a wiring substrate for that, the chip-type light emitting device, mounting the plural number of the light emitting... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090014733 - Light-emitting diode module: The present invention relates to a light-emitting diode (LED) module (10) comprising a first LED chip (12) for emitting light of a first color, a LED element (14) comprising a second LED chip, which element is placed alongside the first LED chip and adapted to emit light of a second... Agent: Philips Intellectual Property & Standards

20090014734 - Semiconductor light emitting device: A semiconductor light emitting device includes an active layer, an electrode formed above the active layer, a current spreading layer formed between the active layer and the electrode, having n-type conductivity, having a larger bandgap energy than the active layer, and spreading electrons injected from the electrode in the plane... Agent: Gregory Turocy Amin, Turocy & Calvin, LLP

20090014739 - light-emitting diode package structure: The present invention is an improved Light-Emitting Diode (LED) package structure comprising a light-emitting diode chip, a package board of heat conductive semiconductor material, a lead frame, and a circuit. Whereon the package board installs plural thermal vias to conduct the electricity circuit and transmit the heat out of the... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20090014736 - Coating method utilizing phosphor containment structure and devices fabricated using same: Methods for fabricating a semiconductor devices, and in particular light emitting diodes (LEDS) comprising providing a plurality of semiconductor devices on a substrate and forming a contact on at least some of the semiconductor devices. A containment structure is formed on at least some of the semiconductor devices having a... Agent: Koppel, Patrick & Heybl

20090014741 - Group of phosphor particles for light-emitting device, light-emitting device and backlight for liquid crystal display: A group of phosphor particles for a light-emitting device contains a plurality of types of phosphor particles having different emission peak wavelengths, while phosphor particles of a type having a relatively longer emission peak wavelength have a relatively larger median diameter as compared with phosphor particles of a type having... Agent: Morrison & Foerster LLP

20090014740 - Light emitting devices and related methods: Devices, such as light-emitting devices (e.g., LEDs), and methods associated with such devices are provided. A light-emitting device may include an interface through which emitted light passes therethrough. The interface having a dielectric function that varies spatially according to a pattern, wherein the pattern is arranged to provide light emission... Agent: Luminus Devices , Inc. C/o Wolf, Greenfield & Sacks , P.C.

20090014738 - Light emitting diode devices and manufacturing method thereof: A light emitting diode (LED) device includes a stacked epitaxial structure, a heat-conductive plate and a seed layer. The stacked epitaxial structure sequentially includes a first semiconductor layer (N—GaN), a light emitting layer, and a second semiconductor layer (P—GaN). The heat-conductive plate is disposed on the first semiconductor layer, and... Agent: Birch Stewart Kolasch & Birch

20090014737 - Light-emitting diodes lamp lens structure: The present invention is an LED lamp lens, on which orderly arranged surface plural protuberances. And with the differences of light perviousness, a particular luminous pattern of the LED lamp is displayed when the LED lamp is turned on.... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20090014743 - Method of making a light-emitting diode: Methods are disclosed for forming a vertical semiconductor light-emitting diode (VLED) device having an active layer between an n-doped layer and a p-doped layer; and securing a plurality of balls on a surface of the n-doped layer of the VLED device.... Agent: Patterson & Sheridan, L.L.P.

20090014745 - Method of manufacturing high power light-emitting device package and structure thereof: A method of manufacturing high power light-emitting device packages and structure thereof, wherein the method thereof includes the steps of: (a) forming a plurality of lead frames, each of the lead frames includes a heat-dissipating element and a plurality of leads; (b) electroplating an outer surface of the lead frames... Agent: Rosenberg, Klein & Lee

20090014742 - Patterned light emitting devices: Light-emitting devices, and related components, systems and methods are disclosed. A light-emitting device can include a multi-layer stack of materials that includes a light-generating region and a first layer supported by the light-generating region. During use of the light-emitting device, light generated by the light-generating region can emerge from the... Agent: Luminus Devices , Inc. C/o Wolf, Greenfield & Sacks , P.C.

20090014735 - Semiconductor device and semiconductor device fabrication method: There is provided a semiconductor device in which a light emitting element is mounted on a substrate, having a bonding wire which is connected to the light emitting element, and a through electrode which is connected to the bonding wire and is formed in such a manner as to pass... Agent: Drinker Biddle & Reath (dc)

20090014744 - Semiconductor light-emitting device and method: The present invention discloses a semiconductor light-emitting device including a semiconductor light-emitting element, a first attaching layer and a wavelength conversion structure. The primary light emitted from the semiconductor light-emitting element enters the wavelength conversion structure to generate a converted light, whose wavelength is different form that of the primary... Agent: Bacon & Thomas, PLLC

20090014749 - Chip-type led and method of manufacturing the same: An embodiment of the present invention has an insulating substrate in which a first concave hole for mounting an LED chip and a second concave hole for connecting a metallic small-gauge wire are formed, where a metallic sheet that serves as a first wiring pattern is formed at a portion... Agent: Morrison & Foerster LLP

20090014747 - Manufacturing method of light emitting diode apparatus: A manufacturing method of a light emitting diode (LED) apparatus includes the steps of: forming at least one temporary substrate, which is made by a curable material, on a LED device; and forming at least a thermal-conductive substrate on the LED device. The manufacturing method does not need the step... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20090014748 - Method of electrically connecting element to wiring, method of producing light-emitting element assembly, and light-emitting element assembly: A method of electrically connecting an element to wiring includes the steps of forming a conductive fixing member precursor layer at least on wiring provided on a base, and arranging an element having a connecting portion on the wiring such that the connecting portion contacts the conductive fixing member precursor... Agent: Bell, Boyd & Lloyd, LLP

20090014746 - Solder alloys: Lead-free solder compositions for bonding and sealing flat panel displays, CCD's, solar cells, light emitting diodes, and other optoelectronic devices are disclosed. The solders are based on alloys of Sn, Au, Ag, and Cu and one or more rare earth metals chosen from the following, Y, La, Ce, Pr, Sc,... Agent: John F. Bohland

20090014750 - Resin for optical semiconductor element encapsulation containing polyborosiloxane: The present invention relates to a resin for optical semiconductor element encapsulation containing a polyborosiloxane obtained by reacting a silicon compound with a boron compound; and an optical semiconductor device containing the resin and an optical semiconductor element encapsulated with the resin. The resin for optical semiconductor element encapsulation according... Agent: Sughrue-265550

20090014751 - Iii-nitride semiconductor light emitting device and method for manufacturing the same: Disclosed herein is a IE-nitride semiconductor light emitting device comprising a plurality of nitride semiconductor layers including a substrate and an active layer deposited on the substrate, in which the substrate is provided with protrusions to let the lights generated in the active layer emit out of the light emitting... Agent: Harness, Dickey, & Pierce, P.l.c

20090014752 - Semiconductor light source and light-emitting device drive circuit: A semiconductor light source includes a light-emitting device 101 having a plurality of semiconductor layers made of nitride semiconductors, and a drive circuit 102 for driving the light-emitting device 101. The drive circuit 102 performs forward drive operation, in which a forward current is supplied to the light-emitting device to... Agent: Mcdermott Will & Emery LLP

20090014753 - Power semiconductor device and manufacturing method therefor: A power semiconductor device of the present invention has an active region and an electric field reduction region and includes: an emitter region of a first conductivity type; a base region of a second conductivity type in contact with the emitter region; an electrical strength providing region of the first... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090014754 - Trench type insulated gate mos semiconductor device: A vertical and trench type insulated gate MOS semiconductor device includes a plurality of regions each being provided between adjacent ones of a plurality of the straight-line-like trenches arranged in parallel and forming a surface pattern of a plurality of straight lines. A plurality of first inter-trench surface regions are... Agent: Rossi, Kimms & Mcdowell LLP.

20090014755 - Direct bond substrate of improved bonded interface heat resistance: A direct bond substrate formed by bonding semiconductor substrates together, a semiconductor device using the direct bond substrate and a manufacturing method thereof are disclosed. A nitride film, oxynitride film, carbide film or an oxide film containing carbon is provided on the bonded interface of the semiconductor substrates in the... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090014756 - Method of producing large area sic substrates: A method for growing a SiC-containing film on a Si substrate is disclosed. The SiC-containing film can be formed on a Si substrate by, for example, plasma sputtering, chemical vapor deposition, or atomic layer deposition. The thus-grown SiC-containing film provides an alternative to expensive SiC wafers for growing semiconductor crystals.... Agent: Andrews Kurth LLP Intellectual Property Department

20090014757 - Quantum wire sensor and methods of forming and using same: A solid-state field-effect transistor device for detecting chemical and biological species and for detecting changes in radiation is disclosed. The device includes a quantum wire channel section to improve device sensitivity. The device is operated in a fully depleted mode such that a sensed biological, chemical or radiation change causes... Agent: Snell & Wilmer L.L.P. (main)

20090014758 - Semiconductor device and method for manufacturing the same: In a semiconductor device, a SiN first protective insulating film is formed on a semiconductor layer. A T-shaped gate electrode is formed on the semiconductor layer. A SiN second protective insulating film spreads in an umbrella shape from above the T-shaped gate electrode. A hollow region is formed between the... Agent: Leydig Voit & Mayer, Ltd

20090014759 - Solid state imaging apparatus and method for fabricating the same: A semiconductor device of the present invention includes a substrate; an imaging region which is formed at part of the substrate and in which photoelectric conversion cells including photoelectric conversion sections are arranged in the form of an array; a control-circuit region which is formed at part of the substrate... Agent: Mcdermott Will & Emery LLP

20090014762 - Back-illuminated type solid-state image pickup device and camera module using the same: The present invention provides a solid-state image pickup device including an image pickup pixel section which is provided on a semiconductor substrate and in which a plurality of pixels each having a photoelectric conversion element and a field-effect transistor are arranged, and a peripheral circuit section for the image pickup... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090014760 - Cmos image sensor and method of manufacture: A CMOS image sensor that is capable of substantially completely intercepting unnecessary light incident from the outside and preventing the occurrence of a hot pixel phenomenon and a method of fabricating the same are disclosed. A CMOS image sensor includes an epitaxial layer having a plurality of photodiodes. The epitaxial... Agent: Sherr & Vaughn, PLLC

20090014763 - Cmos image sensor with photo-detector protecting layers: An image sensor includes a logic region and an APS region having a first gate electrode, a photo-detector, a first protecting layer, first spacers, and a second protecting layer. The first gate electrode is formed over a semiconductor substrate. The photo-detector is formed to a side of the first gate... Agent: Law Office Of Monica H Choi

20090014761 - Image sensor pixel and fabrication method thereof: Provided is an image sensor pixel in which a specific or entire area of a field oxide layer inside the pixel can be used as a photodiode so as to increase a fill factor, and a fabrication method thereof. The image sensor pixel includes: a photodiode which is buried inside... Agent: Cantor Colburn, LLP

20090014764 - Image sensor with an improved sensitivity: An embodiment of an image sensor comprising photosensitive cells, each photosensitive cell comprising at least one charge storage means formed at least partly in a substrate of a semiconductor material. The substrate comprises, for at least one first photosensitive cell, a portion of a first silicon and germanium alloy having... Agent: Graybeal Jackson LLP

20090014765 - High voltage operating field effect transistor, bias circuit therefor and high voltage circuit thereof: A high voltage operating field effect transistor has a source region and a drain region spaced apart from each other in a surface of a substrate. The source region is operative to receive at least one of a signal electric potential and a signal current. A semiconductor channel formation region... Agent: Bruce L. Adams, Esq. Adams & Wilks

20090014766 - Non-volatile memory device and fabrication method thereof: In one embodiment, a non-volatile memory device includes an isolation film defining an active region in a semiconductor substrate; a tunnel insulating film located on the active region; a control gate located on the isolation film; an inter-gate dielectric film parallel to the control gate and located between the control... Agent: Marger Johnson & Mccollom, P.C.

20090014767 - Carbon nanotube conductor for trench capacitors: A trench-type storage device includes a trench in a substrate (100), with bundles of carbon nanotubes (202) lining the trench and a trench conductor (300) filling the trench. A trench dielectric (200) may be formed between the carbon nanotubes and the sidewall of the trench. The bundles of carbon nanotubes... Agent: International Business Machines Corporation Dept. 18g

20090014768 - Deep trench device with single sided connecting structure and fabrication method thereof: A deep trench device with a single sided connecting structure. The device comprises a substrate having a trench therein. A buried trench capacitor is disposed in a lower portion of the trench. An asymmetric collar insulator is disposed on an upper portion of the sidewall of the trench. A connecting... Agent: Quintero Law Office, PC

20090014770 - Semiconductor device: A technique that can realize high integration even for multilayered three-dimensional structures at low costs by improving the performance of the semiconductor device having recording or switching functions by employing a device structure that enables high precision controlling of the movement of ions in the solid electrolyte. The semiconductor element... Agent: Miles & Stockbridge PC

20090014769 - Suspended-gate mos transistor with non-volatile operation: A transistor device with a mobile suspended gate, the device comprising means for piezoelectric actuation of the gate, and a method for producing such a device.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090014772 - Eeprom memory cell with first-dopant-type control gate transistor, and second-dopant type program/erase and access transistors formed in common well: A memory device including a plurality of memory cells, each with a control gate NMOS transistor sharing a floating gate with a program/erase PMOS transistor which is, in turn, connected in series with an access PMOS transistor. The memory cells are formed in a common N-Well formed in a P-substrate,... Agent: Fountain Law Group, PLC C/o Maxim

20090014771 - Semiconductor device and method of manufacturing the same: A semiconductor device including a semiconductor substrate; a plurality of memory cell transistors aligned in a predetermined direction on the semiconductor substrate, each memory cell transistor provided with a first gate electrode including a floating gate electrode comprising a polycrystalline silicon layer of a first thickness, a control gate electrode... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090014774 - Nonvolatile semiconductor memory element and nonvolatile semiconductor memory device: A memory element includes: a semiconductor region formed in a semiconductor substrate; source and drain regions formed at a distance from each other in the semiconductor region; a first insulating layer formed on the semiconductor region between the source and drain regions; a charge accumulating layer formed on the first... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090014775 - Semiconductor nonvolatile memory device: m

20090014773 - Two bit memory structure and method of making the same: A method for fabricating the memory structure includes: providing a substrate having a pad, forming an opening in the pad, forming a first spacer on a sidewall of the opening, filling the opening with a sacrificial layer, removing the first spacer and exposing a portion of the substrate, removing the... Agent: North America Intellectual Property Corporation

20090014776 - Memory device, memory and method for processing such memory: An integrated memory device, an integrated memory chip and a method for fabricating an integrated memory device is disclosed. One embodiment provides at least one integrated memory device with a drain, a source, a floating gate, a selection gate and a control gate, wherein the conductivity between the drain and... Agent: Dicke, Billig & Czaja

20090014777 - Flash memory devices and methods of manufacturing the same:

20090014780 - Discrete trap non-volatile multi-functional memory device: A multiple layer tunnel insulator is fabricated between a substrate and a discrete trap layer. The properties of the multiple layers determines the volatility of the memory device. The composition of each layer and/or the quantity of layers is adjusted to fabricate either a DRAM device, a non-volatile memory device,... Agent: Leffert Jay & Polglaze, P.A. Attn: Thomas W. Leffert

20090014781 - Nonvolatile memory devices and methods for fabricating nonvolatile memory devices: A nonvolatile memory device may include: a tunnel insulating layer on a semiconductor substrate; a charge storage layer on the tunnel insulating layer; a blocking insulating layer on the charge storage layer; and a control gate electrode on the blocking insulating layer. The tunnel insulating layer may include a first... Agent: Harness, Dickey & Pierce, P.L.C

20090014778 - Nonvolatile semiconductor memory device and method for fabricating the same: A nonvolatile semiconductor memory device includes bit line diffusion layers extending along the X direction in an upper portion of a semiconductor substrate; and gate structures extending along the Y direction on the semiconductor substrate and each including a charge trapping film and a gate electrode. The nonvolatile semiconductor memory... Agent: Mcdermott Will & Emery LLP

20090014779 - Nonvolatile semiconductor memory device and method for fabricating the same: A nonvolatile semiconductor memory device includes bit line diffusion layers extending along the X direction in an upper portion of a semiconductor substrate; and gate structures extending along the Y direction on the semiconductor substrate and each including a charge trapping film and a gate electrode. The nonvolatile semiconductor memory... Agent: Mcdermott Will & Emery LLP

20090014782 - Semiconductor device and manufacturing method of the same: Disclosed is a semiconductor device. The semiconductor device includes a first gate formed in a trench of a semiconductor substrate, a first gate oxide layer on the semiconductor substrate including the first gate, a first epitaxial layer on the first gate oxide layer, first source and drain regions in the... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20090014783 - Ultra-thin body vertical tunneling transistor: A vertical tunneling, ultra-thin body transistor is formed on a substrate out of a vertical oxide pillar having active regions of opposing conductivity on opposite ends of the pillar. In one embodiment, the source region is a p+ region in the substrate under the pillar and the drain region is... Agent: Leffert Jay & Polglaze, P.A. Attn: Kenneth W. Bolvin

20090014786 - Field effect transistors having protruded active regions and methods of fabricating such transistors: Provided are a field effect transistor, a method of manufacturing the same, and an electronic device including the field effect transistor. The field effect transistor may have a structure in which a double gate field effect transistor and a recess channel array transistor are formed in a single transistor in... Agent: Myers Bigel Sibley & Sajovec

20090014785 - Semiconductor device with improved breakdown properties and manufacturing method thereof: The present invention provides a semiconductor device (20) comprising a trench (5) formed in a semiconductor substrate formed of a stack (4) of layers (1,2,3), a layer (6) of a first, grown dielectric material covering sidewalls and bottom of the trench (5), the layer (6) including one or more notches... Agent: Workman Nydegger 1000 Eagle Gate Tower

20090014784 - Vertical mos transistor and method therefor: In one embodiment, a vertical MOS transistor is formed without a thick field oxide and particularly without a thick field oxide in the termination region of the transistor.... Agent: Mr. Jerry Chruma Semiconductor Components Industries, L.L.C.

20090014787 - Multi-layer semiconductor structure and manufacturing method thereof: A power MOSFET structure comprises at least one first gate in the cell area and at least one second gate at the peripheral that are both in a semiconductor substrate. The first and second gates are electrically connected, and the second gate is connected to a contact so as to... Agent: Wpat, PC Intellectual Property Attorneys

20090014788 - Semiconductor device and method for manufacturing the same: A type semiconductor device includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type; a third semiconductor layer of the first conductivity type; a plurality of gate electrodes which are formed in gate trenches via gate insulating films, the gate trenches... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090014789 - Semiconductor device and method for manufacturing the same: A semiconductor device comprising a recessed transistor coexists with P-N gate planar-type transistors, wherein high-concentration impurity-diffused material 9 is buried in a polysilicon film, which is the gate electrode of the recessed transistor, in order to suppress the reduction of ON current caused by a depletion phenomenon of the recessed... Agent: Mcginn Intellectual Property Law Group, PLLC

20090014790 - Semiconductor device and method of fabricating semiconductor device: A semiconductor device includes a gate electrode formed through an insulating film in a groove having a first side surface adjacent to a source region and a base region, and a second conductive type first impurity region formed adjacent to a second side surface of the groove between the groove... Agent: Ditthavong Mori & Steiner, P.C.

20090014791 - Lateral power mosfet with integrated schottky diode: A semiconductor device includes a substrate. The substrate includes a semiconductor material. An electrically isolated region is formed over the substrate. A metal-oxide-semiconductor field-effect transistor (MOSFET) is formed over the substrate within the electrically isolated region. The electrically isolated region includes a trench formed around the electrically isolated region. An... Agent: Quarles & Brady LLP

20090014792 - Power semiconductor device: A power semiconductor device comprising an array of cells distributed over a surface of a substrate, the source regions of the individual cells of the array comprising a plurality of source region branches each extending laterally outwards towards at least one source region branch of an adjacent cell and presenting... Agent: Freescale Semiconductor, Inc. Law Department

20090014794 - Mosfet with laterally graded channel region and method for manufacturing same: The present invention relates generally to a semiconductor device having a channel region comprising a semiconductor alloy of a first semiconductor material and a second, different material, and wherein atomic distribution of the second material in the channel region is graded along a direction that is substantially parallel to a... Agent: Scully, Scott, Murphy & Presser, P.C.

20090014793 - Semiconductor device and manufacturing method thereof: A semiconductor device includes: a semiconductor substrate; a pair of first diffusion layer regions provided near a top face of the semiconductor substrate; a channel region provided between the first diffusion layer regions of the semiconductor substrate; a gate insulation film provided on the channel region and on the semiconductor... Agent: Sughrue Mion, PLLC

20090014796 - Semiconductor device with improved contact structure and method of forming same: A contact structure includes a first contact formed in a first dielectric layer connecting to the source/drain region of a MOS transistor, and a second contact formed in a second dielectric layer connecting to a gate region of a MOS transistor or to a first contact. A butted contact structure... Agent: Slater & Matsil, L.L.P.

20090014795 - Substrate for field effect transistor, field effect transistor and method for production thereof: A π gate FinFET structure having reduced variations in off-current and parasitic capacitance and a method for production thereof are provided. The structure of an element is improved so that an off-current suppressing capability can be exhibited more strongly. A field effect transistor, wherein a first insulating film and a... Agent: Scully Scott Murphy & Presser, PC

20090014797 - Semiconductor device and method of manufacturing the same: An isolation insulating film (5) of partial-trench type is selectively formed in an upper surface of a silicon layer (4). A power supply line (21) is formed above the isolation insulating film (5). Below the power supply line (21), a complete isolation portion (23) reaching an upper surface of an... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090014798 - Finfet sram with asymmetric gate and method of manufacture thereof: A FinFET SRAM transistor device includes transistors formed on fins with each transistor including a semiconductor channel region within a fin plus a source region and a drain region extending within the fin from opposite sides of the channel region with fin sidewalls having a gate dielectric formed thereon. Bilateral... Agent: International Business Machines Corporation Dept. 18g

20090014799 - Semiconductor device and method for manufacturing the same: A semiconductor device and a method for manufacturing a semiconductor device are provided. A semiconductor device comprises a first single-crystal semiconductor layer including a first channel formation region and a first impurity region over a substrate having an insulating surface, a first gate insulating layer over the first single-crystal semiconductor... Agent: Eric Robinson

20090014800 - Silicon controlled rectifier device for electrostatic discharge protection: An SCR device includes a substrate, a plurality of isolation structures defining a first region and a second region in the substrate, an n well disposed in the substrate, an n type first doped region disposed in the first region in the substrate, a p type second doped region disposed... Agent: North America Intellectual Property Corporation

20090014801 - Decoupling capacitor circuit and layout for leakage current reduction and esd protection improvement: In order to reduce the leakage current and increase the ESD protection performance, several MOS capacitors are serially connected. The E field between the gate and the source/drain of the MOS transistor is lowered and so is the gate leakage current. Besides, because the ESD voltage is distributed on the... Agent: J C Patents, Inc.

20090014802 - Semiconductor device and method for manufacturing the same: The semiconductor device according to the present invention is a Fin-FET that can substantially increase the channel width without unnecessarily elevating the height of the Fin. The Fin-FET has gate electrodes 22 formed on the upper surface, both left and right sides and the bottom surface of channel-forming semiconductor layer... Agent: Mcginn Intellectual Property Law Group, PLLC

20090014804 - Misfet, semiconductor device having the misfet and method of manufacturing the same: To solve the problem, a MISFET covered with an insulating film which generates stress is provided. The MISFET including a gate insulating film; a gate electrode disposed on the gate insulating film, the gate electrode including a polysilicon portion and a silicide portion; and a source/drain disposed adjacent to the... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090014803 - Nanoelectromechanical transistors and methods of forming same: Nanoelectromechanical transistors (NEMTs) and methods of forming the same are disclosed. In one embodiment, an NEMT may include a substrate including a gate adjacent thereto, a source region and a drain region; an electromechanically deflectable nanotube member; and a channel member electrically insulatively coupled to the nanotube member so as... Agent: Hoffman Warnick LLC

20090014807 - Dual stress liners for integrated circuits: Dual stress liners for CMOS applications are provided. The dual stress liners can be formed from silicon nitride having a first portion for inducing a first stress and a second portion for inducing a second stress. An interface between the first and second stress portions is self-aligned and co-planar. To... Agent: HorizonIPPte Ltd

20090014810 - Method for fabricating shallow trench isolation and method for fabricating transistor: A method of forming a shallow trench isolation includes sequentially forming a pad oxide layer and a pad nitride layer over a semiconductor substrate. A portion of the pad nitride layer is etched and patterned. The patterned pad nitride layer is used as a etching mask to etch the pad... Agent: Sherr & Vaughn, PLLC

20090014805 - Method to improve performance of secondary active components in an esige cmos technology: According to various embodiments, there are eSiGe CMOS devices and methods of making them. The method of making a substrate for a CMOS device can include providing a DSB silicon substrate including a first bonded to a second layer, wherein each layer has a (100) oriented surface and a first... Agent: Texas Instruments Incorporated

20090014808 - Methods for forming self-aligned dual stress liners for cmos semiconductor devices: CMOS (complementary metal oxide semiconductor) fabrication techniques are provided to form DSL (dual stress liner) semiconductor devices having non-overlapping, self-aligned, dual stress liner structures.... Agent: F. Chau & Associates, LLC

20090014806 - Semiconductor device and method for manufacturing the same: A semiconductor device and method of manufacturing thereof. The semiconductor device has at least one NMOS device and at least one PMOS device provided on a substrate. An electron channel of the NMOS device is aligned with a first direction. A hole channel of the PMOS device is aligned with... Agent: Banner & Witcoff, Ltd. Attorneys For Client 007052

20090014809 - Semiconductor device and method for manufacturing the same: A semiconductor device includes a semiconductor substrate, and a p-channel MOS transistor provided on the semiconductor substrate, the p-channel MOS transistor comprising a first gate dielectric film including Hf, a second gate dielectric film provided on the first gate dielectric film and including aluminum oxide, and a first metal silicide... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090014811 - Dynamic array architecture: A semiconductor device includes a substrate portion and a number of diffusion regions defined within the substrate portion. The diffusion regions are separated from each other by a non-active region of the substrate portion. The semiconductor device includes a number of linear gate electrode segments defined to extend over the... Agent: Martine Penilla & Gencarella, LLP

20090014812 - Semiconductor device and a method of manufacturing the same: Disclosed herein is a semiconductor device, including: a first group of transistors formed on a semiconductor substrate; and a second group of transistors formed on the semiconductor substrate, each of which is lower in operating voltage than each of the transistors in the first group; wherein each of the transistors... Agent: Sonnenschein Nath & Rosenthal LLP

20090014813 - Metal gates of pmos devices having high work functions: A semiconductor structure includes a refractory metal silicide layer; a silicon-rich refractory metal silicide layer on the refractory metal silicide layer; and a metal-rich refractory metal silicide layer on the silicon-rich refractory metal silicide layer. The refractory metal silicide layer, the silicon-rich refractory metal silicide layer and the metal-rich refractory... Agent: Slater & Matsil, L.L.P.

20090014814 - Power semiconductor device having improved performance and method: In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a counter-doped drain region spaced apart from a channel region.... Agent: Mr Jerry Chruma Semiconductor Components Industries, L.L.C.

20090014815 - High voltage device and method for fabricating the same: A high voltage device includes drift regions formed in a substrate, an isolation layer formed in the substrate to isolate neighboring drift regions, wherein the isolation layer has a depth greater than that of the drift region, a gate electrode formed over the substrate, and source and drain regions formed... Agent: Morgan Lewis & Bockius LLP

20090014816 - High voltage operating field effect transistor, and bias circuit therefor and high voltage circuit thereof: A high voltage operating field effect transistor has a substrate and a semiconductor channel formation region disposed in a surface of the substrate. A source region and a drain region are spaced apart from each other with the semiconductor channel formation region disposed between the source region and the drain... Agent: Bruce L. Adams, Esq. Adams & Wilks

20090014817 - Insulating film and electronic device: An electronic device including a semiconductor layer having silicon as a major component; and a dielectric film epitaxially grown directly on a major surface of the semiconductor layer, wherein the dielectric film consists of a dielectric material having a Ruddlesden-Popper type structure, the Ruddlesden-Popper type structure is expressed by a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090014818 - Semiconductor device and manufacturing method thereof: A semiconductor device includes a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film, a first insulating film formed on a side surface of the gate electrode, a second insulating film covering a surface of the first insulating film... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090014819 - Micromechanical component, method for fabrication and use: A micromechanical component that can be produced in an integrated thin-film method is disclosed, which component can be produced and patterned on the surface of a substrate as multilayer construction. At least two metal layers that are separated from the substrate and with respect to one another by interlayers are... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20090014820 - Semiconductor mechanical sensor: A semiconductor mechanical sensor having a new structure in which a S/N ratio is improved. In the central portion of a silicon substrate 1, a recess portion 2 is formed which includes a beam structure. A weight is formed at the tip of the beam, and in the bottom surface... Agent: Harness, Dickey & Pierce, P.L.C

20090014821 - Method for producing conductor structures and applications thereof: This publication discloses a method for forming electrically conducting structures on a substrate. According to the method nanoparticles containing conducting or semiconducting material are applied on the substrate in a dense formation and a voltage is applied over the nanoparticles so as to at least locally increase the conductivity of... Agent: Birch Stewart Kolasch & Birch

20090014822 - Microelectronic imagers and methods for manufacturing such microelectronic imagers: Microelectronic imagers and methods of manufacturing such microelectronic imagers are disclosed. In one embodiment, a method for manufacturing a microelectronic imager can include irradiating selected portions of an imager housing unit. The housing unit includes a body having lead-in surfaces and a support surface that define a recess sized to... Agent: Perkins Coie LLP Patent-sea

20090014823 - Solid state imaging device in which a plurality of imaging pixels are arranged two-dimensionally, and a manufacturing method for the solid state imaging device: A solid state imaging device includes a plurality of imaging pixels that are arranged two-dimensionally along a main face of a semiconductor substrate. Each imaging pixel in the solid state imaging device includes a photodiode that performs photoelectric conversion and a color filter that is disposed higher in the Z... Agent: Mcdermott Will & Emery LLP

20090014824 - Solid-state imaging device, method for manufacturing the same, and camera having the device: Provided is a solid-state imaging device that realizes sensitivity improvement while maintaining flare prevention effect even when miniaturization of cell is advanced. The solid-state imaging device according to the present invention includes: light receiving units formed on a semiconductor substrate; an antireflection film arranged above the semiconductor substrate, except above... Agent: Greenblum & Bernstein, P.L.C

20090014825 - Flexible photo-detectors: Apparatus including flexible line extending along a length. Flexible line includes first charge carrier-transporting body, photosensitive body over first charge carrier-transporting body, and second charge carrier-transporting body over photosensitive body. Each of first and second charge carrier-transporting bodies and photosensitive body extend along at least part of length of flexible... Agent: Jay M. Brown

20090014826 - Image sensor package and fabrication method thereof: An image sensor package and a method for fabricating thereof are provided. A substrate having an insulator filled cavity is provided with an image sensor device electrical connected to a metal layer, thereon. A covering plate is then disposed on the substrate. The substrate is subsequently thinned to expose the... Agent: Birch Stewart Kolasch & Birch

20090014827 - Image sensor module at wafer level, method of manufacturing the same, and camera module: Provided is an image sensor module at the wafer level including a wafer; an image sensor mounted on one surface of the wafer; a wireless communication chip formed outside the image sensor on the one surface of the wafer; and a protective cover installed on the one surface of the... Agent: Staas & Halsey LLP

20090014828 - Semiconductor memory device manufacturing method and semiconductor memory device: In a method of manufacturing a semiconductor memory device, an opening is made in a part of an insulating film formed on a silicon substrate. An amorphous silicon thin film is formed on the insulating film in which the opening has been made and inside the opening. Then, a monocrystal... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090014829 - Semiconductor fuse box and method for fabricating the same: A semiconductor fuse box includes a fuse structure and a protective structure disposed between the fuse structure and an integrated circuit structure. The protective structure has at least one irregular side surface. The protective structure (which may also include a pad formed there-under) extends beyond a bottom of the fuse... Agent: Law Office Of Monica H Choi

20090014830 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device including at least one of the following steps: Forming an insulating film having at least one trench on and/or over a semiconductor substrate. Forming a metal film on and/or over a surface of an insulating film, including inside the trench. Forming a metal... Agent: Sherr & Vaughn, PLLC

20090014834 - Contact plug structure: A contact plug structure for a checkerboard dynamic random access memory comprises a body portion, two leg portions connected to the body portion and a dielectric block positioned between the two leg portions. Each leg portion is electrically connected to a deep trench capacitor arranged in an S-shape manner with... Agent: Oliff & Berridge, PLC

20090014831 - Electronic device comprising an integrated circuit and a capacitance element: An electronic device (ICD) comprises an integrated circuit (AIC) and a capacitance element (PIC). The integrated circuit (AIC) is provided with a plurality of circuit contact pairs (CI). The capacitance element (PIC) is provided with a plurality of capacitance contact pairs (CC). A capacitance is present between each of at... Agent: Nxp, B.v. Nxp Intellectual Property Department

20090014833 - Semiconductor device and method of fabricating the same: An exemplary semiconductor device includes a semiconductor substrate on which lower electrodes are formed. The lower electrodes are arranged in an array including a rows extending substantially parallel to one another along a first direction. A stripe-shaped capacitor support pad is interposed between a pair of adjacent ones of the... Agent: Marger Johnson & Mccollom, P.C.

20090014832 - Semiconductor device with reduced capacitance tolerance value: A semiconductor device includes a capacitance, the numerical value of which is relevant for a device function. The capacitance is formed from a parallel connection of at least a first and a second capacitor element, wherein the first and second capacitor elements are formed in respective manufacturing steps that exhibit... Agent: Slater & Matsil LLP

20090014835 - Semiconductor device including mim element and method of manufacturing the same: A semiconductor device includes a first wiring layer which is provided above a semiconductor substrate and includes a first insulating film and a wiring buried in the first insulating film, a second insulating film provided above the first wiring layer, a third insulating film provided on the second insulating film,... Agent: Mcginn Intellectual Property Law Group, PLLC

20090014836 - Memory array with a selector connected to multiple resistive cells: An array includes a transistor comprising a first terminal, a second terminal and a third terminal; a first contact plug connected to the first terminal of the transistor; a second contact plug connected to the first terminal of the transistor; a first resistive memory cell having a first end and... Agent: Slater & Matsil, L.L.P.

20090014837 - Semiconductor device and method of manufacturing the same: The present invention relates to a semiconductor device and a method of manufacturing the same. A high-resistance silicon wafer is manufactured in such a manner that a large-sized silicon wafer manufactured by the Czochralski method is irradiated with neutrons, and high-resistance and low-resistance elements are simultaneously formed on the high-resistance... Agent: HorizonIPPte Ltd

20090014838 - Semiconductor device: The invention is based upon a semiconductor device where a high voltage bipolar transistor is manufactured on the same wafer with a high-speed bipolar transistor, and has a characteristic that the high-speed bipolar transistor and the high voltage bipolar transistor are formed on each epitaxial collector layer having the same... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20090014839 - Nitride-based semiconductor device: A nitride-based semiconductor device includes: an n-GaN layer 103; an active layer 104 formed on the n-GaN layer 103; a first AlGaN layer 105 formed on the active layer 104 at a growth temperature ranging from 900 to 1200° C. and by doping of Mg at a doping concentration ranging... Agent: Rabin & Berdo, PC

20090014842 - Femtosecond laser-induced formation of submicrometer spikes on a semiconductor substrate: The present invention generally provides semiconductor substrates having submicron-sized surface features generated by irradiating the surface with ultra short laser pulses. In one aspect, a method of processing a semiconductor substrate is disclosed that includes placing at least a portion of a surface of the substrate in contact with a... Agent: Nutter Mcclennen & Fish LLP

20090014840 - Method for the production of crystalline silicon foils: The invention is a method for the production of a silicon foil with a targeted charge carrier transport to the p-n transition by means of an integral electric field (‘drift field’). By varying the crystal growth speed and introducing a doping substance into the fluid silicon beforehand, a crystallization process... Agent: The Webb Law Firm, P.C.

20090014841 - Semiconductor device and method for manufacturing: A first region having a first pattern which includes a first minimum dimension, a second region having a second pattern which includes a second minimum dimension larger the first minimum dimension, the second region being arranged adjacent to the first region, wherein a boundary between the first region and the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090014843 - Manufacturing process and structure of through silicon via: A through silicon via reaching a pad from a second surface of a semiconductor substrate is formed. A penetration space in the through silicon via is formed of a first hole and a second hole with a diameter smaller than that of the first hole. The first hole is formed... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20090014844 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a first substrate, a plurality of cell transistors and a second substrate. The first substrate has a first surface and a second surface opposite to the first surface. The plurality of cell transistors is formed extending on the first surface of the first substrate in a... Agent: F. Chau & Associates, LLC

20090014845 - Film-forming composition: An SiO2-based film-forming composition giving a protective film which, after impurity diffusion, can be easily stripped off and which has a higher protective effect. The film-forming composition is one for forming a protective film which in the diffusion of an impurity into a silicon wafer, serves to partly prevent the... Agent: Procopio, Cory, Hargreaves & Savitch LLP

20090014846 - Methods for coating a substrate with an amphiphilic compound: Methods of modifying a patterned semiconductor substrate are presented including: providing a patterned semiconductor substrate surface including a dielectric region and a conductive region; and applying an amphiphilic surface modifier to the dielectric region to modify the dielectric region. In some embodiments, modifying the dielectric region includes modifying a wetting... Agent: Kali Law Group, P.C.

20090014847 - Integrated circuit package structure with electromagnetic interference shielding structure: An integrated circuit (IC) package structure with an electromagnetic interference (EMI) shielding structure utilizes double-layer successive cladding process. A dielectric coating layer and an EMI shielding layer material are sequentially coated on surface of a carrying substrate, an IC on the carrying substrate, and all the other devices. The EMI... Agent: Workman Nydegger 1000 Eagle Gate Tower

20090014849 - Integrated circuit package system with multiple molding: An integrated circuit package system is provided forming a lead from a padless lead frame, and encapsulating the lead for supporting an integrated circuit die with a first molding compound for encapsulation with a second molding compound.... Agent: Law Offices Of Mikio Ishimaru

20090014848 - Mixed wire semiconductor lead frame package: One embodiment includes an encapsulated semiconductor package having a lead frame with die pad surrounded by a plurality of first and second leadfingers. A semiconductor chip including chip contact pads on its upper active surface is attached to the die pad. A plurality of first bond wires, including a first... Agent: Dicke, Billig & Czaja

20090014850 - Electrically connecting substrate with electrical device: A substrate is electrically connected with an electrical device mounted on the substrate. A ball bond is formed between a first end of a wire and a bonding pad of the substrate. A reverse-motion loop is formed within the wire. A bond is formed between a second end of the... Agent: Hewlett Packard Company

20090014852 - Flip-chip packaging with stud bumps: A method for forming a package structure is provided. The method includes providing a semiconductor die; providing a package substrate; forming stud bumps on the package substrate; and bonding the semiconductor die to the package substrate, wherein the stud bumps electrically connect the semiconductor die and the package substrate.... Agent: Slater & Matsil, L.L.P.

20090014851 - Fusion quad flat semiconductor package: A semiconductor package which includes a generally planar die paddle defining multiple peripheral edge segments and a plurality of leads which are segregated into at least two concentric rows. Connected to the top surface of the die paddle is at least one semiconductor die which is electrically connected to at... Agent: Stetina Brunda Garred & Brucker

20090014853 - Integrated circuit package for semiconductior devices with improved electric resistance and inductance: A semiconductor integrated circuit package having a leadframe (108) that includes a leadframe pad (103a) disposed under a die (100) and a bonding metal area (101a) that is disposed over at least two adjacent sides of the die. The increase in the bonding metal area (101a) increases the number of... Agent: Schein & Cai LLP

20090014854 - Lead frame, semiconductor package including the lead frame and method of forming the lead frame: Provided are a lead frame and a semiconductor package including the same. The lead frame includes a first lead frame portion including a plurality of first leads; an adhesive member disposed such that the first leads are adhered to one surface of the adhesive member; and a second lead frame... Agent: Drinker Biddle & Reath LLP Attn: Patent Docket Dept.

20090014855 - Semiconductor integrated circuit device and method of manufacturing the same: A semiconductor integrated circuit device includes a die pad and a semiconductor chip mounted over the die pad, having a main surface with surface electrodes and a back surface. Suspension leads support the die pad, and leads are arranged around the semiconductor chip, each of the leads having inner and... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090014856 - Microbump seal: A sealable microelectronic device providing mechanical stress endurance which includes a semiconductor substrate. A substantially continuous sealing element is positioned adjacent an outer periphery and between a microelectronic component and the semiconductor substrate, or another microelectronic component. The sealing element seals the microelectronic component to the substrate or another microelectronic... Agent: Scully, Scott, Murphy & Presser, P.C.

20090014859 - Interconnects for packaged semiconductor devices and methods for manufacturing such devices: Packaged semiconductor devices and assemblies including interconnects and methods for forming such interconnects are disclosed herein. One embodiment of a packaged semiconductor assembly includes a die attached to a support layer. A plurality of interconnects are embedded in and project from the support layer, such that the support layer at... Agent: Perkins Coie LLP Patent-sea

20090014860 - Multi-chip stack structure and fabricating method thereof: A multi-chip stack structure and a manufacturing method thereof are provided. The fabrication method includes the steps of: providing a chip carrier having a first surface and a second surface opposing thereto and at least a first chip and a second chip mounted on the first surface; electrically connecting the... Agent: Edwards Angell Palmer & Dodge LLP

20090014858 - Packaged semiconductor assemblies and methods for manufacturing such assemblies: Packaged semiconductor assemblies including interconnect structures and methods for forming such interconnect structures are disclosed herein. One embodiment of a packaged semiconductor assembly includes a support member having a first bond-site and a die carried by the support member having a second bond-site. An interconnect structure is connected between the... Agent: Perkins Coie LLP Patent-sea

20090014857 - Semiconductor wafer structure: One embodiment provides a semiconductor wafer structure including a semiconductor wafer and a spacer layer. The semiconductor wafer includes active areas. The spacer layer is configured to provide spacing between the semiconductor dice in a stacked die package and the spacer layer is disposed on one side of the semiconductor... Agent: Dicke, Billig & Czaja

20090014861 - Microelectronic package element and method of fabricating thereof: Microelectronic package elements and packages having dielectric layers and methods of fabricating such elements packages are disclosed. The elements and packages may advantageously be used in microelectronic assemblies having high routing density.... Agent: Tessera Lerner David Et Al.

20090014863 - Subassembly that includes a power semiconductor die and a heat sink and method of forming same: A semiconductor assembly includes a first subassembly comprising a heat sink and a first patterned polymer layer disposed on a surface of the heat sink to define an exposed portion of the first surface. The exposed portion of the first surface extends radially inward along the heat sink surface from... Agent: Mayer & Williams PC

20090014862 - Subassembly that includes a power semiconductor die and a heat sink having an exposed surface portion thereof: The semiconductor assembly includes a first subassembly having a heat sink. Solder material is disposed on the exposed portion of a first surface of heat sink. A power semiconductor die is located on the first surface of the heat sink and is thermally coupled thereto by the solder material. A... Agent: Mayer & Williams PC

20090014864 - Thermal interface material having carbon nanotubes, component package having the same and method for making the component package: A thermal interface material includes a carbon nanotube array, a transition structure, and a matrix. The carbon nanotube array includes a plurality of carbon nanotubes. The transition structure covers at least a part of the surfaces of carbon nanotubes. The matrix encompasses the carbon nanotubes. A component package using the... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang

20090014865 - Heat-conductive package structure: A heat-conductive package structure includes a carrier board having a first surface and an opposing second surface and formed with a through opening passing the carrier board; a first heat-conductive structure including a heat-conductive hole in the through opening, a first heat-conductive sheet on the carrier board, and a second... Agent: Schmeiser Olsen & Watts

20090014866 - Multichip module package and fabrication method: A method for fabricating a multichip module package includes providing a first heat sink positioned for releasing heat from the package and providing a second heat sink positioned proximate the first heat sink. The heat sinks are thermally coupled and electrically isolated to and from one another. A first semiconductor... Agent: Law Offices Of Mikio Ishimaru

20090014867 - Seal ring for glass wall microelectronics package: A seal ring formed from a conductive material has at least one recessed area formed on an internal or external surface which is dimensioned to permit attachment of a wire bond so that the wire and any attachment material remain recessed from the upper and lower contact surfaces of the... Agent: Procopio, Cory, Hargreaves & Savitch LLP

20090014868 - Manufacturing ic chip in portions for later combining, and related structure: Methods of manufacturing an IC chip in portions for later combining and a related structure are disclosed. In one embodiment, the method includes: fabricating a first portion of the IC chip, the first portion including a structure from a selected level of back-end-of-line (BEOL) processing up to an end of... Agent: Hoffman Warnick LLC

20090014873 - Electronic device and manufacturing method: An electronic device including a semiconductor device with a plurality of bump electrodes, a mounting board connected to the semiconductor device, thermally expandable particles, and adhesive. The thermally expandable particles are provided on the sides of the semiconductor device and the surface of the mounting board around a projected area... Agent: Mcdermott Will & Emery LLP

20090014872 - Method for manufacturing a circuit board structure, and a circuit board structure: This publication discloses a method for manufacturing a circuit-board structure.1. The structure comprises a conductor pattern (3) and at least one component (6), which is surrounded by an insulating-material layer (10), attached to it by means of a contact bump (5). According to the invention, the contact bumps (5) are... Agent: Baker & Daniels LLP

20090014874 - Semiconductor apparatus and manufacturing method of semiconductor apparatus: A semiconductor apparatus includes a semiconductor chip, a wired board, a plurality of bump electrodes, a plurality of external terminals, and insulating material. The semiconductor chip includes a plurality of electrode pads arranged in a central area on one surface. The wired board is arranged as facing one surface of... Agent: Young & Thompson

20090014870 - Semiconductor chip and package process for the same: A semiconductor chip is provided. The semiconductor chip includes a chip and chip bump pads thereon. The chip bump pads include at least two chip bump pads that are physically connected.... Agent: J C Patents, Inc.

20090014871 - Semiconductor device: A semiconductor device is disclosed. One embodiment includes a semiconductor substrate and at least two insulating elements located above the semiconductor substrate or above a mold compound embedding the semiconductor substrate. The at least two insulating elements have a first face facing the semiconductor substrate or the mold compound and... Agent: Dicke, Billig & Czaja

20090014869 - Semiconductor device package with bump overlying a polymer layer: A semiconductor device package, for example a flip-chip package, having a solder bump mounted above a polymer layer for use in flip-chip mounting of a semiconductor device to a circuit board. A polymer layer such as polybenzoxazole is formed overlying a wafer passivation layer. Solder bumps are attached to an... Agent: Greenberg Traurig LLP (la)

20090014875 - Bonding pad for preventing pad peeling and method for fabricating the same: A bonding pad includes multiple metal layers, insulation layers filled between the multiple metal layers, and a fixing pin coupled between the uppermost metal layer, where a bonding is performed, and the underlying metal layers. Peeling of the bonding pad can be prevented during the ball bonding by forming the... Agent: Townsend And Townsend And Crew, LLP

20090014876 - Wafer level stacked package having via contact in encapsulation portion and manufacturing method thereof: Provided are a wafer level stacked package with a via contact in an encapsulation portion, and a manufacturing method thereof. A plurality of semiconductor chips and encapsulation portions may be vertically deposited and electrically connected through a via contact that may be vertically formed in the encapsulation portion. Thus, an... Agent: Harness, Dickey & Pierce, P.L.C

20090014880 - Dual damascene process flow enabling minimal ulk film modification and enhanced stack integrity: Interconnect structures possessing an organosilicate glass interlayer dielectric material with minimal stoichiometeric modification and optionally an intact organic adhesion promoter for use in semiconductor devices are provided herein. The interconnect structure is capable of delivering improved device performance, functionality and reliability owing to the reduced effective dielectric constant of the... Agent: Scully, Scott, Murphy & Presser, P.C.

20090014877 - Selective formation of boron-containing metal cap pre-layer: An interconnect structure with improved reliability is provided. The interconnect structure includes a semiconductor substrate; a dielectric layer over the semiconductor substrate; a metallic wiring in the dielectric layer; a pre-layer over the metallic wiring, wherein the pre-layer contains boron; and a metal cap over the pre-layer, wherein the metal... Agent: Slater & Matsil, L.L.P.

20090014879 - Semiconductor device and method of manufacturing the same: In a method of forming a wiring structure for a semiconductor device, an insulation layer is formed on a semiconductor substrate on which a plurality of conductive structures is positioned. An upper surface of the insulation layer is planarized and spaces between the conductive structures are filled with the insulation... Agent: Mills & Onello LLP

20090014878 - Structure and method of forming electrodeposited contacts: A contact metallurgy structure comprising a patterned dielectric layer having cavities on a substrate; a silicide or germanide layer such as of cobalt and/or nickel located at the bottom of cavities; a contact layer comprising Ti or Ti/TiN located on top of the dielectric layer and inside the cavities and... Agent: Connolly Bove Lodge & Hutz LLP

20090014882 - Semiconductor device: A semiconductor device includes an effective wire formed above a substrate in a multilayer interconnection structure and having a first electrode pad in a top layer; a first reinforcing material formed in the multilayer interconnection structure like surrounding the effective wire; a protective film configured to protect a final surface... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090014881 - Semiconductor device, and method and apparatus for manufacturing same: For the purpose of removing an oxide film on the surface of a varying metal electroconductive material used for wiring in a semiconductor device without inflicting damage on a peripheral structure, the oxide film formed on the surface of a metal electroconductive region 12 is subjected to a reducing treatment... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090014883 - Integrated circuit system with dummy region: An integrated circuit system comprised by forming a first region, a second region and a third region within a dielectric over a substrate. The first region includes tungsten plugs. The second region is formed adjacent at least a portion of the perimeter of the first region and the third region... Agent: Law Offices Of Mikio Ishimaru

20090014884 - Slots to reduce electromigration failure in back end of line structure: A back-end of the line (BEOL) structure and method are disclosed. In one embodiment the BEOL structure may include: a copper line in an ultra low-k dielectric, the copper line connected on one end to a cathode via and on another end to an anode via; and a plurality of... Agent: Hoffman Warnick LLC

20090014886 - Dynamic random access memory with an electrostatic discharge structure and method for manufacturing the same: The invention provides a dynamic random access memory (DRAM) with an electrostatic discharge (ESD) region. The upper portion of the ESD plug is metal, and the lower portion of the ESD plug is polysilicon. This structure may improve the mechanical strength of the ESD region and enhance thermal conductivity from... Agent: Quintero Law Office, PC

20090014885 - Four-terminal reconfigurable devices: Reconfigurable devices and methods for the fabrication thereof are provided. In one aspect, a reconfigurable device is provided. The reconfigurable device comprises a substrate, a first dielectric layer on the substrate; a conductive layer recessed into at least a portion of a side of the first dielectric layer opposite the... Agent: Michael J. Chang, LLC

20090014887 - Method of producing multilayer interconnection and multilayer interconnection structure: In an insulating film structure having a barrier insulating film, a via interlayer insulating film, a wiring interlayer insulating film, and a hard mask film stacked in this order on an underlayer wiring, a via hole pattern is formed in the insulating film structure, then a groove pattern is formed... Agent: Young & Thompson

20090014888 - Semiconductor chip, method of fabricating the same and stack package having the same: A semiconductor chip may include a wafer, a semiconductor device formed on the wafer, a first dielectric layer formed on the wafer and the semiconductor device, a first metal interconnection formed on the first dielectric layer, a second dielectric layer formed on the first dielectric layer and the lower interconnection,... Agent: Sherr & Vaughn, PLLC

20090014892 - Integrated circuit device: Provided on a chip are a plurality of conductor patterns for forming a coil, and a connection-relationship control device for controlling connection between adjacent conductor patterns. By switching the connection relationship of the conductor patterns by the connection-relationship control device, it is possible to form a coil of a desired... Agent: Sughrue Mion, PLLC

20090014893 - Integrated circuit package system with wire-in-film isolation barrier: An integrated circuit package in package system includes: providing a substrate having a first wire-bonded die with an active side mounted above; connecting the active side of the first wire-bonded die to the substrate with a bond-wire; mounting a wire-in-film adhesive having an isolation barrier over the first wire-bonded die;... Agent: Law Offices Of Mikio Ishimaru

20090014895 - Interposer chip, method of manufacturing the interposer chip, and multi-chip package having the interposer chip: An interposer chip in accordance includes an insulating layer, conductive patterns and a dummy pattern. The conductive patterns are formed on the insulating layer. The dummy pattern is formed on the insulating layer to suppress a bending of the insulating layer. Further, the dummy pattern can have first isolating grooves... Agent: Mills & Onello LLP

20090014889 - Method for producing chip stacks, and associated chip stacks: The present disclosures relates to a method for producing ultrathin chip stacks and chip stacks. Generally, a plurality of first semiconductor chips is formed in a wafer. A second semiconductor chip is applied to each of the plurality of first semiconductor chips via a connection layer and a stabilization layer... Agent: Brinks Hofer Gilson & Lione/infineon Infineon

20090014890 - Multi-chip semiconductor device: An interposer has an opening in the central portion. A plurality of first electrode terminals are formed on the front surface near the opening of the interposer, a plurality of second electrode terminals are formed on the front surface of the peripheral portion thereof and corresponding ones of the plurality... Agent: Amin, Turocy & Calvin, LLP

20090014894 - Stacked semiconductor device and semiconductor memory device: A stacked semiconductor device includes a first semiconductor element mounted on a wiring board and a second semiconductor element stacked on the first semiconductor element. Electrode pads of the first and second semiconductor elements are electrically connected to connection pads of the wiring board via first and second metal wires.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090014891 - Three-dimensional die-stacking package structure and method for manufacturing the same: This invention provides a substrate having at least one bottom electrode formed therein. A plurality of dice each having at least one opening formed therein are vertically stacked together one by one by a polymer insulating layer acting as an adhering layer between them, along with the openings thereof aligned... Agent: Birch Stewart Kolasch & Birch

20090014896 - Flip-chip package structure, and the substrate and the chip thereof: A flip-chip package structure is disclosed, which comprises: a packaging substrate having an upper surface and a plurality of conductive pads formed on the upper surface; a semiconductor chip having an active surface and a plurality of electrode pads formed on the active surface; and a plurality of first solder... Agent: Bacon & Thomas, PLLC

20090014897 - Semiconductor chip package and method of manufacturing the same: A semiconductor chip (20) including a protruding electrode (bump) (23) in an external extraction electrode is mounted on a wiring board (10), and a semiconductor chip (30) is mounted on the semiconductor chip (20). Electrical connections between a wiring layer (12) of the wiring board (10) and the protruding electrode... Agent: Oliff & Berridge, PLC

20090014899 - Integrated circuit package system including stacked die: An integrated circuit package system is provided including providing a wafer with bond pads formed on the wafer. A solder bump is deposited on one or more bond pads. The bond pads and the solder bump are embedded within a mold compound formed on the wafer. A groove is formed... Agent: Law Offices Of Mikio Ishimaru

20090014898 - Solder cap application process on copper bump using solder powder film: A method used during the formation of a semiconductor device assembly can include contacting an end of a conductive bump (which can be a pillar, ball, pad, post, stud, or lead as well as other types of bumps) with a conductive powder such as a solder powder to adhere the... Agent: Texas Instruments Incorporated

20090008620 - Nonvolatile memory cells employing a transition metal oxide layers as a data storage material layer and methods of manufacturing the same: Non-volatile memory cells employing a transition metal oxide layer as a data storage material layer are provided. The non-volatile memory cells include a lower and upper electrodes overlapped with each other. A transition metal oxide layer pattern is provided between the lower and upper electrodes. The transition metal oxide layer... Agent: Myers Bigel Sibley & Sajovec

20090008622 - Phase change memory devices and methods of fabricating the same: Phase change memory devices are provided including a selection element electrically connected to a phase change material pattern. The selection element includes a metallic conductor and a semiconductor that are in contact with each other. A depletion region in contact with a metallic pattern is generated in the semiconductor in... Agent: Myers Bigel Sibley & Sajovec

20090008621 - Phase-change memory element: A phase-change memory element is provided. The phase-change memory element of an embodiment of the invention comprises a phase-change material layer with a concave, and a heater with an extended part, wherein the extended part of the heater is wedged in the concave of the phase-change material layer. Specifically, the... Agent: Quintero Law Office, PC

20090008623 - Methods of fabricating nonvolatile memory device and a nonvolatile memory device: Methods of fabricating a nonvolatile memory device using a resistance material and a nonvolatile memory device are provided. According to example embodiments, a method of fabricating a nonvolatile memory device may include forming at least one semiconductor pattern on a substrate, forming a metal layer on the at least one... Agent: Harness, Dickey & Pierce, P.L.C

20090008628 - Light-emitting device and light-receiving device using transistor structure: Disclosed is a light-emitting device using a transistor structure, including a substrate, a first gate electrode, a first insulating layer, a source electrode, a drain electrode, and a light-emitting layer formed between the source electrode and the drain electrode in a direction parallel to these electrodes. In the light-emitting device... Agent: Cantor Colburn, LLP

20090008627 - Luminous device and method of manufacturing the same: A luminous device and a method of manufacturing the luminous device are provided. The luminous device includes a light emitting layer and first and second electrodes connected to the light emitting layer. The light emitting layer is a strained nanowire.... Agent: Harness, Dickey & Pierce, P.L.C

20090008624 - Optoelectronic device: The present invention provides an optoelectronic device, which includes a first electrode, a substrate on the first electrode, and a buffer layer on the substrate. The buffer layer further includes a first gallium nitride based compound layer on the substrate, a II-V group compound layer on the first gallium nitride... Agent: Reed Smith LLP

20090008625 - Optoelectronic device: The present invention provides an optoelectronic device, which includes a substrate having a first surface and a second surface, and an atomization layer located therebetween; a multi-layer semiconductor layer is formed on the first surface of the substrate, which further includes a first semiconductor structure that is formed on the... Agent: Sinorica, LLC

20090008626 - Optoelectronic device: The present invention provides an optoelectronic device which includes a first electrode, a substrate on the first electrode; a buffer layer on the substrate, in which the buffer layer includes a first gallium nitride based compound layer on the substrate, a second gallium nitride based compound layer, and a II-V... Agent: Reed Smith LLP

20090008629 - N-type transistor, production methods for n-type transistor and n-type transistor-use channel, and production method of nanotube structure exhibiting n-type semiconductor-like characteristics: An object of the present invention is to provide a new n-type transistor, different from the prior art, using a channel having a nanotube-shaped structure, and having n-type semiconductive properties. To realize this, a film of a nitrogenous compound 6 is formed directly on a channel 5 of a transistor... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090008631 - Nanowire tunneling transistor: A transistor comprises a nanowire (22, 22′) having a source (24) and a drain (29) separated by an intrinsic or lowly doped region (26, 28). A potential barrier is formed at the interface of the intrinsic or lowly doped region (26, 28) and one of the source (24) and the... Agent: Nxp, B.v. Nxp Intellectual Property Department

20090008630 - Tunneling transistor with barrier: The invention suggests a transistor (21) comprising a source (24) and a drain (29) as well as a barrier region (27) located between the source and the drain. The barrier region is separated from the source and the drain by intrinsic or lowly doped regions (26, 28) of a semiconductor... Agent: Nxp, B.v. Nxp Intellectual Property Department

20090008632 - Superconducting shielding for use with an integrated circuit for quantum computing: An integrated circuit for quantum computing may include a superconducting shield to limit magnetic field interactions.... Agent: Seed Intellectual Property Law Group PLLC

20090008635 - Columnar electric device and production method thereof: A sensor whose size can be decreased without marring the performance and which can be installed in a narrow place, an electric device, and a method for easily manufacturing the electric device. By vacuum deposition of semiconductor on a columnar body or by applying a melt, solution, or gel of... Agent: Young & Thompson

20090008633 - Nonvolatile memory device using conductive organic polymer having nanocrystals embedded therein and method of manufacturing the nonvlatile memory device: A nonvolatile memory device and a method of manufacturing the same are provided. The nonvolatile memory device which is convertible among a high current state, an intermediate current state, and a low current state, said device includes upper and lower conductive layers; a conductive organic layer comprising a conductive organic... Agent: Myers Bigel Sibley & Sajovec

20090008634 - Transistor structures and methods of fabrication thereof: An electronic device is presented, such as a thin film transistor. The device comprises a patterned electrically-conductive layer associated with an active element of the electronic device. The electrically-conductive layer has a pattern defining an array of spaced-apart electrically conductive regions. This technique allows for increasing an electric current through... Agent: Oliff & Berridge, PLC

20090008636 - Semiconductor device and method for fabricating the same: A semiconductor device that includes a phase change material for protecting the device from failure caused by overheating. The semiconductor device is adapted to detect a rapid increase in current due to heat and also adapted to break a circuit in the detected rapid increase in current by depositing a... Agent: Sherr & Vaughn, PLLC

20090008637 - Methods of fabricating nanostructured zno electrodes for efficient dye sensitized solar cells: The present invention provides methods of forming metal oxide semiconductor nanostructures and, in particular, zinc oxide (ZnO) semiconductor nanostructures, possessing high surface area, plant-like morphologies on a variety of substrates. Optoelectronic devices, such as photovoltaic cells, incorporating the nanostructures are also provided.... Agent: Foley & Lardner LLP

20090008638 - Oxide semiconductor, thin film transistor including the same and method of manufacturing a thin film transistor: Example embodiments relate to an oxide semiconductor including zinc oxide (ZnO), a thin film transistor including a channel formed of the oxide semiconductor and a method of manufacturing the thin film transistor. The oxide semiconductor may include a GaxInyZnz oxide and at least one material selected from the group consisting... Agent: Harness, Dickey & Pierce, P.L.C

20090008639 - Semiconductor device and manufacturing method thereof: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode... Agent: Cook Alex Ltd

20090008641 - Probe resistance measurement method and semiconductor device with pads for probe resistance measurement: A probe resistance measuring method includes measuring first resistances at three or more nodes by making contact at least a part of a plurality of probes of a probe unit with three or more pads for resistance measurement based on a first correspondence relation. The measured resistances are stored as... Agent: Foley And Lardner LLP Suite 500

20090008640 - Semiconductor device: A semiconductor device includes a plurality of bonding pads as bonding option, and a test circuit for performing an operation test using particular bonding pads and testing interconnects connecting internal circuits to the remaining bonding pads which are not used in the operation test.... Agent: Sughrue Mion, PLLC

20090008642 - Display device: A display device is disclosed. The display device includes a substrate, a display area on the substrate, the display area including a plurality of subpixels, a pad area on the substrate, the pad area including a pad electrode, a conductive adhesive layer on the pad electrode, and a driver on... Agent: Morgan Lewis & Bockius LLP

20090008646 - Display substrate, method of manufacturing the same, and display device having the same: A display substrate includes a switching member, a color filter layer, an inorganic insulation layer and a pixel electrode. The switching member includes a gate line, a data line crossing the gate line, and a thin-film transistor (TFT) electrically connected to the gate line and the data line. The color... Agent: Macpherson Kwok Chen & Heid LLP

20090008643 - Light emitting device, method of manufacturing the same, and manufacturing apparatus therefor: A light emitting device having high definition, a high aperture ratio, and high reliability is provided. The present invention achieves high definition and a high aperture ratio with a full color flat panel display using red, green, and blue color emission light by intentionally forming laminate portions, wherein portions of... Agent: Cook Alex Ltd

20090008645 - Light-emitting device: A method of manufacturing, with high mass productivity, light-emitting devices having highly reliable thin film transistors with excellent electric characteristics is provided. In a light-emitting device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over... Agent: Eric Robinson

20090008644 - Thin film transistor substrate and liquid crystal display: A TFT substrate comprises a substrate, a gate electrode and a lower electrode of a capacitor formed thereon, a first insulating layer formed thereon, a channel layer above the gate electrode and a lower layer of an upper electrode of the capacitor, a channel protection layer formed on an intermediate... Agent: Greer, Burns & Crain

20090008648 - Gallium nitride-based semiconductor element, optical device using the same, and image display apparatus using optical device: A GaN-based semiconductor element which can suppress a leakage current generated during reverse bias application, an optical device using the same, and an image display apparatus using the optical device are provided. The GaN-based semiconductor element has a first GaN-based compound layer including an n-type conductive layer; a second GaN-based... Agent: Bell, Boyd & Lloyd, LLP

20090008647 - Gallium nitride-on-silicon interface using multiple aluminum compound buffer layers: A thermal expansion interface between silicon (Si) and gallium nitride (GaN) films using multiple buffer layers of aluminum compounds has been provided, along with an associated fabrication method. The method provides a (111) Si substrate and deposits a first layer of AlN overlying the substrate by heating the substrate to... Agent: Sharp Laboratories Of America, Inc. C/o Law Office Of Gerald Maliszewski

20090008650 - Field-effect transistor and thyristor: A decrease in breakdown voltage can be prevented as much as possible. A field-effect transistor includes: a drain region made of SiC; a drift layer which is formed on the drain region and is made of n-type SiC; a source region which is formed on the surface of the drift... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090008649 - Silicon carbide semiconductor device and method of manufacturing the same: A silicon carbide semiconductor device includes a substrate having one of a first conductivity type and a second conductivity type, a drift layer having the first conductivity type, a plurality of base regions having the second conductivity type, a plurality of source regions having the first conductivity type, a surface... Agent: Posz Law Group, PLC

20090008651 - Silicon carbide semiconductor device having junction barrier schottky diode: A silicon carbide semiconductor device includes a drift layer having first conductive type on a substrate, a cell region in the drift layer, a schottky electrode on the drift layer and multiple second conductive type layers in the cell region. The second conductive type layers are separated from each other... Agent: Posz Law Group, PLC

20090008652 - Free-standing substrate, method for producing the same and semiconductor light-emitting device: The present invention provides a free-standing substrate, a method for producing the same and a semiconductor light-emitting device. The free-standing substrate comprises a semiconductor layer and inorganic particles, wherein the inorganic particles are included in the semiconductor layer. The method for producing a free-standing substrate comprises the steps of: (a)... Agent: Fitch, Even, Tabin & Flannery

20090008653 - Light emitting device: A light emitting device includes an active layer including atoms A of a matrix semiconductor having a tetrahedral structure, a heteroatom D substituted for the atom A in a lattice site, and a heteroatom Z inserted into an interstitial site positioned closest to the heteroatom D, the heteroatom D having... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090008654 - Semiconductor light emitting device, illumination module, illumination apparatus, method for manufacturing semiconductor light emitting device, and method for manufacturing semiconductor light emitting element: A semiconductor light emitting device (10) is provided with a base substrate (12) and three LED chips (14A, 14B, and 14C) disposed on the base substrate (12). Each LED chip (14A, 14B, and 14C) includes a semiconductor multilayer structure (20) and has a rhombus shape with interior angles of approximately... Agent: Snell & Wilmer L.L.P. (panasonic)

20090008655 - White light source: A white light source (1) comprising an array of at least one blue light source (2), at least one green light source (3), and at least one red light source (4) is disclosed. The blue light source (2) comprises a first light emitting diode (2′) capable of emitting light at... Agent: Philips Intellectual Property & Standards

20090008656 - Penetrating hole type led chip package structure using a ceramic material as a substrate and method for manufacturing the same: An LED chip package structure includes a ceramic substrate, a conductive unit, a hollow ceramic casing, many LED chips, and a package colloid. The ceramic substrate has a main body, many protrusions extended from the main body, many penetrating holes respectively penetrating through the protrusions, and many half through holes... Agent: Rosenberg, Klein & Lee

20090008657 - Semiconductor light-emitting device with low-density defects and method of fabricating the same: A semiconductor light-emitting device and a method of fabricating the same are provided. The semiconductor light-emitting device includes a substrate, a multi-layer structure and an ohmic electrode structure. The substrate has a first upper surface and a plurality of first recesses formed in the first upper surface. The multi-layer structure... Agent: Birch Stewart Kolasch & Birch

20090008658 - Infrared emitting diode and method of its manufacture: An infrared emitting diode that can be utilized as a high power and rapidly responsive infrared light source for both infrared and remote control communications is disclosed which comprises at least one p-type clad layer containing AlxGa1-xAs of p type where 0.15≦x≦0.45, an active layer containing AlyGa1-yAs of p type... Agent: Masao Yoshimura, Chen Yoshimura, LLP

20090008661 - Light-emitting diode and fabrication method thereof: A light-emitting diode (10) has a light-extracting surface and includes a transparent substrate (14), a compound semiconductor layer (13) bonded to the transparent substrate, a light-emitting part (12) contained in the compound semiconductor layer, a light-emitting layer (133) contained in the light-emitting part and formed of (AlXGa1-X)YIn1-YP (0≦X≦1, 0<Y≦1), a... Agent: Sughrue Mion, PLLC

20090008659 - Nitride semiconductor stacked structure and semiconductor optical device, and methods for manufacturing the same: A nitride semiconductor stacked structure having good working efficiency includes a p-type nitride semiconductor layer of low resistance, which is formed from an organometallic compound, compounds including Group V elements, including ammonia and a hydrazine derivative, and a p-type impurity material on a substrate. The p-type nitride layer has a... Agent: Leydig Voit & Mayer, Ltd

20090008660 - Zno-containing semiconductor layer and zno-containing semiconductor light emitting device: A ZnO-containing semiconductor layer contains Se or S added to ZnO and has an emission peak wavelength of ultraviolet light and an emission peak wavelength of visual light. By combining the ZnO-containing semiconductor layer with phosphor or semiconductor which is excited by the emitted ultraviolet light and emits visual light,... Agent: Frishauf, Holtz, Goodman & Chick, PC

20090008662 - Lighting device package: The invention provides a lighting device package with one or more light-emitting elements operatively coupled to a substrate; a compound lens disposed to interact with light emitted by the one or more light-emitting elements, the compound lens including at least an inner lens element and an outer lens element, the... Agent: Philips Intellectual Property & Standards

20090008667 - Method for forming pattern, method for manufacturing light emitting device, and light emitting device: Oxidation treatment is performed to the surface of a substrate provided with a photocatalytic conductive film and an insulating film; treatment with a silane coupling agent is performed, so that a silane coupling agent film is formed and the surface of the substrate is modified to be liquid-repellent; and the... Agent: Nixon Peabody, LLP

20090008664 - Nanowire light emitting device: A nanowire light emitting device is provided. The nanowire light emitting device includes a substrate, a first conductive layer formed on the substrate, a plurality of nanowires vertically formed on the first conductive layer, each nanowire comprising a p-doped portion and an n-doped portion, a light emitting layer between the... Agent: Sughrue Mion, PLLC

20090008666 - Optical semiconductor device: A semiconductor light-emitting element is disposed in a depression of a container. A first fluorescent material layer is located in the depression. At least a portion of the first fluorescent material layer is provided between the opening of the depression and the semiconductor light-emitting element. A second fluorescent material layer... Agent: Amin, Turocy & Calvin, LLP

20090008665 - Organic light emitting element and method of manufacturing the same: An organic light emitting element includes an organic light emitting diode formed on a substrate, coupled to a transistor including a gate, a source and a drain and including a first electrode, an organic thin film layer and a second electrode; a photo diode formed on the substrate and having... Agent: Stein, Mcewen & Bui, LLP

20090008669 - Package for micromirror device: The present invention discloses a mirror device that includes a mirror element which further comprising an elastic hinge and a mirror and which modulates incident light emitted from a light source, a device substrate on which a drive circuit for driving the mirror element is placed, a package substrate which... Agent: Bo-in Lin

20090008663 - Phosphor and method for production thereof, and application thereof: e

20090008668 - Semiconductor light emitting device and method for fabricating the same: A semiconductor light emitting device, which includes: a first conductivity-type semiconductor layer; a second conductivity-type semiconductor layer; a semiconductor light emitting portion having a light emitting layer which is disposed between the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer; a first conductivity-type semiconductor side electrode connected to... Agent: Crowell & Moring LLP Intellectual Property Group

20090008670 - Led packaging structure with aluminum board and an led lamp with said led packaging structure: An LED lamp is provided. The LED lamp has an aluminum board, a semiconductor substrate, at least a LED chip, a metal layer structure, and heat sink. The aluminum board has a cup structure thereon. The semiconductor substrate is assembled on a bottom surface of the cup structure. The LED... Agent: Birch Stewart Kolasch & Birch

20090008671 - Led packaging structure with aluminum board and an led lamp with said led packaging structure: An LED lamp is provided. The LED lamp has an aluminum board, a buffer substrate, at least a LED chip, a metal layer structure, and heat sink. The aluminum board has a cup structure thereon. The buffer substrate is assembled on a bottom surface of the cup structure. The LED... Agent: Birch Stewart Kolasch & Birch

20090008672 - Light-emitting device, manufacturing method thereof, and lamp: There is provided a light-emitting device having high reliability and excellent light extraction efficiency, a manufacturing method thereof, and a lamp. A light-emitting device includes a transparent electrode, wherein a titanium oxide-based conductive film is used for at least one layer of said transparent electrode, an emission wavelength is within... Agent: Sughrue Mion, PLLC

20090008673 - Semiconductor light emitting device member, method for manufacturing such semiconductor light emitting device member and semiconductor light emitting device using such semiconductor light emitting device member: A semiconductor light-emitting device member excellent in transparency, light resistance, and heat resistance and capable of sealing a semiconductor light-emitting device without causing cracks and peeling even after a long-time use is provided. Therefore, a semiconductor light-emitting device member that comprises (1) in a solid Si-nuclear magnetic resonance spectrum, at... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090008674 - Double gate insulated gate bipolar transistor: Double gate IGBT having both gates referred to a cathode in which a second gate is for controlling flow of hole current. In on-state, hole current can be largely suppressed. While during switching, hole current is allowed to flow through a second channel. Incorporating a depletion-mode p-channel MOSFET having a... Agent: North America Intellectual Property Corporation

20090008675 - Soi trench lateral igbt: To enable driving at a high withstand voltage and a large current, increase latchup immunity, and reduce ON resistance per unit area in an IGBT, a trench constituted by an upper stage trench and a lower stage trench is formed over an entire wafer surface between an n+ emitter region... Agent: Rossi, Kimms & Mcdowell LLP.

20090008677 - Compound semiconductor device and manufacturing method of the same: An AlN layer (2), a GaN buffer layer (3), a non-doped AlGaN layer (4a), an n-type AlGaN layer (4b), an n-type GaN layer (5), a non-doped AlN layer (6) and an SiN layer (7) are sequentially formed on an SiC substrate (1). At least three openings are formed in the... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090008676 - Normally-off field-effect semiconductor device, and method of fabrication: A normally-off HEMT is made by first providing a substrate having its surface partly covered with an antigrowth mask. Gallium nitride is grown by epitaxy on the masked surface of the substrate to provide an electron transit layer comprised of two flat-surfaced sections and a V-notch-surfaced section therebetween. The flat-surfaced... Agent: Woodcock Washburn LLP

20090008678 - Semiconductor device: n

20090008679 - Semiconductor apparatus: A semiconductor apparatus includes, a first silicon layer of a first conductivity type; a second silicon layer provided on the first silicon layer and having a higher resistance than the first silicon layer, a third silicon layer of a second conductivity type provided on the second silicon layer, a first... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090008680 - Semiconductor intergrated circuit device: A semiconductor integrated circuit device includes a semiconductor chip, a memory cell array arranged on the semiconductor chip and first and second decoder strings arranged along both ends of the memory cell array. The arrangement position of the first decoder string is deviated from the arrangement position of the second... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090008681 - Alkaloid sensor: An alkaloid sensor, systems comprising the same, and measurement using the systems. The alkaloid sensor has an extended gate field effect transistor (EGFET) structure and comprises a metal oxide semiconductor field effect transistor (MOSFET) on a semiconductor substrate, a sensing unit comprising a substrate, a tin oxide film on the... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20090008685 - Image sensor and controlling method thereof: A controlling method of an image sensor is disclosed. The method includes: measuring a first output voltage of a drive transistor, a gate of which is combined to a floating diffusion region, after a predetermined integration time; resetting the floating diffusion region by turning on a reset transistor connected between... Agent: Birch Stewart Kolasch & Birch

20090008683 - Imaging apparatus: An imaging apparatus comprises: a semiconductor imaging device having a plurality of photodiodes and a color filter; and an imaging optical system for guiding light from a subject to the semiconductor imaging device, where a diameter of an aperture (40) (41) of each photodiode of the semiconductor imaging device is... Agent: Pearne & Gordon LLP

20090008682 - Light-receiving device: Disclosed is a light-receiving device comprising a substrate provided with at least one light-receiving element and a transparent cover (6) arranged above the surface of the substrate on which the light-receiving element is formed. A sealing member (5) is provided between the substrate and the transparent cover (6) at least... Agent: Smith, Gambrell & Russell

20090008684 - Photoelectric conversion device, method of manufacturing the same, and image sensing system: A photoelectric conversion device comprises a photoelectric conversion unit, a floating diffusion region, a transfer transistor, and an output unit. A control electrode of the transfer transistor includes a first portion which extends along a channel width direction and overlaps a first boundary side when seen through from a direction... Agent: Fitzpatrick Cella Harper & Scinto

20090008687 - Solid-state imaging device and method for fabricating the same: A solid-state imaging device includes: an imaging area in which light receiving portions are disposed; an interconnect layer disposed on the light receiving portions, the interconnect layer including metal interconnects having openings and first insulating films; inner-layer lenses formed over the interconnect layer in one-to-one relationship with the light receiving... Agent: Mcdermott Will & Emery LLP

20090008686 - Solid-state imaging device with improved charge transfer efficiency: A transfer gate is formed such that both end portions thereof in a second direction, which crosses a first direction in which a photodiode and a floating diffusion layer that is formed with a distance from the photodiode are arranged, are located inside boundaries with element isolation regions. Channel stopper... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090008688 - Unit pixels, image sensors and methods of manufacturing the same: Unit pixels, image sensors and methods for fabricating the image sensor are provided. A unit pixel includes: a photodiode for accumulating photocharges; a floating diffusion region for detecting the photocharges accumulated in the photodiode; a reset element for periodically resetting the floating diffusion region; a drive element for amplifying the... Agent: Harness, Dickey & Pierce, P.L.C

20090008689 - Spin transistor using ferromagnet: A spin transistor comprises a semiconductor substrate part having a lower cladding layer, a channel layer and an upper cladding layer sequentially stacked therein, a ferromagnetic source and drain on the substrate part, and a gate on the substrate part to control spins of electrons passing through the channel layer.... Agent: Wells St. John P.s.

20090008690 - Semiconductor device and a method of manufacturing the same: The data retention characteristics of a nonvolatile memory circuit are improved. In a memory cell array on a main surface of a semiconductor substrate, a floating gate electrode for accumulating charges for information is arranged. The floating gate electrode is covered with a cap insulating film and a pattern of... Agent: Miles & Stockbridge PC

20090008691 - Dram structure and method of making the same: A DRAM structure has a substrate, a buried transistor with a fin structure, a trench capacitor, and a surface strap on the surface of the substrate. The surface strap is used to electrically connect a drain region to the trench capacitor.... Agent: North America Intellectual Property Corporation

20090008692 - Semiconductor device and fabricating method thereof: A semiconductor device includes a semiconductor substrate. The semiconductor substrate has a memory array region and a peripheral circuit region; a first active region and a second active region in the peripheral circuit region; a recessed gate disposed on the memory array region, comprising a first gate dielectric layer on... Agent: Quintero Law Office, PC

20090008693 - Semiconductor device and method of manufacturing same: A technique for enhancing the performance of a memory- and logic-equipped semiconductor device is provided. The semiconductor device comprises a semiconductor substrate (1), an insulating layer (19) on the semiconductor substrate (1), a plurality of contact plugs (16, 66) in the insulating layer (19), and an insulating layer (30) where... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090008694 - Integrated circuit and corresponding manufacturing method: t

20090008695 - Semiconductor device and method for fabricating the same: A semiconductor device is provided. The semiconductor device comprises a substrate. A lamination structure is on the substrate along a first direction. The lamination structure comprises a plurality of conductive layers arranged from bottom to top and separated from each other, and each of the conductive layers has a channel... Agent: Quintero Law Office, PC

20090008696 - Semiconductor memory device and method of forming the same: According to one embodiment, a semiconductor memory device can be generally characterized as including a gate insulating layer on a semiconductor substrate, a floating gate on the gate insulating layer and a word line disposed on one side of the floating gate. A first side of the floating gate facing... Agent: Marger Johnson & Mccollom, P.C.

20090008697 - Sram cells with repressed floating gate memory, low tunnel barrier interpoly insulators: Structures and methods are provided for SRAM cells having a novel, non-volatile floating gate transistor, e.g. a non-volatile memory component, within the cell which can be programmed to provide the SRAM cell with a definitive asymmetry so that the cell always starts in a particular state. The SRAM cells include... Agent: Schwegman, Lundberg & Woessner/micron

20090008699 - Non-volatile semiconductor memory device and method of manufacturing the same: Example embodiments relate to a non-volatile semiconductor memory device and a method of manufacturing the same. A semiconductor device includes an isolation layer protruding from a substrate, a spacer, a tunnel insulation layer, a floating gate, a dielectric layer pattern and a control gate. The spacer may be formed on... Agent: Harness, Dickey & Pierce, P.L.C

20090008698 - Nonvolatile memory device and method for fabricating the sam: A nonvolatile memory device includes an active region which is defined by an isolation layer formed in a substrate and has a recess therein in a channel width direction, wherein an upper portion of the active region having the recess projects over an upper portion of the isolation layer, a... Agent: Lowe Hauptman Ham & Berner, LLP

20090008700 - Semiconductor memory devices and methods of manufacturing the same: In methods of manufacturing a memory device, a tunnel insulation layer is formed on a substrate. A floating gate having a substantially uniform thickness is formed on the tunnel insulation layer. A dielectric layer is formed on the floating gate. A control gate is formed on the dielectric layer. A... Agent: Myers Bigel Sibley & Sajovec

20090008702 - Dielectric charge-trapping materials having doped metal sites: Dielectric materials having implanted metal sites and methods of their fabrication have been described. Such materials are suitable for use as charge-trapping nodes of non-volatile memory cells for memory devices. By incorporating metal sites into dielectric charge-trapping materials using an ammonia plasma and a metal source in contact with the... Agent: Leffert Jay & Polglaze, P.A. Attn: Thomas W. Leffert

20090008703 - Non-volatile memory cell and fabricating method thereof: A super-silicon-rich oxide (SSRO) non-volatile memory cell includes a gate conductive layer on a substrate, a source/drain in the substrate at respective sides of the gate conductive layer, a tunneling dielectric layer between the gate conductive layer and the substrate, a SSRO layer serving as a charge trapping layer between... Agent: J C Patents, Inc.

20090008701 - Nonvolatile memory device and method of fabricating the same: A nonvolatile memory device includes a semiconductor substrate, a charge trap layer formed on the semiconductor substrate, a blocking layer formed on the charge trap layer, and a gate electrode formed on the blocking layer. Sides of blocking layer extend laterally beyond sides of the charge trap layer and lateral... Agent: Marger Johnson & Mccollom, P.C.

20090008704 - Semiconductor memory device: A semiconductor memory device includes a semiconductor substrate having a projection, an upper end portion of the projection being curved, a first element isolation insulating film formed on the substrate surface at the root of the projection, having an upper surface lower than an upper surface of the projection, a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090008705 - Body-contacted finfet: A silicon containing fin is formed on a semiconductor substrate. A silicon oxide layer is formed around the bottom of the silicon containing fin. A gate dielectric is formed on the silicon containing fin followed by formation of a gate electrode. While protecting the portion of the semiconductor fin around... Agent: Scully, Scott, Murphy & Presser, P.C.

20090008706 - Power semiconductor devices with shield and gate contacts and methods of manufacture: A semiconductor power device includes active trenches that define an active area and an edge area that is located outside of the active area. The active trenches include a lower shield poly, an upper gate poly, a first oxide layer and a second oxide layer wherein the first oxide layer... Agent: Townsend And Townsend And Crew, LLP

20090008707 - Sram device: An integrated circuit device has a base area defining a longitudinal axis. Four in-line transistors, which are NMOS transistors in exemplary embodiments, are each centered on the longitudinal axis. Two off-set transistors, which are PMOS transistors in exemplary embodiments, are off-set to first and second sides of the longitudinal axis,... Agent: Dicke, Billig & Czaja

20090008708 - Semiconductor device and manufacturing method of the same: The characteristics of a semiconductor device including a trench-gate power MISFET are improved. The semiconductor device includes a substrate having an active region where the power MISFET is provided and an outer circumferential region which is located circumferentially outside the active region and where a breakdown resistant structure is provided,... Agent: Miles & Stockbridge PC

20090008709 - Power semiconductor devices with trenched shielded split gate transistor and methods of manufacture: A semiconductor power device includes a drift region of a first conductivity type, a well region extending above the drift region and having a second conductivity type opposite the first conductivity type, active trenches extending through the well region and into the drift region where the active trenches define an... Agent: Townsend And Townsend And Crew, LLP

20090008710 - Robust esd ldmos device: A semiconductor device includes a gate electrode over a semiconductor substrate, wherein the gate electrode has a gate width direction; a source/drain region in the semiconductor substrate and adjacent the gate electrode, wherein the source/drain region has a first width in a direction parallel to the gate width direction; and... Agent: Slater & Matsil, L.L.P.

20090008711 - Fully isolated high-voltage mos device: A semiconductor structure includes a semiconductor substrate; an n-type tub extending from a top surface of the semiconductor substrate into the semiconductor substrate, wherein the n-type tub comprises a bottom buried in the semiconductor substrate; a p-type buried layer (PBL) on a bottom of the tub, wherein the p-type buried... Agent: Slater & Matsil, L.L.P.

20090008712 - Carbon nano-tube (cnt) thin film comprising metallic nano-particles, and a manufacturing method thereof: Disclosed is a carbon nanotube (CNT) thin film having metallic nanoparticles. The CNT thin film includes a plastic transparent substrate and a CNT composition coated on the substrate. The CNT composition includes a CNT and metallic nanoparticles distributed on the CNT surface. The plastic transparent substrate is flexible. The metallic... Agent: Cantor Colburn, LLP

20090008713 - Display device and a method for manufacturing the same: A display device is provided which includes: pixel circuits for pixel electrode switching, arranged on a substrate; and an interlayer insulating film covering the pixel circuits. In this display device, the interlayer insulating film has connection holes which expose at bottom portions thereof connection portions of the pixel circuits, and... Agent: Sonnenschein Nath & Rosenthal LLP

20090008715 - Method for manufacturing semiconductor device, and semiconductor device and electronic device: It is an object of the present invention to manufacture a semiconductor device easily and to provide a semiconductor device whose cost is reduced. According to the present invention, a thin film integrated circuit provided over a base insulating layer can be prevented from scattering by providing a region where... Agent: Eric Robinson

20090008714 - Semiconductor devices and methods of forming the same: A semiconductor device includes a semiconductor layer disposed between a semiconductor substrate and a gate electrode, a back gate insulating layer pattern disposed between the semiconductor layer and the semiconductor substrate, and a gate insulating layer disposed between the semiconductor layer and the gate electrode. The semiconductor substrate extends from... Agent: F. Chau & Associates, LLC

20090008716 - Semiconductor device and method of fabricating the same: A semiconductor device according to an embodiment includes: a fin type MOSFET having a first gate electrode, and a first gate insulating film for generating Fermi level pinning in the first gate electrode; and a planar type MOSFET having a second gate electrode, and a second gate insulating film for... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090008717 - Semiconductor devices including elevated source and drain regions and methods of fabricating the same: Methods of fabricating semiconductor devices are provided. A substrate having active patterns and isolating layer patterns is prepared. Each of the isolating layer patterns has an upper surface higher than that of each of the active patterns. A spacer layer having a uniform thickness is formed on the substrate. The... Agent: Myers Bigel Sibley & Sajovec

20090008719 - Metal gate cmos with at least a single gate metal and dual gate dielectrics: A complementary metal oxide semiconductor (CMOS) structure including at least one nFET and at least one pFET located on a surface of a semiconductor substrate is provided. In accordance with the present invention, the nFET and the pFET both include at least a single gate metal and the nFET gate... Agent: Scully, Scott, Murphy & Presser, P.C.

20090008720 - Metal gate cmos with at least a single gate metal and dual gate dielectrics: A complementary metal oxide semiconductor (CMOS) structure including at least one nFET and at least one pFET located on a surface of a semiconductor substrate is provided. In accordance with the present invention, the nFET and the pFET both include at least a single gate metal and the nFET gate... Agent: Scully, Scott, Murphy & Presser, P.C.

20090008721 - Semiconductor device: The semiconductor device includes first and second common source semiconductor layers respectively extending in a first direction, first and second logic gate circuits respectively composed of at least one three-dimensional P-type FET and a three-dimensional N-type FET. The sources of the three-dimensional P-type FETs in the first and second logic... Agent: Foley And Lardner LLP Suite 500

20090008718 - Stress enhanced cmos circuits: A CMOS circuit is provided that includes a PMOS transistor, an NMOS transistor adjacent the PMOS transistor in a channel width direction, a compressive stress liner overlying the PMOS transistor, and a tensile stress liner overlying the NMOS transistor. A portion of the compressive stress liner and a portion of... Agent: Ingrassia Fisher & Lorenz, P.C. (amd)

20090008722 - Three-dimensional memory cells: The present invention discloses a three-dimensional memory (3D-M) with polarized 3D-ROM (three-dimensional read-only memory) cells. Polarized 3D-ROM can ensure a larger unit array and therefore, a better integratibility.... Agent: Guobiao Zhang

20090008723 - Semiconductor component including an edge termination having a trench and method for producing: A semiconductor component includes a semiconductor body having a first side, a second side, an edge delimiting the semiconductor body in a lateral direction, an inner region and an edge region. A first semiconductor zone of a first conduction type is arranged in the inner region and in the edge... Agent: Dicke, Billig & Czaja

20090008724 - Semiconductor device and method of manufacturing the same: The semiconductor device according to the present invention comprises a gate insulating film 16 formed on a silicon substrate 10 and including a silicon oxide film 12 and a Hf-based high dielectric constant insulating film 14 doped with Al; a gate electrode 18 of a polysilicon film formed on the... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090008725 - Method for deposition of an ultra-thin electropositive metal-containing cap layer: A method of forming an electropositive metal-containing capping layer atop a stack of a high k gate dielectric/interfacial layer that avoids chemically and physically altering the high k gate dielectric and the interfacial layer is provided. The method includes chemical vapor deposition of an electropositive metal-containing precursor at a temperature... Agent: Scully, Scott, Murphy & Presser, P.C.

20090008726 - Method of manufacturing semiconductor device and semiconductor device: A method of manufacturing a semiconductor device reducing interface resistance of n-type and p-type MISFETs are provided. According to the method, a gate dielectric film and a gate electrode of the n-type MISFET are formed on a first semiconductor region, a gate dielectric film and a gate electrode of the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090008727 - Semiconductor device and method of manufacturing the same: It is made possible to reduce the interface resistance at the interface between the nickel silicide film and the silicon. A semiconductor manufacturing method includes: forming an impurity region on a silicon substrate, with impurities being introduced into the impurity region; depositing a Ni layer so as to cover the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090008728 - Semiconductor device and manufacturing method of the same: A semiconductor device includes: a sensor element having a plate shape with a surface and including a sensor structure disposed in a surface portion of the sensor element; and a plate-shaped cap element bonded to the surface of the sensor element. The cap element has a wiring pattern portion facing... Agent: Posz Law Group, PLC

20090008731 - Image sensor and method for manufacturing the same: An image sensor and method of manufacturing the same are provided. The image sensor can include a photodiode on a substrate, an interlayer insulation layer on the photodiode, and a color filter layer on the interlayer insulation layer. The color filter layer can include a nonsensitive color resin.... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20090008729 - Image sensor package utilizing a removable protection film and method of making the same: The present invention discloses a structure of image sensor package utilizing a removable protection film. The structure comprises a substrate with a die receiving cavity and inter-connecting through holes. Terminal pads are formed under the inter-connecting through holes and metal pads are formed on an upper surface of the substrate.... Agent: Kusner & Jaffe Highland Place Suite 310

20090008730 - Integrated optical filter: The disclosure relates to an integrated circuit comprising at least one photosensitive cell. The cell includes a photosensitive element, an input face associated with the said photosensitive element, an optical filter situated in at least one optical path leading to the photosensitive element and an interconnection part situated between the... Agent: Docket Clerk

20090008732 - Semiconductor package: A chip-size semiconductor package can respond also to a semiconductor device in which an electrode pad pitch is narrow. A semiconductor package comprises a semiconductor substrate which has a first principal plane and a second principal plane, a circuit element formed on the first principal plane, two or more electrode... Agent: Scully Scott Murphy & Presser, PC

20090008733 - Electric field steering cap, steering electrode, and modular configurations for a radiation detector: A cap for a radiation detection device of the type that utilizes a semiconductor medium includes a bias connection pad, a steering electrode, and a shielding layer. The steering electrode may be a grid steering electrode positioned parallel to the bias connection pad opposite a medium, or may be an... Agent: The Nath Law Group

20090008734 - Semiconductor light receiving device and photosemiconductor module: A semiconductor light receiving device includes: a light receiving section made of a semiconductor provided on a substrate; a mask layer provided above the light receiving section and having an opening configured to limit an irradiation area of the light receiving section; and a light scattering section provided in at... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090008735 - Photo detector, image sensor, photo-detection method, and imaging method: A photo detector includes a photoelectric conversion layer having a periodic structure made of a semiconductor material on a surface of the photoelectric conversion layer. In the photo detector, at least a part of a resonance region formed by the periodic structure is included in the photoelectric conversion layer of... Agent: Fitzpatrick Cella Harper & Scinto

20090008737 - Image sensor having anti-reflection film and method of manufacturing the same: p

20090008736 - Method for photo-detecting and apparatus for the same: A method for photo-detecting and an apparatus for the same are provided. The apparatus for photo-detecting includes a first P-N diode and a second P-N diode. The first P-N diode, has a first P-N junction which has a first thickness, by which a first electrical signal is generated when irradiated... Agent: Volpe And Koenig, P.C.

20090008738 - Avalanche photodiode detector: An avalanche photodiode detector is provided. The avalanche photodiode detector comprises an absorber region having an absorption layer for receiving incident photons and generating charged carriers; and a multiplier region having a multiplication layer; wherein the multiplier region is on a mesa structure separate from the absorber region and is... Agent: Klein, O'neill & Singh, LLP

20090008739 - Photo diodes having a conductive plug contact to a buried layer and methods of manufacturing the same: Methods of manufacturing a photo diode include sequentially forming a buried layer of a first conductivity type, a first epitaxial layer of the first conductivity type, and a second epitaxial layer of a second conductivity type on a substrate. The second and first epitaxial layers are etched to form a... Agent: Myers Bigel Sibley & Sajovec

20090008740 - Semiconductor integrated circuit devices having conductive patterns that are electrically connected to junction regions and methods of fabricating such devices: A semiconductor integrated circuit device includes a semiconductor substrate; a dummy pattern extending in one direction on the semiconductor substrate; a junction region electrically connecting the dummy pattern to the semiconductor substrate; and a voltage applying unit that is configured to apply a bias voltage to the dummy pattern.... Agent: Myers Bigel Sibley & Sajovec

20090008741 - Semiconductor device including memory cell and anti-fuse element: A semiconductor device includes an anti-fuse portion and a memory cell portion each including a MOSFET structure having a gate insulating film formed on a semiconductor substrate and a gate electrode formed on the gate insulating film; wherein a depletion ratio in the gate electrode of the anti-fuse portion is... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090008742 - Semiconductor device including memory cell and anti-fuse element: A semiconductor device includes an anti-fuse portion and a memory cell portion each including a MOSFET structure having a gate insulating film formed on a semiconductor substrate and a gate electrode formed on the gate insulating film; wherein a depletion ratio in the gate electrode of the anti-fuse portion is... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090008743 - Capacitor with pillar type storage node and method for fabricating the same: A capacitor includes a pillar-type storage node, a supporter filling an inner empty crevice of the storage node, a dielectric layer over the storage node, and a plate node over the dielectric layer.... Agent: Townsend And Townsend And Crew, LLP

20090008744 - Semiconductor device and semiconductor device manufacturing method: A semiconductor device includes: a first interlayer insulating film; a first conductive member provided lower than the first interlayer insulating film; a contact plug that penetrates through the first interlayer insulating film, and is electrically connected to the first conductive member, the contact plug including a small-diameter part, and a... Agent: Young & Thompson

20090008745 - Nitride compound semiconductor and process for producing the same: A process for producing a nitride compound semiconductor represented by a general formula, InxGayAlzN (where x+y+Z=1, 0≦x≦1, 0≦y≦1, and 0≦z≦1), characterized in that a non-doped nitride compound semiconductor (A) represented by a general formula, InaGabAlcN (where a+b+c=1, 0≦a≦1, 0≦b≦1, and 0≦c≦1) of a thickness of 500 to 5000 Å is... Agent: Fitch, Even, Tabin & Flannery

20090008746 - Method of fabricating semiconductor high-voltage device: A semiconductor high-voltage device including a semiconductor substrate having a deep trench formed therein, a gate oxide film formed on sidewalls of the deep trench, a polysilicon layer formed in the deep trench and on the gate oxide film, and spacers formed on sidewalls of the trench at a portion... Agent: Sherr & Vaughn, PLLC

20090008747 - Semiconductor device and method for manufacturing thereof: A semiconductor device 100 includes a semiconductor substrate 14, a connection electrode 12 disposed on an upper surface of the semiconductor substrate 14 and connected to an integrated circuit thereon, a through electrode 20 which penetrates the semiconductor substrate 14 and the connection electrode 20, and an insulation portion 30... Agent: Paul J. Winters

20090008748 - Ultra-thin die and method of fabricating same: In accordance with a specific embodiment, a method of processing a semiconductor substrate is disclosed whereby the substrate is thinned, and the dice formed on the substrate are singulated by a common process. Trench regions are formed on a backside of the substrate. An isotropic etch of the backside results... Agent: Larson Newman Abel Polansky & White, LLP

20090008749 - Device made of single-crystal silicon: A device made of single-crystal silicon having a first side, a second side which is situated opposite to the first side, and a third side which extends from the first side to the second side, the first side and the second side each extending in a 100 plane of the... Agent: Kenyon & Kenyon LLP

20090008750 - Seal ring for semiconductor device: A semiconductor device having a seal ring structure with high stress resistance is provided. The semiconductor device is provided with a semiconductor layer including a plurality of semiconductor elements, an insulating film formed on the semiconductor layer, and a body that passes through the insulating film and surrounds the semiconductor... Agent: Taft, Stettinius & Hollister LLP

20090008752 - Ceramic thin film on various substrates, and process for producing same: The process of Polymer Assisted Chemical Vapor Deposition (PACVD) and the semiconductor, dielectric, passivating or protecting thin films produced by the process are described. A semiconductor thin film of amorphous silicon carbide is obtained through vapor deposition following desublimation of pyrolysis products of polymeric precursors in inert or active atmosphere.... Agent: Ratnerprestia

20090008751 - Method for producing an area having reduced electrical conductivity within a semiconductor layer and optoelectronic semiconductor element: In a method for producing at least at least one area (8) with reduced electrical conductivity within an electrically conductive III-V semiconductor layer (3), a ZnO layer (1) is applied to the area (8) of the semiconductor layer (3) and subsequently annealed at a temperature preferably between 300° C. and... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20090008753 - Integrated circuit with intra-chip and extra-chip rf communication: An integrated circuit includes a first integrated circuit die having a first circuit and a first intra-chip interface and a second integrated circuit die having a second circuit and a second intra-chip interface and a remote interface, wherein the first intra-chip interface and the second intra-chip interface electro-magnetically communicate first... Agent: Garlick Harrison & Markison

20090008754 - Resin-sealed semiconductor device, leadframe with die pads, and manufacturing method for leadframe with die pads: A resin-sealed semiconductor device with built-in heat sink prevents internal bulging and cracking caused by exfoliation of a semiconductor element from the heat sink when the vapor pressure of moisture absorbed into a gap between the semiconductor element and the heat sink rises during mounting of the semiconductor device to... Agent: Mcdermott Will & Emery LLP

20090008756 - multi-chip electronic package with reduced stress: An electronic component includes lead fingers and a die paddle. A tape pad is mounted below the lead fingers and the die paddle. A first semiconductor chip is bonded onto the tape pad by a layer of first adhesive and a second semiconductor chip is bonded onto the die paddle... Agent: Edell , Shapiro & Finnan , LLC

20090008757 - Method of fabricating substrate for package of semiconductor light-emitting device: In the invention, a substrate and fabrication thereof for a package of at least one semiconductor device, such as semiconductor light-emitting devices, are disclosed. In particular, a base together with a frame supporting the base of the substrate according to the invention is formed of a thick-walled metal material, a... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20090008759 - Semiconductor device, lead frame, and manufacturing method for the lead frame: Provided is a semiconductor device having an element covered with a resin mold and a metal lead protruding from the resin mold in which a lead-tip portion thereof is entirely covered by solder plating and in which a lead-tip end surface, which is not covered by solder plating, has an... Agent: Bruce L. Adams, Esq Adams & Wilks

20090008755 - Structure and method for manufacturing smd diode frame: A structure of an SMD (surface mount device) diode frame is provided that comprises a plastic seat and a plurality of metal pins. One side of the plastic seat has a concave functional area and the other side of the plastic seat corresponding to the functional area has a plurality... Agent: Rosenberg, Klein & Lee

20090008758 - Use of discrete conductive layer in semiconductor device to re-route bonding wires for semiconductor device package: A semiconductor package assembly may include a lead frame having a die bonding pad and plurality of leads coupled to the first die bonding pad. A vertical semiconductor device may be bonded to the die bonding pad. The device may have a conductive pad electrically connected to one lead through... Agent: Joshua D. Isenberg Jdi Patent

20090008760 - Semiconductor device has encapsulant with chamfer such that portion of substrate and chamfer are exposed from encapsulant and remaining portion of surface of substrate is covered by encapsulant: A semiconductor device and a fabrication method thereof are provided. An opening having at least one slanted side is formed on a substrate. At least one chip and at least one passive component are mounted on the substrate. An encapsulant having a cutaway corner is formed on the substrate to... Agent: Law Offices Of Mikio Ishimaru

20090008761 - Integrated circuit package system with flex bump: An integrated circuit package system includes: forming a flex bump over an integrated circuit device structure, the flex bump having both a base portion and an offset portion over the base portion; forming a first ball bond of a first internal interconnect over the offset portion; and encapsulating the integrated... Agent: Law Offices Of Mikio Ishimaru

20090008763 - Semiconductor package: A semiconductor package, which may include a structure of a semiconductor package having a minimized mounting area and height. The semiconductor package may include a board, a first package comprising at least one first semiconductor chip, and disposed on the board so as to be supported, a second package comprising... Agent: Marger Johnson & Mccollom, P.C.

20090008762 - Ultra slim semiconductor package and method of fabricating the same: There is provided an ultra slim semiconductor package comprising: a multilayer thin film layer including at least one or more dielectric layers and at least one or more redistribution layers; at least one semiconductor chip electrically connected to the redistribution layer and mounted on the multilayer thin film layer; conductive... Agent: Marger Johnson & Mccollom, P.C.

20090008765 - Chip embedded substrate and method of producing the same: A method of producing a chip embedded substrate is disclosed. This method comprises a first step of mounting a semiconductor chip on a first substrate on which a first wiring is formed; and a second step of joining the first substrate with a second substrate on which a second wiring... Agent: Ladas & Parry LLP

20090008764 - Ultra-thin wafer-level contact grid array: Wafer-level chip-scaled packaging (WLCSP) features are described in a semiconductor die having a plurality of lands providing electrical connection between a surface of the semiconductor die and an active layer of the semiconductor die. Each of the plurality of lands rises above the surface no more than 10 μm. The... Agent: Slater & Matsil, L.L.P.

20090008766 - High-density fine line structure and method of manufacturing the same: A high-density fine line structure mainly includes two semiconductor devices formed on the same surface, without stacking to each other. One of the semiconductor devices is directly installed on a fine line circuit layer, and the other semiconductor device is installed on the fine line circuit layer within a dielectric... Agent: Lin & Associates Intellectual Property, Inc.

20090008767 - Integrated circuit package with sputtered heat sink for improved thermal performance: An integrated circuit package includes an integrated circuit die having a circuit surface and a back surface opposite the circuit surface. A layer of ductile material is deposited on the back surface of the integrated circuit die.... Agent: Lsi Logic Corporation Corporate Legal Department

20090008768 - Semiconductor package system with patterned mask over thermal relief: A semiconductor package system including: providing a substrate having a thermal relief thereon; depositing a mask on the substrate and the thermal relief, the mask deposited on the thermal relief and having a regular pattern to partially cover the thermal relief; and die attaching a semiconductor die over the thermal... Agent: Law Offices Of Mikio Ishimaru

20090008769 - Semiconductor module: A semiconductor module is disclosed. One embodiment provides a first electrically conductive carrier composed of a first material, a second electrically conductive carrier composed of the first material, an electrically insulating element composed of a second material, which connects the first carrier and the second carrier to one another, a... Agent: Dicke, Billig & Czaja

20090008770 - Heat dissipation plate and semiconductor device: A heat dissipation plate having a lamination of a copper layer, a molybdenum layer and a graphite layer, and outer copper layers each provided on a surface of the lamination, is disclosed. And also a semiconductor device using the heat dissipation plate is disclosed.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090008771 - Semiconductor module device, method of manufacturing the same, flat panel display, and plasma display panel: Metal foil 1 is provided on a surface of a flexible substrate 4 so as to be thermally connected to a semiconductor chip 5, the surface being opposed to the other surface that is in contact with a radiator 2, and the metal foil 1 is screwed to the radiator... Agent: Steptoe & Johnson LLP

20090008772 - Semiconductor switching module: A semiconductor switching module includes a power semiconductor element that is embodied in planar technology. In at least one embodiment, the power semiconductor element is provided with a base layer, a copper layer, and at least one power semiconductor chip that is mounted on the copper layer, and another electrically... Agent: Harness, Dickey & Pierce, P.L.C

20090008773 - Mounted semiconductor device and a method for making the same: A method for mounting a semiconductor device onto a composite substrate, including a submount and a heat sink, is described. According to one aspect of the invention, the materials for the submount and the heat sink are chosen so that the value of coefficient of thermal expansion of the semiconductor... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist P.A.

20090008774 - Semiconductor device: The present invention provides a semiconductor device comprising a semiconductor substrate, and transistors formed on the semiconductor substrate, wherein control electrode terminals constituting external electrode terminals of the transistors, and first electrode terminals which transmit output signals, are provided on a main surface of the semiconductor substrate, wherein the control... Agent: Miles & Stockbridge PC

20090008776 - Electronic component mounted body, electronic component with solder bump, solder resin mixed material, electronic component mounting method and electronic component manufacturing method: In an electronic component mounted body, an electrode of a first electronic component and an electrode of a second electronic component are electrically connected by a solder connecter, and the solder connecter contains solder and insulation filler. Alternatively, a solder bump is formed on the electrode of the electronic component,... Agent: Mcdermott Will & Emery LLP

20090008775 - Semiconductor device with welded leads and method of manufacturing the same: A semiconductor device and a manufacturing method for preventing mechanical and thermal damage to the semiconductor chip. A laser beam welds a first connection pad formed on a first external lead to a first electrode formed on the surface of the semiconductor chip. A first connection hole is formed in... Agent: Foley And Lardner LLP Suite 500

20090008777 - Inter-connecting structure for semiconductor device package and method of the same: An interconnecting structure for a semiconductor die assembly, comprising: a substrate with pre-formed wiring circuit formed therein; a die having contact pads on an active surface; an adhesive material formed over the substrate to adhere the die over the substrate, wherein the substrate includes a via through the substrate and... Agent: Kusner & Jaffe Highland Place Suite 310

20090008778 - Structure and manufactruing method of chip scale package: A Chip Scale Package (CSP) and a method of forming the same are disclosed. Single chips without the conventional ball mountings, are first attached to an adhesive-substrate (adsubstrate) composite having openings that correspond to the input/output (I/O) pads on the single chips to form a composite chip package. Ball mounting... Agent: Mou-shiung Lin

20090008779 - Composite carbon nanotube-based structures and methods for removing heat from solid-state devices: One embodiment involves an article of manufacture that includes: a copper substrate plug with a front surface and a back surface; a catalyst on top of a single surface of the copper substrate plug; and a thermal interface material on top of the single surface of the copper substrate plug.... Agent: Morgan, Lewis & Bockius, LLP.

20090008780 - Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods: Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces having such interconnects are disclosed herein. One aspect of the invention is directed toward a method for manufacturing a microelectronic workpiece having a plurality of microelectronic dies. The individual dies include an integrated circuit and a terminal electrically coupled to... Agent: Perkins Coie LLP Patent-sea

20090008781 - Semiconductor device: A semiconductor device structure includes a substrate, a first conductive layer over the substrate, a second conductive layer between the first conductive layer and the substrate and extending over the sidewalls of the first conductive layer, a dielectric layer between the second conductive layer and the substrate, a cap layer... Agent: Jianq Chyun Intellectual Property Office

20090008782 - Integrated circuit structure and manufacturing method thereof: An integrated circuit structure is provided. The integrated circuit structure includes a dielectric layer, a conductive structure, a low-k dielectric layer and a plug. The conductive structure is disposed in the dielectric layer, having a recess portion. The low-k dielectric layer is disposed on the dielectric layer. The plug is... Agent: J C Patents, Inc.

20090008783 - Semiconductor device with pads of enhanced moisture blocking ability: A semiconductor device is provided having a pad with an improved moisture blocking ability. The semiconductor device has: a circuit portion including a plurality of semiconductor elements formed on a semiconductor substrate; lamination of insulator covering the circuit portion, including a passivation film as an uppermost layer having openings; ferro-electric... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090008784 - Power semiconductor substrates with metal contact layer and method of manufacture thereof: A power semiconductor substrate comprising an insulating planar base, at least one conductor track and at least one contact area as part of the conductor track, wherein a layer of a metallic material is disposed on the contact area by means of pressure sintering. The associated method comprises the steps... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20090008785 - Etch process for improving yield of dielectric contacts on nickel silicides: The embodiments of the invention generally relate to an etching process, and more particularly to an etch processing for improving the yield of dielectric contacts on nickel silicides. An oxygen-free feedgas is used in an etching process to reduce or eliminate residuals, including oxidation and consumption of the silicide layer,... Agent: Greenblum & Bernstein, P.L.C

20090008786 - Sputtering target: The present invention provides a sputtering target comprising aluminum and one or more alloying elements including Ni, Co, Ti, V, Cr, Mn, Mo, Nb, Ta, W, and rare earth metals (REM). The addition of very small amounts of alloying element to pure aluminum and aluminum alloy target improves the uniformity... Agent: Wegman, Hessler & Vanderburg

20090008787 - High efficiency solar cell fabrication: A method of forming a contact structure and a contact structure so formed is described. The structure contacts an underlying layer of a semiconductor junction, wherein the junction comprises the underlying layer of a semiconductor material and is separated from an overlying layer of semiconductor material by creating an undercut... Agent: Frommer Lawrence & Haug

20090008788 - Method of forming a semiconductor device: A method of forming a semiconductor device. A first wiring level is formed on a top surface of a substrate. The first wiring level includes alternating layers of a first dielectric material and a second dielectric material. The layers of the first dielectric material includes at least two layers of... Agent: Schmeiser, Olsen & Watts

20090008791 - Circuit structure with low dielectric constant regions: A method for manufacturing a circuit includes the step of providing a first wiring level comprising first wiring level conductors separated by a first wiring level dielectric material. A first dielectric layer with a plurality of interconnect openings and a plurality of gap openings is formed above the first wiring... Agent: Ryan, Mason & Lewis, LLP

20090008789 - Method of manufacturing micro tunnel-junction circuit and micro tunnel-junction circuit: A method of manufacturing a micro tunnel-junction circuit capable of remarkably relieving the limitation of a circuit pattern to be manufactured and remarkably relieving the limitation of a metallic material to be used. In the method, a three-layer structure is formed by laminating a first metal, an insulator, and a... Agent: Birch Stewart Kolasch & Birch

20090008790 - Semiconductor device having through electrode and method of fabricating the same: A semiconductor device having a through electrode and a method of fabricating the same are disclosed. In one embodiment, a semiconductor device includes a first insulating layer formed on a semiconductor substrate. A wiring layer having a first aperture to expose a portion of the first insulating layer is formed... Agent: Marger Johnson & Mccollom, P.C.

20090008792 - Three-dimensional chip-stack package and active component on a substrate: The 3D chip-stack package comprises a component-embedded plate and a side IC. The PCB has a plurality of conductive contacts. The component-embedded plate comprises a dielectric layer; an active component embedded in the dielectric layer, one surface of each active component exposed outside the dielectric layer, the active components having... Agent: Harness, Dickey & Pierce, P.L.C

20090008797 - Bond pad rerouting element, rerouted semiconductor devices including the rerouting element, and assemblies including the rerouted semiconductor devices: A rerouting element for a semiconductor device that includes a dielectric film that carries conductive vias, conductive elements, and contact pads. The conductive vias are positioned at locations that correspond to the locations of bond pads of a semiconductor device with which the rerouting element is to be used. The... Agent: Trask Britt, P.C./ Micron Technology

20090008796 - Copper on organic solderability preservative (osp) interconnect: Provided is a semiconductor package, and a method for constructing the same, including a first substrate, a first semiconductor chip attached to the first substrate, and a first copper wire. At least one of the first substrate and the first semiconductor chip has an Organic Solderability Preservative (OSP) material coated... Agent: Sughrue Mion, PLLC

20090008799 - Dual mirror chips, wafer including the dual mirror chips, multi-chip packages, methods of fabricating the dual mirror chip, the wafer, and multichip packages, and a method for testing the dual mirror chips: Example embodiments provide a dual mirror chip, a wafer including the dual mirror chip, multi-chip packages and methods of fabricating the same. Example embodiments also provide a method of testing the dual mirror chip. According to example embodiments, a dual mirror chip may include a first type chip with a... Agent: Harness, Dickey & Pierce, P.L.C

20090008793 - Semiconductor device: A description is given of a device comprising a first semiconductor chip, a molding compound layer embedding the first semiconductor chip, a first electrically conductive layer applied to the molding compound layer, a through hole arranged in the molding compound layer, and a solder material filling the through hole.... Agent: Dicke, Billig & Czaja

20090008798 - Semiconductor device suitable for a stacked structure: A semiconductor device is provided that forms a three-dimensional semiconductor device having semiconductor devices stacked on one another. In this semiconductor device, a hole is formed in a silicon semiconductor substrate that has an integrated circuit unit and an electrode pad formed on a principal surface on the outer side.... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090008795 - Stackable microelectronic device carriers, stacked device carriers and methods of making the same: A method of manufacturing a microelectronic package. The method includes the steps of attaching at least one microelectronic element to a tape having upper terminals projecting upwardly from an upper surface of a dielectric layer, so that top surfaces of the terminals are disposed coplanar with or above a top... Agent: Tessera Lerner David Et Al.

20090008794 - Thickness indicators for wafer thinning: A wafer thinning system and method are disclosed that includes grinding away substrate material from a backside of a semiconductor device. A current change is detected in a grinding device responsive to exposure of a first set of device structures through the substrate material, where the grinding is stopped in... Agent: Slater & Matsil, L.L.P.

20090008800 - Flip chip mounting body, flip chip mounting method and flip chip mounting apparatus: The flip chip mounted body of the present invention includes: a circuit board (213) having a plurality of connection terminals (211); a semiconductor chip (206) having a plurality of electrode terminals (207) that are disposed opposing the connection terminals (211); and a porous sheet (205) having a box shape that... Agent: Hamre, Schumann, Mueller & Larson P.C.

20090008801 - Semiconductor device and method for fabricating the same: This invention discloses a semiconductor device and a method for fabricating the same. The method includes providing a flexible carrier board having a first surface and a second surface opposite thereto; forming a metal lead layer and a first heat dissipating metal layer on the first surface of the flexible... Agent: Edwards Angell Palmer & Dodge LLP

20090008802 - Flexible carrier for high volume electronic package fabrication: An assembly for producing partially packaged semiconductor devices is provided. In one embodiment, the assembly includes a magnetic plate; a flexible substrate disposed adjacent the magnetic plate and having two surfaces; a nonstick coating disposed on one surface of the flexible substrate thereby exposing a nonstick surface; and a tape... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20090008803 - Layout of dummy patterns: A layout of dummy patterns on a wafer having a plurality of pads disposed thereon is described. The layout of the dummy patterns includes having a plurality of dummy patterns spaced apart from each other and enclosing the plurality of the pads. The plurality of dummy patterns also include a... Agent: Jianq Chyun Intellectual Property Office

20090008804 - Power semiconductor package: A power semiconductor package that includes a semiconductor die having at least two power electrodes and a conductive clip electrically and mechanically coupled to each power electrode.... Agent: Ostrolenk Faber Gerb & Soffen

20090001339 - Chemical mechanical polishing slurry composition for polishing phase-change memory device and method for polishing phase-change memory device using the same: A slurry composition for chemical mechanical polishing (CMP) of a phase-change memory device is provided. The slurry composition comprises deionized water, a nitrogenous compound, and optionally abrasive particles, an oxidizing agent, or a combination thereof. The slurry composition can polish a phase-change memory device at a high rate, can achieve... Agent: Summa, Allan & Additon, P.A.

20090001340 - Chemical mechanical polishing slurry composition for polishing phase-change memory device and method for polishing phase-change memory device using the same: A slurry composition for chemical mechanical polishing (CMP) of a phase-change memory device is provided. The slurry composition comprises deionized water and iron or an iron compound. The slurry composition can achieve high polishing rate on a phase-change memory device and improved polishing selectivity between a phase-change memory material and... Agent: Summa, Allan & Additon, P.A.

20090001336 - Phase change material based temperature sensor: A block of phase change material located in a semiconductor chip is reset to an amorphous state. The block of phase change material may be connected to an internal resistance measurement circuit that can transmit the measured resistance data to input/output pads either in an analog output format or in... Agent: Scully, Scott, Murphy & Presser, P.C.

20090001337 - Phase change memory cell with vertical transistor: A memory cell in an integrated circuit is fabricated in part by forming a lower electrode feature, an island, a sacrificial feature, a gate feature, and a phase change feature. The island is formed on the lower electrode feature and has one or more sidewalls. It comprises a lower doped... Agent: Ryan, Mason & Lewis, LLP

20090001338 - Seek-and-scan probe memory devices with nanostructures for improved bit size and resistance contrast when reading and writing to phase-change media: A seek-and-scan probe memory device comprising a patterned capping layer over a phase-change media, where the patterned capping layer defines the bit locations on the phase-change media. The patterned capping layer may be formed from self-assembled structures. In other embodiments, nanostructures are formed on the bottom electrode below the phase-change... Agent: Seth Kalson C/o Intellevate, LLC

20090001347 - 3d r/w cell with reduced reverse leakage: A nonvolatile memory device includes a semiconductor diode steering element, and a semiconductor read/write switching element.... Agent: Foley And Lardner LLP Suite 500

20090001343 - Memory cell that employs a selectively deposited reversible resistance-switching element and methods of forming the same: In some aspects, a method of forming a memory cell is provided that includes (1) forming a first conductor above a substrate; (2) forming a diode above the first conductor; (3) forming a reversible resistance-switching element above the first conductor using a selective deposition process; and (4) forming a second... Agent: Dugan & Dugan, PC

20090001345 - Memory cell that employs a selectively deposited reversible resistance-switching element and methods of forming the same: In some aspects, a method of forming a memory cell is provided that includes (1) forming a first conductor above a substrate; (2) forming a diode above the first conductor; (3) forming a reversible resistance-switching element above the first conductor using a selective deposition process; and (4) forming a second... Agent: Dugan & Dugan, PC

20090001342 - Memory cell that employs a selectively grown reversible resistance-switching element and methods of forming the same: In some aspects, a method of forming a memory cell is provided that includes (1) forming a first conductor above a substrate; (2) forming a reversible resistance-switching element above the first conductor using a selective growth process; (3) forming a diode above the first conductor; and (4) forming a second... Agent: Dugan & Dugan, PC

20090001344 - Memory cell that employs a selectively grown reversible resistance-switching element and methods of forming the same: In some aspects, a method of forming a memory cell is provided that includes (1) forming a first conductor above a substrate; (2) forming a reversible resistance-switching element above the first conductor using a selective growth process; (3) forming a diode above the first conductor; and (4) forming a second... Agent: Dugan & Dugan, PC

20090001346 - Non-volatile polymer bistability memory device: The present invention relates to non-volatile memory device utilizing multi-layered self-assembled Ni1-xFex nanocrystalline arrays embedded in a polymer thin film without source and drain regions and the fabrication method thereof. It is possible to fabricate nano-crystallines more simply than hitherto method according to the present invention. More particularly, it is... Agent: Volentine & Whitt PLLC

20090001341 - Phase change memory with tapered heater: Another embodiment of the present invention includes a phase change memory (PCM) structure configurable for use as a nonvolatile storage element. The element includes at least one bottom electrode; at least one phase change material layer on at least a portion of an upper surface of the bottom electrode; and... Agent: Ryan, Mason & Lewis, LLP

20090001348 - Semiconductor device: A programmable semiconductor device has a switch element in an interconnection layer, wherein in at least one of the inside of a via, interconnecting a wire of a first interconnection layer and a wire of a second interconnection layer, a contact part of the via with the wire of the... Agent: Young & Thompson

20090001349 - Light-emitting nanocomposite particles: A method of making an inorganic light emitting layer includes combining a solvent for semiconductor nanoparticle growth, a solution of core/shell quantum dots, and semiconductor nanoparticle precursor(s); growing semiconductor nanoparticles to form a crude solution of core/shell quantum dots, semiconductor nanoparticles, and semiconductor nanoparticles that are connected to the core/shell... Agent: Frank Pincelli Patent Legal Staff

20090001350 - High hole mobility semiconductor device: One embodiment of the invention includes a high hole mobility p-channel GaAsySb1-y quantum well with a silicon substrate and an InxAl1-xAs barrier layer.... Agent: Trop Pruner & Hu, PC

20090001351 - Insb thin film magnetic sensor and fabrication method thereof: The present invention relates to a thin film lamination to be used in a micro InSb thin film magnetic sensor which can directly detect a magnetic flux density with high sensitivity and has small power consumption and consumption current, and the InSb thin film magnetic sensor. The InSb thin film... Agent: Birch Stewart Kolasch & Birch

20090001352 - Non-volatile memory device, method of manufacturing the same, and semiconductor package: Provided is a non-volatile memory device that can be highly integrated and may have a high reliability. Some embodiments of the non-volatile memory device include a first doping layer having a first conductivity on a substrate, a semiconductor pillar extending from the first doping layer on the substrate in an... Agent: Myers Bigel Sibley & Sajovec

20090001356 - Electronic devices having a solution deposited gate dielectric: An electronic device comprises a solution deposited gate dielectric, the gate dielectric comprising a dielectric material formed by polymerizing a composition comprising a polymerizable resin and zirconium oxide nanoparticles.... Agent: 3m Innovative Properties Company

20090001354 - Heterocycloalkyl-substituted naphthalene-based tetracarboxylic diimide compounds as n-type semiconductor materials for thin film transistors: A thin film transistor comprises a layer of organic semiconductor material comprising a tetracarboxylic diimide naphthalene-based compound having, attached to one or both of the imide nitrogen atoms, a substituted or unsubstituted heterocycloalkyl ring system. Such transistors can further comprise spaced apart first and second contacts or electrodes in contact... Agent: Andrew J. Anderson Patent Legal Staff

20090001353 - Heteropyrene-based semiconductor materials for electronic devices and methods of making the same: A thin layer of organic semiconductor material comprising a comprising an organic semiconductor thin film material is disclosed in which the thin film material substantially comprises a heteropyrene compound or derivative. In one embodiment, a thin film transistor comprises a layer of the organic semiconductor material. Further disclosed is a... Agent: Andrew J. Anderson Patent Legal Staff

20090001357 - Novel condensed polycyclic aromatic compound and use thereof: The object of the present invention to provide an organic semiconductor device comprising an organic semiconductor material satisfying both the requirement of high electron field-effect mobility and high on/off current ratio. The present invention provides a novel condensed polycyclic aromatic compound satisfying both the high electron field-effect mobility and high... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090001360 - Organic el display and method for producing the same: The present invention provides an organic electroluminescence display having an organic EL element and a thin film field-effect transistor formed on the organic EL element, wherein an electrically conductive etching protective layer which is electrically connected to an upper electrode is disposed between the upper electrode and the thin film... Agent: Birch Stewart Kolasch & Birch

20090001358 - Organic light emitting device and method of manufacturing the same: An organic light emitting device and a method of manufacturing the same are disclosed. The organic light emitting device includes a substrate, a gate electrode on the substrate, a first insulating film insulating the gate electrode, a semiconductor layer positioned opposite to the gate electrode, a second insulating film insulating... Agent: Ked & Associates, LLP

20090001362 - Organic thin film transistor and manufacturing process the same: Described is a SIT type organic thin film transistor in which gate electrodes are formed as a conductive layer where a plurality of wire-shaped conductive materials are arranged in such a manner that a distance to the nearest wire is 100 nm or less at any point in the space... Agent: Young & Thompson

20090001355 - Polymeric material, method of forming the polymeric material, and method of forming a thin film using the polymeric material: A method of forming a polymeric material with a pendant polycyclic aromatic compound precursor includes forming a polycyclic aromatic compound precursor (e.g., a pentacene precursor) including at least one polymerizable functionality, and polymerizing the polymerizable functionality to form the polymeric material with the pendant precursor.... Agent: Mcginn Intellectual Property Law Group, PLLC

20090001359 - Redox systems for stabilization and life extension of polymer semiconductors: The invention relates to an organic electronic component with improved voltage stability and a method for producing it, wherein the voltage stability in the device is improved by targeted addition of additives and/or by formation of an interlayer. The invention for the first time makes it possible to stabilize organic... Agent: Carella, Byrne, Bain, Gilfillan, Cecchi, Stewart & Olstein

20090001361 - Thin-film transistor device and a method for manufacturing the same: The present invention provides a method of manufacturing a thin-film transistor device. This method enables improvement in performance of a complementary TFT circuit incorporated in a thin- and light-weighted image display device or a flexible electronic device and also enables reduction of power consumption and reduction of manufacturing cost of... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090001363 - Zinc oxide semiconductor and method of manufacturing the same: There are provided a method of manufacturing a zinc oxide semiconductor, and a zinc oxide semiconductor manufactured using the method. A metal catalyst layer is formed on a zinc oxide thin film that has an electrical characteristic of a n-type semiconductor, and a heat treatment is performed thereon so that... Agent: Townsend And Townsend And Crew, LLP

20090001369 - Evaluation method for interconnects interacted with integrated-circuit manufacture: A design and evaluation method for interconnect wires of integrated circuits is provided to detect, analyze and predict response of interconnect layout to integrated-circuit manufacture processes.... Agent: Wallace W. Lin

20090001365 - Memory card fabricated using sip/smt hybrid technology: A portable memory card formed from a multi-die assembly, and methods of fabricating same, are disclosed. One such multi-die assembly includes an LGA SiP semiconductor package and a leadframe-based SMT package both affixed to a PCB. The multi-die assembly thus formed may be encased within a standard lid to form... Agent: Vierra Magen/sandisk Corporation

20090001370 - Method and apparatus for extracting properties of interconnect wires and dielectrics undergoing planarization process: The present invention provides a novel solution for simultaneously extracting the properties of the interconnect wires and the inter-wire dielectrics exposed to the IC planarization process.... Agent: Wallace W. Lin

20090001364 - Semiconductor device: Plural I/O cells (14) having electrode pads for wire bonding (13) are disposed with spaces (55) between them in the vicinity of a corner of an I/O region (11) of a semiconductor substrate (10), and power supply separation cells (16) not to be wire bonded, on which ESD (electrostatic discharge)... Agent: Mcdermott Will & Emery LLP

20090001368 - Semiconductor device including semiconductor evaluation element, and evaluation method using semiconductor device: Provided are a semiconductor evaluation element capable of analytically estimating the amount of DC variation of a MOS transistor which is caused by formed contacts, and an evaluation circuit and an evaluation method using the semiconductor evaluation element. The semiconductor evaluation element such as a MOS transistor includes: a gate;... Agent: Mcginn Intellectual Property Law Group, PLLC

20090001367 - Semiconductor device, method of fabricating the same, stacked module including the same, card including the same, and system including the stacked module: A semiconductor device in which a plurality of chips can be reliably stacked without reducing integration thereof. The semiconductor device includes a substrate on which a circuit is provided. Pads are disposed on the substrate for testing the circuit. At least one terminal is provided on the substrate. First conductors... Agent: Marger Johnson & Mccollom, P.C.

20090001366 - Wafer arrangement and method for manufacturing a wafer arrangement: A wafer arrangement in accordance with an embodiment of the invention includes a wafer having a plurality of dice, wherein at least some of the dice have a first connection, and at least one contact pad formed at the wafer edge, wherein a plurality of first connections are coupled by... Agent: Slater & Matsil, L.L.P.

20090001371 - Blocking pre-amorphization of a gate electrode of a transistor: A technique is presented which provides for a selective pre-amorphization of source/drain regions of a transistor while preventing pre-amorphization of a gate electrode of the transistor. Illustrative embodiments include the formation of a pre-amorphization implant blocking material over the gate electrode. Further illustrative embodiments include inducing a strain in a... Agent: J. Mike Amerson, Williams, Morgan & Amerson, P.C.

20090001372 - Efficient cooling of lasers, leds and photonics devices: The present invention provides an optoelectronic device comprising a heat source and a heat transfer fluid. The present invention also provides a method of preparing an optoelectronic device, which comprises (i) providing a heat source, and (ii) filling a space in the vicinity of the heat source with a heat... Agent: Fay Sharpe LLP

20090001373 - Electrode of aluminum-alloy film with low contact resistance, method for production thereof, and display unit: Disclosed herein are an electrode of aluminum alloy film, a method for production thereof, and a display unit provided therewith, said electrode exhibiting a low electric resistance when in contact with a transparent oxide conductive film even though the aluminum alloy contains a less amount of alloying element than usual.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090001375 - Light-emitting device: In a light-emitting device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a... Agent: Eric Robinson

20090001376 - Poly crystalline silicon semiconductor device and method of fabricating the same: Provided are a poly crystalline silicon semiconductor device and a method of fabricating the same. Portions of a silicon layer except for gates are removed to reduce a parasitic capacitance caused from the silicon layer existing on gate bus lines. The silicon layer exists under the gates only, thus the... Agent: Buchanan, Ingersoll & Rooney PC

20090001374 - Tft substrate, reflective tft substrate and method for manufacturing these substrates: A TFT substrate 1001 comprises: a glass substrate 1010; a gate electrode 1023 and a gate wire 1024 insulated by having their top surfaces covered with a gate insulating film 1030 and by having their side surfaces covered with an interlayer insulating film 1050; an n-type oxide semiconductor layer 1040... Agent: Millen, White, Zelano & Branigan, P.C.

20090001377 - Pixel structure and fabrication method thereof: A pixel structure and a fabrication method thereof are provided, wherein a semiconductor pattern and a data line are defined simultaneously by performing a half-tone or grey-tone masking process. In addition, a self-alignment manner is further adopted to fabricate a lightly doped region with symmetric lengths on two sides of... Agent: Jianq Chyun Intellectual Property Office

20090001378 - Display device and driving method thereof: A display device in which not only a variation in a current value due to a threshold voltage but also a variation in a current value due to mobility are prevented from influencing luminance with respect to all the levels of grayscale to be displayed. After applying an initial potential... Agent: Fish & Richardson P.C.

20090001379 - Semiconductor device: In a semiconductor device having a plurality of thin film transistors and matrix wiring lines formed on a substrate, the matrix wiring lines are electrically connected via resistors in order to prevent electrostatic destructions during a panel manufacture process and improve a manufacture yield.... Agent: Fitzpatrick Cella Harper & Scinto

20090001380 - Thin film transistor, method of fabricating the same, organic light emitting diode display device including the same and method of fabricating the same: A thin film transistor includes a substrate, a semiconductor layer disposed on the substrate, including a channel region and source and drain regions and crystallized using a metal catalyst, a gate electrode disposed to correspond to a predetermined region of the semiconductor layer, a gate insulating layer disposed between the... Agent: Stein, Mcewen & Bui, LLP

20090001381 - Semiconductor device: A semiconductor device includes a substrate, laminated layers provided on the substrate. The laminated layers include an AlGaN barrier layer as an uppermost layer. A gate electrode is provided in a channel region of the laminated layers. A source electrode and a drain electrode are provided so as to face... Agent: Rabin & Berdo, PC

20090001383 - Doped diamond led devices and associated methods: LED devices and methods for making such devices are provided. One such method may include forming epitaxially a substantially single crystal SiC layer on a substantially single crystal Si wafer, forming epitaxially a substantially single crystal diamond layer on the SiC layer, doping the diamond layer to form a conductive... Agent: Thorpe North & Western, LLP.

20090001384 - Group iii nitride semiconductor hfet and method for producing the same: Provided is an HFET exhibiting reduced buffer leakage current. The HFET of the present invention includes an SiC substrate, an AlN layer, a graded AlGaN layer, a GaN layer, an AlGaN layer (Al compositional proportion: 20%), a source electrode, a gate electrode, and a drain electrode, wherein the AlN layer,... Agent: Mcginn Intellectual Property Law Group, PLLC

20090001382 - Schottky barrier diode and method for making the same: A schottky diode includes a SiC substrate which has a first surface and a second surface facing away from the first surface, a semiconductor layer which is formed on the first surface of the SiC substrate, a schottky electrode which is in contact with the semiconductor layer, and an ohmic... Agent: Hamre, Schumann, Mueller & Larson, P.C.

20090001385 - Apparatus and method for modulating photon output of a quantum dot light emitting device: An apparatus is provided for modulating the photon output of a plurality of free standing quantum dots. The apparatus comprises a first electron injection layer (210, 310, 410) disposed between a first electrode (212, 312, 412) and a layer (208, 308, 408) of the plurality of free standing quantum dots.... Agent: Ingrassia Fisher & Lorenz, P.C. (mot)

20090001387 - Method for manufacturing semiconductor device: To provide a method for manufacturing a large semiconductor device which easily operates normally and has excellent current characteristics. A first single-crystal semiconductor layer is provided over an insulating substrate. Then, the first single-crystal semiconductor layer is processed into an island shape. After that, a second single-crystal semiconductor layer is... Agent: Fish & Richardson P.C.

20090001386 - Semiconductor device and method of manufacturing the same: The present invention provides a semiconductor device realizing reduced occurrence of a defect such as a crack at the time of adhering elements to each other. The semiconductor device includes a first element and a second element adhered to each other. At least one of the first and second elements... Agent: Rader Fishman & Grauer PLLC

20090001388 - Semiconductor display device and method for manufacturing the same: The semiconductor display unit 1 includes: a printed circuit board 3 with a display section 2 formed thereon; a protection member 4; a embankment member 5; X lines 6; and Y lines 7. The embankment member 5 is composed of silicon resin which is capable of repelling epoxy resin constituting... Agent: Rabin & Berdo, PC

20090001389 - Hybrid vertical cavity of multiple wavelength leds: A solid state device (200) for a hybrid vertical cavity of multiple wavelength LEDs is provided. The solid state device can include a hybrid vertical cavity formed by a cascading of a first sub-cavity (210) and a second sub-cavity (220) to share a mirror (350) within the solid state device.... Agent: Akerman Senterfitt

20090001392 - Light emitting device: A light emitting device is provided. The light emitting device comprises: a package body comprising a multilayer cavity; a first light emitting part comprising a first light emitting device in a first cavity of a first layer area of the multilayer cavity; and a second light emitting part comprising a... Agent: Birch Stewart Kolasch & Birch

20090001391 - Light emitting panel, display device and light source device: A light emitting panel includes a plurality of light emitting element arrays each of which has a plurality of light emitting elements arranged in a plane. The light emitting element arrays are configured so that an arrangement plane of the light emitting elements of one light emitting element array is... Agent: Panitch Schwarze Belisario & Nadel LLP

20090001390 - Matrix material including an embedded dispersion of beads for a light-emitting device: A light-emitting device has a light source disposed on a support. A matrix material including a dispersion of beads is disposed over the light source. The refractive index of the beads is different from the refractive index of the matrix material. The light source may include an LED. The matrix... Agent: Carr & Ferrell LLP

20090001393 - Multi-light emitting diode package: A multi-LED package includes a heat sink including a primary slug and a secondary slug separated from each other, a primary LED chip mounted on the primary slug, one or more secondary LED chips mounted on the secondary slug, a lead frame structure electrically wired to the primary and secondary... Agent: H.c. Park & Associates, PLC

20090001394 - Semiconductor structure combination for epitaxy of semiconductor optoelectronic device: The invention discloses a semiconductor structure combination for the epitaxy of a semiconductor optoelectronic device and manufacture thereof. The semiconductor structure combination according to the invention includes a substrate and a semiconductor material. The substrate has an upper surface and a recess formed on the upper surface. The sidewalls of... Agent: Birch Stewart Kolasch & Birch

20090001395 - Light emitting diode device and fabrication method thereof: The invention provides a light emitting diode device and a fabrication method thereof. The device comprises a pair of electrodes and one of which is electrically contacted with a holder, an LED chip fixed in the holder, a wrapping material formed in the holder and covering the LED chip, and... Agent: Quintero Law Office, PC

20090001397 - Method and device for providing circumferential illumination: A light source device, comprising at least one light emitting element, an optical for distributing light emitted by the light emitting element(s) into a waveguide material which is in optical communication with the optical funnel, and at least one reflector contacting the waveguide material for redirecting light back into the... Agent: Martin D. Moynihan Prtsi, Inc.

20090001399 - Optical designs for high-efficacy white-light emitting diodes: A method for increasing the luminous efficacy of a white light emitting diode (WLED), comprising introducing optically functional interfaces between an LED die and a phosphor, and between the phosphor and an outer medium, wherein at least one of the interfaces between the phosphor and the LED die provides a... Agent: Gates & Cooper LLP Howard Hughes Center

20090001396 - Semiconductor element mount, semiconductor device, imaging device, light emitting diode component and light emitting diode: A collective substrate has through-holes. The through-holes each have an interior surface including taper surfaces which are tapered as having an opening size progressively decreasing from a main surface and an external connection surface toward a minimum size hole portion. A semiconductor element mount includes an insulative member cut out... Agent: Rabin & Berdo, PC

20090001398 - Semiconductor light emitting device and method of manufacturing the same: There are provided a semiconductor light emitting device that can be manufactured by a simple process and has excellent light extraction efficiency and a method of manufacturing a semiconductor light emitting device that has high reproducibility and high throughput. A semiconductor light emitting device having a substrate and a lamination... Agent: Mcdermott Will & Emery LLP

20090001400 - Two dimensional light source using light emitting diode and liquid crystal display device using the two dimensional light source: A two-dimensional light source includes a base substrate having holes, wires disposed on a lower surface of the base substrate, a light emitting diode (LED) chip disposed on an upper surface of the base substrate, plugs that connect two electrodes of the LED chip to the wires through the holes,... Agent: Cantor Colburn, LLP

20090001403 - Inductively excited quantum dot light emitting device: A method and apparatus is provided for activating a layer (208, 308, 408) of free standing quantum dots. The apparatus comprises a first coil (216, 316, 426) disposed contiguous to a light emitting device (200, 300, 400, 612) including the free standing quantum dots. An alternating current is supplied to... Agent: Ingrassia Fisher & Lorenz, P.C. (mot)

20090001405 - Light emitting device package and manufacturing method thereof: Provided is a light emitting device package. The light emitting device package comprises a base substrate, a frame, and a light emitting device. The base substrate comprises a plurality of electrode pads. The frame is formed of silicon, attached on the base substrate, and has an opening. The light emitting... Agent: Birch Stewart Kolasch & Birch

20090001406 - Light-emitting device and method for fabricating same: An LED chip is mounted on a submount, and submount electrodes are formed to constitute a submount member. A light-emitting unit is configured by mounting the submount member on a flat substrate. A lead frame member having a lead frame electrode is configured using a lead frame and a resin... Agent: Mcginn Intellectual Property Law Group, PLLC

20090001402 - Semiconductor element and method of making the same: A semiconductor light-emitting element includes a nitride semiconductor layer with an active layer. The nitride semiconductor layer has a main surface formed with a first bonding layer made of gold or an alloy of gold and tin. The first bonding layer is bonded to a second bonding layer made of... Agent: Hamre, Schumann, Mueller & Larson, P.C.

20090001404 - Semiconductor light emitting device, process for producing the same, and led illuminating apparatus using the same: The present invention provides a semiconductor light emitting device comprising: a wiring substrate in which a pair of positive and negative electrodes are formed on a front surface of an insulating substrate, an LED arranged over one of the electrodes, or arranged to stretch over both of the electrodes and... Agent: Birch Stewart Kolasch & Birch

20090001401 - Semiconductor light emitting diode: Provided is a semiconductor light emitting diode, in which a plurality of upper electrodes is formed on a surface of an upper doping layer or an emission layer and at least one lower electrode is formed on a surface of a lower doping layer or a substrate in a silicon-based... Agent: Ladas & Parry LLP

20090001407 - Semiconductor light-emitting device, manufacturing method thereof, and lamp: There is provided a semiconductor light-emitting device having excellent light extraction efficiency, a manufacturing method thereof, and a lamp. A semiconductor light-emitting device 1 includes: an n-type semiconductor layer 12, a light-emitting layer 13, a p-type semiconductor layer 14, a titanium oxide-based conductive film layer 15, and a translucent film... Agent: Sughrue Mion, PLLC

20090001408 - Method for forming a semiconductor light-emitting device and a semiconductor light-emitting device: A semiconductor light-emitting device with a new layer structure is disclosed, where the current leaking path is not caused to enhance the current injection efficiency within the active layer. The device provides a mesa structure containing active layer and a p-type lower cladding layer on a p-type substrate and a... Agent: Smith, Gambrell & Russell

20090001409 - Semiconductor light emitting device and illuminating device using it: The semiconductor light emitting device of the present invention comprises an n-type nitride semiconductor layer 3 formed on one surface side of a single-crystal substrate 1 for epitaxial growth through a first buffer layer 2, an emission layer 5 formed on a surface side of the n-type nitride semiconductor layer... Agent: Edwards Angell Palmer & Dodge LLP

20090001410 - Driver circuit and electrical power conversion device: An electrical power conversion device includes: a switching element in which a principal electrical current flows in a direction from a second electrode towards a first electrode based upon a voltage being applied to a control electrode; a voltage control circuit that controls the voltage that is applied to the... Agent: Crowell & Moring LLP Intellectual Property Group

20090001411 - Semiconductor device: A semiconductor device includes a spaced-channel IGBT and an antiparalell diode that are formed in a same semiconductor substrate. The IGBT includes a base layer and insulated gate trenches by which the base layer is divided into a body region connected to an emitter and a floating region disconnected from... Agent: Posz Law Group, PLC

20090001412 - Photodetector and production method thereof: The invention offers a photodetector that has an N-containing InGaAs-based absorption layer having a sensitivity in the near-infrared region and that suppresses the dark current and a production method thereof. The photodetector is provided with an InP substrate 1, an N-containing InGaAs-based absorption layer 3 positioned above the InP substrate... Agent: Venable LLP

20090001416 - Growth of indium gallium nitride (ingan) on porous gallium nitride (gan) template by metal-organic chemical vapor deposition (mocvd): Si-doped porous GaN is fabricated by UV-enhanced Pt-assisted electrochemical etching and together with a low-temperature grown buffer layer are utilized as the template for InGaN growth. The porous network in GaN shows nanostructures formed on the surface. Subsequent growth of InGaN shows that it is relaxed on these nanostructures as... Agent: Saile Ackerman LLC

20090001413 - Method of doping field-effect-transistors (fets) with reduced stress/strain relaxation and resulting fet devices: A method for fabricating a FET transistor for an integrated circuit by the steps of forming recesses in a substrate on both sides of a gate on the substrate, halo/extension ion implanting into the recesses, and filling the recesses with embedded strained layers comprising dopants for in-situ doping of the... Agent: Edward W. Brown

20090001415 - Multi-gate transistor with strained body: A semiconductor device comprises a semiconductor body having a top surface and laterally opposite sidewalls formed on a substrate, wherein the semiconductor body comprises a silicon alloy core having a top surface and laterally opposite sidewalls formed on a silicon fin structure, and a silicon shell layer formed on the... Agent: Intel Corporation C/o Intellevate, LLC

20090001419 - Non-volatile memory devices and methods of fabricating the same: Provided are non-volatile memory devices that may realize high integration and have high reliability. A plurality of first semiconductor layers are stacked on a substrate. A plurality of second semiconductor layers are interposed between the plurality of first semiconductor layers, respectively, and are recessed from one end of each of... Agent: Myers Bigel Sibley & Sajovec

20090001418 - Semiconductor device and method for fabricating the same: A method for fabricating a transistor, the method includes forming a gate over a substrate to form a first resultant structure, forming a gate spacer at first and second sidewalls of the gate, etching portions of the substrate proximate to the gate spacer to form a recess in a source/drain... Agent: Townsend And Townsend And Crew, LLP

20090001420 - Semiconductor device and method for manufacturing semiconductor device: A semiconductor device includes a gate electrode disposed on a semiconductor substrate and source/drain regions disposed at both sides of the gate electrode, the source/drain regions being formed by implanting impurities. The source/drain regions include an epitaxial layer formed by epitaxially growing a semiconductor material having a different lattice constant... Agent: Sonnenschein Nath & Rosenthal LLP

20090001414 - Structures and methods of forming sige and sigec buried layer for soi/sige technology: Semiconductor structures and methods of forming semiconductor structures, and more particularly to structures and methods of forming SiGe and/or SiGeC buried layers for SOI/SiGe devices. An integrated structure includes discontinuous, buried layers having alternating Si and SiGe or SiGeC regions. The structure further includes isolation structures at an interface between... Agent: Andrew M. Calderon Greenblum& Bernstein, P.l.c

20090001417 - Structures and methods of forming sige and sigec buried layer for soi/sige technology: Semiconductor structures and methods of forming semiconductor structures, and more particularly to structures and methods of forming SiGe and/or SiGeC buried layers for SOI/SiGe devices. An integrated structure includes discontinuous, buried layers having alternating Si and SiGe or SiGeC regions. The structure further includes isolation structures at an interface between... Agent: Greenblum & Bernstein, P.L.C

20090001421 - Nanotube transistor integrated circuit layout: An integrated circuit layout of a carbon nanotube transistor device includes a first and second conductive material. The first conductive material is connected to ends of single-walled carbon nanotubes below (or above) the first conductive material. The second conductive material is not electrically connected to the nanotubes below (or above)... Agent: Aka Chan LLP

20090001422 - Semiconductor apparatus and manufacturing method thereof: There is provided a manufacturing method of a semiconductor apparatus, including forming an InGaP layer on a substrate, forming a gate electrode having a Ti layer and an Au layer by vapor deposition on an upper surface of the InGaP layer, further forming a GaAs layer on the upper surface... Agent: Jianq Chyun Intellectual Property Office

20090001423 - Field-effect transistor and method of making same: A field-effect transistor is composed of a substrate, an electron transport layer and an electron supply layer formed sequentially on the substrate, wherein the electron transport layer and the electron supply layer are formed of a nitride semiconductor, a gate electrode, a source electrode and a drain electrode formed on... Agent: Foley And Lardner LLP Suite 500

20090001424 - Iii-nitride power device: A III-nitride power device that includes a Schottky electrode surrounding one of the power electrodes of the device.... Agent: Ostrolenk Faber Gerb & Soffen

20090001425 - Semiconductor device and method of manufacturing thereof: A method of manufacturing a semiconductor device has forming a first conductive film over a semiconductor substrate, etching the first conductive film, forming a plurality of first conductive patterns arranged in a first direction, and forming a side surface on an outside of a conductive pattern positioned at an end... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20090001426 - Integrated fin-local interconnect structure: Embodiments of the invention generally relate to semiconductor devices, and more specifically to interconnecting semiconductor devices. A silicide layer may be formed on selective areas of a fin structure connecting one or more semiconductor devices or semiconductor device components. By providing silicided fin structures to locally interconnect semiconductor devices, the... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20090001427 - Charge carrier barrier for image sensor: A pixel sensor structure, method of manufacture and method of operating. Disclosed is a buffer pixel cell comprising a barrier region for preventing stray charge carriers from arriving at a dark current correction pixel cell. The buffer pixel cell is located in the vicinity of the dark current correction pixel... Agent: Ibm Microelectronics Intellectual Property Law

20090001428 - Optimized transistor for imager device: An imager device that has mitigated dark current leakage and punch-through protection. The transistor associated with the photoconversion device is formed with a single (i.e. one-sided) active area extension region on one side of the transistor gate opposite the photoconversion device, while other transistors can have normal symmetrical (i.e, two-sided)... Agent: Dickstein Shapiro LLP

20090001429 - Hybrid strained orientated substrates and devices: A semiconductor structure. The structure includes (a) substrate, (b) a first semiconductor region on top of the substrate, wherein the first semiconductor region comprises a first semiconductor material and a second semiconductor material, which is different from the first semiconductor material, and wherein the first semiconductor region has a first... Agent: Schmeiser, Olsen & Watts

20090001432 - Channel layer for a thin film transistor, thin film transistor including the same, and methods of manufacturing the same: Provided is a channel layer for a thin film transistor, a thin film transistor and methods of forming the same. A channel layer for a thin film transistor may include IZO (indium zinc oxide) doped with a transition metal. A thin film transistor may include a gate electrode and the... Agent: Harness, Dickey & Pierce, P.L.C

20090001430 - Eliminate notching in si post si-recess rie to improve embedded doped and instrinsic si epitazial process: A dielectric element, and method of manufacturing the same, is disclosed for a semiconductor structure which comprises a substrate having a gate formed on a top surface of the substrate. The substrate and gate define a gap in a region between the gate and the substrate. A specified amount of... Agent: Scully, Scott, Murphy & Presser, P.C.

20090001431 - Method for forming semiconductor contacts: In one embodiment of the invention, contact patterning may be divided into two or more passes which may allow designers to control the gate height critical dimension relatively independent from the contact top critical dimension.... Agent: Trop Pruner & Hu, PC

20090001433 - Image sensor and method for manufacturing the same: Provided are an image sensor and a method of fabricating the same. The image sensor includes a substrate having an active area and a device isolation area; a well implantation area in the active area; a threshold voltage implantation area in the well implantation area; and a transistor gate on... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20090001434 - Vertical pin or nip photodiode and method for the production which is compatible with a conventional cmos-process: The invention relates to a fast photodiode and to a method for the production thereof in CMOS technology. The integrated PIN photodiode, which is formed or can be formed by CMOS technology, consists of an anode corresponding to a highly doped p-type substrate with a specific electric resistance of less... Agent: Hunton & Williams LLP Intellectual Property Department

20090001435 - Visible light detecting semiconductor radiation detector: A semiconductor radiation detector device, comprising a bulk layer (103) of semiconductor material, and on the first surface of the bulk layer (303) in the following order: a modified internal gate layer (104) of semiconductor material of second conductivity type, a barrier layer (305) of semiconductor material of first conductivity... Agent: Wood, Phillips, Katz, Clark & Mortimer

20090001436 - Memory device: Disclosed is a memory device having a transistor, the transistor including a substrate; a gate electrode formed on the substrate; an insulation layer formed on the gate electrode, the gate electrode and the insulation layer forming a convex portion; a conductive layer formed at a top of the convex portion;... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090001437 - Integrated circuit devices including recessed conductive layers and related methods: An integrated circuit device may include a first insulating layer on a substrate with an opening through the first insulating layer. A conductive layer may be on the first insulating layer with the first insulating layer between the conductive layer and the substrate and with the conductive layer set back... Agent: Myers Bigel Sibley & Sajovec

20090001438 - Isolation of mim fin dram capacitor: In one embodiment, a capacitor comprises a substrate, a first electrically insulating layer over the substrate, a fin comprising a semiconducting material over the first electrically insulating layer, a cap formed from a silicide material on the first semiconducting fin, a first electrically conducting layer over the first electrically insulating... Agent: Caven & Aghevli C/o Intellevate, LLC

20090001439 - Flash memory device and method of manufacturing the same: Disclosed is a flash memory device. The flash memory device includes a plurality of trench lines in an isolation region of a semiconductor device, a common source region along a word line (WL) direction under a surface portion of the semiconductor substrate, a plurality of gate lines along a vertical... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20090001442 - Nonvolatile semiconductor memory device and method of manufacturing the same: A nonvolatile semiconductor memory device including a semiconductor substrate having a semiconductor layer and an insulating material provided on a surface thereof, a surface of the insulating material is covered with the semiconductor layer, and a plurality of memory cells provided on the semiconductor layer, the memory cells includes a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090001440 - Semiconductor device with buried source rail: In one embodiment of the invention, a NOR Flash memory includes a buried source rail that directly connects to a source strap. Furthermore, a drain plug connects directly to a bit line.... Agent: Trop Pruner & Hu, PC

20090001441 - Three dimensional quantum dot array: In one embodiment of the invention, oxidation of silicon in a silicon germanium/silicon lattice may convert a two dimensional array of silicon germanium pillars into a structured three dimensional quantum dot array. The array may be included in, for example, flash memory floating gate, optical detector, or quantum computing device.... Agent: Trop Pruner & Hu, PC

20090001446 - Flash memory device and methods for fabricating the same: A method of fabricating a flash memory device includes forming a stack electrode on a semiconductor substrate; forming a side spacer on a side wall of the stack electrode; forming a photo-resist film pattern with a predetermined thickness on the side wall of the side spacer; and forming a source/drain... Agent: Workman Nydegger 1000 Eagle Gate Tower

20090001443 - Non-volatile memory cell with multi-layer blocking dielectric: Disclosed is a non-volatile memory cell. The non-volatile memory cell includes a substrate having an active area. A bottom dielectric layer is disposed over the active area of the substrate which provides tunneling migration to the charge carriers towards the active area. A charge storage node is disposed above the... Agent: Grossman, Tucker, Perreault & Pfleger, PLLC C/o Intellevate, LLC

20090001445 - Non-volatile memory device and method of fabricating the same: Provided are a non-volatile memory device and a method of fabricating the same. The non-volatile memory device comprises: a control gate region formed by doping a semiconductor substrate with second impurities; an electron injection region formed by doping the semiconductor substrate with first impurities, where a top surface of the... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20090001444 - Semiconductor device and manufacturing method thereof: This disclosure concerns a semiconductor memory device comprising a plurality of gate electrodes extending to a first direction; a reinforced insulation film extending to a second direction crossing the first direction, and connected to the adjacent gate electrodes; and an interlayer dielectric film provided between the adjacent gate