Active solid-state devices (e.g., transistors, solid-state diodes) inventions 01/08

20080023685 - Memory device and method of making same: A memory device includes a phase-change material and a first electrode in electrical communication with the phase-change material. Also included is a second electrode in electrical communication with the phase-change material and a dielectric layer. The dielectric layer is disposed between the first electrode and the second electrode. The dielectric... Agent: Honigman Miller Schwartz & Cohn LLP

20080023688 - Efficient carrier injection in a semiconductor device: Semiconductor devices such as VCSELs, SELs, LEDs, and HBTs are manufactured to have a wide bandgap material near a narrow bandgap material. Electron injection is improved by an intermediate structure positioned between the wide bandgap material and the narrow bandgap material. The intermediate structure is an inflection, such as a... Agent: Workman Nydegger

20080023687 - Light emitting device and method of manufacturing the same: A method of manufacturing a light emitting device includes: forming a plurality of independent light emitting portions on a growth substrate; separating the light emitting portions from the growth substrate; mounting the light emitting portions onto a receiving substrate; and dicing the receiving substrate, onto which the light emitting portions... Agent: Sughrue Mion, PLLC

20080023689 - Nitride-based light emitting device: A nitride-based light emitting device capable of achieving an enhancement in light emission efficiency and an enhancement in reliability is disclosed. The nitride-based light emitting device includes a first-conductivity semiconductor layer, a second-conductivity semiconductor layer, an active layer arranged between the first-conductivity semiconductor layer and the second-conductivity semiconductor layer, the... Agent: Mckenna Long & Aldridge LLP Song K. Jung

20080023690 - Nitride-based light emitting device: A nitride-based light emitting device capable of achieving an enhancement in light emission efficiency and an enhancement in reliability is disclosed. The nitride-based light emitting device includes a light emitting layer including a quantum well layer and a quantum barrier layer, and a stress accommodating layer arranged on at least... Agent: Mckenna Long & Aldridge LLP Song K. Jung

20080023692 - Transistor having a strained channel region including a performance enhancing material composition: By forming a semiconductor alloy in a silicon-based active semiconductor region prior to the gate patterning, material characteristics of the semiconductor alloy itself may also be exploited in addition to the strain-inducing effect thereof. Consequently, device performance of advanced field effect transistors may be even further enhanced compared to conventional... Agent: J. Mike Amerson Williams, Morgan & Amerson, P.C.

20080023693 - Methods, devices and compositions for depositing and orienting nanostructures: Methods and systems for depositing nanomaterials onto a receiving substrate and optionally for depositing those materials in a desired orientation, that comprise providing nanomaterials on a transfer substrate and contacting the nanomaterials with an adherent material disposed upon a surface or portions of a surface of a receiving substrate. Orientation... Agent: Nanosys Inc.

20080023694 - Display device and method of manufacturing the same: A display device and a method of manufacturing the same are provided. The display device comprises a substrate, a light-emitting element and a switch element. The substrate has a substrate upper surface and a recess region lower than the substrate upper surface. The light-emitting element comprises a first electrode, a... Agent: Rabin & Berdo, PC

20080023696 - Memory element and semiconductor device: An object is to reduce variations in programming behavior from memory element to memory element. Furthermore, an object is to obtain a semiconductor device with excellent writing characteristics and in which the memory element is mounted. The memory element includes a first conductive layer, a metal oxide layer, a semiconductor... Agent: Eric Robinson

20080023695 - Organic thin film transistor substrate and method of manufacturing the same: An organic thin film transistor substrate and a method of manufacturing the organic thin film transistor substrate capable of preventing overflow of an organic semiconductor layer. An organic thin film transistor substrate comprises a gate line formed on the substrate, a data line intersecting the gate line, a thin film... Agent: Macpherson Kwok Chen & Heid LLP

20080023697 - Organic thin film transistor substrate and method of manufacturing the same: The organic thin film transistor according to the present invention comprises a gate line formed on a substrate; a data line which intersects the gate line with an organic gate insulating layer interposed therebetween to define a pixel area; a thin film transistor connected with the gate line and the... Agent: Macpherson Kwok Chen & Heid LLP

20080023698 - Device having zinc oxide semiconductor and indium/zinc electrode: An electronic device including: (a) a semiconductor layer including crystalline zinc oxide; and (b) an electrode including a suitable amount of zinc, indium, or a mixture thereof.... Agent: Patent Documentation Center

20080023699 - A test structure and method for detecting charge effects during semiconductor processing: A semiconductor process test structure comprises an electrode, a charge-trapping layer, and a diffusion region. The test structure is a capacitor-like structure in which the charge-trapping layer will trap charges during various processing steps. Gate-induced drain leakage (GIDL) measurement techniques can then be used to characterize the charging status of... Agent: Baker & Mckenzie LLP Patent Department

20080023700 - Scan testing in single-chip multicore systems: Various techniques for testing multicore processors in an integrated circuit. Each core includes a plurality of registers configured to form at least two scan chains. In one embodiment, a verification unit located in the integrated circuit is electrically coupled to outputs of the scan chains. The verification unit is configured... Agent: Law Office Of Ido Tuchman (yor)

20080023703 - System and method for manufacturing a thin-film device: A thin-film device includes a plurality of circuit components defining an operational region of the thin-film device, an unpatterned channel portion disposed on the plurality of circuit components, and a patterned passivation dielectric selectively disposed on the unpatterned channel portion to electrically pattern an active region of the unpatterned channel... Agent: Hewlett Packard Company

20080023704 - Display device and fabrication method thereof: The present invention obtains a system-in-panel display device using a high-performance thin film transistor by suppressing aggregation of a molten semiconductor at the time of allowing strip-like pseudo-single crystal to grow continuously with a direction control by radiating beams of continuous oscillation laser to a semiconductor film made of silicon... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080023705 - Thin-film transistor substrate, method of manufacturing the same and display panel having the same: A thin-film transistor (TFT) substrate includes a gate electrode, a gate insulation pattern, a channel pattern, a first organic insulation pattern, a source electrode and a drain electrode. The gate electrode is formed on a base substrate. The gate insulation pattern is formed on the gate electrode and is smaller... Agent: Macpherson Kwok Chen & Heid LLP

20080023707 - Semiconductor device and method of producing the semiconductor device: A semiconductor device, includes: 1) an electric field relaxing area, including: i) a hetero junction formed by the followings: a) a first semiconductor material, and b) a second semiconductor material different from the first semiconductor material in band gap, and ii) an impurity introducing area so formed on the first... Agent: Foley And Lardner LLP Suite 500

20080023709 - Semiconductor light-emitting device and method of fabricating the same: The invention provides a semiconductor light-emitting device with II-V group (or II-IV-V group) compound contact layer and a method of fabricating the same. The semiconductor light-emitting device according to a preferred embodiment of the invention includes a substrate, a first conductive type semiconductor material layer, a light-emitting layer, a first... Agent: Birch Stewart Kolasch & Birch

20080023717 - Display substrate, method of manufacturing the same and display device having the same: A display substrate capable of improving the signal transmission characteristics and image quality of a display device is presented. The display substrate includes a first conductive line on an insulating substrate. A storage capacitor line is on the insulating substrate. A storage capacitor line extends substantially parallel to the first... Agent: Macpherson Kwok Chen & Heid LLP

20080023711 - Light emitting diode package with optical element: A light emitting diode (LED) package comprising a substrate with an LED chip mounted to the substrate and in electrical contact with it. An inner material covers the LED chip, and a lens covers the inner material with the lens material being harder than the inner material. An adhesive is... Agent: Koppel, Patrick & Heybl

20080023715 - Method of making white light leds and continuously color tunable leds: A light emitting diode comprising of a fluorescent microsphere coating is proposed. The coating consists of fluorescent microspheres which fluoresce at green and red wavelengths, excited by a shorter wavelength LED. Due to the micron-scale dimension of the spheres, they are non-resolvable to the human eye and the overall optical... Agent: Cooper & Dunham, LLP

20080023716 - Semiconductor combined device, light emitting diode head, and image forming apparatus: A semiconductor combined device includes a substrate and a light emitting element disposed on the substrate. The light emitting element includes a mesa slope inclined relative to the substrate by a first angle; a light emitting portion extending in parallel to the substrate; an interlayer insulation layer covering the mesa... Agent: Takeuchi & Kubotera, LLP

20080023714 - Surface mounting device-type light emitting diode: A surface mounting device-type light emitting diode (SMD-type LED) comprises a package housing one or more pairs of electrodes therein, the package having a predetermined space in the center thereof and a light-emission window which is opened so that light is emitted through the light-emission window; a lens formed on... Agent: Lowe Hauptman Ham & Berner, LLP

20080023720 - Light emitting diode lighting module with improved heat dissipation structure: A light emitting diode (LED) lighting module with an improved heat dissipative structure comprises a plurality of the LEDs and a heat pipe apparatus on which at least a circuit layer is provided. The circuit layer is directly formed on an electrical insulation layer with superior heat conductivity on a... Agent: Wpat, PC Intellectual Property Attorneys

20080023721 - Light emitting diode package having multiple molding resins: Disclosed is a light emitting diode (LED) package having multiple molding resins. The LED package includes a pair of lead terminals. At least portions of the pair of lead terminals are embedded in a package main body. The package main body has an opening through which the pair of lead... Agent: Marger Johnson & Mccollom, P.C.

20080023722 - Light-emitting heat-dissipating device and packaging method thereof: A light-emitting heat-dissipating device includes at least one light-emitting chip and a circuit board. The circuit board has at least one recess and at least one thermally conducting element disposed in the recess. The light-emitting chip is disposed on the thermally conducting element and connected to the circuit board via... Agent: Birch Stewart Kolasch & Birch

20080023686 - Storage nodes, phase change memories including a doped phase change layer, and methods of operating and fabricating the same: Example embodiments may provide a doped phase change layer and a method of operating and fabricating a phase change memory with the example embodiment doped phase change layer. The phase change memory may include a storage node having a phase change layer and a switching device, wherein the phase change... Agent: Harness, Dickey & Pierce, P.L.C

20080023691 - Light emitting diode having vertical topology and method of making the same: An LED having vertical topology and a method of making the same is capable of improving a luminous efficiency and reliability, and is also capable of achieving mass productivity. The method includes forming a semiconductor layer on a substrate; forming a first electrode on the semiconductor layer; forming a supporting... Agent: Mckenna Long & Aldridge LLP Song K. Jung

20080023702 - Integrated circuit module and method of forming the same: A method of forming an integrated circuit module may include interposing an auxiliary PCB between at least one semiconductor chip and a main PCB, the auxiliary PCB having at least one circuit pattern for electrical connection to one of the semiconductor chip and at least one circuit pattern formed on... Agent: Harness, Dickey & Pierce, P.L.C

20080023701 - Test module for semiconductor device: A test module for measuring electrical characteristics of a semiconductor device includes a plurality of shallow trench isolation (STI) layers formed over a semiconductor substrate. An active area includes not only an extended part enclosing the STI layers but also a plurality of minute line-width parts isolated by the STI... Agent: Sherr & Nourse, PLLC

20080023706 - Nitride semiconductor device: A nitride semiconductor device includes: a substrate containing Si; a channel layer provided on the substrate and made of nitride semiconductor material; a barrier layer provided on the channel layer and made of nitride semiconductor material; a first and second main electrode connected to the barrier layer; and a control... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080023708 - Semiconductor light-emitting device and method of manufacturing semiconductor light-emitting device: Affords a semiconductor light-emitting device in which a decrease in external quantum efficiency has been minimized even at high current densities. In a semiconductor light-emitting device (11), a gallium nitride cladding layer (13) has a threading dislocation density of 1×107 cm−2 or less. An active region (17) has a quantum... Agent: Judge Patent Associates

20080023710 - Method of growing a nitride single crystal on silicon wafer, nitride semiconductor light emitting diode manufactured using the same and the manufacturing method: The invention provides a method for growing a nitride single crystal on a silicon wafer and a method for manufacturing a light emitting device using the same. In growing the nitride single crystal according to one aspect of the invention, first, a silicon substrate having a surface in (111) crystal... Agent: Mcdermott Will & Emery LLP

20080023718 - Led lamp: An LED lamp includes a substrate, an LED chip, and a resin portion. The LED chip is flip-chip bonded to the substrate. The resin portion covers the LED chip and includes at least one type of phosphor that transforms the emission of the LED chip into light having a longer... Agent: Akin Gump Strauss Hauer & Feld L.L.P.

20080023719 - Light emitting devices with improved light extraction efficiency: Light emitting devices with improved light extraction efficiency are provided. The light emitting devices have a stack of layers including semiconductor layers comprising an active region. The stack is bonded to a transparent optical element.... Agent: Patent Law Group LLP

20080023713 - Package for housing light-emitting element and method for manufacturing package for housing light-emitting element: A package for housing a light-emitting element wherein a via hole for wiring provided so as to pass through an insulating substrate is arranged in such a manner that it is positioned under a reflector frame; a method for manufacturing the above package for housing a light-emitting element which comprises... Agent: The Webb Law Firm, P.C.

20080023712 - Phosphor converted light emitting device: A phosphor converted light emitting device includes a semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region, the light emitting layer being configured to emit light having a first peak wavelength; a first phosphor configured to emit light having a second peak wavelength;... Agent: Patent Law Group LLP

20080023723 - Led lighting device: An LED lighting device comprises a seat with a conductor. A light emitting diode is disposed on the conductor of the seat, and has an upper positive conductive pad, a lower negative conductive pad, and an insulating pad disposed between the positive and negative conductive pads. The lower negative conductive... Agent: Lin & Associates Intellectual Property, Inc.

20080023724 - Light emitting element, light emitting device having the same and method for manufacturing the same: A light emitting element comprises a first electrode, a second electrode configured to transmitting light, an organic layer arranged between the first and the second electrodes, comprising a light emitting layer, and a capping layer arranged on the second electrode and made of a material with a higher refractive index... Agent: Birch Stewart Kolasch & Birch

20080023725 - Process for manufacturing epitaxial wafers for integrated devices on a common compound semiconductor iii-v wafer: A method of fabricating an epitaxial compound semiconductor III-V wafer suitable for the subsequent fabrication of at least two different types of integrated active devices (such as an HBT and a FET) on such wafer by providing a substrate; growing a first epitaxial structure on the substrate; and growing a... Agent: Fish & Richardson P.C.

20080023727 - Field effect transistor having its breakdown voltage enhanced: Deterioration of the high frequency characteristics of a field effect transistor is prevented, and the on- and off-gate leakage currents are reduced. A field effect transistor comprises the fourth electrode 126 between the gate electrode 122 and the drain electrode 118. The fourth electrode is formed to satisfy the relationship... Agent: Rabin & Berdo, PC

20080023726 - Schottky gate metallization for semiconductor devices: A method of forming a Schottky barrier contact to a semiconductor material, includes the following steps: depositing an iridium contact on a surface of the semiconductor material; and annealing the iridium contact to form a Schottky barrier contact to the semiconductor material. For an example of an iridium Schottky contact... Agent: Martin Novack

20080023728 - Semiconductor integrated circuits with stacked node contact structures: Semiconductor integrated circuits that include thin film transistors (TFTs) and methods of fabricating such semiconductor integrated circuits are provided. The semiconductor integrated circuits may include a bulk transistor formed at a semiconductor substrate and a first interlayer insulating layer on the bulk transistor. A lower TFT may be on the... Agent: Myers Bigel Sibley & Sajovec

20080023729 - Solid-state image sensor: In cases where AGP driving is applied to a CCD solid-state image sensor having a horizontal overflow drain structure, a problem arises in that the charges overflow into the second channel regions (8) from the overflow drain regions (14), and noise is superimposed on the information charges. The CCD solid-state... Agent: Oliff & Berridge, PLC

20080023730 - Imaging apparatus and a device for use therewith: An imaging apparatus capable of suppressing deterioration of image qualities and output properties is provided having one or more output circuits in series and a buffer circuit 6, and processing luminance signals from photodetectors to output image information, the buffer circuit performing impedance conversion on signals outputted from a final... Agent: Mcdermott Will & Emery LLP

20080023731 - Three-dimensional cascaded power distribution in a semiconductor device: An IC structure having reduced power loss and/or noise includes two or more active semiconductor regions stacked in a substantially vertical dimension, each active semiconductor region including an active layer. The IC structure further includes two or more voltage supply planes, each of the voltage supply planes corresponding to a... Agent: Ryan, Mason & Lewis, LLP

20080023733 - Fabrication methods for compressive strained-silicon and transistors using the same: Fabrication methods for compressive strained-silicon by ion implantation. Ions are implanted into a silicon-containing substrate and high temperature processing converts the vicinity of the ion-contained region into strained-silicon. Transistors fabricated by the method are also provided.... Agent: Birch Stewart Kolasch & Birch

20080023732 - Use of carbon co-implantation with millisecond anneal to produce ultra-shallow junctions: Embodiments of the present invention include methods for forming an ultra-shallow junction in a substrate. In one embodiment, the method includes providing a silicon substrate, co-implanting the silicon substrate with carbon and a dopant to form a doped silicon substrate, and exposing the silicon substrate to a short time thermal... Agent: Patterson & Sheridan, LLP

20080023734 - Microlenses of cmos image sensor and method for fabricating the same: A method of fabricating microlenses in a CMOS image sensor including at least one of the following steps: Forming a color filter array including a plurality of color filters on a semiconductor substrater. Forming on and/or over the color filter array a flattening layer to compensate for height differences between... Agent: Sherr & Nourse, PLLC

20080023735 - Light sensing element, array substrate having the same and liquid crystal display apparatus having the same: In a light sensing element having simplified structure, an array substrate having the light sensing element and an LCD apparatus having the light sensing element, the light sensing element includes a first electrode, a control electrode and a second electrode. An alternating bias voltage is applied to the first electrode.... Agent: Macpherson Kwok Chen & Heid LLP

20080023736 - Semiconductor device and method for manufacturing the same: An overlay key for a semiconductor device is provided. The semiconductor device can include a first insulating layer having a trench serving as an outer key; and a metal layer formed on the first insulating layer including in the trench of the outer key. Here, an inner key region of... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20080023737 - Image sensor and method for manufacturing the same: An image sensor and a method for manufacturing the same are provided. In the method, a photoresist is formed on a substrate including a photodiode region and a gate electrode opposite to the photodiode region on the basis of the gate electrode. An oxide layer is formed to a specific... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080023738 - Silicon microlens array: A silicon microlens and method of forming the microlens for focusing and steering light into the photosensitive region of a pixel. The microlens may be formed integrally within a silicon substrate or within a silicon layer over the substrate by performing a series of concentric etches of decreasing depth to... Agent: Dickstein Shapiro LLP

20080023739 - Method of manufacturing a semiconductor wafer comprising an integrated optical filter: A method manufactures semiconductor chips each comprising a component implanted in the semiconductor. The method includes collectively implanting components onto a front face of a semiconductor wafer and fixing a plate of a transparent material onto the front face of the wafer. Fixing the plate of transparent material is preceded... Agent: Seed Intellectual Property Law Group PLLC

20080023741 - Nonvolatile ferroelectric memory device using silicon substrate, method for manufacturing the same, and refresh method thereof: A nonvolatile ferroelectric memory device using a silicon substrate includes an insulating layer formed in an etching region of the silicon substrate, a bottom word line formed in the insulating layer so as to be enclosed by the insulating layer, a floating channel layer formed over the bottom word line,... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080023740 - Novel capping layer for a magnetic tunnel junction device to enhance dr/r and a method of making the same: An MTJ in an MRAM array or TMR read head is disclosed in which a low magnetization capping layer is a composite having a NiFeHf inner layer formed on a NiFe or CoFeB/NiFe free layer, a Ta middle layer, and a Ru outer layer on the Ta layer. For example,... Agent: Stephen B. Ackerman

20080023742 - Semiconductor device with a surrounded channel transistor: The semiconductor device includes a device isolation structure, a surrounded channel structure, and a gate electrode. The device isolation structure is formed in a semiconductor substrate to define an active region. The surrounded channel structure connecting source/drain regions is separated from the semiconductor substrate under the active region by a... Agent: Townsend And Townsend And Crew, LLP

20080023743 - Semiconductor memory device and manufacturing method of the same: In this semiconductor memory device, a potential clamping region having no insulation layer formed therein is provided in an insulation layer. More specifically, the potential clamping region is formed under a body portion at a position near a first impurity region, and extends to a first semiconductor layer. A body... Agent: Mcdermott Will & Emery LLP

20080023744 - Nonvolatile semiconductor memory device and method of manufacturing the same: Provided are a nonvolatile semiconductor memory device and a method of manufacturing the same. The nonvolatile semiconductor memory device may include a tunnel insulating layer formed on a semiconductor substrate, a charge trap layer including a dielectric layer doped with a transition metal formed on the tunnel insulating layer, a... Agent: Harness, Dickey & Pierce, P.L.C

20080023745 - Methods of forming capacitors for semiconductor memory devices and resulting semiconductor memory devices: Methods of forming capacitors include forming a first mold layer and a second mold layer on a substrate, forming storage electrodes through the mold layers, the storage electrodes arranged in rows extending in a first direction and spaced apart from adjacent storage electrodes along the first direction by a first... Agent: Myers Bigel Sibley & Sajovec

20080023746 - Semiconductor devices having dielectric layers and methods of forming the same: A method of forming a semiconductor device includes loading a semiconductor substrate into a reaction chamber, and providing metal organic precursors including hafnium and zirconium into the reaction chamber to form hafnium-zirconium oxide (HfxZr1-xO; 0<X<1) with a tetragonal crystalline structure on the semiconductor substrate. Related structures are also discussed.... Agent: Myers Bigel Sibley & Sajovec

20080023747 - Semiconductor memory device with memory cells on multiple layers: A semiconductor memory device includes a first substrate having at least one string including a first select transistor, a second select transistor, and first memory cells connected in series between the first and second select transistors of the first substrate. The semiconductor memory device further includes a second substrate having... Agent: Volentine & Whitt PLLC

20080023748 - Self-aligned contacts to source/drain regions: In some embodiments, when etching a dielectric to form a self-aligned contact opening to a source/drain region (160) of a transistor, the gate structure (220) is protected on top with a non-conformal layer (M3), possibly silicon, deposited so that it is thicker over the gate than over the source/drain region.... Agent: Macpherson Kwok Chen & Heid LLP

20080023749 - Non-volatile memory device and methods of operating and fabricating the same: Example embodiments provide a non-volatile memory device with increased integration and methods of operating and fabricating the same. A non-volatile memory device may include a plurality of first storage node films and a plurality of first control gate electrodes on a semiconductor substrate. A plurality of second storage node films... Agent: Harness, Dickey & Pierce, P.L.C

20080023750 - Memory cell system with multiple nitride layers: A memory cell system is provided including forming a first insulator layer over a semiconductor substrate, forming a charge trap layer over the first insulator layer, forming a second insulator layer over the charge trap layer, forming a top blocking intermediate layer over the second insulator layer, and forming a... Agent: Law Offices Of Mikio Ishimaru

20080023751 - Integrated circuit memory system employing silicon rich layers: An integrated circuit memory system that includes: providing a substrate; forming a silicon rich charge storage layer over the substrate; forming a first isolation trench through the silicon rich charge storage layer in a first direction; and forming a second isolation trench through the silicon rich charge storage layer in... Agent: Law Offices Of Mikio Ishimaru

20080023752 - Boron doped sige halo for nfet to control short channel effect: An n-type field effect transistor (NFET) and methods of forming a halo for an NFET to control the short channel effect are disclosed. One method includes forming a gate over a silicon substrate; recessing the silicon adjacent to the gate; forming a halo by epitaxially growing boron in-situ doped silicon... Agent: Hoffman, Warnick & D'alessandro LLC

20080023753 - Semiconductor device and method for fabricating the same: A semiconductor device includes a device isolation structure, a recess channel structure, and a gate electrode. The device isolation structure is formed in a semiconductor substrate to define an active region. The recess channel structure is disposed in the semiconductor substrate under the active region. The gate electrode includes a... Agent: Townsend And Townsend And Crew, LLP

20080023756 - Semiconductor device and fabricating method thereof: A semiconductor device and method of manufacturing the same. The semiconductor device includes a semiconductor substrate having a first conductive layer, a second conductive layer on the first conductive layer, a first high density impurity area on the second conductive layer, and a second high density impurity area on the... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20080023755 - Semiconductor device and method for fabricating the same: A method for fabricating a semiconductor device is provided. In the method, a bulb type recess is formed on a semiconductor substrate in an active region. A gate insulating film is formed over the semiconductor substrate and on a surface of the recess. A first polysilicon layer is formed over... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080023754 - Semiconductor device with a wave-shaped trench or gate and method for manufacturing the same: A semiconductor device and a method for manufacturing the same includes forming a trench for forming a fin-type active region to have a wave shape to not connect a gate to an active region, thereby improving the speed of current flowing in the gate and reduce leakage current in a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080023757 - Semiconductor device having fin-field effect transistor and manufacturing method thereof: A semiconductor device includes an element isolation region formed in a semiconductor substrate, an active region surrounded by the element isolation region, and a gate electrode formed in one direction to cross the active region. The semiconductor substrate includes two gate trenches formed in parallel to a major axis direction... Agent: Foley And Lardner LLP Suite 500

20080023759 - Low voltage high density trench-gated power device with uniformly doped channel and its edge termination: Merging together the drift regions in a low-power trench MOSFET device via a dopant implant through the bottom of the trench permits use of a very small cell pitch, resulting in a very high channel density and a uniformly doped channel and a consequent significant reduction in the channel resistance.... Agent: Hiscock & Barclay, LLP

20080023758 - Semiconductor device: The object of the present invention is to reduce parasitic inductance of a main circuit in a power supply circuit. The present invention provides a non-insulated DC-DC converter having a circuit in which a power MOS•FET for a high-side switch and a power MOS•FET for a low-side switch are connected... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080023760 - Semiconductor device with increased breakdown voltage: Optimization of the implantation structure of a metal oxide silicon field effect transistor (MOSFET) device fabricated using conventional complementary metal oxide silicon (CMOS) logic foundry technology to increase the breakdown voltage. The techniques used to optimize the implantation structure involve lightly implanting the gate region, displacing the drain region from... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20080023761 - Semiconductor devices and methods of fabricating the same: Semiconductor devices and methods of fabricating the same are provided. According to an example embodiment, a semiconductor device may include an active region disposed in a substrate and having first conductivity type impurity ions, a gate electrode crossing on the active region, a source region disposed within the active region... Agent: Harness, Dickey & Pierce, P.L.C

20080023762 - Modular bipolar-cmos-dmos analog integrated circuit and power transistor technology: A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms of a lateral trench MOSFET, and a 30V lateral N-channel DMOS. Each of... Agent: Patentability Associates

20080023763 - Threshold-voltage trimming of insulated-gate power devices: Methods and systems for precision manufacture of MOS-gated power devices. The raw device includes a stratum of semiconductor nanocrystals embedded at or near the top edge of the gate dielectric, and after the device has been built a programmation operation trims the device to the precisely correct threshold voltage, by... Agent: Groover & Associates

20080023764 - Semiconductor memory device and manufacturing method of the same: In this semiconductor memory device, a potential clamping region having no insulation layer formed therein is provided in an insulation layer. More specifically, the potential clamping region is formed under a body portion at a position near a first impurity region, and extends to a first semiconductor layer. A body... Agent: Mcdermott Will & Emery LLP

20080023765 - Semiconductor devices and methods of fabricating the same: Provided are semiconductor devices and methods of fabricating the semiconductor devices. Embodiments of such methods may include sequentially forming a gate insulation layer and a metal layer on a semiconductor substrate and etching the metal layer to form a metallic residue on the gate insulation layer. Such methods may also... Agent: Myers Bigel Sibley & Sajovec

20080023766 - electrostatic discharge protection device: An electrostatic discharge protection device comprising a multi-finger gate, a first lightly doped region of a second conductivity, a first heavily doped region of the second conductivity, and a second lightly doped region of the second conductivity. The multi-finger gate comprises a plurality of fingers mutually connected in parallel over... Agent: Thomas, Kayden, Horstemeyer & Risley LLP

20080023767 - High voltage electrostatic discharge protection devices and electrostatic discharge protection circuits: High-voltage ESD devices and circuits using the high-voltage ESD devices. The high-voltage ESD devices include an N-tub in a P-type substrate; a graded anode having a first P-type region in a second P-type region and located within the N-tub, a concentration of P-type dopant in the first P-type region being... Agent: Schmeiser, Olsen & Watts

20080023768 - Synchronous substrate injection clamp: In accordance with the principles of the invention, an integrated circuit comprises a substrate having a first FET formed on the substrate. The first FET has a first terminal coupleable to a load, a second terminal and a control terminal. The second terminal is connected to the substrate. The substrate... Agent: Donald J Lenkszus

20080023769 - Semiconductor devices having selectively tensile stressed gate electrodes and methods of fabricating the same: A semiconductor device includes an active region. A gate electrode is disposed on the active region. An isolation region adjoins the active region, and is recessed with respect to a top surface of the active region underlying the gate electrode. The isolation region may be recessed a depth substantially equal... Agent: Myers Bigel Sibley & Sajovec

20080023770 - Stacked semiconductor devices and methods of manufacturing the same: The stacked semiconductor device includes a semiconductor substrate, a multi-layered insulation layer pattern having at least two insulation layer patterns and an opening, an active layer pattern formed on each of the insulation layer patterns, a first plug including single crystalline silicon-germanium, a second plug including single crystalline silicon, and... Agent: Mills & Onello LLP

20080023772 - Semiconductor device including a germanium silicide film on a selective epitaxial layer: A process for manufacturing a semiconductor device includes: forming first contact holes in a dielectric film for a PMOS transistor; depositing germanium on the source/drain regions of the PMOS transistor exposed from the first contact holes; heat treating the germanium with silicon in the source/drain regions of the PMOS transistor... Agent: Mcginn Intellectual Property Law Group, PLLC

20080023771 - Semiconductor structure comprising field effect transistors with stressed channel regions and method of forming the same: A method of forming a semiconductor structure comprises providing a semiconductor substrate comprising a first transistor element and a second transistor element. Each of the first transistor element and the second transistor element comprises a gate electrode. A stressed material layer is deposited over the first transistor element and the... Agent: Williams, Morgan & Amerson

20080023773 - Semiconductor device and method of manufacturing the same: A first p-type SiGe mixed crystal layer is formed by an epitaxial growth method in a trench, and a second p-type SiGe mixed crystal layer is formed. On the second SiGe mixed crystal layer, a third p-type SiGe mixed crystal layer is formed. The height of an uppermost surface of... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20080023774 - Semiconductor device and method for fabricating the same: A semiconductor device includes: an isolation region formed in a semiconductor substrate; an active region surrounded by the isolation region of the semiconductor substrate; a fully silicided first gate line formed on the active region; a fully silicided second gate line formed on the isolation region; a first sidewall formed... Agent: Mcdermott Will & Emery LLP

20080023775 - Asymmetric field effect transistors (fets): A semiconductor structure and a method for forming the same. The structure includes (a) a semiconductor channel region, (b) a semiconductor source block in direct physical contact with the semiconductor channel region; (c ) a source contact region in direct physical contact with the semiconductor source block, wherein the source... Agent: Schmeiser, Olsen & Watts

20080023776 - Metal oxide semiconductor device with improved threshold voltage and drain junction breakdown voltage and method for fabricating same: A metal oxide semiconductor device having a substrate layer of a semiconductor material and a gate, a source and, a drain formed over the substrate layer is provided. The substrate is doped with a deep n-type lightly doped drain implant that simmultaneously lowers the threshold voltage and increases the drain... Agent: Dorsey & Whitney LLP

20080023777 - Semiconductor device and method of manufacture thereof: A dielectric material layer is formed over a workpiece, a metal layer is formed over the dielectric material layer, and a semiconductive material layer is formed over the metal layer. The workpiece is heated, causing a top portion of the metal layer to interact with the semiconductive material layer and... Agent: Slater & Matsil LLP

20080023778 - Fully silicided gate electrodes and method of making the same: The present invention relates to a method of selectively fabricating metal gate electrodes in one or more device regions by fully siliciding (FUSI) the gate electrode. The selective formation of FUSI enables metal gate electrodes to be fabricated on devices that are compatible with workfunctions that are different from conventional... Agent: International Business Machines Corporation Dept. 18g

20080023779 - Photoelectric conversion element: In a photoelectric conversion element which generates electrical signals upon the incidence of light, a superlattice structure having a metal layer or metal silicide layer and a polysilicon layer is formed on a silicon substrate, the photoelectric conversion element has a three-terminal structure in which the metal layer or metal... Agent: Kratz, Quintos & Hanson, LLP

20080023780 - Image pickup device and method of manufacturing the same: An image pickup device comprises: a sensor substrate having image sensors arranged in its image pickup region in the form of a matrix; an interlayer insulating film layer formed below a bottom of the sensor substrate, the interlayer insulating film layer including wiring layers formed therein to construct an electric... Agent: Sughrue Mion, PLLC

20080023781 - Photodiode and manufacturing method of the same: A lateral photodiode with increased sensitivity. The lateral photodiode includes: a substrate, a semiconductor layer, formed on the substrate, for receiving input light, an insulation layer formed on the semiconductor layer, and electrodes formed within the insulation layer. A plurality of microlenses is formed over a surface of the insulation... Agent: Sughrue Mion, PLLC

20080023782 - Photo sensor and fabrication method thereof: A photo sensor and a fabrication method thereof are provided. A fluorescent substance is utilized to absorb light in a specific wavelength range and re-emit light detectable by a photo transducer element. An anti-reflective layer is formed on the photo transducer element to reduce refractive scattering of the re-emitting light... Agent: Fulbright And Jaworski LLP

20080023783 - Sensing capacitance in column sample and hold circuitry in a cmos imager and improved capacitor design: Improved designs for a capacitor, and particularly the sensing and references capacitors used in a column sample-and-hold (CSH) circuitry in a CMOS imager, are disclosed that minimize layout area. In-one embodiment, an additional plate layer (e.g., formed in metal 1) is provided above the traditional poly 2-poly 1 capacitor, which... Agent: Wong, Cabello, Lutsch, Rutherford & Brucculeri, L.L.P.

20080023784 - Solid-state imaging apparatus: A solid-state imaging apparatus including: a solid-state imaging device chip having an electrode pad provided on its front face; and a flexible board having a connecting electrode formed on an end face and being adhered at an end portion thereof to a side face of the solid-state imaging device chip... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20080023785 - Bottom source ldmosfet structure and method: This invention discloses bottom-source lateral diffusion MOS (BS-LDMOS) device. The device has a source region disposed laterally opposite a drain region near a top surface of a semiconductor substrate supporting a gate thereon between the source region and a drain region. The BS-LDMOS device further has a combined sinker-channel region... Agent: Bo-in Lin

20080023786 - Semiconductor structure of a high side driver and method for manufacturing the same: A semiconductor structure of a high side driver includes an ion-doped junction. The ion-doped junction includes a substrate, a first deep well and a second deep well, a first heavy ion-doped region and a second heavy ion-doped region. The first deep well and second deep well are formed in the... Agent: Bacon & Thomas, PLLC

20080023787 - Semiconductor device: A semiconductor device that reduces the width of an isolation region between semiconductor elements. The semiconductor device includes a semiconductor substrate, an epitaxial layer formed on the semiconductor substrate, a buried layer formed between the semiconductor substrate and the epitaxial layer, a first trench formed in the epitaxial layer so... Agent: Ditthavong Mori & Steiner, P.C.

20080023788 - Fuse box of semiconductor device formed using conductive oxide layer and method for forming the same: A fuse box of a semiconductor device includes a plurality of metal fuses formed on a first interlayer dielectric of a semiconductor substrate and previously removed in blowing regions thereof; a conductive oxidation layer formed to cover removed blowing regions of the metal fuses; a second interlayer dielectric formed on... Agent: Ladas & Parry LLP

20080023789 - Reprogrammable electrical fuse: The present invention provides a reprogrammable electrically blowable fuse. The electrically blowable fuse is programmed using an electro-migration effect and is reprogrammed using a reverse electro-migration effect. The state (i.e., “opened” or “closed”) of the electrically blowable fuse is determined by a sensing system which compares a resistance of the... Agent: Hoffman, Warnick & D'alessandro LLC

20080023790 - Mixed-use memory array: A mixed-use memory array is disclosed. In one preferred embodiment, a memory array is provided comprising a first set of memory cells operating as one-time programmable memory cells and a second set of memory cells operating as rewritable memory cells. In another preferred embodiment, a memory array is provided comprising... Agent: Brinks Hofer Gilson & Lione/sandisk

20080023791 - High performance integrated inductor: Some embodiments of the present invention include providing high performance integrated inductors.... Agent: Intel Corporation C/o Intellevate, LLC

20080023792 - Filler capacitor with a multiple cell height: Embodiments of the invention provide a layout architecture for a standard cell integrated circuit having an array of logic cells. A plurality of first power rails is above a substrate, each of the first power rails being coupled to a power supply and extending across the logic cells. Adjacent first... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20080023793 - Semiconductor device: When letters are written with a ballpoint pen, pen pressure is greater than or equal to 10 MPa. The IC tag embedded in the paper base material is required to withstand such pen pressure. An integrated circuit including a functional circuit which transmits and receive, performs arithmetic of, and stores... Agent: Eric Robinson

20080023794 - Integrated circuit with bipolar transistor: An integrated circuit including a bipolar transistor is disclosed. One embodiment provides an insulation structure used to form a junction insulation, a collector structure formed inside a semiconductor zone having openings dividing the collector structure into collector zones. The collector zones are arranged in such a manner that a shortest... Agent: Dicke, Billig & Czaja

20080023795 - Semiconductor devices and method of manufacturing them: With conventional device, the quantity of complex defects differs with each semiconductor device because the concentration of impurities intrinsically contained differs for each silicon wafer. Consequently, there is an undesirable variation in characteristics among the semiconductor devices. The invention provides a method for manufacturing PIN type diode which comprises an... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080023796 - Semiconductor device and method of manufacturing the same: A conventional semiconductor device, for example, a lateral PNP transistor has a problem that it is difficult to obtain a desired current-amplification factor while maintaining a breakdown voltage characteristic without increasing the device size. In a semiconductor device, that is a lateral PNP transistor, according to the present invention, an... Agent: Fish & Richardson P.C.

20080023797 - Semiconductor device and method for manufacturing same: In conventional processes, a recombination rate of minority carrier accumulated between a diffusion layer of an anode and a diffusion layer of a cathode cannot be enhanced. An interlayer insulating film 20 is formed on a semiconductor substrate 10. An opening 22 (first opening), an opening 24 (second opening) and... Agent: Sughrue Mion, PLLC

20080023798 - Memory cells with an anode comprising intercalating material and metal species dispersed therein: According to one embodiment of the present invention, a solid state electrolyte memory cell includes a cathode, an anode and a solid state electrolyte. The anode includes an intercalating material and first metal species dispersed in the intercalating material.... Agent: Dicke, Billig & Czaja

20080023799 - Nitride semiconductor device and manufacturing method of the same: A nitride semiconductor device includes an n-type GaN substrate with a semiconductor device formed thereon and an n-type electrode which is a metal electrode formed on the rear surface of the GaN substrate. A surface modified layer and a reaction layer are interposed between the GaN substrate and n-type electrode.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080023800 - Process for smoothening iii-n substrates: A process for preparing smoothened III-N, in particular smoothened III-N substrate or III-N template, wherein III denotes at least one element of group III of the Periodic System, selected from Al, Ga and In, utilizes a smoothening agent comprising cubic boron nitride abrasive particles. The process provides large-sized III-N substrates... Agent: Foley And Lardner LLP Suite 500

20080023801 - Method for producing an integrated circuit indlcuding a semiconductor: A method for producing an integrated circuit including a semiconductor is disclosed. In one embodiment, crystal defects are produced by irradiation in the material of the underlying semiconductor substrate which crystal defects form an inhomogeneous crystal defect density distribution in the vertical direction of the semiconductor component and lead to... Agent: Dicke, Billig & Czaja

20080023802 - Semiconductor device having a scribeline structure favorable for preventing chipping: A semiconductor device includes at least one semiconductor chip formed on a wafer and a scribeline provided along an outer circumference of the semiconductor chip. The semiconductor device further includes a chipping prevention wall provided close to a blade area in the scribeline to prevent chipping from advancing when the... Agent: Foley And Lardner LLP Suite 500

20080023803 - Method for forming vertical structures in a semiconductor device: A method is provided for making a semiconductor device, comprising (a) providing a semiconductor stack comprising a first semiconductor layer (407) having a <110> crystallographic orientation and a second semiconductor layer (405) having a <100> crystallographic orientation; (b) defining an oxide mask (415) in the first semiconductor layer; and (c)... Agent: Fortkort & Houston P.C.

20080023804 - High-speed electrical interconnects and method of manufacturing: High-speed interconnect systems for connecting two or more electrical elements for both on-chip and off-chip applications are provided. Interconnect system has the means, which could reduce the microwave loss induced due to the dielectrics. Reducing the effective loss tangent of the dielectrics reduces the microwave loss. With optimize design of... Agent: Banpil Photonics, Inc.

20080023805 - Array-processed stacked semiconductor packages: One embodiment of the invention is a semiconductor system (1400) of arrays (1401, 1402, etc.) of packaged devices. Each array includes a sheet-like substrate (1411, 1412, etc.) made of insulating material integral with conductive horizontal lines and vertical vias, and terminals on the surfaces. Semiconductor components, which may include more... Agent: Texas Instruments Incorporated

20080023806 - Stress-free lead frame: The present invention relates to a stress-free lead frame (1) for a semiconductor. The stress-free lead frame (1) is provided with a stress-relief means (15) and an interlocking means (16) at the outer periphery. The stress-relief means (15) is capable of accommodating expansion and compression while the interlocking means (16)... Agent: Townsend And Townsend And Crew, LLP

20080023807 - Dual side cooling integrated power device package and module and methods of manufacture: An integrated power device module having a leadframe structure with first and second spaced pads and one or more common source-drain leads located between said first and second pads, first and second transistors flip chip attached respectively to said first and second pads, wherein the source of said second transistor... Agent: Hiscock & Barclay, LLP

20080023808 - Chip package and digital camera module using same: A digital camera module (10) includes a chip package (20) and a lens module (50) mounted to the chip package. The package includes a carrier (21), a chip (23), a plurality of wires (24), an adhesive (26) and a cover (28). The carrier has a cavity (213) defined therein, an... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang Jeffrey T. Knapp

20080023809 - Chip package and digital camera module using same: A digital camera module (10) includes a chip package (20) and a lens module (50) mounted to the chip package. The package includes a carrier (21), a chip (23), a plurality of wires (24), an adhesive (26) and a cover (28). The carrier has a top surface (211), and a... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang Jeffrey T. Knapp

20080023810 - Semiconductor device: In inlets used for ID tags and the like, a defective connection between an integrated circuit part and an antenna is suppressed by improvement of tolerance for a bending or a pressing pressure. The integrated circuit part includes a semiconductor chip and a multilayer substrate having a concave portion. The... Agent: Eric Robinson

20080023811 - Structure combining an ic integrated substrate and a carrier, and method of manufacturing such structure: The present invention provides a structure combining an IC integrated substrate and a carrier, which comprises a carrier and an IC integrated substrate formed on the carrier. The IC integrated substrate has a first dielectric layer attached to the carrier. The materials of the carrier and the first dielectric layer... Agent: Madson & Austin

20080023812 - Semiconductor package having passive component and semiconductor memory module including the same: Example embodiments relate to a semiconductor package. The semiconductor package may include a mounting substrate, a semiconductor chip mounted to the mounting substrate, at least one passive component passing therethrough and mounted to the mounting substrate, and a cover covering the mounting substrate, the semiconductor chip and the at least... Agent: Harness, Dickey & Pierce, P.L.C

20080023813 - Multi-die apparatus including moveable portions: An electronic apparatus includes a first die, a second die, a third die, and a fourth die, wherein a portion of the second die and a portion of the third die are movably connected between the first die and the fourth die.... Agent: Hewlett Packard Company

20080023814 - Stacked ball grid array semiconductor package: Provided is a stacked ball grid array (BGA) semiconductor package. The stacked BGA semiconductor package includes: a single semiconductor package having landings provided in depressed grooves of both sides thereof, wherein the landings include a conductive material, and a substrate having a semiconductor chip disposed on the substrate; another semiconductor... Agent: Marger Johnson & Mccollom, P.C.

20080023815 - Interlayer dielectric layer for printed wiring board, printed wiring board, and method of producing the same: A printed wiring board including a substrate, conductor circuits and interlayer dielectric layers stacked alternately on the substrate, each of the interlayer dielectric layers including a curable resin having flaky particles dispersed therein, and viaholes formed in the interlayer dielectric layers and electrically connecting the conductor circuits at different levels.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080023816 - Semiconductor package: A semiconductor package mainly includes a carrier, a package having a first surface and a second surface, a chip and a plurality of bonding wires. The package is disposed on an upper surface of the carrier and electrically connected to the carrier by a plurality of conductive elements, the chip... Agent: North America Intellectual Property Corporation

20080023817 - Component packaging apparatus, systems, and methods: Dielectric materials comprising release agents are described. Also described are a process for improving the processability of dielectric materials during hot embossing, substrates prepared by hot embossing, and integrated-circuit packages comprising the improved substrate.... Agent: Schwegman, Lundberg & Woessner, P.A.

20080023818 - Contact device for use in a power semiconductor module or in a disc-type thyristor: A contact device for use with a power semiconductor component in a power semiconductor module or a disc-type thyristor, the module or thyristor having a molded body with a first recess disposed above the component. The contact device makes electrical contact with the auxiliary connection of the component, and is... Agent: Cohen, Pontani, Lieberman & Pavane

20080023819 - Package structure having semiconductor chip embedded therein and method for fabricating the same: A package structure having a semiconductor chip embedded therein and a method of fabricating the same are disclosed. The package structure comprises: an aluminum oxide composite plate and a semiconductor chip. The aluminum oxide composite plate is formed by a stack consisting of an adhesive layer placed in between two... Agent: Lowe Hauptman Ham & Berner, LLP

20080023820 - Bond finger on via substrate, process of making same, package made thereby, and method of assembling same: A wire-bonding substrate is disclosed. The wire-bonding substrate includes a first wire-bond pad and a first via that is disposed directly below the first wire-bond pad in the in the wire-bonding substrate. A package is also disclosed that includes a die that is coupled to the first wire-bonding pad. The... Agent: Schwegman, Lundberg & Woessner, P.A.

20080023821 - Substrate structure integrated with passive components: An electronic element package integrated with passive components is proposed. The electronic element package includes a carrier plate and a plurality of passive components provided on the carrier plate, wherein first electrodes are formed on the passive components; an insulating layer formed on a surface of the carrier plate provided... Agent: Morrison & Foerster LLP

20080023822 - Chip on flexible printed circuit type semiconductor package: A Chip on Flexible Printed Circuit (COF) type semiconductor package may include a flexible film, a semiconductor IC chip on the flexible film, and a heating pad on the flexible film.... Agent: Harness, Dickey & Pierce, P.L.C

20080023823 - Power delivery using an integrated heat spreader: An integrated heat spreader (IHS) having a groove and a cavity formed therein is disclosed. In one embodiment, the groove has an insulating layer formed therein, and a power conduit is mounted in the groove, the power conduit is electrically isolated from the IHS by the insulating layer, and the... Agent: Blakely Sokoloff Taylor & Zafman

20080023824 - Double-sided die: In a described implementation for double-sided die utilization, a die includes at least one die feature on a first side and at least one die feature on a second side. The die features on the first and second sides are electrically interconnected by way of through vias.... Agent: Texas Instruments Incorporated

20080023825 - Multi-die dc-dc boost power converter with efficient packaging: A DC-DC boost converter in multi-die package is proposed having an output Schottky diode and a low-side vertical MOSFET controlled by a power regulating controller (PRC). The multi-die package includes a single die pad with the Schottky diode placed there on side by side with the vertical MOSFET. The PRC... Agent: Chein-hwa S. Tsao

20080023826 - Mounting device for a semiconductor package: A power amplifying semiconductor element is mounted in a package 13, having a heat dissipating surface acting as high frequency ground as well. The package 13 is mounted upside down with flip-chip mounting method in a concave portion 12 formed on a housing 11 having a high frequency ground acting... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080023832 - Contact structure and manufacturing method thereof: A contact structure including a contact pad, a polymer bump and a conductive layer is provided in the present invention. The contact pad is disposed on a substrate. The polymer bump is disposed on the contact pad. The conductive layer covers the polymer bump and extends to the outside of... Agent: Jianq Chyun Intellectual Property Office

20080023830 - Contact structure having a compliant bump and a testing area and manufacturing method for the same: A contact structure having both a compliant bump and a testing area and a manufacturing method for the same is introduced. The compliant bump is formed on a conductive contact of the silicon wafer or a printed circuit board. The core of the bump is made of polymeric material, and... Agent: Rabin & Berdo, PC

20080023831 - Semiconductor device and manufacturing method for the same: To provide a small, high-performance semiconductor device in which contact between adjacent wires is prevented for increased flexibility in designing a wiring layout, and an efficient method for manufacturing the semiconductor device. The semiconductor device includes a substrate 10 having an electrode 21A arranged on its surface; and a first... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20080023828 - Semiconductor device having bumps in a same row for staggered probing: A semiconductor device has a plurality of bumps in a same row for staggered probing. The bumps in a same row are disposed on a chip and include a plurality of regular bumps and a plurality of irregular bumps. The regular bumps and the irregular bumps are interspersed in a... Agent: Troxell Law Office PLLC Suite 1404

20080023827 - Solder connector structure and method: Disclosed are embodiments of a far back end of the line solder connector and a method of forming the connector that eliminates the use aluminum, protects the integrity of the ball limiting metallurgy (BLM) layers and promotes adhesion of the BLM layers by incorporating a thin conformal conductive liner into... Agent: Frederick W. Gibb, Iii Gibb & Rahman, LLC

20080023829 - Substrate and process for semiconductor flip chip package: A semiconductor package structure for flip chip package includes at least a patterned circuit layer and an insulating layer alternately stacking up each other. The patterned layer includes a plurality of bump pads, and the insulating layer includes a plurality of etching holes. The etching holes and the bump pads... Agent: Merchant & Gould PC

20080023833 - Solder bumps in flip-chip technologies: A solder bump structure and method for forming the same. The structure includes (a) a dielectric layer including a dielectric layer top surface (b) an electrically conductive bond pad on and in direct physical contact with the dielectric layer top surface; (c) a patterned support/interface layer on the dielectric layer... Agent: Schmeiser, Olsen & Watts

20080023834 - Raised solder-mask-defined (smd) solder ball pads for a laminate electronic circuit board: A raised solder-mask-defined (SMD) pad configured for receiving a solder ball on a laminate electronic circuit board and a method of creating the raised SMD pad on a laminate electronic circuit board. The method may comprise forming a base bump, covering the base bump with a conductive bump layer and... Agent: Texas Instruments Incorporated

20080023835 - Ohmic contact film in semiconductor device: The invention provides an ohmic contact film formed between a doped semiconductor material layer and a conductive material layer of a semiconductor device. The composition of the ohmic contact film according to a preferred embodiment of the invention is represented by the general formula MxNy, where M represents the II... Agent: Birch Stewart Kolasch & Birch

20080023836 - Semiconductor device: A semiconductor device which is capable of preventing interface peeling and a crack from occurring in the vicinity of the edge part of a rewiring layer is provided. The semiconductor device comprises a semiconductor substrate; a first interlayer insulation film (a first insulation film) which is formed on the semiconductor... Agent: Rabin & Berdo, PC

20080023838 - Manufacturing method of semiconductor device and semiconductor device: A manufacturing method of a semiconductor device comprises releasing an oxidation source included in an interlayer dielectric film having an opening portion formed on a surface thereof and being present on the surface of the interlayer dielectric film at a first substrate temperature, forming a first layer containing Ti and... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080023837 - Method for fabricating interconnect and interconnect fabricated thereby: A Method for discharge prevention during interconnection. A first metal layer is formed on a substrate and a dielectric layer is then formed on the substrate, covering the first metal layer. Two via holes are formed in the dielectric layer, exposing one end of the first metal layer, wherein the... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20080023839 - Molybdenum-based electrode with carbon nanotube growth: A carbon nanotube is formed on at least one Molybdenum-based electrode. In one embodiment, a carbon-nanotube device includes a pair of Molybdenum-based electrodes over respective terraces. Using a catalyst on the Molybdenum-based material of at least one electrode, a carbon nanotube is grown over a gap that separates the terraces... Agent: Attn: Robert J. Crawford Crawford Maunu PLLC

20080023840 - Via heat sink material: The invention provides thermally conductive material so that less heat traveling from one side of a layer will reach connection material on another side of a layer. Rather, some of the heat will be conducted away by the thermally conductive material and dissipated.... Agent: Intel Corporation C/o Intellevate, LLC

20080023841 - Mounting board, method for manufacturing mounting board, and semiconductor module: To reduce connection defects between a circuit substrate provided on a core substrate and a circuit to be mounted thereon, thereby improving reliability as a multilayered device mounting substrate. The device mounting substrate includes: a first circuit substrate composed of a substrate, an insulating layer formed on this substrate, and... Agent: Fish & Richardson P.C.

20080023842 - Semiconductor device: A method of forming a contact is provided. A substrate having at least two metal oxide semiconductor devices is provided and a gap is formed between the two devices. A first stress layer is formed over the substrate to cover the metal-oxide semiconductor devices and the substrate. The first stress... Agent: Jianq Chyun Intellectual Property Office

20080023843 - Semiconductor device: A semiconductor device has a package structure provided with leads that are external connection terminals. A base substance is an island, and at least the surface thereof is formed of a conductive material. A semiconductor substrate is mounted on the surface of the base substance, and a ground potential is... Agent: Cantor Colburn, LLP

20080023844 - Interconnection substrate, semiconductor chip package including the same, and display system including the same: Example embodiments relate to an interconnection substrate and a semiconductor chip package and a display system including the same. The interconnection substrate may include a base film, a signal line provided on the base film, a power line provided on the base film as a line pattern including a plurality... Agent: Harness, Dickey & Pierce, P.L.C

20080023845 - Land grid array (lga) interposer utilizing metal-on-elastomer hemi-torus and other multiple points of contact geometries: A land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are... Agent: Scully, Scott, Murphy & Presser, P.C.

20080023846 - Semiconductor device and manufacturing method of the same: The invention provides a method of manufacturing a semiconductor device which achieves high reliability and high yield as well as high production efficiency. Back surface grinding (back grinding) is performed to a semiconductor substrate to thin the semiconductor substrate. A damaged layer formed by the back surface grinding is not... Agent: Morrison & Foerster LLP

20080023847 - Semiconductor device and its wiring method: A semiconductor device mounted on a mother board has a circuit board to be positioned on the mother board and a semiconductor chip positioned on the circuit board. The circuit board has a connection pad, a relay pad spaced away from the connection pad, and a wire connecting between the... Agent: Mcdermott Will & Emery LLP

20080023848 - Semiconductor device and its wiring method: A semiconductor device mounted on a mother board has a circuit board to be positioned on the mother board and a semiconductor chip positioned on the circuit board. The circuit board has a connection pad, a relay pad spaced away from the connection pad, and a wire connecting between the... Agent: Mcdermott Will & Emery LLP

20080023849 - Chip module: An improved chip module is described. The improved chip is comprised of a loading board for connecting with an external electronic component, a plurality of electrical conductors electrically disposed on the loading board. Each electrical conductor has an elastic body and a metal layer disposed thereon. The chip module connects... Agent: Rosenberg, Klein & Lee

20080023850 - Silicon-based thin substrate and packaging schemes: A silicon-based thin package substrate is used for packaging semiconductor chips. The silicon-based thin package substrate preferably has a thickness of less than about 200 μm. A plurality of through-hole vias are formed in the silicon-based thin package substrate, connecting BGA balls and solder bumps. The silicon-based thin package substrate... Agent: Slater & Matsil, L.L.P.

20080023851 - Microelectronic device connection structure: The invention broadly and generally provides a connection structure for connecting a microelectronic device to a substrate, the aforesaid connection structure comprising: (a) a metal layer electrically connected to the aforesaid microelectronic device; (b) an interface element attached to an interface portion of the aforesaid metal layer; (c) a metallic... Agent: Ibm Corporation, T.j. Watson Research Center

20080023852 - Metal pad of mode dial and manufacturing method thereof: A metal pad of mode dial and a manufacturing method thereof, wherein the metal pad is disposed on a substrate and the metal pad comprises at least one metal base pad and at least one conductive foil layer. The conductive foil layer is fixed on the metal base pad in... Agent: Rosenberg, Klein & Lee

20080023853 - Flip chip adaptor package for bare die: A board for connecting a bare semiconductor die with a bond pad arrangement which does not conform to a master printed circuit board with a specific or standardized pin out, connector pad, or lead placement arrangement. The board comprises a printed circuit board including first elements, such as minute solder... Agent: Trask Britt, P.C./ Micron Technology

20080023854 - Generating an integrated circuit identifier: The generation of a chip identifier supporting at least one integrated circuit, which includes providing a cutout of least one conductive path by cutting the chip, the position of the cutting line relative to the chip conditioning the identifier.... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20080023855 - Overlay marks, methods of overlay mark design and methods of overlay measurements: An overlay mark for determining the relative shift between two or more successive layers of a substrate is disclosed. The overlay mark includes at least one test pattern for determining the relative shift between a first and a second layer of the substrate in a first direction. The test pattern... Agent: Beyer Weaver LLP - Kla Tencor

20080017842 - Phase change memory cell including nanocomposite insulator: A memory cell includes a first electrode, a second electrode, storage material positioned between the first electrode and the second electrode, and a nanocomposite insulator contacting the storage material.... Agent: Dicke, Billig & Czaja

20080017843 - Spintronic transistor: A semiconductor device including: a substrate comprising silicon; a channel region formed on the substrate; a spin injector formed on the substrate at a first side of the channel region and configured to diffuse a spin-polarized current into the channel region; a spin detector formed on the substrate at a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080017852 - Conductive polymer composition comprising organic ionic salt and optoelectronic device using the same: Disclosed herein is a conductive polymer composition for an organic optoelectronic device capable of improving efficiency and lifetime. The conductive polymer composition comprises a conductive polymer, at least one organic ionic salt selected from compounds represented by the following Formulae 2 to 5 and a solvent.... Agent: Summa, Allan & Additon, P.A.

20080017851 - Fabrication method for an organic thin film transistor substrate: An organic thin film transistor (TFT) substrate with a simplified fabrication process is disclosed. The TFT substrate includes a gate line and a data line and an organic TFT connected to the gate line and the data line. The gate line and the data line define a pixel region where... Agent: Macpherson Kwok Chen & Heid LLP

20080017848 - Nanoparticle dispersions with low aggregation levels: An apparatus comprising a substrate having a surface and a dielectric layer comprising a distribution of particles. The layer is located over the surface and has a dielectric constant of seven or more. Each particle has a particle core and a polymer shell that is chemically bonded thereto and located... Agent: Hitt Gaines, PC Alcatel-lucent

20080017858 - Fuse/anti-fuse structure and methods of making and programming same: Techniques are provided for fuse/anti-fuse structures, including an inner conductor structure, an insulating layer spaced outwardly of the inner conductor structure, an outer conductor structure disposed outwardly of the insulating layer, and a cavity-defining structure that defines a cavity, with at least a portion of the cavity-defining structure being formed... Agent: Ryan, Mason & Lewis, LLP

20080017860 - Light-emitting device and electronic apparatus: A light-emitting device includes a power feeding line to which a predetermined voltage is supplied; a light-emitting element formed of a first electrode, a second electrode, and a light-emitting layer interposed between the first electrode and the second electrode; and a driving transistor that controls the amount of current supplied... Agent: Oliff & Berridge, PLC

20080017861 - Optical head and image forming apparatus: An optical head includes a plurality of unit regions repeatedly arrayed in one direction. Each region is constituted by a light-emitting element which is driven by a current to emit light, a control transistor which is connected in parallel with the light-emitting element, and which receives gray-scale data that specifies... Agent: Oliff & Berridge, PLC

20080017859 - System for displaying images including thin film transistor device and method for fabricating the same: A system for displaying images comprises a thin film transistor (TFT) device comprising a substrate having a pixel region and a terminal region. A first conductive layer is disposed on the substrate, comprising a gate electrode for a thin film transistor in the pixel region and at least one track... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20080017863 - Memory cell and fabricating method thereof: A