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Active solid-state devices (e.g., transistors, solid-state diodes) January USPTO class listing 01/08

20080023685 - Memory device and method of making same: A memory device includes a phase-change material and a first electrode in electrical communication with the phase-change material. Also included is a second electrode in electrical communication with the phase-change material and a dielectric layer. The dielectric layer is disposed between the first electrode and the second electrode. The dielectric... Agent: Honigman Miller Schwartz & Cohn LLP

20080023688 - Efficient carrier injection in a semiconductor device: Semiconductor devices such as VCSELs, SELs, LEDs, and HBTs are manufactured to have a wide bandgap material near a narrow bandgap material. Electron injection is improved by an intermediate structure positioned between the wide bandgap material and the narrow bandgap material. The intermediate structure is an inflection, such as a... Agent: Workman Nydegger

20080023687 - Light emitting device and method of manufacturing the same: A method of manufacturing a light emitting device includes: forming a plurality of independent light emitting portions on a growth substrate; separating the light emitting portions from the growth substrate; mounting the light emitting portions onto a receiving substrate; and dicing the receiving substrate, onto which the light emitting portions... Agent: Sughrue Mion, PLLC

20080023689 - Nitride-based light emitting device: A nitride-based light emitting device capable of achieving an enhancement in light emission efficiency and an enhancement in reliability is disclosed. The nitride-based light emitting device includes a first-conductivity semiconductor layer, a second-conductivity semiconductor layer, an active layer arranged between the first-conductivity semiconductor layer and the second-conductivity semiconductor layer, the... Agent: Mckenna Long & Aldridge LLP Song K. Jung

20080023690 - Nitride-based light emitting device: A nitride-based light emitting device capable of achieving an enhancement in light emission efficiency and an enhancement in reliability is disclosed. The nitride-based light emitting device includes a light emitting layer including a quantum well layer and a quantum barrier layer, and a stress accommodating layer arranged on at least... Agent: Mckenna Long & Aldridge LLP Song K. Jung

20080023692 - Transistor having a strained channel region including a performance enhancing material composition: By forming a semiconductor alloy in a silicon-based active semiconductor region prior to the gate patterning, material characteristics of the semiconductor alloy itself may also be exploited in addition to the strain-inducing effect thereof. Consequently, device performance of advanced field effect transistors may be even further enhanced compared to conventional... Agent: J. Mike Amerson Williams, Morgan & Amerson, P.C.

20080023693 - Methods, devices and compositions for depositing and orienting nanostructures: Methods and systems for depositing nanomaterials onto a receiving substrate and optionally for depositing those materials in a desired orientation, that comprise providing nanomaterials on a transfer substrate and contacting the nanomaterials with an adherent material disposed upon a surface or portions of a surface of a receiving substrate. Orientation... Agent: Nanosys Inc.

20080023694 - Display device and method of manufacturing the same: A display device and a method of manufacturing the same are provided. The display device comprises a substrate, a light-emitting element and a switch element. The substrate has a substrate upper surface and a recess region lower than the substrate upper surface. The light-emitting element comprises a first electrode, a... Agent: Rabin & Berdo, PC

20080023696 - Memory element and semiconductor device: An object is to reduce variations in programming behavior from memory element to memory element. Furthermore, an object is to obtain a semiconductor device with excellent writing characteristics and in which the memory element is mounted. The memory element includes a first conductive layer, a metal oxide layer, a semiconductor... Agent: Eric Robinson

20080023695 - Organic thin film transistor substrate and method of manufacturing the same: An organic thin film transistor substrate and a method of manufacturing the organic thin film transistor substrate capable of preventing overflow of an organic semiconductor layer. An organic thin film transistor substrate comprises a gate line formed on the substrate, a data line intersecting the gate line, a thin film... Agent: Macpherson Kwok Chen & Heid LLP

20080023697 - Organic thin film transistor substrate and method of manufacturing the same: The organic thin film transistor according to the present invention comprises a gate line formed on a substrate; a data line which intersects the gate line with an organic gate insulating layer interposed therebetween to define a pixel area; a thin film transistor connected with the gate line and the... Agent: Macpherson Kwok Chen & Heid LLP

20080023698 - Device having zinc oxide semiconductor and indium/zinc electrode: An electronic device including: (a) a semiconductor layer including crystalline zinc oxide; and (b) an electrode including a suitable amount of zinc, indium, or a mixture thereof.... Agent: Patent Documentation Center

20080023699 - A test structure and method for detecting charge effects during semiconductor processing: A semiconductor process test structure comprises an electrode, a charge-trapping layer, and a diffusion region. The test structure is a capacitor-like structure in which the charge-trapping layer will trap charges during various processing steps. Gate-induced drain leakage (GIDL) measurement techniques can then be used to characterize the charging status of... Agent: Baker & Mckenzie LLP Patent Department

20080023700 - Scan testing in single-chip multicore systems: Various techniques for testing multicore processors in an integrated circuit. Each core includes a plurality of registers configured to form at least two scan chains. In one embodiment, a verification unit located in the integrated circuit is electrically coupled to outputs of the scan chains. The verification unit is configured... Agent: Law Office Of Ido Tuchman (yor)

20080023703 - System and method for manufacturing a thin-film device: A thin-film device includes a plurality of circuit components defining an operational region of the thin-film device, an unpatterned channel portion disposed on the plurality of circuit components, and a patterned passivation dielectric selectively disposed on the unpatterned channel portion to electrically pattern an active region of the unpatterned channel... Agent: Hewlett Packard Company

20080023704 - Display device and fabrication method thereof: The present invention obtains a system-in-panel display device using a high-performance thin film transistor by suppressing aggregation of a molten semiconductor at the time of allowing strip-like pseudo-single crystal to grow continuously with a direction control by radiating beams of continuous oscillation laser to a semiconductor film made of silicon... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080023705 - Thin-film transistor substrate, method of manufacturing the same and display panel having the same: A thin-film transistor (TFT) substrate includes a gate electrode, a gate insulation pattern, a channel pattern, a first organic insulation pattern, a source electrode and a drain electrode. The gate electrode is formed on a base substrate. The gate insulation pattern is formed on the gate electrode and is smaller... Agent: Macpherson Kwok Chen & Heid LLP

20080023707 - Semiconductor device and method of producing the semiconductor device: A semiconductor device, includes: 1) an electric field relaxing area, including: i) a hetero junction formed by the followings: a) a first semiconductor material, and b) a second semiconductor material different from the first semiconductor material in band gap, and ii) an impurity introducing area so formed on the first... Agent: Foley And Lardner LLP Suite 500

20080023709 - Semiconductor light-emitting device and method of fabricating the same: The invention provides a semiconductor light-emitting device with II-V group (or II-IV-V group) compound contact layer and a method of fabricating the same. The semiconductor light-emitting device according to a preferred embodiment of the invention includes a substrate, a first conductive type semiconductor material layer, a light-emitting layer, a first... Agent: Birch Stewart Kolasch & Birch

20080023717 - Display substrate, method of manufacturing the same and display device having the same: A display substrate capable of improving the signal transmission characteristics and image quality of a display device is presented. The display substrate includes a first conductive line on an insulating substrate. A storage capacitor line is on the insulating substrate. A storage capacitor line extends substantially parallel to the first... Agent: Macpherson Kwok Chen & Heid LLP

20080023711 - Light emitting diode package with optical element: A light emitting diode (LED) package comprising a substrate with an LED chip mounted to the substrate and in electrical contact with it. An inner material covers the LED chip, and a lens covers the inner material with the lens material being harder than the inner material. An adhesive is... Agent: Koppel, Patrick & Heybl

20080023715 - Method of making white light leds and continuously color tunable leds: A light emitting diode comprising of a fluorescent microsphere coating is proposed. The coating consists of fluorescent microspheres which fluoresce at green and red wavelengths, excited by a shorter wavelength LED. Due to the micron-scale dimension of the spheres, they are non-resolvable to the human eye and the overall optical... Agent: Cooper & Dunham, LLP

20080023716 - Semiconductor combined device, light emitting diode head, and image forming apparatus: A semiconductor combined device includes a substrate and a light emitting element disposed on the substrate. The light emitting element includes a mesa slope inclined relative to the substrate by a first angle; a light emitting portion extending in parallel to the substrate; an interlayer insulation layer covering the mesa... Agent: Takeuchi & Kubotera, LLP

20080023714 - Surface mounting device-type light emitting diode: A surface mounting device-type light emitting diode (SMD-type LED) comprises a package housing one or more pairs of electrodes therein, the package having a predetermined space in the center thereof and a light-emission window which is opened so that light is emitted through the light-emission window; a lens formed on... Agent: Lowe Hauptman Ham & Berner, LLP

20080023720 - Light emitting diode lighting module with improved heat dissipation structure: A light emitting diode (LED) lighting module with an improved heat dissipative structure comprises a plurality of the LEDs and a heat pipe apparatus on which at least a circuit layer is provided. The circuit layer is directly formed on an electrical insulation layer with superior heat conductivity on a... Agent: Wpat, PC Intellectual Property Attorneys

20080023721 - Light emitting diode package having multiple molding resins: Disclosed is a light emitting diode (LED) package having multiple molding resins. The LED package includes a pair of lead terminals. At least portions of the pair of lead terminals are embedded in a package main body. The package main body has an opening through which the pair of lead... Agent: Marger Johnson & Mccollom, P.C.

20080023722 - Light-emitting heat-dissipating device and packaging method thereof: A light-emitting heat-dissipating device includes at least one light-emitting chip and a circuit board. The circuit board has at least one recess and at least one thermally conducting element disposed in the recess. The light-emitting chip is disposed on the thermally conducting element and connected to the circuit board via... Agent: Birch Stewart Kolasch & Birch

20080023686 - Storage nodes, phase change memories including a doped phase change layer, and methods of operating and fabricating the same: Example embodiments may provide a doped phase change layer and a method of operating and fabricating a phase change memory with the example embodiment doped phase change layer. The phase change memory may include a storage node having a phase change layer and a switching device, wherein the phase change... Agent: Harness, Dickey & Pierce, P.L.C

20080023691 - Light emitting diode having vertical topology and method of making the same: An LED having vertical topology and a method of making the same is capable of improving a luminous efficiency and reliability, and is also capable of achieving mass productivity. The method includes forming a semiconductor layer on a substrate; forming a first electrode on the semiconductor layer; forming a supporting... Agent: Mckenna Long & Aldridge LLP Song K. Jung

20080023702 - Integrated circuit module and method of forming the same: A method of forming an integrated circuit module may include interposing an auxiliary PCB between at least one semiconductor chip and a main PCB, the auxiliary PCB having at least one circuit pattern for electrical connection to one of the semiconductor chip and at least one circuit pattern formed on... Agent: Harness, Dickey & Pierce, P.L.C

20080023701 - Test module for semiconductor device: A test module for measuring electrical characteristics of a semiconductor device includes a plurality of shallow trench isolation (STI) layers formed over a semiconductor substrate. An active area includes not only an extended part enclosing the STI layers but also a plurality of minute line-width parts isolated by the STI... Agent: Sherr & Nourse, PLLC

20080023706 - Nitride semiconductor device: A nitride semiconductor device includes: a substrate containing Si; a channel layer provided on the substrate and made of nitride semiconductor material; a barrier layer provided on the channel layer and made of nitride semiconductor material; a first and second main electrode connected to the barrier layer; and a control... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080023708 - Semiconductor light-emitting device and method of manufacturing semiconductor light-emitting device: Affords a semiconductor light-emitting device in which a decrease in external quantum efficiency has been minimized even at high current densities. In a semiconductor light-emitting device (11), a gallium nitride cladding layer (13) has a threading dislocation density of 1×107 cm−2 or less. An active region (17) has a quantum... Agent: Judge Patent Associates

20080023710 - Method of growing a nitride single crystal on silicon wafer, nitride semiconductor light emitting diode manufactured using the same and the manufacturing method: The invention provides a method for growing a nitride single crystal on a silicon wafer and a method for manufacturing a light emitting device using the same. In growing the nitride single crystal according to one aspect of the invention, first, a silicon substrate having a surface in (111) crystal... Agent: Mcdermott Will & Emery LLP

20080023718 - Led lamp: An LED lamp includes a substrate, an LED chip, and a resin portion. The LED chip is flip-chip bonded to the substrate. The resin portion covers the LED chip and includes at least one type of phosphor that transforms the emission of the LED chip into light having a longer... Agent: Akin Gump Strauss Hauer & Feld L.L.P.

20080023719 - Light emitting devices with improved light extraction efficiency: Light emitting devices with improved light extraction efficiency are provided. The light emitting devices have a stack of layers including semiconductor layers comprising an active region. The stack is bonded to a transparent optical element.... Agent: Patent Law Group LLP

20080023713 - Package for housing light-emitting element and method for manufacturing package for housing light-emitting element: A package for housing a light-emitting element wherein a via hole for wiring provided so as to pass through an insulating substrate is arranged in such a manner that it is positioned under a reflector frame; a method for manufacturing the above package for housing a light-emitting element which comprises... Agent: The Webb Law Firm, P.C.

20080023712 - Phosphor converted light emitting device: A phosphor converted light emitting device includes a semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region, the light emitting layer being configured to emit light having a first peak wavelength; a first phosphor configured to emit light having a second peak wavelength;... Agent: Patent Law Group LLP

20080023723 - Led lighting device: An LED lighting device comprises a seat with a conductor. A light emitting diode is disposed on the conductor of the seat, and has an upper positive conductive pad, a lower negative conductive pad, and an insulating pad disposed between the positive and negative conductive pads. The lower negative conductive... Agent: Lin & Associates Intellectual Property, Inc.

20080023724 - Light emitting element, light emitting device having the same and method for manufacturing the same: A light emitting element comprises a first electrode, a second electrode configured to transmitting light, an organic layer arranged between the first and the second electrodes, comprising a light emitting layer, and a capping layer arranged on the second electrode and made of a material with a higher refractive index... Agent: Birch Stewart Kolasch & Birch

20080023725 - Process for manufacturing epitaxial wafers for integrated devices on a common compound semiconductor iii-v wafer: A method of fabricating an epitaxial compound semiconductor III-V wafer suitable for the subsequent fabrication of at least two different types of integrated active devices (such as an HBT and a FET) on such wafer by providing a substrate; growing a first epitaxial structure on the substrate; and growing a... Agent: Fish & Richardson P.C.

20080023727 - Field effect transistor having its breakdown voltage enhanced: Deterioration of the high frequency characteristics of a field effect transistor is prevented, and the on- and off-gate leakage currents are reduced. A field effect transistor comprises the fourth electrode 126 between the gate electrode 122 and the drain electrode 118. The fourth electrode is formed to satisfy the relationship... Agent: Rabin & Berdo, PC

20080023726 - Schottky gate metallization for semiconductor devices: A method of forming a Schottky barrier contact to a semiconductor material, includes the following steps: depositing an iridium contact on a surface of the semiconductor material; and annealing the iridium contact to form a Schottky barrier contact to the semiconductor material. For an example of an iridium Schottky contact... Agent: Martin Novack

20080023728 - Semiconductor integrated circuits with stacked node contact structures: Semiconductor integrated circuits that include thin film transistors (TFTs) and methods of fabricating such semiconductor integrated circuits are provided. The semiconductor integrated circuits may include a bulk transistor formed at a semiconductor substrate and a first interlayer insulating layer on the bulk transistor. A lower TFT may be on the... Agent: Myers Bigel Sibley & Sajovec

20080023729 - Solid-state image sensor: In cases where AGP driving is applied to a CCD solid-state image sensor having a horizontal overflow drain structure, a problem arises in that the charges overflow into the second channel regions (8) from the overflow drain regions (14), and noise is superimposed on the information charges. The CCD solid-state... Agent: Oliff & Berridge, PLC

20080023730 - Imaging apparatus and a device for use therewith: An imaging apparatus capable of suppressing deterioration of image qualities and output properties is provided having one or more output circuits in series and a buffer circuit 6, and processing luminance signals from photodetectors to output image information, the buffer circuit performing impedance conversion on signals outputted from a final... Agent: Mcdermott Will & Emery LLP

20080023731 - Three-dimensional cascaded power distribution in a semiconductor device: An IC structure having reduced power loss and/or noise includes two or more active semiconductor regions stacked in a substantially vertical dimension, each active semiconductor region including an active layer. The IC structure further includes two or more voltage supply planes, each of the voltage supply planes corresponding to a... Agent: Ryan, Mason & Lewis, LLP

20080023733 - Fabrication methods for compressive strained-silicon and transistors using the same: Fabrication methods for compressive strained-silicon by ion implantation. Ions are implanted into a silicon-containing substrate and high temperature processing converts the vicinity of the ion-contained region into strained-silicon. Transistors fabricated by the method are also provided.... Agent: Birch Stewart Kolasch & Birch

20080023732 - Use of carbon co-implantation with millisecond anneal to produce ultra-shallow junctions: Embodiments of the present invention include methods for forming an ultra-shallow junction in a substrate. In one embodiment, the method includes providing a silicon substrate, co-implanting the silicon substrate with carbon and a dopant to form a doped silicon substrate, and exposing the silicon substrate to a short time thermal... Agent: Patterson & Sheridan, LLP

20080023734 - Microlenses of cmos image sensor and method for fabricating the same: A method of fabricating microlenses in a CMOS image sensor including at least one of the following steps: Forming a color filter array including a plurality of color filters on a semiconductor substrater. Forming on and/or over the color filter array a flattening layer to compensate for height differences between... Agent: Sherr & Nourse, PLLC

20080023735 - Light sensing element, array substrate having the same and liquid crystal display apparatus having the same: In a light sensing element having simplified structure, an array substrate having the light sensing element and an LCD apparatus having the light sensing element, the light sensing element includes a first electrode, a control electrode and a second electrode. An alternating bias voltage is applied to the first electrode.... Agent: Macpherson Kwok Chen & Heid LLP

20080023736 - Semiconductor device and method for manufacturing the same: An overlay key for a semiconductor device is provided. The semiconductor device can include a first insulating layer having a trench serving as an outer key; and a metal layer formed on the first insulating layer including in the trench of the outer key. Here, an inner key region of... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20080023737 - Image sensor and method for manufacturing the same: An image sensor and a method for manufacturing the same are provided. In the method, a photoresist is formed on a substrate including a photodiode region and a gate electrode opposite to the photodiode region on the basis of the gate electrode. An oxide layer is formed to a specific... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080023738 - Silicon microlens array: A silicon microlens and method of forming the microlens for focusing and steering light into the photosensitive region of a pixel. The microlens may be formed integrally within a silicon substrate or within a silicon layer over the substrate by performing a series of concentric etches of decreasing depth to... Agent: Dickstein Shapiro LLP

20080023739 - Method of manufacturing a semiconductor wafer comprising an integrated optical filter: A method manufactures semiconductor chips each comprising a component implanted in the semiconductor. The method includes collectively implanting components onto a front face of a semiconductor wafer and fixing a plate of a transparent material onto the front face of the wafer. Fixing the plate of transparent material is preceded... Agent: Seed Intellectual Property Law Group PLLC

20080023741 - Nonvolatile ferroelectric memory device using silicon substrate, method for manufacturing the same, and refresh method thereof: A nonvolatile ferroelectric memory device using a silicon substrate includes an insulating layer formed in an etching region of the silicon substrate, a bottom word line formed in the insulating layer so as to be enclosed by the insulating layer, a floating channel layer formed over the bottom word line,... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080023740 - Novel capping layer for a magnetic tunnel junction device to enhance dr/r and a method of making the same: An MTJ in an MRAM array or TMR read head is disclosed in which a low magnetization capping layer is a composite having a NiFeHf inner layer formed on a NiFe or CoFeB/NiFe free layer, a Ta middle layer, and a Ru outer layer on the Ta layer. For example,... Agent: Stephen B. Ackerman

20080023742 - Semiconductor device with a surrounded channel transistor: The semiconductor device includes a device isolation structure, a surrounded channel structure, and a gate electrode. The device isolation structure is formed in a semiconductor substrate to define an active region. The surrounded channel structure connecting source/drain regions is separated from the semiconductor substrate under the active region by a... Agent: Townsend And Townsend And Crew, LLP

20080023743 - Semiconductor memory device and manufacturing method of the same: In this semiconductor memory device, a potential clamping region having no insulation layer formed therein is provided in an insulation layer. More specifically, the potential clamping region is formed under a body portion at a position near a first impurity region, and extends to a first semiconductor layer. A body... Agent: Mcdermott Will & Emery LLP

20080023744 - Nonvolatile semiconductor memory device and method of manufacturing the same: Provided are a nonvolatile semiconductor memory device and a method of manufacturing the same. The nonvolatile semiconductor memory device may include a tunnel insulating layer formed on a semiconductor substrate, a charge trap layer including a dielectric layer doped with a transition metal formed on the tunnel insulating layer, a... Agent: Harness, Dickey & Pierce, P.L.C

20080023745 - Methods of forming capacitors for semiconductor memory devices and resulting semiconductor memory devices: Methods of forming capacitors include forming a first mold layer and a second mold layer on a substrate, forming storage electrodes through the mold layers, the storage electrodes arranged in rows extending in a first direction and spaced apart from adjacent storage electrodes along the first direction by a first... Agent: Myers Bigel Sibley & Sajovec

20080023746 - Semiconductor devices having dielectric layers and methods of forming the same: A method of forming a semiconductor device includes loading a semiconductor substrate into a reaction chamber, and providing metal organic precursors including hafnium and zirconium into the reaction chamber to form hafnium-zirconium oxide (HfxZr1-xO; 0<X<1) with a tetragonal crystalline structure on the semiconductor substrate. Related structures are also discussed.... Agent: Myers Bigel Sibley & Sajovec

20080023747 - Semiconductor memory device with memory cells on multiple layers: A semiconductor memory device includes a first substrate having at least one string including a first select transistor, a second select transistor, and first memory cells connected in series between the first and second select transistors of the first substrate. The semiconductor memory device further includes a second substrate having... Agent: Volentine & Whitt PLLC

20080023748 - Self-aligned contacts to source/drain regions: In some embodiments, when etching a dielectric to form a self-aligned contact opening to a source/drain region (160) of a transistor, the gate structure (220) is protected on top with a non-conformal layer (M3), possibly silicon, deposited so that it is thicker over the gate than over the source/drain region.... Agent: Macpherson Kwok Chen & Heid LLP

20080023749 - Non-volatile memory device and methods of operating and fabricating the same: Example embodiments provide a non-volatile memory device with increased integration and methods of operating and fabricating the same. A non-volatile memory device may include a plurality of first storage node films and a plurality of first control gate electrodes on a semiconductor substrate. A plurality of second storage node films... Agent: Harness, Dickey & Pierce, P.L.C

20080023750 - Memory cell system with multiple nitride layers: A memory cell system is provided including forming a first insulator layer over a semiconductor substrate, forming a charge trap layer over the first insulator layer, forming a second insulator layer over the charge trap layer, forming a top blocking intermediate layer over the second insulator layer, and forming a... Agent: Law Offices Of Mikio Ishimaru

20080023751 - Integrated circuit memory system employing silicon rich layers: An integrated circuit memory system that includes: providing a substrate; forming a silicon rich charge storage layer over the substrate; forming a first isolation trench through the silicon rich charge storage layer in a first direction; and forming a second isolation trench through the silicon rich charge storage layer in... Agent: Law Offices Of Mikio Ishimaru

20080023752 - Boron doped sige halo for nfet to control short channel effect: An n-type field effect transistor (NFET) and methods of forming a halo for an NFET to control the short channel effect are disclosed. One method includes forming a gate over a silicon substrate; recessing the silicon adjacent to the gate; forming a halo by epitaxially growing boron in-situ doped silicon... Agent: Hoffman, Warnick & D'alessandro LLC

20080023753 - Semiconductor device and method for fabricating the same: A semiconductor device includes a device isolation structure, a recess channel structure, and a gate electrode. The device isolation structure is formed in a semiconductor substrate to define an active region. The recess channel structure is disposed in the semiconductor substrate under the active region. The gate electrode includes a... Agent: Townsend And Townsend And Crew, LLP

20080023756 - Semiconductor device and fabricating method thereof: A semiconductor device and method of manufacturing the same. The semiconductor device includes a semiconductor substrate having a first conductive layer, a second conductive layer on the first conductive layer, a first high density impurity area on the second conductive layer, and a second high density impurity area on the... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20080023755 - Semiconductor device and method for fabricating the same: A method for fabricating a semiconductor device is provided. In the method, a bulb type recess is formed on a semiconductor substrate in an active region. A gate insulating film is formed over the semiconductor substrate and on a surface of the recess. A first polysilicon layer is formed over... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080023754 - Semiconductor device with a wave-shaped trench or gate and method for manufacturing the same: A semiconductor device and a method for manufacturing the same includes forming a trench for forming a fin-type active region to have a wave shape to not connect a gate to an active region, thereby improving the speed of current flowing in the gate and reduce leakage current in a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080023757 - Semiconductor device having fin-field effect transistor and manufacturing method thereof: A semiconductor device includes an element isolation region formed in a semiconductor substrate, an active region surrounded by the element isolation region, and a gate electrode formed in one direction to cross the active region. The semiconductor substrate includes two gate trenches formed in parallel to a major axis direction... Agent: Foley And Lardner LLP Suite 500

20080023759 - Low voltage high density trench-gated power device with uniformly doped channel and its edge termination: Merging together the drift regions in a low-power trench MOSFET device via a dopant implant through the bottom of the trench permits use of a very small cell pitch, resulting in a very high channel density and a uniformly doped channel and a consequent significant reduction in the channel resistance.... Agent: Hiscock & Barclay, LLP

20080023758 - Semiconductor device: The object of the present invention is to reduce parasitic inductance of a main circuit in a power supply circuit. The present invention provides a non-insulated DC-DC converter having a circuit in which a power MOS•FET for a high-side switch and a power MOS•FET for a low-side switch are connected... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080023760 - Semiconductor device with increased breakdown voltage: Optimization of the implantation structure of a metal oxide silicon field effect transistor (MOSFET) device fabricated using conventional complementary metal oxide silicon (CMOS) logic foundry technology to increase the breakdown voltage. The techniques used to optimize the implantation structure involve lightly implanting the gate region, displacing the drain region from... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20080023761 - Semiconductor devices and methods of fabricating the same: Semiconductor devices and methods of fabricating the same are provided. According to an example embodiment, a semiconductor device may include an active region disposed in a substrate and having first conductivity type impurity ions, a gate electrode crossing on the active region, a source region disposed within the active region... Agent: Harness, Dickey & Pierce, P.L.C

20080023762 - Modular bipolar-cmos-dmos analog integrated circuit and power transistor technology: A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms of a lateral trench MOSFET, and a 30V lateral N-channel DMOS. Each of... Agent: Patentability Associates

20080023763 - Threshold-voltage trimming of insulated-gate power devices: Methods and systems for precision manufacture of MOS-gated power devices. The raw device includes a stratum of semiconductor nanocrystals embedded at or near the top edge of the gate dielectric, and after the device has been built a programmation operation trims the device to the precisely correct threshold voltage, by... Agent: Groover & Associates

20080023764 - Semiconductor memory device and manufacturing method of the same: In this semiconductor memory device, a potential clamping region having no insulation layer formed therein is provided in an insulation layer. More specifically, the potential clamping region is formed under a body portion at a position near a first impurity region, and extends to a first semiconductor layer. A body... Agent: Mcdermott Will & Emery LLP

20080023765 - Semiconductor devices and methods of fabricating the same: Provided are semiconductor devices and methods of fabricating the semiconductor devices. Embodiments of such methods may include sequentially forming a gate insulation layer and a metal layer on a semiconductor substrate and etching the metal layer to form a metallic residue on the gate insulation layer. Such methods may also... Agent: Myers Bigel Sibley & Sajovec

20080023766 - electrostatic discharge protection device: An electrostatic discharge protection device comprising a multi-finger gate, a first lightly doped region of a second conductivity, a first heavily doped region of the second conductivity, and a second lightly doped region of the second conductivity. The multi-finger gate comprises a plurality of fingers mutually connected in parallel over... Agent: Thomas, Kayden, Horstemeyer & Risley LLP

20080023767 - High voltage electrostatic discharge protection devices and electrostatic discharge protection circuits: High-voltage ESD devices and circuits using the high-voltage ESD devices. The high-voltage ESD devices include an N-tub in a P-type substrate; a graded anode having a first P-type region in a second P-type region and located within the N-tub, a concentration of P-type dopant in the first P-type region being... Agent: Schmeiser, Olsen & Watts

20080023768 - Synchronous substrate injection clamp: In accordance with the principles of the invention, an integrated circuit comprises a substrate having a first FET formed on the substrate. The first FET has a first terminal coupleable to a load, a second terminal and a control terminal. The second terminal is connected to the substrate. The substrate... Agent: Donald J Lenkszus

20080023769 - Semiconductor devices having selectively tensile stressed gate electrodes and methods of fabricating the same: A semiconductor device includes an active region. A gate electrode is disposed on the active region. An isolation region adjoins the active region, and is recessed with respect to a top surface of the active region underlying the gate electrode. The isolation region may be recessed a depth substantially equal... Agent: Myers Bigel Sibley & Sajovec

20080023770 - Stacked semiconductor devices and methods of manufacturing the same: The stacked semiconductor device includes a semiconductor substrate, a multi-layered insulation layer pattern having at least two insulation layer patterns and an opening, an active layer pattern formed on each of the insulation layer patterns, a first plug including single crystalline silicon-germanium, a second plug including single crystalline silicon, and... Agent: Mills & Onello LLP

20080023772 - Semiconductor device including a germanium silicide film on a selective epitaxial layer: A process for manufacturing a semiconductor device includes: forming first contact holes in a dielectric film for a PMOS transistor; depositing germanium on the source/drain regions of the PMOS transistor exposed from the first contact holes; heat treating the germanium with silicon in the source/drain regions of the PMOS transistor... Agent: Mcginn Intellectual Property Law Group, PLLC

20080023771 - Semiconductor structure comprising field effect transistors with stressed channel regions and method of forming the same: A method of forming a semiconductor structure comprises providing a semiconductor substrate comprising a first transistor element and a second transistor element. Each of the first transistor element and the second transistor element comprises a gate electrode. A stressed material layer is deposited over the first transistor element and the... Agent: Williams, Morgan & Amerson

20080023773 - Semiconductor device and method of manufacturing the same: A first p-type SiGe mixed crystal layer is formed by an epitaxial growth method in a trench, and a second p-type SiGe mixed crystal layer is formed. On the second SiGe mixed crystal layer, a third p-type SiGe mixed crystal layer is formed. The height of an uppermost surface of... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20080023774 - Semiconductor device and method for fabricating the same: A semiconductor device includes: an isolation region formed in a semiconductor substrate; an active region surrounded by the isolation region of the semiconductor substrate; a fully silicided first gate line formed on the active region; a fully silicided second gate line formed on the isolation region; a first sidewall formed... Agent: Mcdermott Will & Emery LLP

20080023775 - Asymmetric field effect transistors (fets): A semiconductor structure and a method for forming the same. The structure includes (a) a semiconductor channel region, (b) a semiconductor source block in direct physical contact with the semiconductor channel region; (c ) a source contact region in direct physical contact with the semiconductor source block, wherein the source... Agent: Schmeiser, Olsen & Watts

20080023776 - Metal oxide semiconductor device with improved threshold voltage and drain junction breakdown voltage and method for fabricating same: A metal oxide semiconductor device having a substrate layer of a semiconductor material and a gate, a source and, a drain formed over the substrate layer is provided. The substrate is doped with a deep n-type lightly doped drain implant that simmultaneously lowers the threshold voltage and increases the drain... Agent: Dorsey & Whitney LLP

20080023777 - Semiconductor device and method of manufacture thereof: A dielectric material layer is formed over a workpiece, a metal layer is formed over the dielectric material layer, and a semiconductive material layer is formed over the metal layer. The workpiece is heated, causing a top portion of the metal layer to interact with the semiconductive material layer and... Agent: Slater & Matsil LLP

20080023778 - Fully silicided gate electrodes and method of making the same: The present invention relates to a method of selectively fabricating metal gate electrodes in one or more device regions by fully siliciding (FUSI) the gate electrode. The selective formation of FUSI enables metal gate electrodes to be fabricated on devices that are compatible with workfunctions that are different from conventional... Agent: International Business Machines Corporation Dept. 18g

20080023779 - Photoelectric conversion element: In a photoelectric conversion element which generates electrical signals upon the incidence of light, a superlattice structure having a metal layer or metal silicide layer and a polysilicon layer is formed on a silicon substrate, the photoelectric conversion element has a three-terminal structure in which the metal layer or metal... Agent: Kratz, Quintos & Hanson, LLP

20080023780 - Image pickup device and method of manufacturing the same: An image pickup device comprises: a sensor substrate having image sensors arranged in its image pickup region in the form of a matrix; an interlayer insulating film layer formed below a bottom of the sensor substrate, the interlayer insulating film layer including wiring layers formed therein to construct an electric... Agent: Sughrue Mion, PLLC

20080023781 - Photodiode and manufacturing method of the same: A lateral photodiode with increased sensitivity. The lateral photodiode includes: a substrate, a semiconductor layer, formed on the substrate, for receiving input light, an insulation layer formed on the semiconductor layer, and electrodes formed within the insulation layer. A plurality of microlenses is formed over a surface of the insulation... Agent: Sughrue Mion, PLLC

20080023782 - Photo sensor and fabrication method thereof: A photo sensor and a fabrication method thereof are provided. A fluorescent substance is utilized to absorb light in a specific wavelength range and re-emit light detectable by a photo transducer element. An anti-reflective layer is formed on the photo transducer element to reduce refractive scattering of the re-emitting light... Agent: Fulbright And Jaworski LLP

20080023783 - Sensing capacitance in column sample and hold circuitry in a cmos imager and improved capacitor design: Improved designs for a capacitor, and particularly the sensing and references capacitors used in a column sample-and-hold (CSH) circuitry in a CMOS imager, are disclosed that minimize layout area. In-one embodiment, an additional plate layer (e.g., formed in metal 1) is provided above the traditional poly 2-poly 1 capacitor, which... Agent: Wong, Cabello, Lutsch, Rutherford & Brucculeri, L.L.P.

20080023784 - Solid-state imaging apparatus: A solid-state imaging apparatus including: a solid-state imaging device chip having an electrode pad provided on its front face; and a flexible board having a connecting electrode formed on an end face and being adhered at an end portion thereof to a side face of the solid-state imaging device chip... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20080023785 - Bottom source ldmosfet structure and method: This invention discloses bottom-source lateral diffusion MOS (BS-LDMOS) device. The device has a source region disposed laterally opposite a drain region near a top surface of a semiconductor substrate supporting a gate thereon between the source region and a drain region. The BS-LDMOS device further has a combined sinker-channel region... Agent: Bo-in Lin

20080023786 - Semiconductor structure of a high side driver and method for manufacturing the same: A semiconductor structure of a high side driver includes an ion-doped junction. The ion-doped junction includes a substrate, a first deep well and a second deep well, a first heavy ion-doped region and a second heavy ion-doped region. The first deep well and second deep well are formed in the... Agent: Bacon & Thomas, PLLC

20080023787 - Semiconductor device: A semiconductor device that reduces the width of an isolation region between semiconductor elements. The semiconductor device includes a semiconductor substrate, an epitaxial layer formed on the semiconductor substrate, a buried layer formed between the semiconductor substrate and the epitaxial layer, a first trench formed in the epitaxial layer so... Agent: Ditthavong Mori & Steiner, P.C.

20080023788 - Fuse box of semiconductor device formed using conductive oxide layer and method for forming the same: A fuse box of a semiconductor device includes a plurality of metal fuses formed on a first interlayer dielectric of a semiconductor substrate and previously removed in blowing regions thereof; a conductive oxidation layer formed to cover removed blowing regions of the metal fuses; a second interlayer dielectric formed on... Agent: Ladas & Parry LLP

20080023789 - Reprogrammable electrical fuse: The present invention provides a reprogrammable electrically blowable fuse. The electrically blowable fuse is programmed using an electro-migration effect and is reprogrammed using a reverse electro-migration effect. The state (i.e., “opened” or “closed”) of the electrically blowable fuse is determined by a sensing system which compares a resistance of the... Agent: Hoffman, Warnick & D'alessandro LLC

20080023790 - Mixed-use memory array: A mixed-use memory array is disclosed. In one preferred embodiment, a memory array is provided comprising a first set of memory cells operating as one-time programmable memory cells and a second set of memory cells operating as rewritable memory cells. In another preferred embodiment, a memory array is provided comprising... Agent: Brinks Hofer Gilson & Lione/sandisk

20080023791 - High performance integrated inductor: Some embodiments of the present invention include providing high performance integrated inductors.... Agent: Intel Corporation C/o Intellevate, LLC

20080023792 - Filler capacitor with a multiple cell height: Embodiments of the invention provide a layout architecture for a standard cell integrated circuit having an array of logic cells. A plurality of first power rails is above a substrate, each of the first power rails being coupled to a power supply and extending across the logic cells. Adjacent first... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20080023793 - Semiconductor device: When letters are written with a ballpoint pen, pen pressure is greater than or equal to 10 MPa. The IC tag embedded in the paper base material is required to withstand such pen pressure. An integrated circuit including a functional circuit which transmits and receive, performs arithmetic of, and stores... Agent: Eric Robinson

20080023794 - Integrated circuit with bipolar transistor: An integrated circuit including a bipolar transistor is disclosed. One embodiment provides an insulation structure used to form a junction insulation, a collector structure formed inside a semiconductor zone having openings dividing the collector structure into collector zones. The collector zones are arranged in such a manner that a shortest... Agent: Dicke, Billig & Czaja

20080023795 - Semiconductor devices and method of manufacturing them: With conventional device, the quantity of complex defects differs with each semiconductor device because the concentration of impurities intrinsically contained differs for each silicon wafer. Consequently, there is an undesirable variation in characteristics among the semiconductor devices. The invention provides a method for manufacturing PIN type diode which comprises an... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080023796 - Semiconductor device and method of manufacturing the same: A conventional semiconductor device, for example, a lateral PNP transistor has a problem that it is difficult to obtain a desired current-amplification factor while maintaining a breakdown voltage characteristic without increasing the device size. In a semiconductor device, that is a lateral PNP transistor, according to the present invention, an... Agent: Fish & Richardson P.C.

20080023797 - Semiconductor device and method for manufacturing same: In conventional processes, a recombination rate of minority carrier accumulated between a diffusion layer of an anode and a diffusion layer of a cathode cannot be enhanced. An interlayer insulating film 20 is formed on a semiconductor substrate 10. An opening 22 (first opening), an opening 24 (second opening) and... Agent: Sughrue Mion, PLLC

20080023798 - Memory cells with an anode comprising intercalating material and metal species dispersed therein: According to one embodiment of the present invention, a solid state electrolyte memory cell includes a cathode, an anode and a solid state electrolyte. The anode includes an intercalating material and first metal species dispersed in the intercalating material.... Agent: Dicke, Billig & Czaja

20080023799 - Nitride semiconductor device and manufacturing method of the same: A nitride semiconductor device includes an n-type GaN substrate with a semiconductor device formed thereon and an n-type electrode which is a metal electrode formed on the rear surface of the GaN substrate. A surface modified layer and a reaction layer are interposed between the GaN substrate and n-type electrode.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080023800 - Process for smoothening iii-n substrates: A process for preparing smoothened III-N, in particular smoothened III-N substrate or III-N template, wherein III denotes at least one element of group III of the Periodic System, selected from Al, Ga and In, utilizes a smoothening agent comprising cubic boron nitride abrasive particles. The process provides large-sized III-N substrates... Agent: Foley And Lardner LLP Suite 500

20080023801 - Method for producing an integrated circuit indlcuding a semiconductor: A method for producing an integrated circuit including a semiconductor is disclosed. In one embodiment, crystal defects are produced by irradiation in the material of the underlying semiconductor substrate which crystal defects form an inhomogeneous crystal defect density distribution in the vertical direction of the semiconductor component and lead to... Agent: Dicke, Billig & Czaja

20080023802 - Semiconductor device having a scribeline structure favorable for preventing chipping: A semiconductor device includes at least one semiconductor chip formed on a wafer and a scribeline provided along an outer circumference of the semiconductor chip. The semiconductor device further includes a chipping prevention wall provided close to a blade area in the scribeline to prevent chipping from advancing when the... Agent: Foley And Lardner LLP Suite 500

20080023803 - Method for forming vertical structures in a semiconductor device: A method is provided for making a semiconductor device, comprising (a) providing a semiconductor stack comprising a first semiconductor layer (407) having a <110> crystallographic orientation and a second semiconductor layer (405) having a <100> crystallographic orientation; (b) defining an oxide mask (415) in the first semiconductor layer; and (c)... Agent: Fortkort & Houston P.C.

20080023804 - High-speed electrical interconnects and method of manufacturing: High-speed interconnect systems for connecting two or more electrical elements for both on-chip and off-chip applications are provided. Interconnect system has the means, which could reduce the microwave loss induced due to the dielectrics. Reducing the effective loss tangent of the dielectrics reduces the microwave loss. With optimize design of... Agent: Banpil Photonics, Inc.

20080023805 - Array-processed stacked semiconductor packages: One embodiment of the invention is a semiconductor system (1400) of arrays (1401, 1402, etc.) of packaged devices. Each array includes a sheet-like substrate (1411, 1412, etc.) made of insulating material integral with conductive horizontal lines and vertical vias, and terminals on the surfaces. Semiconductor components, which may include more... Agent: Texas Instruments Incorporated

20080023806 - Stress-free lead frame: The present invention relates to a stress-free lead frame (1) for a semiconductor. The stress-free lead frame (1) is provided with a stress-relief means (15) and an interlocking means (16) at the outer periphery. The stress-relief means (15) is capable of accommodating expansion and compression while the interlocking means (16)... Agent: Townsend And Townsend And Crew, LLP

20080023807 - Dual side cooling integrated power device package and module and methods of manufacture: An integrated power device module having a leadframe structure with first and second spaced pads and one or more common source-drain leads located between said first and second pads, first and second transistors flip chip attached respectively to said first and second pads, wherein the source of said second transistor... Agent: Hiscock & Barclay, LLP

20080023808 - Chip package and digital camera module using same: A digital camera module (10) includes a chip package (20) and a lens module (50) mounted to the chip package. The package includes a carrier (21), a chip (23), a plurality of wires (24), an adhesive (26) and a cover (28). The carrier has a cavity (213) defined therein, an... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang Jeffrey T. Knapp

20080023809 - Chip package and digital camera module using same: A digital camera module (10) includes a chip package (20) and a lens module (50) mounted to the chip package. The package includes a carrier (21), a chip (23), a plurality of wires (24), an adhesive (26) and a cover (28). The carrier has a top surface (211), and a... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang Jeffrey T. Knapp

20080023810 - Semiconductor device: In inlets used for ID tags and the like, a defective connection between an integrated circuit part and an antenna is suppressed by improvement of tolerance for a bending or a pressing pressure. The integrated circuit part includes a semiconductor chip and a multilayer substrate having a concave portion. The... Agent: Eric Robinson

20080023811 - Structure combining an ic integrated substrate and a carrier, and method of manufacturing such structure: The present invention provides a structure combining an IC integrated substrate and a carrier, which comprises a carrier and an IC integrated substrate formed on the carrier. The IC integrated substrate has a first dielectric layer attached to the carrier. The materials of the carrier and the first dielectric layer... Agent: Madson & Austin

20080023812 - Semiconductor package having passive component and semiconductor memory module including the same: Example embodiments relate to a semiconductor package. The semiconductor package may include a mounting substrate, a semiconductor chip mounted to the mounting substrate, at least one passive component passing therethrough and mounted to the mounting substrate, and a cover covering the mounting substrate, the semiconductor chip and the at least... Agent: Harness, Dickey & Pierce, P.L.C

20080023813 - Multi-die apparatus including moveable portions: An electronic apparatus includes a first die, a second die, a third die, and a fourth die, wherein a portion of the second die and a portion of the third die are movably connected between the first die and the fourth die.... Agent: Hewlett Packard Company

20080023814 - Stacked ball grid array semiconductor package: Provided is a stacked ball grid array (BGA) semiconductor package. The stacked BGA semiconductor package includes: a single semiconductor package having landings provided in depressed grooves of both sides thereof, wherein the landings include a conductive material, and a substrate having a semiconductor chip disposed on the substrate; another semiconductor... Agent: Marger Johnson & Mccollom, P.C.

20080023815 - Interlayer dielectric layer for printed wiring board, printed wiring board, and method of producing the same: A printed wiring board including a substrate, conductor circuits and interlayer dielectric layers stacked alternately on the substrate, each of the interlayer dielectric layers including a curable resin having flaky particles dispersed therein, and viaholes formed in the interlayer dielectric layers and electrically connecting the conductor circuits at different levels.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080023816 - Semiconductor package: A semiconductor package mainly includes a carrier, a package having a first surface and a second surface, a chip and a plurality of bonding wires. The package is disposed on an upper surface of the carrier and electrically connected to the carrier by a plurality of conductive elements, the chip... Agent: North America Intellectual Property Corporation

20080023817 - Component packaging apparatus, systems, and methods: Dielectric materials comprising release agents are described. Also described are a process for improving the processability of dielectric materials during hot embossing, substrates prepared by hot embossing, and integrated-circuit packages comprising the improved substrate.... Agent: Schwegman, Lundberg & Woessner, P.A.

20080023818 - Contact device for use in a power semiconductor module or in a disc-type thyristor: A contact device for use with a power semiconductor component in a power semiconductor module or a disc-type thyristor, the module or thyristor having a molded body with a first recess disposed above the component. The contact device makes electrical contact with the auxiliary connection of the component, and is... Agent: Cohen, Pontani, Lieberman & Pavane

20080023819 - Package structure having semiconductor chip embedded therein and method for fabricating the same: A package structure having a semiconductor chip embedded therein and a method of fabricating the same are disclosed. The package structure comprises: an aluminum oxide composite plate and a semiconductor chip. The aluminum oxide composite plate is formed by a stack consisting of an adhesive layer placed in between two... Agent: Lowe Hauptman Ham & Berner, LLP

20080023820 - Bond finger on via substrate, process of making same, package made thereby, and method of assembling same: A wire-bonding substrate is disclosed. The wire-bonding substrate includes a first wire-bond pad and a first via that is disposed directly below the first wire-bond pad in the in the wire-bonding substrate. A package is also disclosed that includes a die that is coupled to the first wire-bonding pad. The... Agent: Schwegman, Lundberg & Woessner, P.A.

20080023821 - Substrate structure integrated with passive components: An electronic element package integrated with passive components is proposed. The electronic element package includes a carrier plate and a plurality of passive components provided on the carrier plate, wherein first electrodes are formed on the passive components; an insulating layer formed on a surface of the carrier plate provided... Agent: Morrison & Foerster LLP

20080023822 - Chip on flexible printed circuit type semiconductor package: A Chip on Flexible Printed Circuit (COF) type semiconductor package may include a flexible film, a semiconductor IC chip on the flexible film, and a heating pad on the flexible film.... Agent: Harness, Dickey & Pierce, P.L.C

20080023823 - Power delivery using an integrated heat spreader: An integrated heat spreader (IHS) having a groove and a cavity formed therein is disclosed. In one embodiment, the groove has an insulating layer formed therein, and a power conduit is mounted in the groove, the power conduit is electrically isolated from the IHS by the insulating layer, and the... Agent: Blakely Sokoloff Taylor & Zafman

20080023824 - Double-sided die: In a described implementation for double-sided die utilization, a die includes at least one die feature on a first side and at least one die feature on a second side. The die features on the first and second sides are electrically interconnected by way of through vias.... Agent: Texas Instruments Incorporated

20080023825 - Multi-die dc-dc boost power converter with efficient packaging: A DC-DC boost converter in multi-die package is proposed having an output Schottky diode and a low-side vertical MOSFET controlled by a power regulating controller (PRC). The multi-die package includes a single die pad with the Schottky diode placed there on side by side with the vertical MOSFET. The PRC... Agent: Chein-hwa S. Tsao

20080023826 - Mounting device for a semiconductor package: A power amplifying semiconductor element is mounted in a package 13, having a heat dissipating surface acting as high frequency ground as well. The package 13 is mounted upside down with flip-chip mounting method in a concave portion 12 formed on a housing 11 having a high frequency ground acting... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080023832 - Contact structure and manufacturing method thereof: A contact structure including a contact pad, a polymer bump and a conductive layer is provided in the present invention. The contact pad is disposed on a substrate. The polymer bump is disposed on the contact pad. The conductive layer covers the polymer bump and extends to the outside of... Agent: Jianq Chyun Intellectual Property Office

20080023830 - Contact structure having a compliant bump and a testing area and manufacturing method for the same: A contact structure having both a compliant bump and a testing area and a manufacturing method for the same is introduced. The compliant bump is formed on a conductive contact of the silicon wafer or a printed circuit board. The core of the bump is made of polymeric material, and... Agent: Rabin & Berdo, PC

20080023831 - Semiconductor device and manufacturing method for the same: To provide a small, high-performance semiconductor device in which contact between adjacent wires is prevented for increased flexibility in designing a wiring layout, and an efficient method for manufacturing the semiconductor device. The semiconductor device includes a substrate 10 having an electrode 21A arranged on its surface; and a first... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20080023828 - Semiconductor device having bumps in a same row for staggered probing: A semiconductor device has a plurality of bumps in a same row for staggered probing. The bumps in a same row are disposed on a chip and include a plurality of regular bumps and a plurality of irregular bumps. The regular bumps and the irregular bumps are interspersed in a... Agent: Troxell Law Office PLLC Suite 1404

20080023827 - Solder connector structure and method: Disclosed are embodiments of a far back end of the line solder connector and a method of forming the connector that eliminates the use aluminum, protects the integrity of the ball limiting metallurgy (BLM) layers and promotes adhesion of the BLM layers by incorporating a thin conformal conductive liner into... Agent: Frederick W. Gibb, Iii Gibb & Rahman, LLC

20080023829 - Substrate and process for semiconductor flip chip package: A semiconductor package structure for flip chip package includes at least a patterned circuit layer and an insulating layer alternately stacking up each other. The patterned layer includes a plurality of bump pads, and the insulating layer includes a plurality of etching holes. The etching holes and the bump pads... Agent: Merchant & Gould PC

20080023833 - Solder bumps in flip-chip technologies: A solder bump structure and method for forming the same. The structure includes (a) a dielectric layer including a dielectric layer top surface (b) an electrically conductive bond pad on and in direct physical contact with the dielectric layer top surface; (c) a patterned support/interface layer on the dielectric layer... Agent: Schmeiser, Olsen & Watts

20080023834 - Raised solder-mask-defined (smd) solder ball pads for a laminate electronic circuit board: A raised solder-mask-defined (SMD) pad configured for receiving a solder ball on a laminate electronic circuit board and a method of creating the raised SMD pad on a laminate electronic circuit board. The method may comprise forming a base bump, covering the base bump with a conductive bump layer and... Agent: Texas Instruments Incorporated

20080023835 - Ohmic contact film in semiconductor device: The invention provides an ohmic contact film formed between a doped semiconductor material layer and a conductive material layer of a semiconductor device. The composition of the ohmic contact film according to a preferred embodiment of the invention is represented by the general formula MxNy, where M represents the II... Agent: Birch Stewart Kolasch & Birch

20080023836 - Semiconductor device: A semiconductor device which is capable of preventing interface peeling and a crack from occurring in the vicinity of the edge part of a rewiring layer is provided. The semiconductor device comprises a semiconductor substrate; a first interlayer insulation film (a first insulation film) which is formed on the semiconductor... Agent: Rabin & Berdo, PC

20080023838 - Manufacturing method of semiconductor device and semiconductor device: A manufacturing method of a semiconductor device comprises releasing an oxidation source included in an interlayer dielectric film having an opening portion formed on a surface thereof and being present on the surface of the interlayer dielectric film at a first substrate temperature, forming a first layer containing Ti and... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080023837 - Method for fabricating interconnect and interconnect fabricated thereby: A Method for discharge prevention during interconnection. A first metal layer is formed on a substrate and a dielectric layer is then formed on the substrate, covering the first metal layer. Two via holes are formed in the dielectric layer, exposing one end of the first metal layer, wherein the... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20080023839 - Molybdenum-based electrode with carbon nanotube growth: A carbon nanotube is formed on at least one Molybdenum-based electrode. In one embodiment, a carbon-nanotube device includes a pair of Molybdenum-based electrodes over respective terraces. Using a catalyst on the Molybdenum-based material of at least one electrode, a carbon nanotube is grown over a gap that separates the terraces... Agent: Attn: Robert J. Crawford Crawford Maunu PLLC

20080023840 - Via heat sink material: The invention provides thermally conductive material so that less heat traveling from one side of a layer will reach connection material on another side of a layer. Rather, some of the heat will be conducted away by the thermally conductive material and dissipated.... Agent: Intel Corporation C/o Intellevate, LLC

20080023841 - Mounting board, method for manufacturing mounting board, and semiconductor module: To reduce connection defects between a circuit substrate provided on a core substrate and a circuit to be mounted thereon, thereby improving reliability as a multilayered device mounting substrate. The device mounting substrate includes: a first circuit substrate composed of a substrate, an insulating layer formed on this substrate, and... Agent: Fish & Richardson P.C.

20080023842 - Semiconductor device: A method of forming a contact is provided. A substrate having at least two metal oxide semiconductor devices is provided and a gap is formed between the two devices. A first stress layer is formed over the substrate to cover the metal-oxide semiconductor devices and the substrate. The first stress... Agent: Jianq Chyun Intellectual Property Office

20080023843 - Semiconductor device: A semiconductor device has a package structure provided with leads that are external connection terminals. A base substance is an island, and at least the surface thereof is formed of a conductive material. A semiconductor substrate is mounted on the surface of the base substance, and a ground potential is... Agent: Cantor Colburn, LLP

20080023844 - Interconnection substrate, semiconductor chip package including the same, and display system including the same: Example embodiments relate to an interconnection substrate and a semiconductor chip package and a display system including the same. The interconnection substrate may include a base film, a signal line provided on the base film, a power line provided on the base film as a line pattern including a plurality... Agent: Harness, Dickey & Pierce, P.L.C

20080023845 - Land grid array (lga) interposer utilizing metal-on-elastomer hemi-torus and other multiple points of contact geometries: A land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are... Agent: Scully, Scott, Murphy & Presser, P.C.

20080023846 - Semiconductor device and manufacturing method of the same: The invention provides a method of manufacturing a semiconductor device which achieves high reliability and high yield as well as high production efficiency. Back surface grinding (back grinding) is performed to a semiconductor substrate to thin the semiconductor substrate. A damaged layer formed by the back surface grinding is not... Agent: Morrison & Foerster LLP

20080023847 - Semiconductor device and its wiring method: A semiconductor device mounted on a mother board has a circuit board to be positioned on the mother board and a semiconductor chip positioned on the circuit board. The circuit board has a connection pad, a relay pad spaced away from the connection pad, and a wire connecting between the... Agent: Mcdermott Will & Emery LLP

20080023848 - Semiconductor device and its wiring method: A semiconductor device mounted on a mother board has a circuit board to be positioned on the mother board and a semiconductor chip positioned on the circuit board. The circuit board has a connection pad, a relay pad spaced away from the connection pad, and a wire connecting between the... Agent: Mcdermott Will & Emery LLP

20080023849 - Chip module: An improved chip module is described. The improved chip is comprised of a loading board for connecting with an external electronic component, a plurality of electrical conductors electrically disposed on the loading board. Each electrical conductor has an elastic body and a metal layer disposed thereon. The chip module connects... Agent: Rosenberg, Klein & Lee

20080023850 - Silicon-based thin substrate and packaging schemes: A silicon-based thin package substrate is used for packaging semiconductor chips. The silicon-based thin package substrate preferably has a thickness of less than about 200 μm. A plurality of through-hole vias are formed in the silicon-based thin package substrate, connecting BGA balls and solder bumps. The silicon-based thin package substrate... Agent: Slater & Matsil, L.L.P.

20080023851 - Microelectronic device connection structure: The invention broadly and generally provides a connection structure for connecting a microelectronic device to a substrate, the aforesaid connection structure comprising: (a) a metal layer electrically connected to the aforesaid microelectronic device; (b) an interface element attached to an interface portion of the aforesaid metal layer; (c) a metallic... Agent: Ibm Corporation, T.j. Watson Research Center

20080023852 - Metal pad of mode dial and manufacturing method thereof: A metal pad of mode dial and a manufacturing method thereof, wherein the metal pad is disposed on a substrate and the metal pad comprises at least one metal base pad and at least one conductive foil layer. The conductive foil layer is fixed on the metal base pad in... Agent: Rosenberg, Klein & Lee

20080023853 - Flip chip adaptor package for bare die: A board for connecting a bare semiconductor die with a bond pad arrangement which does not conform to a master printed circuit board with a specific or standardized pin out, connector pad, or lead placement arrangement. The board comprises a printed circuit board including first elements, such as minute solder... Agent: Trask Britt, P.C./ Micron Technology

20080023854 - Generating an integrated circuit identifier: The generation of a chip identifier supporting at least one integrated circuit, which includes providing a cutout of least one conductive path by cutting the chip, the position of the cutting line relative to the chip conditioning the identifier.... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20080023855 - Overlay marks, methods of overlay mark design and methods of overlay measurements: An overlay mark for determining the relative shift between two or more successive layers of a substrate is disclosed. The overlay mark includes at least one test pattern for determining the relative shift between a first and a second layer of the substrate in a first direction. The test pattern... Agent: Beyer Weaver LLP - Kla Tencor

20080017842 - Phase change memory cell including nanocomposite insulator: A memory cell includes a first electrode, a second electrode, storage material positioned between the first electrode and the second electrode, and a nanocomposite insulator contacting the storage material.... Agent: Dicke, Billig & Czaja

20080017843 - Spintronic transistor: A semiconductor device including: a substrate comprising silicon; a channel region formed on the substrate; a spin injector formed on the substrate at a first side of the channel region and configured to diffuse a spin-polarized current into the channel region; a spin detector formed on the substrate at a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080017852 - Conductive polymer composition comprising organic ionic salt and optoelectronic device using the same: Disclosed herein is a conductive polymer composition for an organic optoelectronic device capable of improving efficiency and lifetime. The conductive polymer composition comprises a conductive polymer, at least one organic ionic salt selected from compounds represented by the following Formulae 2 to 5 and a solvent.... Agent: Summa, Allan & Additon, P.A.

20080017851 - Fabrication method for an organic thin film transistor substrate: An organic thin film transistor (TFT) substrate with a simplified fabrication process is disclosed. The TFT substrate includes a gate line and a data line and an organic TFT connected to the gate line and the data line. The gate line and the data line define a pixel region where... Agent: Macpherson Kwok Chen & Heid LLP

20080017848 - Nanoparticle dispersions with low aggregation levels: An apparatus comprising a substrate having a surface and a dielectric layer comprising a distribution of particles. The layer is located over the surface and has a dielectric constant of seven or more. Each particle has a particle core and a polymer shell that is chemically bonded thereto and located... Agent: Hitt Gaines, PC Alcatel-lucent

20080017858 - Fuse/anti-fuse structure and methods of making and programming same: Techniques are provided for fuse/anti-fuse structures, including an inner conductor structure, an insulating layer spaced outwardly of the inner conductor structure, an outer conductor structure disposed outwardly of the insulating layer, and a cavity-defining structure that defines a cavity, with at least a portion of the cavity-defining structure being formed... Agent: Ryan, Mason & Lewis, LLP

20080017860 - Light-emitting device and electronic apparatus: A light-emitting device includes a power feeding line to which a predetermined voltage is supplied; a light-emitting element formed of a first electrode, a second electrode, and a light-emitting layer interposed between the first electrode and the second electrode; and a driving transistor that controls the amount of current supplied... Agent: Oliff & Berridge, PLC

20080017861 - Optical head and image forming apparatus: An optical head includes a plurality of unit regions repeatedly arrayed in one direction. Each region is constituted by a light-emitting element which is driven by a current to emit light, a control transistor which is connected in parallel with the light-emitting element, and which receives gray-scale data that specifies... Agent: Oliff & Berridge, PLC

20080017859 - System for displaying images including thin film transistor device and method for fabricating the same: A system for displaying images comprises a thin film transistor (TFT) device comprising a substrate having a pixel region and a terminal region. A first conductive layer is disposed on the substrate, comprising a gate electrode for a thin film transistor in the pixel region and at least one track... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20080017863 - Memory cell and fabricating method thereof: A fabricating method of a memory cell including the following steps is provided. First, a poly-Si island including a source doped region, a drain doped region, and a channel region located therebetween is formed on a substrate. Then, a dielectric layer is formed on the poly-Si island. Afterward, an amorphous... Agent: Jianq Chyun Intellectual Property Office

20080017866 - Display device and semiconductor device: An object is to provide a display device with a high aperture ratio or a semiconductor device in which the area of an element is large. A channel formation region of a TFT with a multi-gate structure is provided under a wiring that is provided between adjacent pixel electrodes (or... Agent: Fish & Richardson P.C.

20080017864 - Display substrate, display device having the same and method of manufacturing the same: A display substrate includes an insulating substrate, a thin film transistor, a contact electrode, and a pixel electrode. The thin film transistor includes a control electrode, a semiconductor pattern, a first electrode, and a second electrode. The control electrode is on the insulating substrate. The semiconductor pattern is on the... Agent: H.c. Park & Associates, PLC

20080017865 - Thin film transistor substrate and method for manufacturing the same: A thin film transistor substrate includes a thin film transistor of a first conductivity type, a semiconductor layer having a channel region of the first conductivity type placed between the source/drain regions, a gate electrode formed to an opposite face to the semiconductor layer with an gate insulating film interposed... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080017872 - Light emitting diode module for line light source: A light emitting diode module for a line light source includes a circuit board having a wire pattern formed thereon and a plurality of LED chips directly mounted and disposed in a longitudinal direction on the circuit board and electrically connected to the wire pattern. The module also includes a... Agent: Mcdermott Will & Emery LLP

20080017877 - Led packaging structure: A light emitting diode packaging structure includes a package body, a red LED chip, a blue LED chip, a green LED chip, a package material and a yellow phosphor. Three LED chips are disposed within an accommodating room of the body package and covered by the package material. The yellow... Agent: Birch Stewart Kolasch & Birch

20080017876 - Si-substrate and structure of opto-electronic package having the same: Disclosed herein is a structure of an opto-electronic package having a Si-substrate. Si-substrates are manufactured in batch utilizing micro-electromechanical processes or semiconductor processes, so that these Si-substrates are made with great precision and full of varieties. Based on the material characteristic of the Si-substrate, and the configuration of the components,... Agent: North America Intellectual Property Corporation

20080017878 - Semiconductor light-emitting diode: A semiconductor light-emitting diode includes an electrically conductive substrate transmissive to light-emitting wavelengths, and semiconductor layers including a light-emitting layer, on the substrate. A principal-surface electrode is located on the semiconductor layers and a rear-surface electrode having an opening is located on the rear surface of the substrate. The width... Agent: Leydig Voit & Mayer, Ltd

20080017841 - Phase-change material layers, methods of forming the same, phase-change memory devices having the same, and methods of forming phase-change memory devices: Example embodiments may provide phase-change material layers and a method of forming a phase-change material layer and devices using the same by generating a plasma including helium and/or argon in a reaction chamber, forming a first material layer on the object by introducing a first source gas including a first... Agent: Harness, Dickey & Pierce, P.L.C

20080017844 - Low-temperature-grown (ltg) insulated-gate phemt device and method: A pseudomorphic-high-electron-mobility-transistor (PHEMT) includes a substrate, a low-temperature-grown (LTG) GaAs gate-insulator layer disposed on the substrate, and a gate electrode disposed on the gate-insulator layer.... Agent: Bae Systems

20080017845 - Nanostructure assemblies, methods and devices thereof: Disclosed herein are methods for assembling nanostructures. The assembling methods include contacting the plurality of nanostructures to a substrate having one or more discontinuities. At least a portion of the plurality of nanostructures assemble adjacent to the discontinuity, the assembled nanostructures including at least one nanostructure having a bridging, molecule.... Agent: Woodcock Washburn LLP

20080017853 - Anthracene derivative, and light-emitting element, light-emitting device, electronic device using anthracene derivative: An object is to provide a novel anthracene derivative. Another object is to provide a light-emitting element with high luminous efficiency. Yet another object is to provide a light-emitting element with a long lifetime. Still another object is to provide a light-emitting device and an electronic device having a long... Agent: Cook, Alex, Mcfarron, Manzo, Cummings & Mehler Ltd

20080017846 - Compound having oxadiazole ring structure substituted with pyridyl group, and organic electroluminescent device:

20080017849 - Memory element and semiconductor device: It is an object of the present invention to reduce variations in behavior of each memory element. In addition, it is another object of the present invention to obtain a semiconductor device, on which the memory element is mounted, which is superior in terms of performance and reliability. A memory... Agent: Eric Robinson

20080017850 - Method for producing organic field-effect transistors:

20080017847 - Nanotube-porphyrin molecular structure and applications of same: A molecular structure. In one embodiment, the molecular structure includes a nanotube formed with a plurality of carbon atoms having a first end, an opposite, second end, and a body portion defined therebetween, wherein the body portion has an interior surface defining a cavity, an opposite, exterior surface and a... Agent: Morris Manning Martin LLP

20080017854 - Inorganic-organic hybrid thin-film transistors using inorganic semiconducting films: Inorganic semiconducting compounds, composites and compositions thereof, and related device structures.... Agent: Reinhart Boerner Van Deuren S.c. Attn: Linda Kasulke, Docket Coordinator

20080017855 - Display substrate, method of manufacturing the same and display device having the same: A display substrate includes a pixel, a signal transmission line, a first insulating layer and a test signal input part. The pixel is on an insulating substrate. The signal transmission line is on the insulating substrate to transmit an image signal. The first insulating layer is on the signal transmission... Agent: Frank Chau F. Chau & Associates, LLC

20080017857 - Method of adding fabrication monitors to integrated circuit chips: An integrated circuit, a method and a system for designing and a method fabricating the integrated circuit. The method including: (a) generating a photomask level design of an integrated circuit design of the integrated circuit, the photomask level design comprising a multiplicity of integrated circuit element shapes; (b) designating regions... Agent: Schmeiser, Olsen & Watts

20080017856 - Wafer and semiconductor device testing method: At least three pads 10A, 10B, 10C are provided on a scribe line 8 located adjacent to a chip region 2. The three pads are a power pad 10A connected to a power potential portion 5 in the chip region 2, a grounding pad 10B connected to a ground potential... Agent: Harness, Dickey & Pierce, P.L.C

20080017862 - Array substrate, display device having the same and method of manufacturing the same: An array substrate includes a switching element, a signal transmission line, a passivation layer and a pixel electrode. The switching element is disposed on an insulating substrate. The signal transmission line is connected to the switching element and includes a barrier layer, a conductive line, and a copper nitride layer.... Agent: H.c. Park & Associates, PLC

20080017867 - Enhancement mode gan fet with piezoelectric gate: One or more enhancement mode GaN devices has a stress-reduced gate region which interrupts the normally conductive 2Deg layer. A piezoelectric film is disposed over the stress-reduced gate region and can be excited to deflect and apply a stress to the stress reduced gate region to reintroduce the conductive 2Deg... Agent: Ostrolenk Faber Gerb & Soffen

20080017869 - Light emitting diode chip with large heat dispensing and illuminating area: A light emitting diode chip has a large area of electricity conducting layer applied to each of the P pole and the N pole. The etching process does not reduce the illuminating area so that the areas of illumination and reflection are increased and the efficiency for dispensing heat is... Agent: Charles E. Baxley, Esq.

20080017868 - Semiconductor laser having protruding portion: A semiconductor laser device including: semiconductor layers including an n-type semiconductor layer, an active layer and a p-type semiconductor layer, the semiconductor layers having a stripe-shaped waveguide region formed therein; end face protective film formed on the end face of the semiconductor layer that is substantially perpendicular to the waveguide... Agent: Hunton & Williams LLP Intellectual Property Department

20080017870 - Semiconductor light-emitting means and light-emitting panel comprising the same: A semiconductor light-emitting means (56) comprises a transparent substrate (12), on which light-emitting diodes (26, 28) are arranged. These and electrodes (14, 36) used for contacting them are transparent.... Agent: Factor & Lake, Ltd.

20080017871 - Light emitting element with a plurality of cells bonded, method of manufacturing the same, and light emitting device using the same: The present invention relates to a light emitting element with arrayed cells, a method of manufacturing the same, and a light emitting device using the same. The present invention provides a light emitting element including a light emitting cell block with a plurality of light emitting cells connected in series... Agent: Marger Johnson & Mccollom, P.C.

20080017873 - Device, method of manufacturing device, board, method of manufacturing board, mounting structure, mounting method, led display, led backlight and electronic device: A mounting structure and a mounting method which are capable of securely electrically connecting wiring on a board and a device to each other in the case where the device is mounted on the board, and are capable of forming a finer bump, and increasing the number of pins are... Agent: Bell, Boyd & Lloyd, LLP

20080017874 - Light emitting devices: Light-emitting devices, and related components, systems and methods are disclosed.... Agent: Wolf Greenfield & Sacks, P.C.

20080017875 - Yellow emitting phosphor and white semiconductor light emitting device incorporating the same: The present invention relates to a yellow phosphor represented by a general formula of A(1-y)3D5-x Ex O12:Cey (wherein: A is at least one element selected from the group consisting of Y, Lu, Sc, La, Gd and Sm; D is at least one element selected from the group consisting of Al,... Agent: Conley Rose, P.C. David A. Rose

20080017879 - Methods and apparatus for packaging integrated circuit devices: An integrally packaged integrated circuit device including an integrated circuit die including a crystalline substrate having first and second generally planar surfaces and edge surfaces and semiconductor circuitry formed over the first generally planar surface, at least one chip scale packaging layer formed over the semiconductor circuitry and the first... Agent: Tessera Lerner David Et Al.

20080017880 - Si-substrate and structure of opto-electronic package having the same: Disclosed herein is a structure of an opto-electronic package having a Si-substrate. Si-substrates are manufactured in batch utilizing micro-electromechanical processes or semiconductor processes, so that these Si-substrates are made with great precision and full of varieties. Based on the material characteristics of the Si-substrate, and the configuration of the components,... Agent: North America Intellectual Property Corporation

20080017881 - Power supplying and discharging circuit: An exemplary power supplying and discharging circuit (200) includes a control signal input terminal (21), an output terminal (26), a direct current (DC) power supply (22), a bias resistor (27), a first transistor (23), a second transistor (24), and a third transistor (25). The first transistor includes a base electrode... Agent: Wei Te Chung Foxconn International, Inc.

20080017882 - Power semiconductor apparatus: The power semiconductor apparatus includes a resin package made up of a power semiconductor element and a control semiconductor element which are mounted on a main front surface of a lead frame and sealed with mold resin, a power terminal led out of the resin package and electrically connected to... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080017883 - Semi-planar avalanche photodiode: An avalanche photodetector is disclosed. An apparatus according to aspects of the present invention includes a mesa structure defined in a first type of semiconductor. The first type of semiconductor material includes an absorption region optically coupled to receive and absorb an optical beam. The apparatus also includes a planar... Agent: Blakely Sokoloff Taylor & Zafman

20080017884 - Display substrate, display apparatus having the display substrate and method for manufacturing the display apparatus: A display apparatus includes a first substrate, a gate line formed on the first substrate, a gate insulating layer formed on the gate line, a semiconductor layer formed on the gate insulating layer, a data line formed on the semiconductor layer and including a source electrode, a drain electrode facing... Agent: F. Chau & Associates, LLC

20080017885 - Substrate for electro-optical device, electro-optical device, and electronic apparatus: Disclosed is a substrate for an electro-optical device including: a substrate; a plurality of data lines and a plurality of scanning lines which intersect with other on the substrate; a pixel electrode formed in each of a plurality of pixels which configure a display region on the substrate and are... Agent: Oliff & Berridge, PLC

20080017886 - Thin film transistor array panel: According to an embodiment of the present invention, a thin film transistor array panel includes a gate line and a data line insulated from each other by an insulating substrate where the gate line and the data line cross each other to define a pixel region, a thin film transistor... Agent: Macpherson Kwok Chen & Heid LLP

20080017887 - Thin film transistor array substrate, method of manufacturing the same, and display device: A thin film transistor array substrate according to an embodiment of the present invention includes: a semiconductor layer including a source region having a first conductivity type, a drain region having the first conductivity type, and a channel region between the source region and the drain region, and formed over... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080017888 - Non-volatile electromechanical field effect devices and circuits using same and methods of forming same: Non-volatile field effect devices and circuits using same. A non-volatile field effect device includes a source, drain and gate with a field-modulatable channel between the source and drain. Each of the source, drain, and gate have a corresponding terminal. An electromechanically-deflectable, nanotube switching element is electrically positioned between one of... Agent: Wilmerhale/boston

20080017889 - Wiring structure of a semiconductor device, method of forming the wiring structure, non-volatile memory device including the wiring structure, and method of manufacturing the non-volatile memory device: A wiring structure of a semiconductor device may include an insulation interlayer on a substrate, the insulation interlayer having a linear first trench having a first width and a linear second trench having a second width, the linear second trench being in communication with a lower portion of the linear... Agent: Lee & Morse, P.C.

20080017890 - Highly dense monolithic three dimensional memory array and method for forming: A method to form a highly dense monolithic three dimensional memory array is provided. In preferred embodiments, conductive or semiconductor spacers can be formed, then used as hard masks to pattern underlying layers, forming features at sublithographic pitch. Methods of the invention minimize photomasking steps and thus simplify fabrication.... Agent: Patent Dept., Sandisk Corporation

20080017891 - Pinning layer for low resistivity n-type source drain ohmic contacts: A system or apparatus including an N-type transistor structure including a gate electrode formed on a substrate and source and drain regions formed in the substrate; a contact to the source region; and a pinning layer disposed between the source region and the first contact and defining an interface between... Agent: Blakely Sokoloff Taylor & Zafman

20080017892 - Ccd with improved substrate voltage setting circuit: An image sensor includes a plurality of pixels for converting incident photons into electrical charge; an overflow drain to draw off excess charge from at one or more of the pixels; a mechanism for summing charge from two or more of the pixels; a first network of resistive devices generating... Agent: Pamela R. Crocker Patent Legal Staff

20080017893 - Back-lit image sensor: An image sensor including a P-type doped layer of a semiconductor material including first and second opposite surfaces; and at least one photodiode formed in the layer on the side of the first surface and intended to be lit through the second surface. The dopant concentration in the layer increases... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20080017894 - Integrated circuit with memory having a step-like programming characteristic: A memory cell includes a first electrode, a second electrode, and phase change material between the first electrode and the second electrode. The phase change material has a step-like programming characteristic. The first electrode, the second electrode, and the phase change material form a via or trench memory cell.... Agent: Dicke, Billig & Czaja

20080017895 - Vertical-type, integrated bipolar device and manufacturing process thereof: A bipolar device is integrated in an active layer, wherein delimitation trenches surround respective active areas housing bipolar transistors of complementary types. Each active area accommodates a buried layer; a well region extending on top of the buried layer; a top sinker region extending between the surface of the device... Agent: Seed Intellectual Property Law Group PLLC

20080017896 - Embedded semiconductor component: A process is disclosed for in-situ fabricating a semiconductor component imbedded in a substrate. A substrate is ablated with a first laser beam to form a void therein. A first conductive element is formed in the void of the substrate with a second laser beam. A semiconductor material is deposited... Agent: Robert F. Frijouf Frijouf, Rust & Pyle, P.A.

20080017898 - Integrated circuit having second epitaxial layer: An integrated circuit having a semiconductor device with reduced “tail” resistance and production method for such a device is disclosed. One embodiment provides at least one substrate of a first conduction type doped with a first concentration of donors of a first atom type, and a first epitaxial layer of... Agent: Dicke, Billig & Czaja

20080017899 - Self-aligned nanotube field effect transistor and method of fabricating same: A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube deposited on a substrate, a source and a drain formed at a first end and a second end of the carbon-nanotube, respectively, and a gate formed substantially over a portion of the carbon-nanotube, separated from the carbon-nanotube by a... Agent: F. Chau & Associates, LLC

20080017897 - Semiconductor device and method of manufacturing same: A semiconductor device includes: a semiconductor layer of a first conductivity type; a plurality of first semiconductor pillar regions of the first conductivity type provided on a major surface of the semiconductor layer; a plurality of second semiconductor pillar regions of a second conductivity type being adjacent to the first... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080017900 - Cmos image sensor: A complementary metal oxide semiconductor (CMOS) sensor may include a substrate and a device isolation layer formed above the substrate. A nitride layer is formed between the device isolation layer and the substrate. An n type impurity region is formed in a photodiode region of the substrate. A p type... Agent: Sherr & Nourse, PLLC

20080017901 - Solid-state imaging device and control system: A solid-state imaging device is provided. The solid-state imaging device includes an imaging region having a plurality of pixels arranged on a semiconductor substrate, in which each of the pixels includes a photoelectric converting portion and a charge converting portion for converting a charge generated by photoelectric conversion into a... Agent: Robert J. Depke Lewis T. Steadman

20080017902 - Semiconductor device and method of manufacturing the same: A semiconductor device comprises an inter-layer insulation film 30 formed on a semiconductor substrate 10, and a dielectric capacitor including a lower electrode 38 formed on the inter-layer insulation film 30 including a conduction film 36 of a noble metal or noble metal oxide, a dielectric film 42 formed on... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20080017903 - Method of fabricating a semiconductor device with a trench isolation structure and resulting semiconductor device: The present fabrication method includes the steps of: providing a nitride film in a main surface of a semiconductor substrate; providing an upper trench, with the nitride film used as a mask; filling the upper trench with an oxide film introduced therein; removing the oxide film to expose at least... Agent: Mcdermott Will & Emery LLP

20080017904 - Semiconductor device: A DRAM capable of realizing reduced power consumption, high-speed operation, and high reliability is provided. A gate electrode configuring a memory cell transistor of the DRAM is composed of an n-type polysilicon film and a W (tungsten) film stacked thereon. A part of the polysilicon film is embedded in a... Agent: Miles & Stockbridge PC

20080017905 - Memory cell with buried digit line: A memory cell, array and device include an active area formed in a substrate wit a vertical transistor including a first end disposed over a first portion of the active area. The vertical transistor is formed as an epitaxial post on the substrate surfaces extends from the surface of the... Agent: Trask Britt, P.C./ Micron Technology

20080017907 - Semiconductor module with a power semiconductor chip and a passive component and method for producing the same: A semiconductor module includes a power semiconductor chip and a passive discrete component. The semiconductor chip includes on its top side and/or on the back side a large-area contact, which in its two-dimensional extent takes up the top side and/or the back side of the semiconductor chip virtually completely. The... Agent: Edell , Shapiro & Finnan , LLC

20080017906 - Soi device and method for its fabrication: A silicon on insulator (SOI) device and methods for fabricating such a device are provided. The device includes an MOS capacitor coupled between voltage busses and formed in a monocrystalline semiconductor layer overlying an insulator layer and a semiconductor substrate. The device includes at least one electrical discharge path for... Agent: Ingrassia Fisher & Lorenz, P.C. (amd)

20080017908 - Semiconductor memory device and method of fabricating the same: Exemplary embodiments relate to a semiconductor memory device and method of fabricating the same. The semiconductor member device may include a semiconductor substrate, a plurality of storage node contact plugs formed above the semiconductor substrate, and a plurality of storage node electrodes, each of the plurality of storage node electrodes... Agent: Lee & Morse, P.C.

20080017910 - Method of manufacturing flash semiconductor device: A method of manufacturing a flash semiconductor device minimizes a loss of dopant caused by dopant out-diffusion. A trench is formed in a semiconductor substrate. At least one poly gate is formed in the semiconductor substrate including the trench. An RCS (Recess Common Source) region is formed in the trench.... Agent: Sherr & Nourse, PLLC

20080017911 - Nonvolatile semiconductor memory device and manufacturing method thereof: A memory device includes a semiconductor substrate, memory elements formed above the substrate in rows and columns, bit lines and word lines selectively connected with the memory elements in the respective columns and rows, each memory element including, a first gate insulator formed above the substrate, a charge accumulation layer... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080017912 - Non-volatile memory cell with embedded antifuse: A nonvolatile memory device includes at least one memory cell which comprises a first diode portion, a second diode portion and an antifuse separating the first diode portion from the second diode portion.... Agent: Foley And Lardner LLP Suite 500

20080017909 - Semiconductor device and method of manufacturing the same: A semiconductor device and a method of manufacturing the same. The semiconductor device includes a first well formed in a predetermined region of a semiconductor substrate, a second well formed in a predetermined region within the first well, and a third well formed within the first well with the third... Agent: Marshall, Gerstein & Borun LLP

20080017913 - Gate electrode structure: An electrode structure, e.g., a gate electrode for a transistor, includes: a volume of semiconductor material; a gate oxide on the semiconductor volume; a barrier layer, including silicon nitride, on the gate oxide layer; an adhesion layer on the barrier layer; and a metallic layer on the adhesion layer.... Agent: Harness, Dickey & Pierce, P.L.C

20080017914 - Semiconductor device and method of manufacturing the same: There is disclosed a semiconductor device including a plurality of memory cell transistors, each memory cell transistor including a floating gate electrode isolated from each other via an isolation insulating film every memory cell transistor, an inter-electrode insulating film comprising a HfxAl1-xOy film (0.8≦x≦0.95) formed on the floating gate electrode,... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080017915 - Method of fabricating non-volatile memory integrated circuit device and non-volatile memory integrated circuit device fabricated using the same: A method of fabricating a non-volatile memory integrated circuit device and a non-volatile memory integrated circuit device fabricated by using the method are provided. A device isolation region is formed in a substrate to define a cell array region and a peripheral circuit region. A plurality of first and second... Agent: F. Chau & Associates, LLC

20080017916 - Semiconductor device and method of manufacturing the same: A semiconductor device including a plurality of element isolation insulating films filling a trench defined in a semiconductor substrate and having an upper end that upwardly projects from a substrate surface, a width of the upper end being narrower than a width at a height of the substrate surface; and... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080017917 - Non-volatile memory and fabricating method thereof: A non-volatile memory having an isolation structure, a floating gate transistor, a specific dielectric layer and an erase gate is provided. The isolation structure is disposed in a substrate to define an active region. The floating gate transistor having a floating gate, a tunneling dielectric layer, a first source/drain region... Agent: J C Patents, Inc.

20080017918 - Three-dimensional flash memory cell: Embodiments relate to a three-dimensional flash memory cell and method of forming the same that may be improve the uniformity of flash memory cell by removing a width difference of a polysilicon pattern when forming a floating gate of flash memory device, to thereby improve the reliability of semiconductor device.... Agent: Sherr & Nourse, PLLC

20080017919 - Non-volatile memory: An object is to improve a data recording amount per memory cell. In the invention, in a non-volatile memory, the data contents of which can be electrically written and erased, each memory cell that configures the non-volatile memory is provided with: source/drain regions formed on a semiconductor substrate; a gate... Agent: Rabin & Berdo, PC

20080017920 - Structure and method for improving shielded gate field effect transistors: A field effect transistor is disclosed. In one embodiment, the field effect transistor includes a trench extending into a drift region of the field effect transistor. A shield electrode in a lower portion of the trench is insulated from the drift region by a shield dielectric. A gate electrode in... Agent: Townsend And Townsend And Crew, LLP

20080017921 - Semiconductor device and manufacturing method thereof: A high voltage semiconductor deice and a manufacturing method thereof are provided. The high voltage semiconductor device comprises: second conductive type drift regions disposed spaced from each other on a first conductive type well region formed on a first conductive type semiconductor substrate; a gate electrode on a channel region... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20080017922 - Semiconductor device and manufacturing method thereof: A semiconductor device having a first semiconductor region and second semiconductor region including impurities formed on an insulating layer formed on a semiconductor substrate, an insulator formed between the first semiconductor region and the second semiconductor region, a first impurity diffusion control film formed on the first semiconductor region and... Agent: Banner & Witcoff, Ltd. Attorneys For Client No. 000449, 001701

20080017923 - Semiconductor device and manufacturing method thereof: The semiconductor device includes a thin film transistor; a first interlayer insulating film over the thin film transistor; a first electrode electrically connected to one of a source region and a drain region, over the first interlayer insulating film; a second electrode electrically connected to the other of the source... Agent: Eric Robinson

20080017924 - Semiconductor device and method of manufacturing the same: A semiconductor device having an SOI structure including a semiconductor substrate, a buried insulating layer and an SOI layer, including first and second semiconductor regions of a predetermined conductivity type provided in an element formation region of said SOI layer, and a partial insulating film provided in an upper layer... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080017925 - Micro electro mechanical device and manufacturing method thereof: To manufacture a micro structure and an electric circuit included in a micro electro mechanical device over the same insulating surface in the same step. In the micro electro mechanical device, an electric circuit including a transistor and a micro structure are integrated over a substrate having an insulating surface.... Agent: Fish & Richardson P.C.

20080017926 - Semiconductor structure of a high side driver and method for manufacturing the same: A semiconductor structure of a high side driver includes an ion-doped junction. The ion-doped junction includes a substrate and a deep well. The deep well is formed in the substrate and has a first concave structure. The ion-doped junction includes a semiconductor region connected to the first concave structure of... Agent: Bacon & Thomas, PLLC

20080017927 - Semiconductor device and fabrication method thereof: A semiconductor device includes a dual gate electrode lying across the tops of a first element region and a second element region formed apart from each other with an isolation region interposed between the first and second element regions. The dual gate electrode is composed of two silicide regions with... Agent: Mcdermott Will & Emery LLP

20080017928 - Semiconductor device and method for manufacturing the same: Disclosed are a semiconductor device and a method for manufacturing the same. The semiconductor device can include at least two gate structures spaced apart from each other on a semiconductor substrate, a silicon nitride layer covering the semiconductor substrate and the gate structures, an interlayer dielectric layer on the silicon... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20080017929 - Semiconductor device having a compressed device isolation structure: The semiconductor device includes a lower device isolation structure formed in a semiconductor substrate to define an active region. The lower device isolation structure has a first compressive stress. An upper device isolation structure is disposed over the lower device isolation structure. The upper device isolation structure has a second... Agent: Townsend And Townsend And Crew, LLP

20080017930 - Dual work function metal gate structure and related method of manufacture: A semiconductor device and related methods of manufacture are disclosed in which dual work function metal gate electrodes are formed from a single metal layer by doping the metal layer with carbon and/or fluorine.... Agent: Volentine & Whitt PLLC

20080017931 - Metal-oxide-semiconductor transistor device, manufacturing method thereof, and method of improving drain current thereof: A metal-oxide-semiconductor transistor device comprises a semiconductor substrate comprising an active region and an insulation region, a selective epitaxial layer between the active region and a gate structure, wherein a peripheral portion of the epitaxial layer is over a peripheral portion of the insulation region, such that the width of... Agent: North America Intellectual Property Corporation

20080017932 - Shallow trench isolation formation: A method and structure for forming a semiconductor structure. A semiconductor substrate is provided. A trench is formed within the semiconductor substrate. A first layer of electrically insulative material is formed within the trench. A first portion and a second portion of the first layer of electrically insulative material is... Agent: Schmeiser, Olsen & Watts

20080017933 - Method of fabricating semiconductor devices: A method of fabricating a semiconductor device is disclosed. First, a substrate is provided. The substrate includes at least a transistor area having a gate structure thereon, a capacitor area having a first electrode thereon and a resistor area having a second electrode thereon. The capacitor area and the resistor... Agent: Jianq Chyun Intellectual Property Office

20080017934 - Wire-type semiconductor devices and methods of fabricating the same: Provided are relatively higher-performance wire-type semiconductor devices and relatively economical methods of fabricating the same. A wire-type semiconductor device may include at least one pair of support pillars protruding above a semiconductor substrate, at least one fin protruding above the semiconductor substrate and having ends connected to the at least... Agent: Harness, Dickey & Pierce, P.L.C

20080017935 - Semiconductor device having a nonsalicide region and method of fabricating the same: A method of forming a nonsalicide region in a semiconductor device includes depositing silicon oxide and photoresist on a semiconductor substrate to form a salicide prevention layer and a photoresist layer, respectively, patterning the photoresist layer using a photolithography process to partition the salicide prevention layer into a nonsalicide region... Agent: Lowe Hauptman Ham & Berner, LLP

20080017937 - Display with thin film transistor devices having different electrical characteristics in pixel and driving regions and method for fabricating the same: A system for displaying images comprises a thin film transistor (TFT) device comprising first and second active layers disposed on a substrate in the driving circuit region and in the pixel region, respectively. Each active layer comprises a channel region, a source/drain region and a lightly doped region formed therebetween.... Agent: Liu & Liu

20080017936 - Semiconductor device structures (gate stacks) with charge compositions: A semiconductor structure, particularly a gate stack, useful in field effect transistors (FETs) in which the threshold voltage thereof is controlled by introducing a fixed spatial distribution of electric charge density to the gate dielectric material and a method of forming the same are provided. nFETs and/or pFETs structures are... Agent: Scully Scott Murphy & Presser, PC

20080017938 - Semiconductor device and manufacturing method thereof: A method for manufacturing a semiconductor device includes: forming a device isolation layer in a semiconductor substrate; forming a gate insulating layer and a gate electrode on the semiconductor substrate; depositing a triple layer over the resulting structure, the triple layer including a bottom oxide layer, a nitride oxide layer... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20080017939 - Low power magnetoelectronic device structures utilizing enhanced permeability materials: A method for making a magnetoelectronic device structure is also provided. The method comprises fabricating a magnetoelectronic device (102) and depositing a conducting line (104). A layer of enhanced permeability dielectric material (106) having a permeability no less than approximately 1.5 is formed, wherein after the step of fabricating a... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20080017940 - Image sensing module: An image sensing module includes an image sensor chip. The image sensor chip has a first surface and an image sensing area on the first surface, where the image sensing area is utilized for sensing light rays illuminating thereon. The image sensor chip includes a plurality of input/output (I/O) terminals... Agent: North America Intellectual Property Corporation

20080017942 - Image sensor unit and image sensor apparatus: An image sensor unit includes a fixed substrate, a movable substrate, an actuate section including an actuator for moving the movable substrate against the fixed substrate, an image sensor having an imaging surface on a front surface of the image sensor, and at least, a part of a rear surface... Agent: Sidley Austin LLP

20080017941 - Structure of image sensor module and a method for manufacturing of wafer level package: The present invention discloses an image sensor module and forming method of wafer level package. The image sensor module comprises a metal alloy base, a wafer level package, a lens holder, and flexible printed circuits (F.P.C.). The wafer level package having a plurality of image sensor dice and a plurality... Agent: Bacon & Thomas, PLLC

20080017943 - Microfeature workpieces having microlenses and methods of forming microlenses on microfeature workpieces: Microfeature workpieces having microlenses and methods of forming microlenses on microfeature workpieces are disclosed herein. In one embodiment, a method for forming microlenses includes forming a plurality of shaping members on a microfeature workpiece between adjacent pixels, reflowing the shaping members to form a shaping structure between adjacent pixels, depositing... Agent: Dickstein Shapiro LLP

20080017944 - Integral topside vacuum package: An integrated vacuum package having an added volume on a perimeter within the perimeter of a bonding seal between two wafers. The added volume of space may be an etching of material from the inside surface of the top wafer. This wafer may have vent holes that may be sealed... Agent: Honeywell International Inc.

20080017945 - Method for fabricating color filters: A method for fabricating a color filter is disclosed. First, a substrate having a dielectric layer and a passivation thereon is provided. Next, a first pattern transfer process is performed to form a trench in the dielectric layer and the passivation layer, and a color filter is formed in the... Agent: North America Intellectual Property Corporation

20080017946 - Back-lit image sensor with a uniform substrate temperature: An image sensor including photosensitive cells including photodiodes and at least one additional circuit with a significant heat dissipation including transistors. The image sensor is made in monolithic form and includes a layer of a semiconductor material having first and second opposite surfaces and including, on the first surface side,... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20080017947 - Circuit having a schottky contact component: A circuit having a Schottky contact component is disclosed. One embodiment provides a semiconductor substrate having a layer of a first conductivity type, a metal layer, and delimited semiconductor regions of a second conductivity type opposite the first conductivity type, provided in or on the main surface, in order to... Agent: Dicke, Billig & Czaja

20080017948 - Structures of high-voltage mos devices with improved electrical performance: A semiconductor structure includes a first high-voltage well (HVW) region of a first conductivity type overlying a substrate, a second HVW region of a second conductivity type opposite the first conductivity type overlying the substrate and laterally adjoining the first HVW region, and a third HVW region of the second... Agent: Slater & Matsil, L.L.P.

20080017949 - Front-rear contacts of electronics devices with induced defects to increase conductivity thereof: An electronic device is proposed. The device is integrated in a chip including at least one stacked layer having a front surface and a rear surface opposite the front surface, the device including: an insulating trench insulating an active region of the chip, the insulating trench having a section across... Agent: Bryan A. Santarelli Graybeal Jackson Haley LLP

20080017950 - Methods of forming ruthenium film by changing process conditions during chemical vapor deposition and ruthenium films formed thereby: A ruthenium (Ru) film is formed on a substrate as part of a two-stage methodology. During the first stage, the Ru film is formed on the substrate in a manner in which the Ru nucleation rate is greater than the Ru growth rate. During the second stage, the Ru film... Agent: Myers Bigel Sibley & Sajovec

20080017951 - Method of forming a self-aligned transistor and structure therefor: In one embodiment, a transistor is formed to use two conductors to make electrical connection to one of the active regions of the transistor.... Agent: Bradley J. Botsch Semiconductor Components Industries, LLC

20080017952 - Strained layers within semiconductor buffer structures: A semiconductor workpiece including a substrate, a relaxed buffer layer including a graded portion formed on the substrate, and at least one strained transitional layer within the graded portion of the relaxed buffer layer and method of manufacturing the same. The at least one strained transitional layer reduces an amount... Agent: Knobbe, Martens, Olsen & Bear LLP

20080017953 - Memory elements and methods for making same: Annular, linear, and point contact structures are described which exhibit a greatly reduced susceptibility to process deviations caused by lithographic and deposition variations than does a conventional circular contact plug. In one embodiment, a standard conductive material such as carbon or titanium nitride is used to form the contact. In... Agent: Michael G. Fletcher, Fletcher, Yoder & Van Someren

20080017954 - Semiconductor device and semiconductor device manufacturing method: A capacitor insulating film composed of a layered film of first- to third-layer hafnium oxide films is formed on a lower electrode of a capacitor. The first- and third-layer hafnium oxide films have a composition ratio of oxygen to hafnium higher than the second-layer hafnium oxide film. Thus, the capacitor... Agent: Mcdermott Will & Emery LLP

20080017955 - Integrated circuit package system with offset stacked die: An integrated circuit package system provides a leadframe having a short lead finger and a long lead finger. A first die is placed in the leadframe. A second die is offset from the first die. The offset second die is attached to the first die and the long lead finger... Agent: Law Offices Of Mikio Ishimaru

20080017958 - Chip package structure: A chip package structure including a lead frame, at least one first bonding wire, at least one second bonding wire, third bonding wires and an encapsulant is provided. The lead frame includes a die pad, inner leads and at least one bus bar, wherein the bus bar is disposed therebetween... Agent: J C Patents, Inc.

20080017956 - Interconnect structure for semiconductor package: A semiconductor device includes a semiconductor substrate having top and bottom surfaces, the top surface having at least one device region thereon. At least one trench opening is formed through the substrate from the bottom surface and connecting to the device region. A layer of conductive material is deposited in... Agent: Duane Morris LLPIPDepartment (tsmc)

20080017957 - Leaded stacked packages having integrated upper lead: A semiconductor package includes a leadframe. An upper lead is disposed above the leadframe. A first die is attached to a lower surface of the upper lead to provide electrical conductivity from the first die to the upper lead. A second die is attached to the first die. A method... Agent: Quarles & Brady LLP

20080017959 - Surface mount multichip devices: A surface mountable multi-chip device is provided which includes first and second lead frames portions and at least two chips. The lead frame portions each include a header region and a lead region. Beneficially, the header regions of the first and second lead frame portions lie in a common plane,... Agent: Mayer & Williams PC

20080017961 - Chip package structure and manufacturing method thereof: A manufacturing method of a chip package structure is provided. A circuit substrate having a first surface, a second surface, and a through hole connecting the first surface and the second surface is provided. A chip having an active surface and bonding pads disposed on the active surface is provided.... Agent: J C Patents, Inc.

20080017960 - Integrated circuit package system with laminate base: An integrated circuit package system with laminate base is provided including forming a base package including, forming a laminate substrate strip, mounting an integrated circuit on the laminate substrate strip, forming a molded cover over the integrated circuit and the laminate substrate strip, and performing a strip test of the... Agent: Law Offices Of Mikio Ishimaru

20080017962 - Si-substrate and structure of opto-electronic package having the same: Disclosed herein is a structure of opto-electronic package having a Si-substrate. The Si-substrates are manufactured in batch utilizing the micro-electromechanical processes or the semiconductor processes, so that these Si-substrates are made with great precision and full of varieties. Based on the material characteristic of the Si-substrate, and the configuration of... Agent: North America Intellectual Property Corporation

20080017963 - Si-substrate and structure of opto-electronic package having the same: Disclosed herein is a structure of opto-electronic package having Si-substrate. The Si-substrates are manufactured in batch utilizing the micro-electromechanical processes or the semiconductor processes, so that these Si-substrates are made with great precision and full of varieties. Base on the material characteristic of the Si-substrate, and the configuration of the... Agent: North America Intellectual Property Corporation

20080017964 - Hybrid microelectronic package: A method and apparatus with a first substrate made of an inorganic material having at least one signal trace and a second substrate made of an organic material having at least one signal trace, at least one interconnect and at least one reception cavity. The first and second substrates are... Agent: Agilent Technologies Inc.

20080017965 - Semiconductor device and manufacturing method thereof: A semiconductor device includes a plurality of chips comprising a plurality of first moisture-proof rings individually surrounding said plurality of chips, a second moisture-proof ring surrounding the entire plurality of chips, and a wire for connecting said plurality of chips to each other.... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20080017968 - Stack type semiconductor package and method of fabricating the same: A stack type semiconductor package, and a method of fabricating the same are provided. The stack type semiconductor package may include a lower unit package and an upper unit package. The lower unit package may include a substrate, and a semiconductor chip on an upper surface of the substrate. A... Agent: Harness, Dickey & Pierce, P.L.C

20080017967 - Electronic circuit in a package-on-package configuration and method for producing the same: An electronic circuit in a package-on-package configuration includes: a lower subassembly with a first electronic element, a first wiring carrier, a first housing with a first redistribution layer and an arrangement of solder balls disposed on the first redistribution layer and an upper subassembly with a second electronic element mounted... Agent: Edell , Shapiro & Finnan , LLC

20080017966 - Pillar bump package technology: A semiconductor product includes a die and leadframe included in a package made of plastic or other insulating material. The die and leadframe are dimensioned so that they overlap in at least one location. One or more pillar bumps, formed from as a cylindrical conductive base topped with a solder... Agent: Advanced Analogic Technologies

20080017969 - Module and method of manufacturing the same: A method of manufacturing a module, formed of a semiconductor element flip-chip bonded to a substrate and chip component soldered to the substrate, is disclosed. The method includes a step of mounting the chip component and the semiconductor element to the substrate, a first injection step for injecting first resin... Agent: Mcdermott Will & Emery LLP

20080017970 - Brick type stackable semiconductor package: A brick-type stackable semiconductor package primarily comprises a substrate, at least a memory chip and an encapsulant. The memory chip is disposed on an inner surface of the substrate and is encapsulated by an encapsulant shaped like a brick. A plurality of outer pads and a plurality of transfer pads... Agent: Troxell Law Office PLLC

20080017971 - High speed, high density, low power die interconnect system: A system for interconnecting at least two die each die having a plurality of conducting layers and dielectric layers disposed upon a substrate which may include active and passive elements. In one embodiment there is at least one interconnect coupling at least one conducting layer on a side of one... Agent: Vern Maine & Associates

20080017972 - Electronic circuit in a package-in-package configuration and production method: An electronic circuit in a package-in-package configuration and a production method is disclosed. One embodiment provides an arrangement enveloped by an encapsulation and composed of at least one semiconductor element on an element carrier, at least one leadframe with at least one inner contact-connection, at least one inner lead running... Agent: Dicke, Billig & Czaja

20080017973 - Semiconductor device and manufacturing method therefor: There is disclosed a semiconductor device comprising at least one semiconductor element, one chip mounting base being provided at least one first interconnection on one major surface thereof and at least one second interconnection on the other major surface thereof, and the semiconductor element being electrically connected to at least... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080017974 - Apparatus for housing a micromechanical structure: Apparatus for housing a micromechanical structure, and a method for producing the housing. The apparatus has a substrate having a main side on which the micromechanical structure is formed, a photo-resist material structure surrounding the micromechanical structure to form a cavity together with the substrate between the substrate and the... Agent: Dickstein Shapiro LLP

20080017975 - Capillary underflow integral heat spreader: A mating surface of the cooling device is positioned adjacent to a mating surface of a thermal component and the solder material is heated at least to its melting point. The solder material is maintained in a molten state until it has flowed into and substantially filled a bond line... Agent: Intel Corporation C/o Intellevate, LLC

20080017976 - Capillary underfill and mold encapsulation method and apparatus: A method of packaging a die includes attaching the die to a substrate; underfilling the space between the die and the substrate with a first material, and placing a second material in contact with at least a portion of the die and the substrate after underfilling the space between the... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20080017977 - Heat dissipating semiconductor package and heat dissipating structure thereof: A heat dissipating semiconductor package and a heat dissipating structure thereof are provided. The heat dissipating structure includes an outer surface, consecutive recessed step portions, and a pressure-releasing groove. The outer surface is exposed from an encapsulant made of a molding compound. The step portions are formed at an edge... Agent: Edwards Angell Palmer & Dodge LLP

20080017978 - Semiconductor device with a high thermal dissipation efficiency: A semiconductor device having a higher thermal dissipation efficiency comprises a thermally conducting structure attached to a surface of the semiconductor device via soldering. The thermally conducting structure is essentially formed of a thermally conducting material and comprises an array of freestanding fins, studs or frames, or a grid of... Agent: Louis Paul Herzberg

20080017979 - Semiconductor structure having extra power/ground source connections and layout method thereof: One exemplary embodiment of the present invention provides a semiconductor structure having a supply trunk and a supply rail, where a conduction path between the supply trunk and the supply rail includes at least two turning points. Another exemplary embodiment of the present invention provides a semiconductor structure having a... Agent: North America Intellectual Property Corporation

20080017981 - Compliant bumps for integrated circuits using carbon nanotubes: Complaint bumps used for interconnections between integrated circuit chips are made with carbon nanotubes.... Agent: Fish & Richardson P.C.

20080017980 - Chip having two groups of chip contacts: A chip (1) has a substrate (2), an integrated circuit (3) provided on the substrate (2), a plurality of conductor zones (ME1, ME2, ME3, ME4, ME5) and a passivating layer (5) provided to protect the conductor zones and the integrated circuit, through-holes (6, 7) being provided in the passivating layer... Agent: Nxp, B.v. Nxp Intellectual Property Department

20080017983 - Flip-chip semiconductor package and chip carrier thereof: The present invention discloses a flip-chip semiconductor package and a chip carrier thereof. The chip carrier includes a groove formed around a chip-mounting area. The groove may be formed along a periphery of the chip-mounting area or at corners thereof. The groove is filled with a filler of low Young's... Agent: Edwards Angell Palmer & Dodge LLP

20080017982 - Semiconductor chip and method for manufacturing same, electrode structure of semiconductor chip and method for forming same, and semiconductor device: A semiconductor chip according to the present invention includes a semiconductor substrate, a bump of a metal projecting from a surface of the semiconductor substrate, and an alloy film covering the entire surface of the bump, the alloy film being composed of an alloy of the metal of the bump... Agent: Rabin & Berdo, PC

20080017984 - Blm structure for application to copper pad: A microelectronic element and a related method for fabricating such is provided. The microelectronic element comprises a contact pad overlying a major surface of a substrate. The contact pad has a composition including copper at a contact surface. A passivation layer is also provided overlying the major surface of the... Agent: International Business Machines Corporation Dept. 18g

20080017986 - Electronic component of vqfn design and method for producing the same: A method for producing an electronic component of a VQFN (very thin quad flat pack no-lead) design includes the following method steps: anchoring at least one integrated circuit element on a sacrificial substrate; contact-connecting the at least one integrated circuit element to the sacrificial substrate with formation of contact-connecting points... Agent: Edell , Shapiro & Finnan , LLC

20080017985 - Electronic device with a plurality of substrates and method for manufacturing same: An electronic device with a plurality of substrates and method for manufacturing same is disclosed. One embodiment provides three-dimensional wiring structure including a basis substrate that includes recesses in the edge region of which electroconductive elements are arranged which cooperate with the electric contact points of substrates that are arranged... Agent: Dicke, Billig & Czaja

20080017987 - Semiconductor device with reduced contact resistance: A semiconductor device that includes an electrode of one material and a conductive material of lower resistivity formed over the electrode and a process for fabricating the semiconductor device.... Agent: Ostrolenk Faber Gerb & Soffen

20080017988 - Semiconductor device having copper metal line and method of forming the same: A method of forming a copper metal line in a semiconductor device includes depositing an interlayer insulating layer on a semiconductor substrate having a lower metal line, forming a via contact hole and a metal line pattern in the semiconductor substrate, sequentially depositing a barrier metal film and a copper... Agent: Lowe Hauptman Ham & Berner, LLP

20080017989 - Electrically inactive via for electromigration reliability improvement: A semiconductor device 300 includes a metal line 304 formed in a first dielectric layer 302. A capping layer 306 is formed the metal line 304. A second dielectric layer 308 is formed over the first dielectric layer 302 and the metal line 304. A first via 310 is formed... Agent: Texas Instruments Incorporated

20080017990 - Semiconductor integrated circuit device: Interconnections are formed over an interlayer insulating film which covers MISFETQ1 formed on the principal surface of a semiconductor substrate, while dummy interconnections are disposed in a region spaced from such interconnections. Dummy interconnections are disposed also in a scribing area. Dummy interconnections are not formed at the peripheries of... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080017991 - Semiconductor chip: A semiconductor chip may include a conductive pad to connect a semiconductor device to an external circuit. At least one semiconductor device may be formed on a semiconductor substrate. At least one metal wiring layer may be formed over at least one semiconductor device. The plurality of metal wiring layers... Agent: Sherr & Nourse, PLLC

20080017992 - Semiconductor device and method of manufacturing the same: A first hard mask is formed on a polysilicon film or a target member to be etched, on which a second hard mask composed of amorphous silicon is formed. Ions of boron or the like are implanted into a desired portion of the second hard mask, and then the first... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080017993 - Semiconductor device and method of manufacturing the same: There is provided a solution to the problem of the poor adhesion in the pad portion while inhibiting the dishing in the pad portion. An SiON film, which covers insulating areas and has an opening above Cu pad areas, is formed, and a barrier metal film is formed in the... Agent: Young & Thompson

20080017994 - Leaded stacked packages having elevated die paddle: A semiconductor package includes a leadframe, an elevated die paddle disposed above the leadframe, a first die attached to a lower surface of the elevated die paddle to support the first die within the semiconductor package, and a second die attached to the first die. A method of manufacturing a... Agent: Quarles & Brady LLP

20080017995 - Flip chip mounting process and flip chip assembly: There is provided a flip chip mounting process which is high in productivity and reliability, and thus can be applicable to the flip chip mounting of the next-generation LSI. This flip chip mounting process comprises the steps of supplying a resin (13) containing solder powder and a convection additive (12)... Agent: Wenderoth, Lind & Ponack L.L.P.

20080017996 - Semiconductor device: A semiconductor device comprises a wiring layer. The wiring layer is provided by forming a sidewall film having a closed-loop along a sidewall of a hard mask, etching off the hard mask to leave the sidewall film, and then etching a target material to be etched with a mask of... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080017997 - Interconnection architecture for semiconductor device: An interconnection architecture, for a semiconductor device (having regions arranged to include at least an inner region, an intermediate region located at least aside the inner region, and an outer region located at least on a side of the intermediate region opposite to the inner region, includes: one or more... Agent: Harness, Dickey & Pierce, P.L.C

20080017998 - Semiconductor component and method of manufacture: In various embodiments, semiconductor components and methods to manufacture semiconductor components are disclosed. In one embodiment, a semiconductor component includes a semiconductor die and multiple coplanar leads coupled to the semiconductor die, wherein the semiconductor die includes a power transistor and wherein the multiple leads are spaced apart from each... Agent: Hvvi Semiconductors, Inc.

20080017999 - Semiconductor device and method for manufacturing same: A semiconductor device including a semiconductor device, an integrated circuit chip, a sealing resin encapsulating the integrated circuit chip and an insulating waterproof film covering at least a portion of a surface of said sealing resin and preventing penetration of moisture into the sealing resin.... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20080018000 - Method and apparatus for precisely aligning integrated circuit chips: A system that facilitates precise inter-chip alignment. The system includes a first integrated circuit chip, whose surface has etch pit wells. The system also includes a second integrated circuit chip, whose surface has corresponding etch pit wells that mate with the etch pit wells of the first integrated circuit chip.... Agent: Sun Microsystems Inc. C/o Park, Vaughan & Fleming LLP

20080011996 - Multi-layer device with switchable resistance: The present invention provides a microelectronic device comprising a resistance structure including a plurality of programmable resistance layers and at least one intermediate layer such that an intermediate layer is placed between two programmable resistance layers. The programmable resistance layers can be individually doped or may consist of different materials.... Agent: Ibm Corporation, T.j. Watson Research Center

20080011997 - Semiconductor device and method of manufacturing the same: Between MISFET of the region which forms one memory cell, and MISFET which adjoined it, each source of MISFET adjoins in the front surface of a semiconductor substrate, insulating. And the multi-layer structure of a phase change film, and the electric conduction film of specific resistance lower than the specific... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080012001 - Shaped articles comprising semiconductor nanocrystals and methods of making and using same: A shaped article comprising a plurality of semiconductor nanocrystals. Devices incorporating shaped articles are also provided. Methods of manufacturing shaped articles by various molding processes are also provided.... Agent: Kenyon & Kenyon LLP

20080012002 - Nitride-based semiconductor light emitting device and methods of manufacturing the same: A nitride-based semiconductor light emitting device having a structure capable of improving optical output performance, and methods of manufacturing the same are provided. The active layer may include a first barrier layer formed of InxGa(1-x)N (0.01≦x≦0.05) on a n-type semiconductor layer, a first diffusion barrier layer formed of InyGa(1-y)N (0≦y≦0.01)... Agent: Harness, Dickey & Pierce, P.L.C

20080012005 - Controlled growth of larger heterojunction interface area for organic photosensitive devices: An optoelectronic device and a method of fabricating a photosensitive optoelectronic device includes depositing a first organic semiconductor material on a first electrode to form a continuous first layer having protrusions, a side of the first layer opposite the first electrode having a surface area at least three times greater... Agent: Kenyon & Kenyon LLP

20080012009 - Field effect transistor, organic thin-film transistor and manufacturing method of organic transistor: A method for determining the combination of the electrode and organic semiconductor with improved electron injection efficiency and hole injection efficiency in an organic TFT is provided, two types of FETS, that is, an n channel FET and a p channel FET are realized, and further, a complementary TFT (CTFT)... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080012008 - Making organic thin film transistor array panels: An organic thin film transistor (OTFT) array panel for a display device includes a gate line and a pixel electrode formed on a substrate, the gate line and pixel electrode each having a first conductive layer including a transparent conductive oxide and a second conductive layer including a metal, a... Agent: Macpherson Kwok Chen & Heid LLP

20080012012 - Method for manufacturing semiconductor device, semiconductor device, and electrooptical device: A method for manufacturing a semiconductor device which is equipped with a switching element having an organic semiconductor layer and a drive circuit electrically coupled to the switching element on a first surface of a flexible substrate, the method including: providing the drive circuit above a temporary substrate in advance,... Agent: Oliff & Berridge, PLC

20080012013 - Pattern manufacturing equipments, organic thin-film transistors and manufacturing methods for organic thin-film transistor: A liquid film applicator means can apply a photosensitive lyophobic film 18 to a substrate 16. An exposure unit 10 is placed on the back side of the substrate and forms the lyophobic film applied on the substrate into a pattern in alignment with gate electrodes 13. A dropping unit... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080012011 - Thin film transistor array panel and method of manufacture: A thin film transistor array panel includes a gate line formed on a substrate, an interlayer insulating film formed on the gate line and having an opening, a gate insulator formed in the opening, a data line formed on the interlayer insulating film and including a first conductive layer made... Agent: Macpherson Kwok Chen & Heid LLP

20080012006 - Thin film transistor comprising novel conductor and dielectric compositions: The invention relates to thin film transistors comprising novel dielectric layers and novel electrodes comprising metal compositions that can be provided by a dry thermal transfer process.... Agent: E I Du Pont De Nemours And Company Legal Patent Records Center

20080012014 - Thin film transistor, method of preparing the same, and flat panel display device including the thin film transistor: A thin film transistor (TFT) has reduced contact resistance between an organic semiconductor layer and source and drain electrodes. In the TFT, organic semiconductor crystals can be grown satisfactorily so as to improve electrical properties of the TFT. A method of preparing the same and a flat panel display device... Agent: Robert E. Bushnell

20080012020 - Driving transistor of organic light-emitting device, method for fabricating the driving transistor, and organic light-emitting device including the driving transistor: A driving TFT for an organic light-emitting display device includes a gate electrode on a portion of a substrate, a gate insulation layer on an entire surface of the substrate including the ate electrode, a semiconductor layer on the gate insulation layer and covering the gate electrode, the semiconductor layer... Agent: Seyfarth Shaw, LLP

20080012022 - Electro-optic device substrate, electro-optic device, electronic apparatus and method for manufacturing electro-optic device substrate: An electro-optic device substrate includes a base and a TFT element having a source region and a drain region disposed on the base. The TFT element includes a silicon layer in the source region or the drain region, and the silicon layer at least partially includes a silicided portion. The... Agent: Oliff & Berridge, PLC

20080012024 - Organic thin film transistor substrate and fabrication thereof: An organic thin film transistor (“TFT”) substrate for facilitating control of the turn-on and turn-off actions of the TFT. The organic TFT substrate includes a gate line on a substrate, a pixel electrode in the same plane as the gate line, a data line insulated from the gate line, an... Agent: Macpherson Kwok Chen & Heid LLP

20080012023 - Thin-film transistor and image display device: In either of a source side and a drain side of an insular semiconductor thin film, a gate electrode is extended without a break along the contour of the insular semiconductor thin film to provide a branch closed circuit, thereby removing a current component path to server as a sub-channel... Agent: Miles & Stockbridge PC

20080012025 - Gan crystal substrate, fabricating method of gan crystal substrate, and light-emitting device: A GaN crystal substrate is provided, which has a diameter of not less than 20 mm and a thickness of not less than 70 μm and not more than 450 μm, and has a light absorption coefficient of not less than 7 cm−1 and not more than 68 cm−1 for... Agent: Mcdermott Will & Emery LLP

20080012027 - Light-emitting element, light-emitting device, and method of fabricating light-emitting element: A method of fabricating a semiconductor device includes the steps of sequentially depositing a first electrode, a light-emitting layer containing zinc sulfide and manganese, and forming a second electrode; and applying thermal treatment to the light-emitting layer. A manganese atom in the zinc sulfide lattice is in a symmetry and... Agent: Fish & Richardson P.C.

20080012028 - Polarized semiconductor light emitting device: A polarized semiconductor light emitting device includes a semiconductor structure having a first conductivity semiconductor layer, an active layer and a second conductivity semiconductor layer sequentially stacked. Also, the semiconductor structure further includes a plurality of light guide parts defined by a plurality of grooves arranged along a predetermined direction.... Agent: Mcdermott Will & Emery LLP

20080012030 - Nitride semiconductor light emitting device array: A nitride semiconductor light emitting device array, which includes a dielectric layer formed on a first conductivity lower nitride semiconductor layer, having a plurality of windows. Each of a plurality of hexagonal pyramid light emission structures is grown from a surface of the first conductivity lower nitride semiconductor layer exposed... Agent: Mcdermott Will & Emery LLP

20080012032 - Substantially transparent material for use with light-emitting device: The invention provides a substantially transparent material comprising particles of an inorganic titanate or an inorganic zirconate and at least one compound, wherein the particles are uniformly dispersed in the at least one compound, and wherein the particles are bonded to the at least one compound via at least one... Agent: Michelle B. Lando Cabot Corporation

20080012035 - Led chip package structure and method for manufacturing the same: An LED chip package structure includes a substrate unit, a light-emitting unit, and a colloid unit. The substrate unit has a substrate body, and a positive electrode trace and a negative electrode trace is respectively formed on the substrate body. The light-emitting unit has a plurality of LED chips arranged... Agent: Rosenberg, Klein & Lee

20080011998 - Method of forming a chalcogenide memory cell having an ultrasmall cross-sectional area and a chalcogenide memory cell produced by the method: A method of fabricating a chalcogenide memory cell is described. The cross-sectional area of a chalcogenide memory element within the cell is controlled by the thickness of a bottom electrode and the width of a word line. The method allows the formation of ultra small chalcogenide memory cells.... Agent: Stout, Uxa, Buyan & Mullins LLP

20080011999 - Microelectronic devices using sacrificial layers and structures fabricated by same: A dielectric layer is formed on a region of a microelectronic substrate. A sacrificial layer is formed on the dielectric layer, and portions of the sacrificial layer and the dielectric layer are removed to form an opening that exposes a portion of the region. A conductive layer is formed on... Agent: Myers Bigel Sibley & Sajovec

20080012000 - Method and apparatus for forming an integrated circuit electrode having a reduced contact area: A method and an apparatus for manufacturing a memory cell having a non-volatile resistive memory element with a limited size active area. The method comprises a first step of providing a dielectric volume and forming a plug opening within the dielectric volume. A recessed plug of a conductive material is... Agent: Fletcher Yoder (micron Technology, Inc.)

20080012003 - Quantum device, control method thereof and manufacturing method thereof: A quantum dot (22) is formed on a GaAs substrate (20). In the quantum dot (22), a single electron exists. A cap layer (26) is formed on a surrounding area of the quantum dot (22), and a barrier layer (28) is formed thereon. A quantum dot (30) for detection is... Agent: Kratz, Quintos & Hanson, LLP

20080012004 - Spintronic devices with constrained spintronic dopant: A spintronic device may include at least one superlattice and at least one electrical contact coupled thereto, with the at least one superlattice including a plurality of groups of layers. Each group of layers may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion having a... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist P.A.

20080012007 - Addressable transistor chip for conducting assays: A bioelectronic microchip formed on a substrate (16) includes a plurality of field effect transistors (10), each including first (12) and second (14) electrodes on the substrate; and a channel (18) extending between the first and second electrodes. An organic semiconducting material fills the channel (18); and a dielectric layer... Agent: Dinsmore & Shohl LLP

20080012010 - Organic electronic device, method for production thereof, and organic semiconductor molecule: An organic electronic device which has stable physical properties and which allows easy production is provided. The organic electronic device has a conductive path including fine particles, a first organic semiconductor molecule which has a first conductive type and binds at least two of the fine particles together, and a... Agent: Bell, Boyd & Lloyd, LLP

20080012015 - Method for fabricating cuins2 thin film by metal organic chemical vapor deposition, cuins2 thin film fabricated by the same and method for fabricating in2s3 thin film therefrom: Disclosed is a method for fabricating a CuInS2 thin film by metal-organic chemical vapor deposition (MOCVD). The method comprises fabricating a copper thin film by depositing an asymmetric copper precursor on a substrate by MOCVD and fabricating a CuInS2 thin film by depositing an indium-sulfur-containing precursor on the copper thin... Agent: Cantor Colburn, LLP

20080012017 - Array substrate for liquid crystal display device and method of fabricating the same: An array substrate for a liquid crystal display device comprises a gate line on a substrate having a pixel region; a gate insulating layer on the gate line; a data line crossing the gate line to define the pixel region and formed on the gate insulating layer; a thin film... Agent: Morgan Lewis & Bockius LLP

20080012016 - Transparent conductive film, semiconductor device and active matrix display unit: A transparent conductive film substantially made from In2O3, SnO2 and ZnO, having a molar ratio In/(In+Sn+Zn) of 0.65 to 0.8 and also a molar ratio Sn/Zn of 1 or less: The transparent conductive film has a favorable electric contact property with an electrode or line made from Al or Al... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080012019 - Method and structure for forming self-aligned, dual stress liner for cmos devices: A method for forming a self-aligned, dual stress liner for a CMOS device includes forming a first type stress layer over a first polarity type device and a second polarity type device, and forming a sacrificial layer over the first type nitride layer. Portions of the first type stress layer... Agent: Cantor Colburn LLP - IBM Fishkill

20080012018 - Strained mos device and methods for its fabrication: An MOS device having enhanced mobility and a method for its fabrication are provided. The method comprises providing a P-type monocrystalline silicon germanium substrate having a first lattice constant and a channel region at the substrate surface, forming a gate insulator layer on the substrate, forming a gate electrode having... Agent: Ingrassia Fisher & Lorenz, P.C. (amd)

20080012021 - Array substrate for display device: An array substrate for a display device includes an insulating substrate, a buffer layer which is disposed on the insulating substrate and is formed of silicon oxide with a refractive index equal to a refractive index of the insulating substrate, a first insulation layer which is disposed on the buffer... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080012026 - Trench mos type silicon carbide semiconductor device and method for manufacturing the same: A trench MOS type SiC semiconductor device includes a first conductivity semiconductor substrate, a first conductivity drift layer on the substrate, a second conductivity base layer on the drift layer, a first conductivity source layer on the base layer, a stripe shaped trench reaching from the surface of the source... Agent: Rabin & Berdo, PC

20080012029 - Light emitting and image sensing device and apparatus: a photosensor structure; and switching means coupled between the photosensor structure and one of the plurality of signal lines, the switching means responsive to select signals on one or more of the plurality of select lines for conveying a photosensor signal between the photosensor structure and the one of the... Agent: Paul Steven Schranz

20080012031 - White light-emitting diode using semiconductor nanocrystals and preparation method thereof: Disclosed are a white light-emitting diode (LED) in which an emission layer comprising a red luminous body and a green luminous body is formed on a blue LED, and a preparation method thereof. The emission layer comprises both of at least one inorganic phosphor and at least one semiconductor nanocrystal.... Agent: Cantor Colburn, LLP

20080012034 - Led package with converging extractor: In one aspect, the present application discloses a light source comprising an LED die optically coupled to an extractor comprising a plurality of optical elements each having a base, an apex smaller than the base, and a converging side extending between the base and the apex. The extractor base is... Agent: 3m Innovative Properties Company

20080012033 - Optoelectronic semiconductor component and housing base for such a component: An optoelectronic semiconductor component comprising at least one radiation emitting semiconductor chip disposed in a recess of a housing base body, wherein the recess is bounded laterally by a wall surrounding the semiconductor chip and is at least partially filled with an encapsulant that covers the semiconductor chip and is... Agent: Fish & Richardson PC

20080012036 - Leadframe-based packages for solid state light emitting devices and methods of forming leadframe-based packages for solid state light emitting devices: A modular package for a light emitting device includes a leadframe including a first region having a top surface, a bottom surface and a first thickness and a second region having a top surface, a bottom surface and a second thickness that is less than the first thickness. The leadframe... Agent: Myers Bigel Sibley & Sajovec, P.A.

20080012037 - Method for manufacturing semiconductor device: The inventive method for manufacturing a semiconductor device is a method for manufacturing a semiconductor device using irradiation with laser light to partition a substrate having semiconductor layers formed thereon, with gallium contained in at least one of the substrate and the semiconductor layers, wherein the method comprises: forming grooves... Agent: Hamre, Schumann, Mueller & Larson P.C.

20080012038 - Blue-light emitting aluminum nitride material and method of manufacturing the same: Carbon or a substance generating a carbon by thermal decomposition is added to prepared material containing aluminum nitride (AlN), an Si source such as silicon nitride (Si3N4) or a silicon oxide (SiO2), and an Eu source such as europium oxide (Eu2O3) or europium nitrate or europium acetate, and the prepared... Agent: Burr & Brown

20080012039 - Over-voltage protected semiconductor device fabrication: In accordance with the principles of the invention, a semiconductor substrate is provided that has a first cell formed thereon. The first cell has first and second terminals or nodes and a control terminal or node and has a characteristic breakdown voltage across the first and second terminals. A voltage... Agent: Donald J Lenkszus

20080012040 - Semiconductor devices: The dense accumulation of hole carriers can be obtained over a wide range of a semiconductor region in a floating state formed within a body region of an IGBT. An n type semiconductor region (52) whose potential is floating is formed within a p− type body region (28). The n... Agent: Oliff & Berridge, PLC

20080012041 - Switching control system to reduce coil output voltage when commencing coil charging: A switching control system and method is provided that optimizes switching efficiencies for power switching applications including automotive ignition systems, solenoid drivers, motor drivers and power regulation systems. In an ignition system, a coil current switching magnitude is controlled at the start of ignition coil charging, thereby avoiding an untimely... Agent: Delphi Technologies, Inc.

20080012042 - Semiconductor device and method of producing the same, and power conversion apparatus incororating this semiconductor device: The temperature of a bipolar semiconductor element using a wide-gap semiconductor is raised using heating means, such as a heater, to obtain a power semiconductor device being large in controllable current and low in loss. The temperature is set at a temperature higher than the temperature at which the decrement... Agent: Sheridan Ross PC

20080012043 - Semiconductor device and method of operating a semiconductor device: A bipolar high voltage/power semiconductor device has a drift region having adjacent its ends regions of different conductivity types respectively. High and low voltage terminals are provided. A first insulated gate terminal and a second insulated gate terminal are also provided. One or more drive circuits provide appropriate voltages to... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20080012044 - On-chip structure for electrostatic discharge (esd) protection: A complementary SCR-based structure enables a tunable holding voltage for robust and versatile ESD protection. The structureare n-channel high-holding-voltage low-voltage -trigger silicon controller rectifier (N-HHLVTSCR) device and p-channel high-holding-voltage low-voltage -trigger silicon controller rectifier (P-HHLVTSCR) device. The regions of the N-HHLVTSCR and P-HHLVTSCR devices are formed during normal processing steps... Agent: Mh2 Technology Law Group, LLP

20080012045 - Semiconductor device and method of manufacturing the same: A semiconductor device is provided, which is capable of improving mounting flexibility relatively and increasing general versatility, as well as realizing heat radiation characteristics and low on-resistance. Moreover, the semiconductor device is provided, which is capable of improving reliability, performing processing in manufacturing processes easily and reducing manufacturing costs. Also,... Agent: Miles & Stockbridge PC

20080012046 - Semiconductor device having pads for bonding and probing: A semiconductor device includes a first pad, a second pad and a third pad. The first pad and the third pad are electrically connected to each other. The first pad and the second pad are used for bonding. The second pad and the third pad are used for probing. According... Agent: Young & Thompson

20080012047 - Two-terminal nanotube devices and systems and methods of making same: A two terminal switching device includes first and second conductive terminals and a nanotube article. The article has at least one nanotube, and overlaps at least a portion of each of the first and second terminals. The device also includes a stimulus circuit in electrical communication with at least one... Agent: Wilmerhale/boston

20080012048 - Semiconductor device and method for manufacturing same: In a semiconductor device 10 including a structure where transfer electrodes 2a to 2c are disposed on a semiconductor substrate 1 via an insulation layer 3, a first semiconductor region 4 of a first conductivity type, a second semiconductor region 5 of a conductivity type opposite to the first conductivity... Agent: Hamre, Schumann, Mueller & Larson P.C.

20080012049 - Semiconductor sensing field effect transistor, semiconductor sensing device, semiconductor sensor chip and semiconductor sensing device: A semiconductor sensing field effect transistor uses an organic unimolecular film formed on a gate insulating layer. In the semiconductor sensing field effect transistor and a semiconductor sensing device, the gate insulating layer has a stack structure wherein a second silicon oxide layer is stacked on a first silicon oxide... Agent: Birch Stewart Kolasch & Birch

20080012050 - Semiconductor device: A semiconductor device includes: a semiconductor substrate; a vertical type trench gate MOS transistor; a Schottky barrier diode; multiple trenches having a stripe pattern to divide an inner region into first and second separation regions; and a poly silicon film in each trench. The first separation region includes a first... Agent: Posz Law Group, PLC

20080012051 - Dynamic random access memory with an amplified capacitor: A memory cell and methods of making and operating the same are provided. In one aspect, a method of forming a memory cell is provided that includes forming a MOS transistor that has a gate, a source region and a drain region. A bipolar transistor is formed that has a... Agent: Timothy M Honeycutt Attorney At Law

20080012053 - Method of manufacturing semiconductor device having trench-gate transistor: A method of manufacturing a semiconductor device includes: a first step of forming an STI region and an active region surrounded by the STI region on a semiconductor substrate; a second step of forming a protection film protecting a shoulder part of the STI region in a boundary between the... Agent: Foley And Lardner LLP Suite 500

20080012052 - Semiconductor device and method for implantation of doping agents in a channel: A semiconductor device includes a substrate of a first type of conductivity provided with at least one gate on one of its faces, and at least two doped regions of a second type of conductivity for forming a drain region and a source region. The two doped regions are arranged... Agent: Allen Dyer Doppelt Milbrath And Gilchrist, Pa

20080012054 - Epitaxial oxide film, piezoelectric film, piezoelectric film element, liquid discharge head using the piezoelectric film element, and liquid discharge apparatus: Provided are a piezoelectric film, a piezoelectric film element, a liquid discharge head using the piezoelectric film element, and a liquid discharge apparatus. A piezoelectric film element that can be suitably used for a discharge pressure-generating element of a liquid discharge head is obtained by using an epitaxial oxide film... Agent: Fitzpatrick Cella Harper & Scinto

20080012056 - Capacitorless one transistor dram cell, integrated circuitry comprising an array of capacitorless one transistor dram cells, and method of forming lines of capacitorless one transistor dram cells: This invention includes a capacitorless one transistor DRAM cell that includes a pair of spaced source/drain regions received within semiconductive material. An electrically floating body region is disposed between the source/drain regions within the semiconductive material. A first gate spaced is apart from and capacitively coupled to the body region... Agent: Wells St. John P.s.

20080012055 - Layout structure of non-volatile memory: A layout structure for non-volatile memory is described, including a substrate, bit lines in a column direction, transistors as memory cells, word lines in a row direction, bit line contacts and at least two dummy word lines. The substrate has therein an isolation structure that defines an active area. The... Agent: J.c. Patents, Inc.

20080012057 - Semiconductor device using fuse/anti-fuse system and method of manufacturing the same: A first concave portion for the element isolation, a second concave portion for an aligning mark, and a third concave portion for an anti-fuse portion are formed simultaneously within a silicon substrate. After a silicon oxide film is formed on the entire surface, the silicon oxide film positioned within the... Agent: Banner & Witcoff, Ltd. Attorneys For Client No. 000449, 001701

20080012058 - Semiconductor device and method of manufacturing same: The present invention provides a semiconductor device which can reduce consumption electric power even though high integration and technologies such as microfabrication further proceeds in future and a method of manufacturing the same. The present invention comprises a semiconductor substrate, a transistor formed on said semiconductor substrate, a first electric... Agent: Sughrue Mion, PLLC

20080012059 - Semiconductor device and manufacturing method thereof: In a semiconductor device having a concave-type capacitor, HSG silicon is formed on a side surface of a lower electrode while no HSG silicon is formed on a bottom of the lower electrode.... Agent: Mcginn Intellectual Property Law Group, PLLC

20080012060 - Memory cell system with charge trap: A memory cell system is provided forming a first insulator layer over a semiconductor substrate, forming a charge trap layer over the first insulator layer, forming an intermediate layer over the charge trap layer, and forming a second insulator layer with the intermediate layer.... Agent: Law Offices Of Mikio Ishimaru

20080012061 - Nonvolatile semiconductor memory: A nonvolatile semiconductor memory includes first and second memory cells having a floating gate and a control gate. The floating gate of the first and second memory cells is comprised a first part, and a second part arranged on the first part, and a width of the second part in... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080012062 - Eeprom device and method of fabricating the same: An electrically erasable programmable read-only memory (EEPROM) device includes an EEPROM cell located on a semiconductor substrate, the EEPROM cell including a memory transistor and a selection transistor. A source region and a drain region are located on the semiconductor substrate adjacent to opposite sides of the EEPROM cell, respectively,... Agent: Volentine & Whitt PLLC

20080012063 - Flash memory and method for manufacturing the same: A flash memory device can have a cell area and a periphery area. In a method for manufacturing the flash memory, a substrate of the cell area is etched by a predetermined depth, a first poly-silicon layer and an ONO layer are formed on the substrate of the cell area,... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20080012064 - Nonvolatile memory device and methods of operating and fabricating the same: Provided is a nonvolatile memory device and method of operating and fabricating the same for higher integration and higher speed, while allowing for a lower operating current. The nonvolatile memory device may include a semiconductor substrate. Resistive layers each storing a variable resistive state may be formed on the surface... Agent: Harness, Dickey & Pierce, P.L.C

20080012065 - Bandgap engineered charge storage layer for 3d tft: One SONOS-type device contains (a) a charge storage dielectric that includes a band engineered layer that has a wider bandgap facing one of a blocking dielectric and a tunneling dielectric than facing the other one of the blocking dielectric and the tunneling dielectric, and (b) a semiconductor channel region that... Agent: Foley And Lardner LLP Suite 500

20080012066 - Method for making a raised vertical channel transistor device: A method for fabricating a vertical channel transistor device is provided. An opening is formed in a dielectric stack comprised of a pad nitride layer and a pad oxide layer. A plurality of epitaxial silicon growth and dry etching processes are carried out to form drain, vertical channel and source... Agent: North America Intellectual Property Corporation

20080012067 - Transistor and memory cell array and methods of making the same: A method of forming a transistor involves defining an active area by defining isolation trenches, the isolation trenches being adjacent to the active area, and forming a gate electrode after defining the isolation trenches. The gate electrode is formed by etching a gate groove in the active area selectively with... Agent: Edell, Shapiro & Finnan, LLC

20080012069 - Vertical gate semiconductor device and method for manufacturing the same: A gate electrode is buried in a trench passing through a second conductivity type first body region formed on a first conductivity type drain region so as to form a recessed portion at the upper part of the trench. An insulating film is formed on the gate electrode so as... Agent: Mcdermott Will & Emery LLP

20080012070 - Apparatus for a self-aligned recessed access device (rad) transistor gate: A method used in fabrication of a recessed access device transistor gate has increased tolerance for mask misalignment. One embodiment of the invention comprises forming a vertical spacing layer over a semiconductor wafer, then etching the vertical spacing layer and the semiconductor wafer to form a recess in the wafer.... Agent: Michael E. Romani Mail Stop 525

20080012068 - Process for forming a short channel trench mosfet and device formed thereby: A process for forming a short channel trench MOSFET. The process includes forming a first implant at the bottom of a trench that is formed in the body of the trench MOSFET and forming a second or angled implant that is tilted in its orientation and directed perpendicular to the... Agent: Wagner, Murabito & Hao LLP

20080012071 - Field effect transistor with trench filled with insulating material and strips of semi-insulating material along trench sidewalls: A MOSFET comprises a first semiconductor region having a first surface, a first insulation-filled trench region extending from the first surface into the first semiconductor region, and strips of semi-insulating material along the sidewalls of the first insulation-filled trench region. The strips of semi-insulating material are insulated from the first... Agent: Townsend And Townsend And Crew, LLP

20080012075 - Silicon-on-insulator semiconductor device: A semiconductor device formed in a silicon-on-insulator substrate includes a silicon channel region located between silicon source and drain regions, and a low-carrier-concentration layer that underlies the channel region. The low-carrier-concentration layer makes contact with both the channel region and the source region. The channel region and the low-carrier-concentration layer... Agent: Rabin & Berdo, PC

20080012072 - Soi device with charging protection and methods of making same: The present invention is directed to an SOI device with charging protection and methods of making the same. In one illustrative embodiment, a device is formed on an SOI substrate including a bulk substrate, a buried insulation layer and an active layer. The device includes a transistor formed in an... Agent: Williams, Morgan & Amerson

20080012073 - Test structure for determining characteristics of semiconductor alloys in soi transistors by x-ray diffraction: By providing test features of increased thickness in a test structure for performing an x-ray diffraction measurement for evaluating the crystalline characteristics, such as the contents of germanium, an increased accuracy may be achieved, since the patterned SOI layer may be used as an efficient reference for the required data... Agent: J, Mike Amerson Williams, Morgan & Amerson, P.C.

20080012076 - Display device, method for manufacturing thereof, and television device: The invention provides a display device and a method for manufacturing thereof by increasing a material efficiently as well as simplifying steps. Also, the invention provides a technique for forming a pattern such as a wiring, that is used for forming a display device, to have a predetermined shape with... Agent: Nixon Peabody, LLP

20080012074 - Low temperature sol-gel silicates as dielectrics or planarization layers for thin film transistors: Traditionally, sol-gel silicates have been reported as being high temperature processable at 400 C to give reasonably dense films that showed good leakage current densities (<5×10−8 A/cm2). Recently we have discovered that we are able to prepare films from particular combinations of sol-gel silicate precursors that cure at 135° C.... Agent: Air Products And Chemicals, Inc. Patent Department

20080012077 - Semiconductor device: A field oxide film for electrically isolating an NMOS and a PMOS is formed by forming a silicon oxide film in an active layer of an SOI substrate by LOCOS. A bird's beak, where the oxide film becomes thin, is formed at an end of the field oxide film, and... Agent: Bruce L. Adams, Esq.

20080012078 - Semiconductor device formed in semiconductor layer arranged on substrate with one of insulating film and cavity interposed between the substrate and the semiconductor layer: A semiconductor device including a first semiconductor layer formed on a semiconductor substrate, a second semiconductor layer surrounding the first semiconductor layer, the second semiconductor layer being formed on the semiconductor substrate with one of an insulating film and a cavity, and a third semiconductor layer surrounding the second semiconductor... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080012079 - Memory cell having active region sized for low reset current and method of fabricating such memory cells: A method of fabricating memory cells on a wafer includes forming cavities in a dielectric layer, where each of the cavities includes at least one corner. The method additionally includes depositing a memory cell material into the corner(s) of the cavities, and removing a portion of the memory cell material... Agent: Dicke, Billig & Czaja

20080012080 - Non-volatile semiconductor memory device and method of manufacturing the same: A non-volatile semiconductor memory device is disclosed, which comprises a memory cell unit including at least one memory cell transistor formed on a semiconductor substrate and having a laminated structure of a charge accumulation layer and a control gate layer, and a selection gate transistor one of the source/drain diffusion... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080012081 - Semiconductor device and method of manufacturing the same: The semiconductor device comprises a plurality of MOS transistors 12 each including a gate electrode 20 formed over a semiconductor substrate 10 with a gate insulating film 18 formed therebetween, and a source diffused layer 28 and a drain diffused layer 34 of a second conductions type arranged with a... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20080012082 - Large area flat image sensor assembly: A low temperature method for producing a substantially flat large area image sensor assembly, the method includes the steps of providing a die attach substrate having a substantially planar surface; providing a lead frame having a bonding surface and a plurality of leads extending there from; adhering an imager die... Agent: F-p, Patent Legal Staff Eastman Kodak Company

20080012084 - Image sensor package and method of fabricating the same: An image sensor package may include a transparent substrate, an image sensor chip having a sensing region disposed over the transparent substrate, a resin protection dam disposed between the image sensor chip and the transparent substrate inside a wiring pattern, the resin protection dam having an aperture formed to expose... Agent: Harness, Dickey & Pierce, P.L.C

20080012083 - Method and apparatus providing analytical device and operating method based on solid state image sensor: An analytical system-on-a-chip can be used as an analytical imaging device, for example, for detecting the presence of a chemical compound. A layer of analytical material is formed on a transparent layer overlying a solid state image sensor. The analytical material can react in known ways with at least one... Agent: Dickstein Shapiro LLP

20080012085 - Packaging structure of an optical motion sensor: A packaging structure of an optical motion sensor includes a packaging substrate, an optical detection module, and a packaging mask. The optical detection module is provided on the packaging substrate and is electrically connected with the packaging substrate. The packaging mask is disposed on the packaging substrate to package the... Agent: Rosenberg, Klein & Lee

20080012086 - Semiconductor device with a photoelectric converting portion and a light-shading means: The semiconductor device according to this invention is characterized by a package structure of a semiconductor substrate 100 equipped with a photoelectric converting portion, wherein a light-shading means 104 is arranged in an area corresponding to at least the photoelectric converting portion on the side of the rear surface of... Agent: Birch Stewart Kolasch & Birch

20080012087 - Bonded wafer avalanche photodiode and method for manufacturing same: An avalanche photodiode includes a high quality electrooptically active substrate, a handle substrate bonded to the active substrate, and an avalanche photodiode active area formed in the high quality electrooptically active substrate including a high field region for generating avalanche current gain. By using a handle wafer bonded to the... Agent: Iandiorio & Teska

20080012088 - Solid-state imaging device and method of manufacturing the same: An n/p−/p+ substrate where a p−-type epitaxial layer and an n-type epitaxial layer have been deposited on a p+-type substrate is provided. In the surface region of the n-type epitaxial layer, the n-type region of a photoelectric conversion part has been formed. Furthermore, a barrier layer composed of a p-type... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080012089 - Method of forming a schottky diode and structure therefor: In one embodiment, a Schottky diode is formed on a doped region having a thickness less than about eighteen microns.... Agent: Bradley J. Botsch Semiconductor Components Industries, LLC

20080012090 - Semiconductor component and methods for producing a semiconductor component: A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a functional unit semiconductor layer of a third conduction type arranged on the buried semiconductor layer, in which... Agent: Dicke, Billig & Czaja

20080012091 - Vertical lc tank device: An LC tack structure. The structure, including a set of wiring levels on top of a semiconductor substrate, the wiring levels stacked on top of each other from a lowest wiring level nearest the substrate to a highest wiring level furthest from the substrate; an inductor in the highest wiring... Agent: Schmeiser, Olsen & Watts

20080012092 - Structure of capacitor set and method for reducing capacitance variation between capacitors: A structure of a capacitor set is described, including at least two capacitors that are disposed at the same position on a substrate and include a first capacitor and a second capacitor. The first capacitor includes multiple first capacitor units electrically connected with each other in parallel. The second capacitor... Agent: Jianq Chyun Intellectual Property Office

20080012093 - Capacitor constructions: The invention includes methods of forming rugged electrically conductive surfaces. In one method, a layer is formed across a substrate and subsequently at least partially dissociated to form gaps extending to the substrate. An electrically conductive surface is formed to extend across the at least partially dissociated layer and within... Agent: Wells St. John P.s.

20080012094 - Bit-erasing architecture for seek-scan probe (ssp) memory storage: An apparatus comprising a substrate, a heater formed on the substrate, and a phase-change layer formed on the heater. The heater comprises a heater layer and first and second electrodes electrically coupled to the heater layer. A process comprising forming a heater on a substrate and forming a phase-change layer... Agent: Blakely Sokoloff Taylor & Zafman

20080012095 - Integrated circuit package system including wafer level spacer: An integrated circuit package system that includes providing a wafer level spacer including apertures, which define unit spacers that are interconnected, and configuring the unit spacers to substantially align over devices formed within a substrate.... Agent: Law Offices Of Mikio Ishimaru

20080012096 - Semiconductor chip and method of forming the same: A semiconductor chip and method of forming the same are described. The semiconductor chip includes a first surface, a second surface opposite to the first surface, and a rim side connecting the first surface and the second surface. At least one groove is defined within rim side. The groove is... Agent: Marger Johnson & Mccollom, P.C.

20080012097 - Semiconductor device and wireless device using the semiconductor device: A semiconductor device has a semiconductor substrate; a shielding element formed by a conductor on a top side of the semiconductor substrate; an active element formed by a conductor and a semiconductor on the top side of the semiconductor substrate; a dielectric layer formed between the shielding element and the... Agent: Ratnerprestia

20080012099 - Electronic assembly and manufacturing method having a reduced need for wire bonds: An electronics assembly having a reduced need for wire bonds is provided. The electronics assembly includes a substrate having upper and lower surfaces. An electronic circuit device having conducting pads is attached to the upper surface of the substrate such that the conducting pads face the upper surface of the... Agent: Delphi Technologies, Inc.

20080012098 - Integrated circuit package system employing an exposed thermally conductive coating: An integrated circuit package system includes providing a leadframe that is coplanar with a bottom surface of the integrated circuit package system to which is attached a device with a thermally conductive coating that is coplanar with the bottom surface of the integrated circuit package system to the leadframe, the... Agent: Law Offices Of Mikio Ishimaru

20080012100 - Integrated circuit package system with flashless leads: An integrated circuit package system is provided including forming a lead frame including forming an inner lead having a planar surface, the inner lead extending inwardly from the lead frame and forming a stiffening structure integral with the lead frame for maintaining the planar surface; encapsulating the inner lead with... Agent: Law Offices Of Mikio Ishimaru

20080012101 - Semiconductor package having improved adhesion and solderability: A leadframe with a base metal structure (for example, copper) and first and second surfaces. A first metal layer, which is adhesive to polymeric materials such as molding compounds, is adherent to the first leadframe surface. The second leadframe surface is covered by a second metal layer for affinity to... Agent: Texas Instruments Incorporated

20080012102 - Semiconductor-integrated electronic device having a plurality of leads: A semiconductor-integrated electronic device comprises a body and a plurality of leads, adjacent and in spaced relationship to each other, projecting from at least one edge of the body. The device further comprises a spacer device which comprises a plurality of insulating teeth interposed between the plurality of leads, so... Agent: Seed Intellectual Property Law Group PLLC

20080012103 - Emi absorbing gap filling material: A thermally conductive gap filling material for the absorption of electromagnetic (EM) radiation emitted from an electronic device is provided. The gap filling material facilitates conduction of excessive heat generated by the electronic device to a heat dissipater. The heat dissipater further dissipates the excessive heat to the surrounding environment.... Agent: Rissman Jobse Hendricks & Oliverio, LLP

20080012104 - Inverted planar avalanche photodiode: An avalanche photodetector is disclosed. An apparatus according to aspects of the present invention includes a semiconductor substrate layer including a first type of semiconductor material. The apparatus also includes a multiplication layer including the first type of semiconductor material disposed proximate to the semiconductor substrate layer. The apparatus also... Agent: Blakely Sokoloff Taylor & Zafman

20080012105 - Chip adapter: A chip adapter includes an adapter body, which has an accommodation top open chamber that accommodates a chip, a plurality of conducting elements respectively mounted in a bottom side in the accommodation top open chamber and bonded to a motherboard for the contact of respective contacts of the accommodated chip,... Agent: Bacon & Thomas, PLLC

20080012106 - Chip package structure and fabricating method threrof: A chip package structure including a chip, a lead frame, first bonding wires and second bonding wires is provided. The chip has an active surface and chip bonding pads disposed thereon. The lead frame is fixed on the chip and the lead frame includes inner leads, at least one bus... Agent: J C Patents, Inc.

20080012107 - Semiconductor device: Disclosed is a semiconductor memory device in which pads on a chip which are wire-bonded to lands for solder-balls of a package, respectively, are arranged on first and second sides of the chip facing to each other and are disposed on a third side of the chip as well. Four... Agent: Mcginn Intellectual Property Law Group, PLLC

20080012108 - Semiconductor device, electronic card and pad rearrangement substrate: A semiconductor device comprises a substrate, an external terminal provided on the substrate, an internal wiring pattern electrically connected to the external terminal, a semiconductor chip mounted on the substrate and electrically connected to the internal wiring pattern, and an antenna pattern. The antenna pattern provided at each of adjacent... Agent: Hogan & Hartson L.L.P.

20080012109 - Method for the packaging of optical or optoelectronic components, and optical or optoelectronic package element producible according to the method: The invention relates to a method for producing package parts for optical or optoelectronic components. To this end a metal package element is bonded to a transparent package element by means of a glass solder ring, the glass solder being brought in contact with the metal package element and the... Agent: Demont & Breyer, LLC

20080012113 - Carrier module and test tray for an upright-positionable packaged chip, and testing method: A carrier module for a test tray includes a main body having an insertion slot that passes through the main body. An upright-positionable packaged chip can be inserted into the insertion slot, and a holding unit, provided on the main body holds and releases the upright-positionable packaged chip. The upright... Agent: Ked & Associates, LLP

20080012110 - Microelectronic packages with leadframes, including leadframes configured for stacked die packages, and associated systems and methods: Microelectronic packages with leadframes, including leadframes configured for stacked die packages, and associated systems and methods are disclosed. A system in accordance with one embodiment includes a support member having first package bond sites electrically coupled to leadframe bond sites. A microelectronic die can be carried by the support member... Agent: Perkins Coie LLP Patent-sea

20080012111 - Semiconductor package and fabrication method thereof: The present invention provides a semiconductor package and a fabrication method thereof. The method includes the steps of: providing a chip carrier module having a plurality of chip carriers, disposing a plurality of electrical connecting points on the chip carriers, performing chip mounting and molding on the chip carrier module... Agent: Edwards Angell Palmer & Dodge LLP

20080012112 - Semiconductor package having advantage for stacking and stack-type semiconductor package: Provided are a semiconductor package having an advantage for stacking and a stack-type semiconductor package using the semiconductor package. In one embodiment, the semiconductor package includes a wing-type substrate comprising a first surface, a second surface opposite the first surface, a chip pad area, an external terminal area on the... Agent: Marger Johnson & Mccollom, P.C.

20080012115 - Methods and apparatus for packaging integrated circuit devices: An integrally packaged integrated circuit device including an integrated circuit die including a crystalline substrate having first and second generally planar surfaces and edge surfaces and an active surface formed on the first generally planar surface, at least one chip scale packaging layer formed over the active surface and at... Agent: Tessera Lerner David Et Al.

20080012114 - System for contacting electronic devices and production processes thereof: An embodiment of a system for contacting at least one electronic device having a plurality of contact elements is proposed. The system includes a substrate having a main surface and a plurality of contact terminals projecting from the main surface, wherein each contact terminal includes a core of polymeric material... Agent: Graybeal, Jackson, Haley LLP

20080012116 - Semiconductor device and method of forming the same: A semiconductor device and a method of forming the same are provided. A semiconductor chip included in the semiconductor device includes a pillar-shaped terminal and a pad-shaped terminal in a terminal region. The pillar-shaped terminal is exposed at a first surface of a chip substrate in the terminal region and... Agent: Marger Johnson & Mccollom, P.C.

20080012117 - Semiconductor package and method of fabricating the same and semiconductor module and method of fabricating the same: Provided are a semiconductor package having connection terminals whose side surfaces are exposed and a semiconductor module including such a semiconductor package. Also provided are methods of fabricating the semiconductor package and semiconductor module. According to an embodiment of the present invention, a semiconductor package includes a semiconductor chip including... Agent: Marger Johnson & Mccollom, P.C.

20080012118 - Method of manufacturing semiconductor device: A semiconductor device which includes: a semiconductor chip with plural pads; a tab connected with the semiconductor chip; bus bars which are located outside of the semiconductor chip and connected with the tab; a sealing body which resin-seals the semiconductor chip; plural leads arranged in a line around the semiconductor... Agent: Miles & Stockbridge PC

20080012119 - Semiconductor component and method for producing the same: A semiconductor component of semiconductor chip size includes a semiconductor chip. The semiconductor chip has a metallic coating that completely covers the edge sides and the rear side and partly covers the top side, on which surface-mountable external contacts are arranged. One aspect includes power semiconductor components, wherein the metallic... Agent: Dicke, Billig & Czaja

20080012120 - Multilayer wiring substrate and manufacturing method thereof: A multilayer wiring substrate has a plurality of wiring layers and interlayer insulating films, as well as a via of a type which connects between adjacent wiring layers and a via of a type which connects upper and lower wiring layers through two or more interlayer insulating films, wherein at... Agent: Drinker Biddle & Reath (dc)

20080012121 - Semiconductor device, electro-optical device, and method for manufacturing semiconductor device: A method for manufacturing a semiconductor apparatus including a plurality of device chips aligned approximately in an L-shape at the perimeter of the two adjacent sides of a flexible substrate and a circuit coupled with the device chip, the method including: aligning, on a temporal substrate, the plurality of device... Agent: Oliff & Berridge, PLC

20080012123 - Cooling module against esd and electronic package, assembly and system using the same: An electronic assembly includes a substrate, a chip, a conductive fence and a heat sink. The substrate has a bonding surface. The chip is bonded to the bonding surface. The conductive fence connects the bonding surface and at least locally surrounds the sides of the chip. The heat sink is... Agent: Jianq Chyun Intellectual Property Office

20080012122 - Integrated circuit heat spreader stacking system: An integrated circuit heat spreader stacking system is provided including mounting an integrated circuit on a substrate, forming a heat spreader, forming a stacking stand-off for the heat spreader, and mounting a heat spreader over the integrated circuit.... Agent: Law Offices Of Mikio Ishimaru

20080012124 - Curable protectant for electronic assemblies: Latent thermal initiators and protectant compositions that remain shelf stable at elevated temperatures, yet readily cure during a solder bump reflow process or other high temperature processing. The thermal initiators comprise thermally labile cation-anion pairs where the blocked cation prevents cure at low temperatures, and the unblocked cation initiates cure... Agent: Lord Corporation Patent & Legal Services

20080012125 - Light emitting diode package: Provided is a light emitting diode package. The light emitting diode package includes a base, a light emitting diode mounted in the base, and a driving chip mounted in the base to drive the light emitting diode.... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20080012126 - Paper including semiconductor device and manufacturing method thereof: Paper embedded with a semiconductor device capable of communicating wirelessly is realized, whose unevenness of a portion including the semiconductor device does not stand out and the paper is thin with a thickness of less than or equal to 130 μm. A semiconductor device is provided with a circuit portion... Agent: Eric Robinson

20080012127 - Insulation structure for multilayer passive elements and fabrication method thereof: The present invention discloses an insulation structure for multilayer passive elements and a fabrication method thereof, wherein a protective insulation film is formed on the surface of a multilayer passive element; a transformation process is performed at a transformation temperature to convert the protective insulation films within the areas exactly... Agent: Birch Stewart Kolasch & Birch

20080012128 - Semiconductor device and manufacturing method of the same: When a nickel (Ni) layer is formed on an electrode pad made of aluminum-silicon (Al—Si) by an electroless plating method, prior to the precipitation of zinc (Zn) which becomes a catalyst, copper (Cu) is formed in the form of discontinuous spots or islands on the surface of the electrode pad,... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20080012129 - Semiconductor device and method of producing the same: A semiconductor device includes a semiconductor chip having a first main surface having an electrode pad in an exposed state, and an interlayer insulation layer formed on the first main surface so that the electrode pad is partially exposed; a re-distribution wiring layer including a wiring pattern having a linear... Agent: Takeuchi & Kubotera, LLP

20080012130 - Semiconductor device, circuit substrate, electro-optic device and electronic appliance: A semiconductor device in the first embodiment includes: an electrode pad and a resin projection, formed on an active surface; a conductive film deposited from a surface of the electrode pad to a surface of the resin projection; a resin bump formed with the resin projection and with the conductive... Agent: Harness, Dickey & Pierce, P.L.C

20080012131 - Semiconductor device, mounting construction of a semiconductor device, and method of manufacturing the semiconductor device with the mounting construction: A semiconductor pellet is mounted on a circuit board. The pellet has a first terminal pad and a first solder layer formed on the first terminal pad. The circuit board has a second terminal pad and a second solder layer formed on the second terminal pad. A metal ball is... Agent: Rabin & Berdo, PC

20080012132 - Chip structure with redistribution traces: A semiconductor chip or wafer comprises a passivation layer and a circuit line. The passivation layer comprises an inorganic layer. The circuit line is over and in touch with the inorganic layer of the passivation layer, wherein the circuit line comprises a first contact point connected to only one second... Agent: John Chen

20080012134 - Metal interconnection structures and methods of forming the same: A method of forming a metal interconnection structure is provided. The method includes forming an insulating layer on a semiconductor substrate including a first metal interconnection. The insulating layer is patterned to form an opening that exposes the first metal interconnection. A first diffusion barrier layer is formed on the... Agent: Marger Johnson & Mccollom, P.C.

20080012133 - Reducing resistivity in interconnect structures by forming an inter-layer: An integrated circuit structure having improved resistivity and a method for forming the same are provided. The integrated circuit structure includes a dielectric layer, an opening in the dielectric layer, and a damascene structure in the opening. The damascene structure includes a metallic barrier layer in the opening and in... Agent: Slater & Matsil, L.L.P.

20080012135 - Semiconductor device and method for manufacturing the same: A semiconductor device and method for manufacturing the same is provided, capable of gap-filling a copper metal wiring while minimizing void generation. A semiconductor device according to an embodiment includes a copper sulfide layer formed on a first barrier metal formed in a via and trench; and a via plug... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20080012136 - Metal interconnection structure of semiconductor device and method for manufacturing the same: Disclosed are a metal interconnection structure of a semiconductor device and a method for manufacturing the same. The structure includes an upper interlayer dielectric layer pattern including fluorine (F), an upper metal interconnection in the upper interlayer dielectric layer pattern and connecting with a lower metal interconnection formed in a... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20080012137 - Semiconductor device having trench structures and method: In one embodiment, a pair of sidewall passivated trench contacts is formed in a substrate to provide electrical contact to a sub-surface feature. A doped region is diffused between the pair of sidewall passivated trenches to provide low resistance contacts.... Agent: Mr. Jerry Chruma Semiconductor Components Industries, L.L.C.

20080012138 - One-time-programmable anti-fuse formed using damascene process: A semiconductor structure includes a semiconductor substrate, a power source, and a stacked structure over the semiconductor substrate and coupled to the power source. The stacked structure includes a bottom electrode, a top electrode, and an insulation layer between the top electrode and the bottom electrode, wherein the insulation layer... Agent: Slater & Matsil, L.L.P.

20080012140 - Wiring substrate, semiconductor device, and method of manufacturing the same: A wiring substrate includes a base insulating film, a first interconnection formed on a top surface side of the base insulating film, a via conductor provided in a via hole formed in the base insulating film, and a second interconnection provided on a bottom surface side of the base insulating... Agent: Young & Thompson

20080012141 - Semiconductor device: A semiconductor device includes: a semiconductor layer having a shading target region; a semiconductor element provided on the semiconductor layer in the shading target region; a first interlayer dielectric provided on the semiconductor element; a plurality of first shading layers provided on the first interlayer dielectric; a second interlayer dielectric... Agent: Harness, Dickey & Pierce, P.L.C

20080012139 - Thin film transistor array panel and manufacturing method thereof: A thin film transistor array panel is provided, which includes: a gate line, a gate insulating layer, and a semiconductor layer sequentially formed on a substrate; a data line and a drain electrode formed at least on the semiconductor layer; a first passivation layer formed on the data line and... Agent: Frank Chau, Esq. F. Chau & Associates, LLP

20080012142 - Structure and method of chemically formed anchored metallic vias: Methods are provided that enable the ability to use a less aggressive liner processes, while producing structures known to give a desired high stress migration and electro-migration reliability. The present invention circumvents the issue of sputter damage of low k (on the order of 3.2 or less) dielectric by creating... Agent: Scully Scott Murphy & Presser, PC

20080012143 - Semiconductor device and method of fabricating the same: A method of fabricating a semiconductor device can include forming a first metal layer on a semiconductor substrate, and forming a second metal layer on the first metal layer. The second metal layer is ion-implanted with material having an anti-reflective function. The anti-reflective function is endowed to the metal layer... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20080012145 - Semiconductor device and method for manufacturing the same: A semiconductor device can include a first interlayer dielectric layer disposed on a substrate, and an air gap defined in a portion of the first interlayer dielectric layer. The air gap can be formed within trenches etched into the first interlayer dielectric layer. An etch stop layer is disposed on... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20080012144 - Method for producing chip packages, and chip package produced in this way: A method for producing chip packages is disclosed. In one embodiment, a plurality of chips is provided. The chips each have first pads. Second connection pads are applied on the wafer, wherein each second pad is electrically connected to a first pad.... Agent: Dicke, Billig & Czaja

20080012146 - Semiconductor device and method of fabricating the same: A semiconductor device includes an insulating film formed above an upper surface of a semiconductor substrate and including a contact hole, the contact hole including an upper portion and a lower portion located on the upper portion via a boundary as a first lower end of the upper portion and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080012147 - Semiconductor device for preventing defective filling of interconnection and cracking of insulating film: The semiconductor device has insulating films 40, 42 formed over a substrate 10; an interconnection 58 buried in at least a surface side of the insulating films 40, 42; insulating films 60, 62 formed on the insulating film 42 and including a hole-shaped via-hole 60 and a groove-shaped via-hole 66a... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20080012148 - Semiconductor chip package and method manufacturing method thereof: An acceleration sensor chip package comprises a frame section, a first semiconductor chip corresponding to an MEMS chip having a plurality of first bumps, a second semiconductor chip having a plurality of second bumps, a substrate on which the first and second semiconductor chips are mounted in parallel with each... Agent: Rabin & Berdo, PC

20080012150 - Chip structure: A chip structure including a substrate, at least one chip bonding pad, a passivation layer, at least one compliant bump, and at least one redistribution conductive trace is provided. The substrate has an active surface whereon the chip bonding pad is disposed. The passivation layer is disposed on the active... Agent: J C Patents, Inc.

20080012149 - Semiconductor chip structure: A semiconductor chip structure includes a top metal layer and an inter-layer dielectric under the top metal layer. The top metal layer includes a bonding pad area and a non-bonding pad area. The inter-layer dielectric includes at least one first via disposed under the bonding pad area, and a plurality... Agent: Birch Stewart Kolasch & Birch

20080012152 - Component and method for producing a component: A component and a method for producing a component are disclosed. The component comprises an integrated circuit, a housing body, a wiring device overlapping the integrated circuit and the housing body, and one or more external contact devices in communication with the wiring device.... Agent: Brinks Hofer Gilson & Lione Infineon

20080012151 - Method and an apparatus for manufacturing an electronic thin-film component and an electronic thin-film component: A method for manufacturing an electronic thin-film component, an apparatus implementing the method, and an electronic thin-film component manufactured according to the method. A lowermost, galvanically uniform conductive layer of electrically conductive material is first formed on a substantially dielectric substrate, from which lowermost conductive layer conductive areas are galvanically... Agent: Venable LLP

20080012153 - Direct drive technology chip package: A chip package that can be directly used by users, on one end of the chip package is provided a plurality of metal terminals that can be connected to electronic equipment directly, such as computer. A vertical hole in communication with a chip substrate or a protection circuit board inside... Agent: Bacon & Thomas, PLLC

20080012154 - Molded circuit board and method for the same: A method for forming a molded circuit board is provided. The method includes the steps of forming a circuit having a first section and a second section on a conductive substrate, the first section and the second section being coplanar; then deforming the conductive substrate by mold-pressing, so that the... Agent: Snell & Wilmer L.L.P. (main)

20080012155 - Aligned nanotube bearing composite material: A composite material including an arrangement of approximately aligned nanofilaments overlying at least another arrangement of approximately aligned nanofilaments, the longitudinal axis of the nanotubes of the first arrangement being approximately perpendicular to the longitudinal axis of the nanotubes of the other arrangement, and the arrangements forming at least one... Agent: Intel Corporation C/o Intellevate, LLC

20080012156 - Encapsulant composition and electronic package utilizing same: An encapsulant composition and an electronic package. The composition includes a resin, a flexibilizing agent, and a filler material. The electronic package includes a substrate, a semiconductor chip, and a material. The semiconductor chip is mounted on an upper surface of the substrate and electrically coupled to the substrate. The... Agent: Schmeiser, Olsen & Watts

20080012157 - System and method for delivering chemicals: Systems and method for delivering materials to a tool are disclosed. A material delivery system utilizes two or more sources of the material to be delivered to the tool. One or more of the sources of the tool may be a batch mixer. The material delivery system also includes at... Agent: Lowrie, Lando & Anastasi

20080006811 - Integrated circuit havng a memory cell: A memory cell includes a first electrode and an opposing second electrode, and a memory stack between the first and second electrodes. The memory stack includes a first layer of thermal isolation material contacting the first electrode, a second layer of thermal isolation material contacting the second electrode, and a... Agent: Dicke, Billig & Czaja

20080006810 - Memory structure and method of manufacture: A solid state electrolyte memory structure includes a solid state electrolyte layer, a metal layer on the solid state electrolyte layer, and an etch stop layer on the metal layer.... Agent: Slater & Matsil LLP

20080006815 - High efficient phosphor-converted light emitting diode: A light-emitting device and manufacturing method thereof are disclosed. The light-emitting device includes a substrate, a semiconductor light-emitting structure, a filter layer, and a fluorescent conversion layer. The method comprises forming a semiconductor light-emitting structure over a substrate, forming a filter layer over the semiconductor light-emitting structure, and forming a... Agent: Bacon & Thomas, PLLC

20080006818 - Structure and method to form multilayer embedded stressors: A multilayer embedded stressor having a graded dopant profile for use in a semiconductor structure for inducing strain on a device channel region is provided. The inventive multilayer stressor is formed within areas of a semiconductor structure in which source/drain regions are typically located. The inventive multilayer stressor includes a... Agent: Scully Scott Murphy & Presser, PC

20080006822 - Light-emitting element, light-emitting device and an electronic device: The present invention provides a light-emitting element including an electron-transporting layer and a hole-transporting layer between a first electrode and a second electrode; and a first layer and a second layer between the electron-transporting layer and the hole-transporting layer, wherein the first layer includes a first organic compound and an... Agent: Cook, Alex, Mcfarron, Manzo, Cummings & Mehler, Ltd.

20080006821 - Light-emitting element, light-emitting device, and electronic device: A light-emitting element is provided, including a first electrode and a second electrode, a first layer including first and second organic compounds, the first layer being formed between the first electrode and the second electrode wherein the first organic compound is capable of emitting a first light and the second... Agent: Cook, Alex, Mcfarron, Manzo, Cummings & Mehler, Ltd.

20080006819 - Moisture barrier coatings for organic light emitting diode devices: A barrier assembly having a flexible or rigid substrate, an organic electronic device, and one or more layers of diamond-like film. The diamond-like film layers can be used to mount, cover, encapsulate or form composite assemblies for protection of moisture or oxygen sensitive articles such as organic light emitting diode... Agent: 3m Innovative Properties Company

20080006824 - Electrode connecting member and surface light source backlight unit having the same: The present invention relates to an electrode connecting member and a surface light source backlight unit having the same. The electrode connecting member includes a first coupling unit coupled to an end of a surface light source and a second coupling unit assembled to the first coupling unit. The first... Agent: Cantor Colburn, LLP

20080006827 - Making thin film transistors on display panels: A thin film transistor for a display device includes a substrate, a gate electrode formed on the substrate, a gate insulating layer formed on the gate electrode, a polycrystalline semiconductor formed on the gate insulating layer and overlapping the gate electrode, a source electrode partially overlapping the polycrystalline semiconductor, and... Agent: Macpherson Kwok Chen & Heid LLP

20080006829 - Semiconductor layered structure: A semiconductor structure includes: a base layer formed with an array of recesses; a first epitaxial layer stacked on the base layer and extending into the recesses in the base layer; a patterned mask layer stacked on the first epitaxial layer; and a second epitaxial layer having a first portion... Agent: Davidson Berquist Jackson & Gowdey LLP

20080006832 - Led device with re-emitting semiconductor construction and converging optical element: A light source is provided comprising an LED component having an emitting surface, which may comprise: i) an LED capable of emitting light at a first wavelength; and ii) a re-emitting semiconductor construction which comprises a second potential well not located within a pn junction having an emitting surface; or... Agent: 3m Innovative Properties Company

20080006831 - Light-emitting crystal structures: An apparatus comprising a structure comprising a group III-nitride and a junction between n-type and p-type group III-nitride therein, the structure having a pyramidal shape or a wedge shape.... Agent: Hitt Gaines, PC Alcatel-lucent

20080006833 - Lighting device and liquid crystal display device: A light source includes: a first electrode using a reflective material; an EL layer; and a second electrode using a light-transmitting conductive film, in which light emitted from the EL layer is extracted from the second electrode; a selective reflection structure is provided on a light extraction side of the... Agent: Nixon Peabody, LLP

20080006830 - Planar light source and method for fabricating the same: A planar light source including a first substrate, a second substrate, a sealant, first electrodes, sets of first dielectric patterns, a phosphor layer, and a discharge gas is provided. The second substrate is disposed above the first substrate. The sealant is disposed between the first and second substrates to form... Agent: Jianq Chyun Intellectual Property Office

20080006834 - Panel substrate, display apparatus and manufacturing method thereof: A panel substrate includes a first mother substrate having a plurality of array substrates and a second mother substrate having a plurality of opposing substrates opposing to the array substrates. The panel substrate has a seal material for bonding the array substrates and the opposing substrates and a display material... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080006839 - Light emitting device and method for manufacturing the same: A light emitting device and method for manufacturing the same are provided. Accordingly, the device comprises a fixture disposed on a submoumt; an inner space formed within the fixture for containing at least one light emitting diode; a fluorescent layer disposed into the inner space to cover the light emitting... Agent: Rosenberg, Klein & Lee

20080006838 - Semiconductor light-emitting element and manufacturing method thereof: A semiconductor light-emitting element including a semiconductor substrate having a first surface and second surface faced on the opposite side of the first surface, the semiconductor substrate having a recessed portion formed in the first surface, and the recessed portion having a V-shaped cross-section, a reflecting layer formed on an... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080006837 - Sub-mount for mounting light emitting device and light emitting device package: A sub-amount for mounting a light emitting device and a light emitting device package using the sub-mount are disclosed. The light emitting device package includes a package body having a mount for mounting a light emitting device, and through holes, electrodes formed on the package body, and a reflective layer... Agent: Mckenna Long & Aldridge LLP

20080006841 - Light-emitting device: A light-emitting device includes a ceramic package including a mounting space defined by a rectangular mounting surface and side walls erected from respective sides of the mounting surface, an electrode pad disposed on the mounting surface, a light-emitting element disposed on the electrode pad, and a molded synthetic resin filling... Agent: Hayes Soloway P.C.

20080006842 - Top-emitting n-based light emitting device and method of manufacturing the same: Provided is a top-emitting N-based light emitting device and a method of manufacturing the same. The N-based light emitting device may include an n-type clad layer, an active layer, a p-type clad layer, and a transparent conductive thin film which may be sequentially stacked on a substrate. The transparent conductive... Agent: Harness, Dickey & Pierce, P.L.C

20080006814 - Msm binary switch memory: A metal/semiconductor/metal (MSM) binary switch memory device and fabrication process are provided. The device includes a memory resistor bottom electrode, a memory resistor material over the memory resistor bottom electrode, and a memory resistor top electrode over the memory resistor material. An MSM bottom electrode overlies the memory resistor top... Agent: Sharp Laboratories Of America, Inc. C/o Law Office Of Gerald Maliszewski

20080006812 - Programmable metallization cell structures including an oxide electrolyte, devices including the structure and method of forming same: A microelectronic programmable structure suitable for storing information, a device including the structure and methods of forming and programming the structure are disclosed. The programmable structure generally includes an ion conductor and a plurality of electrodes. Electrical properties of the structure may be altered by applying energy to the structure,... Agent: Snell & Wilmer L.L.P. (main)

20080006813 - Semiconductor memory device and fabrication method thereof: A semiconductor memory device comprises a heater electrode, a phase change portion, a heat insulation portion and an upper electrode. The phase change portion comprises a concave portion and a contact portion. The concave portion is in contact with the heater electrode. The contact portion is formed integrally with the... Agent: Mcginn Intellectual Property Law Group, PLLC

20080006816 - Intersubband detector with avalanche multiplier region: A photodetector for use at wavelengths of 2 μm and longer has an intersubband absorption region to provide absorption at wavelengths beyond 2 μm, integrated with an avalanche multiplier region to provide low-rise gain. In one particular design, the intersubband absorption region is a quantum-confined absorption region (e.g., based on... Agent: Fenwick & West LLP

20080006817 - Light emitting device and semiconductor device: In order to make it possible to grow up a light emitting device easily on a substrate made of a Si material system while production of an anti-phase domain can be prevented and a sufficiently high luminous efficiency can be obtained, the light emitting device is configured as a device... Agent: Kratz, Quintos & Hanson, LLP

20080006820 - Organic light-emitting device with field-effect enhanced mobility: A two-terminal organic light-emitting device structure is presented with low absorption losses and high current densities. Light generation and emission occur at a predetermined distance from any metallic contact, thereby reducing optical absorption losses. High current densities and thus high emitted light intensity are achieved by combining two types of... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP

20080006823 - High frequency diode and method for producing same: A high frequency diode comprising: a P type region, a N type region, and an I layer as a high resistivity layer interposed between the P type region and the N type region, wherein the I layer is made of a silicon wafer that has a carbon concentration of 5×1015... Agent: Kolisch Hartwell, P.C.

20080006825 - Electro-luminescence device including a thin film transistor and method of fabricating an electro-luminescence device: An electro-luminescence device including an electro-luminescence element and a thin film transistor electrically connected to the electro-luminescence element. The thin film transistor includes a gate electrode formed over a substrate, an insulating layer formed over the gate electrode, and a first semiconductor pattern formed over the insulating layer. An etch... Agent: F. Chau & Associates, LLC

20080006826 - Thin-film semiconductor device, lateral bipolar thin-film transistor, hybrid thin-film transistor, mos thin-film transistor, and method of fabricating thin-film transistor: In a lateral bipolar transistor including an emitter, a base and a collector which are formed in a semiconductor thin film formed on an insulating substrate, the semiconductor thin film is a semiconductor thin film which is crystallized in a predetermined direction. In addition, in a MOS-bipolar hybrid transistor formed... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080006828 - Integral-type liquid crystal panel with image sensor function: A display device using a novel semiconductor device, which includes a pixel matrix, an image sensor, and a peripheral circuit for driving those, that is, which has both a camera function and a display function, and is made intelligent, is provided and a method of manufacturing the same is also... Agent: Eric Robinson

20080006835 - Photonic band gap materials with phosphors incorporated: The present invention relates to the use of photonic band gap materials with phosphors incorporated. Photonic band gap materials play an important role for LEDs as light sources in applications where either a high radiance is desirable or LEDs are used in optical systems. The optical properties of current LEDs... Agent: Philips Intellectual Property & Standards

20080006836 - Gan compound semiconductor light emitting element and method of manufacturing the same: The present invention relates to a gallium nitride (GaN) compound semiconductor light emitting element (LED) and a method of manufacturing the same. The present invention provides a vertical GaN LED capable of improving the characteristics of a horizontal LED by means of a metallic protective film layer and a metallic... Agent: Marger Johnson & Mccollom, P.C.

20080006840 - Light emitting devices with improved light extraction efficiency: A device includes a light emitting semiconductor device bonded to an optical element. In some embodiments, the optical element may be elongated or shaped to direct a portion of light emitted by the active region in a direction substantially perpendicular to a central axis of the semiconductor light emitting device... Agent: Patent Law Group LLP

20080006843 - Light emitting diode package structure and fabricating method thereof: A light emitting diode (LED) package structure including a first substrate, one or more LED chips, a second substrate, and a thermoelectric cooling device is provided. The first substrate has a first surface and a corresponding second surface. The LED chip suitable for emitting a light is arranged on the... Agent: Jianq Chyun Intellectual Property Office

20080006844 - Crystalline composition, wafer, device, and associated method: A crystalline composition is provided that includes gallium and nitrogen. The crystalline composition may have an amount of oxygen present in a concentration of less than about 3×1018 per cubic centimeter, and may be free of two-dimensional planar boundary defects in a determined volume of the crystalline composition. The volume... Agent: Momentive Performance Materials Inc.-quartz C/o Dilworth & Barrese, LLP

20080006845 - Enhancement mode field effect device and the method of production thereof: A method is disclosed for producing Group III-N field-effect devices, such as HEMT, MOSHFET, MISHFET or MESFET devices, comprising two active layers, e.g. a GaN/AlGaN layer. The method produces an enhancement mode device of this type, i.e. a normally-off device, by providing a passivation layer on the AlGaN layer, etching... Agent: Knobbe Martens Olson & Bear LLP

20080006846 - Iii-v nitride semiconductor device and method of forming electrode: A III-V nitride semiconductor device includes an n-type layer of a III-V nitride semiconductor and an electrode formed on a surface of the n-type layer. A material of the electrode includes at least titanium, aluminum, and silicon.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080006847 - Semiconductor protective structure for electrostatic discharge: A semiconductor protective structure suitable for electrostatic discharge with a field-effect transistor, whose source forms an emitter, whose body forms a base, and whose drain forms a collector of a bipolar transistor. A plurality of drain regions are formed within a body region of the field-effect transistor, and the drain... Agent: Mcgrath, Geissler, Olds & Richardson, PLLC

20080006849 - Fabricating method of nitride semiconductor substrate and composite material substrate: A fabricating method of nitride semiconductor substrate is provided. First, a first substrate including a first base material, a nitride semiconductor template layer stacked on the first base material, and a first dielectric layer stacked on the nitride semiconductor template layer is provided. Then, the first dielectric layer and the... Agent: Jianq Chyun Intellectual Property Office

20080006848 - Semiconductor structure for use in a static induction transistor having improved gate-to-drain breakdown voltage: A structure for use in a static induction transistor includes a semiconductor body having first and second semiconductor layers on a substrate, with the second layer having a dopant concentration of around an order of magnitude higher than the dopant concentration of the first layer. A plurality of sources are... Agent: Birch Stewart Kolasch & Birch

20080006850 - System and method for forming through wafer vias using reverse pulse plating: A method for forming through wafer vias in a substrate uses a Cr/Au seed layer to plate the bottom of a blind trench formed in the front side of a substrate. Thereafter, a reverse plating process uses a forward current to plate the bottom and sides of the blind hole,... Agent: Jacquelin K. Spong

20080006851 - Non-volatile phase-change memory and manufacturing method thereof: In a non-volatile phase-change memory comprising: an interlayer dielectric film and a plug formed on one main surface side of a silicon substrate; a phase-change film which can take a different electric resistivity depending on a phase change and is provided on surfaces of the interlayer dielectric film and the... Agent: Townsend And Townsend And Crew, LLP

20080006852 - Dense chevron finfet and method of manufacturing same: A method, structure and alignment procedure, for forming a finFET. The method including, defining a first fin of the finFET with a first mask and defining a second fin of the finFET with a second mask. The structure including integral first and second fins of single-crystal semiconductor material and longitudinal... Agent: Schmeiser, Olsen & Watts

20080006853 - Schottky electrode of nitride semiconductor device and process for production thereof: The present invention provides a Schottky electrode for a nitride semiconductor device having a high barrier height, a low leak current performance and a low resistance and being thermally stable, and a process for production thereof. The Schottky electrode for a nitride semiconductor has a layered structure that comprises a... Agent: Sughrue Mion, PLLC

20080006855 - Cmos devices adapted to prevent latchup and methods of manufacturing the same: In a first aspect, a first apparatus is provided. The first apparatus is a semiconductor device on a substrate that includes (1) a first metal-oxide-semiconductor field-effect transistor (MOSFET); (2) a second MOSFET coupled to the first MOSFET, wherein portions of the first and second MOSFETs form first and second bipolar... Agent: Ibm Corporation, Intellectual Property Law

20080006854 - Mosfets comprising source/drain regions with slanted upper surfaces, and method for fabricating the same: The present invention relates to improved metal-oxide-semiconductor field effect transistor (MOSFET) devices comprising source and drain (S/D) regions having slanted upper surfaces with respect to a substrate surface. Such S/D regions may comprise semiconductor structures that are epitaxially grown in surface recesses in a semiconductor substrate. The surface recesses preferable... Agent: Scully Scott Murphy & Presser, PC

20080006856 - Semiconductor device with back surface electrode including a stress relaxation film: A semiconductor device includes a semiconductor substrate which has first and second principal surface regions; an insulated gate structure which is formed in the first principal surface region; a back surface region semiconductor layer which is formed in the second principal surface region and has a thickness of at most... Agent: Rabin & Berdo, PC

20080006857 - Photodiode with self-aligned implants for high quantum efficiency and method of formation: A pinned photodiode with a pinned surface layer formed by a self-aligned angled implant is disclosed. The angle of the implant may be tailored to provide an adequate offset between the pinned surface layer and an electrically active area of a transfer gate of the pixel sensor cell. The pinned... Agent: Dickstein Shapiro LLP

20080006858 - Active devices array substrate and repairing method thereof: An active device array substrate including a substrate, a plurality of active devices, a plurality of the first lead lines, a plurality of the second lead lines and a first floating light-shielding layer is provided. The substrate has a display region and a peripheral circuit region and the active devices... Agent: Jianq Chyun Intellectual Property Office

20080006859 - Method for manufacturing lenses, in particular for an imager comprising a diaphragm: A method for manufacturing a lens of a polymer material, comprises producing in the core of the lens or on the surface of the latter at least one opaque zone having an optical function, by locally degrading the molecular structure of the polymer material using a beam of laser light.... Agent: Seed Intellectual Property Law Group PLLC

20080006860 - Magnetoresistive effect element and magnetic memory device: Write characteristics and read characteristics can be improved at the same time by applying novel materials to ferromagnetic layers. In a magneto resistive effect element having a pair of ferromagnetic layers being opposed to each other through an intermediate layer to cause a current to flow in the direction perpendicular... Agent: Sonnenschein Nath & Rosenthal LLP

20080006861 - Semiconductor device and manufacturing method thereof: A semiconductor device is provided with a semiconductor substrate, a ferroelectric capacitor formed above the semiconductor substrate, and a film formed on the back face of the semiconductor substrate. In a method for manufacturing a semiconductor device, a ferroelectric capacitor is formed above a semiconductor substrate, and then the back... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20080006862 - Compounds semiconductor-on-silicon wafer with a silicon nanowire buffer layer: A compound semiconductor-on-silicon (Si) wafer with a Si nanowire buffer layer is provided, along with a corresponding fabrication method. The method forms a Si substrate. An insulator layer is formed overlying the Si substrate, with Si nanowires having exposed tips. Compound semiconductor is selectively deposited on the Si nanowire tips.... Agent: Sharp Laboratories Of America, Inc. C/o Law Office Of Gerald Maliszewski

20080006863 - Method for manufacturing a capacitor electrode structure: A method for manufacturing a capacitor electrode structure, according to which the following steps are executed: A substrate is provided, which comprises contact pads arranged in lines and rows on a surface of the substrate. The lines are non-parallel to the rows. A first mold is applied on the substrate.... Agent: Eschweiler & Associates LLC

20080006864 - Semiconductor device and a manufacturing method thereof: In a semiconductor device where a memory region and a logic region are embedded, the machining accuracy of the element in the logic region can be maintained well and junction leak can be prevented at an isolation dielectric film part in the memory region. A semiconductor device includes a semiconductor... Agent: Mcginn Intellectual Property Law Group, PLLC

20080006865 - Thin film transistor array substrate structures and fabrication method thereof: A thin film transistor array substrate structure. The array substrate structure includes a thin film transistor array substrate, an organic material layer formed thereon, and a plurality of black matrices and color filter patterns disposed on the organic material layer. The invention also provides a method of fabricating the thin... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20080006866 - Semiconductor devices with shallow trench isolation and methods of fabricating the same: A semiconductor device may include a semiconductor substrate that includes first and second regions; first, second, and third insulating layers; a capacitor dielectric layer that includes first and second dielectric layers; a gate insulating layer formed on the first and second regions; a gate formed on the gate insulating layer... Agent: Harness, Dickey & Pierce, P.L.C

20080006867 - Semiconductor device and method for manufacturing same: A ferroelectric capacitor provided with a ferroelectric film (10a) is formed above a semiconductor substrate, and thereafter a wiring (17) directly connected to electrodes (9a, 11a) of a ferroelectric capacitor is formed. Then, a silicon oxide film (18) covering the wiring (17) is formed. As the silicon oxide film (18),... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20080006868 - Logic compatible storage device: A non-volatile memory cell and a method of manufacturing the same are provided. The non-volatile memory cell includes a floating gate over a semiconductor substrate, a first capacitor comprising a first plate, the floating gate, and a dielectric therebetween, a second capacitor comprising a second plate, the floating gate, and... Agent: Slater & Matsil, L.L.P.

20080006869 - Nonvolatile semiconductor memory: A nonvolatile semiconductor memory according to an example of the present application includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080006870 - Nonvolatile semiconductor memory device having double floating gate structure and method of manufacturing the same: The nonvolatile semiconductor memory device includes a non-planar active region with floating gates disposed on opposite sides of the active region. A control gate overlaps the floating gates and a portion of the active region.... Agent: Harness, Dickey & Pierce, P.L.C

20080006871 - Nonvolatile memory having raised source and drain regions: The technology relates to nonvolatile memory with a modified channel region such as a raised source and drain or a recessed channel region.... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20080006872 - Charge-trap nonvolatile memory devices and methods of fabricating the same: Nonvolatile memory devices including device isolation patterns on a semiconductor substrate are provided. The device isolation patterns define a cell active region and a peripheral active region of the semiconductor substrate. Cell gate electrodes are provided that cross over the cell active regions. Memory cell patterns are provided between the... Agent: Myers Bigel Sibley & Sajovec

20080006873 - Non-volatile memory device having sonos structure and manufacturing method thereof: A non-volatile memory device having a SONOS structure and a manufacturing method thereof, where a conductive layer is formed between a charge trap layer and a blocking insulation layer of the SONOS structure. Therefore, when a voltage is applied to a gate, the conductive layer undergoes voltage distributions. Accordingly, a... Agent: Marshall, Gerstein & Borun LLP

20080006874 - Semiconductor component and method of manufacturing: A semiconductor component includes a semiconductor layer (110) having a trench (326). The trench has first and second sides. A portion (713) of the semiconductor layer has a conductivity type and a charge density. The semiconductor component also includes a control electrode (540, 1240) in the trench. The semiconductor component... Agent: Robert D. Atkins On Semiconductor

20080006875 - Semiconductor device used in step-up dc-dc converter, and step-up dc-dc converter: A power supply device is disclosed that is able to satisfy the power requirements of a device in service and has high efficiency. The power supply device includes a first power supply; a voltage step-up unit that steps up an output voltage of the first power supply; a voltage step-down... Agent: Cooper & Dunham, LLP

20080006876 - Stacking fault reduction in epitaxially grown silicon: Methods and a structure are disclosed for providing stacking fault reduced epitaxially grown silicon for use in hybrid surface orientation structures. In one embodiment, a method includes depositing a silicon nitride liner over a silicon oxide liner in an opening, etching to remove the silicon oxide liner and silicon nitride... Agent: Hoffman, Warnick & D'alessandro LLC

20080006877 - Method of forming a solution processed device: Embodiments of methods, apparatuses, devices, and/or systems for forming a solution processed device are described.... Agent: Hewlett Packard Company

20080006878 - Attaching device and method of fabricating organic light emmiting device using the same: An attaching device and a method of fabricating an organic light emitting device using the same are disclosed. The attaching device includes a process chamber, first and second substrate supporters, a substrate detachable part, and an open-close valve. The first and second substrate supporters are positioned inside the process chamber,... Agent: Mckenna Long & Aldridge LLP Song K. Jung

20080006879 - Semiconductor integrated circuit device: Provided is a semiconductor integrated circuit device, which includes: a low-voltage MOS transistor having a source/drain region formed of a low impurity concentration region and a high impurity concentration region; and a high-voltage MOS transistor similarly having a source/drain region formed of a low impurity concentration region and a high... Agent: Brinks Hofer Gilson & Lione

20080006880 - Method and apparatus for mobility enhancement in a semiconductor device: A method and apparatus is presented that provides mobility enhancement in the channel region of a transistor. In one embodiment, a channel region (18) is formed over a substrate that is bi-axially stressed. Source (30) and drain (32) regions are formed over the substrate. The source and drain regions provide... Agent: Freescale Semiconductor, Inc. Law Department

20080006881 - Semiconductor device with increased channel length and method for fabricating the same: A semiconductor device includes a trench formed in a predetermined portion of a substrate and a first recess region beneath the trench. A field oxide layer is buried into both the trench and the first recess region. An active region is defined by the field oxide layer, having a first... Agent: Blakely Sokoloff Taylor & Zafman

20080006883 - Nanostructured integrated circuits with capacitors: A nanostructured integrated circuit including a nanostructured element and a thin film transistor (TFT) and capacitor formed along the nanostructured element. The nanostructured element includes: an inner semiconductor material; and an outer insulating layer. The TFT includes: the inner semiconductor material of the nanostructured element; a source electrode electrically coupled... Agent: Ratnerprestia

20080006882 - Spiral inductor with high quality factor of integrated circuit: A spiral inductor with high quality factor for an integrated circuit (IC) is disclosed, in which the metal layers arranged under a spiral inductor layer are parallel-connected to each other by the use of interconnects so as to increase the thickness of the metal layer and thus effectively reduce the... Agent: Wpat, PC

20080006884 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a MISFET, the MISFET having a shallow trench insulator (STI) formed in a surface layer of a semiconductor substrate to define a device forming region, a gate electrode formed above the device forming region via a gate insulating film, impurity diffusion layers composing a source and... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080006885 - Semiconductor integrated circuit device and method of manufacturing: A semiconductor integrated circuit device comprises an insulated-gate field-effect transistor, the insulated-gate field-effect transistor comprising a device isolation insulating film that is provided to extend from an inside of a semiconductor substrate and to project from an upper surface of the semiconductor substrate, and defines a device region on the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080006886 - Semiconductor device manufactured using a non-contact implant metrology: A method of manufacturing a semiconductor device including calibrating an ion implant process. The calibration includes forming a dielectric layer over a calibration substrate. A dopant is implanted into the dielectric layer. Charge is deposited on a surface of the dielectric layer, and voltage on the surface is measured. An... Agent: Texas Instruments Incorporated

20080006887 - Semiconductor devices including impurity doped region and methods of forming the same: A semiconductor device including an impurity doped region and a method of forming the same. The method includes implanting cluster-shaped dopant ions into a semiconductor substrate to form an impurity implantation region. An annealing process is performed on the impurity implantation region to form an impurity doped region.... Agent: F. Chau & Associates, LLC

20080006889 - Monolithic mems and integrated circuit device having a barrier and method of fabricating the same: An integrated circuit device includes a semiconductor die, the semiconductor die including a semiconductor substrate, driving/control circuitry disposed along a peripheral region of the semiconductor die, a MEMS device disposed within a central region of the semiconductor die, and a barrier disposed between the driving/control circuitry and the MEMS device.... Agent: Morgan Lewis & Bockius LLP

20080006888 - Nanomachined mechanical components using nanoplates, methods of fabricating the same and methods of manufacturing nanomachines: Disclosed herein is a method of fabricating nano-components using nanoplates, including the steps of: printing a grid on a substrate using photolithography and Electron Beam Lithography; spraying an aqueous solution dispersed with nanoplates onto the grid portion to position the nanoplates on the substrate; depositing a protective film of a... Agent: Demont & Breyer, LLC

20080006890 - Magnetic storage device and method for producing the same: In the magnetic storage device, magnetization characteristics during write cycles are homogenized, and write cycles are carried out efficiently. In the magnetic storage device, the soft magnetic body is formed so as to cover the line either totally or partially, and the anti-ferromagnetic layer is formed on the outer surface... Agent: Mathews, Shepherd, Mckay, & Bruneau, P.A.

20080006891 - Direct energy conversion devices with a substantially continuous depletion region and methods thereof: An energy conversion device includes a plurality of pores formed within a substrate and a junction region disposed within each of the plurality of pores where each of the junction regions has a depletion region. Each of the plurality of pores defines an opening size in the substrate and a... Agent: Nixon Peabody LLP - Patent Group

20080006892 - Photoelectric conversion device and image pickup system with photoelectric conversion device: A photoelectric conversion device comprises a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type serving as a photoelectric conversion element together with a part of the first semiconductor region; a gate electrode transferring electric carriers generated in the photoelectric conversion element... Agent: Fitzpatrick Cella Harper & Scinto

20080006893 - Solid-state image pickup device: A solid-state image pickup device 1 is back surface incident type and includes a semiconductor substrate 10, a semiconductor layer 20 and a light receiving unit 30. The solid-state image pickup device 1 photoelectrically converts light incident on the back surface S2 of the semiconductor substrate 10 into signal electrical... Agent: Young & Thompson

20080006894 - Semiconductor light detecting element and manufacturing method thereof: A semiconductor photodetector device (PD1) comprises a multilayer structure (LS1) and a glass substrate (1) optically transparent to incident light. The multilayer structure includes an etching stop layer (2), an n-type high-concentration carrier layer (3), an n-type light-absorbing layer (5), and an n-type cap layer (7) which are laminated. A... Agent: Drinker Biddle & Reath (dc)

20080006895 - Surface illuminated photodiode and optical receiver module: In a mesa type PIN-PD formed using a heavily doped semiconductor material, a high frequency response is degraded as slow carriers occur in a heavily doped layer when light incident into a light receiving section transmits through an absorbing layer and reaches the heavily doped layer on a side near... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080006896 - Solid-state image pickup device: A solid-state image pickup device 1 includes a semiconductor substrate 10, light receiving unit 14 and light shielding film 20. The solid-state image pickup device 1 is back surface incident type and photoelectrically converts light indent on the back surface S2 of the semiconductor substrate 10 from an object into... Agent: Young & Thompson

20080006897 - Semiconductor device: A semiconductor device accurately monitoring temperature of a semiconductor chip even in a noisy environment, while not requiring a highly accurate detection circuit. A PTC element is bonded onto an IGBT chip. Then, a constant current flows from a constant current source through the PTC element, and an output voltage... Agent: Leydig Voit & Mayer, Ltd

20080006898 - Semiconductor switching element and semiconductor circuit apparatus: A semiconductor switching element, wherein on a semiconductor layer formed on a substrate, or on a semiconductor substrate, a source electrode and a drain electrode are disposed at a predetermined interval in a direction along a surface of the substrate; and a second gate electrode is provided between the source... Agent: Birch Stewart Kolasch & Birch

20080006899 - Schottky diode and method of fabricating the same: A schottky diode may include a schottky junction including a well formed in a semiconductor substrate and a first electrode contacting the first well. The well may have a first conductivity type. A first ohmic junction may include a first junction region formed in the well and a second electrode... Agent: Harness, Dickey & Pierce, P.L.C

20080006900 - Semiconductor package and method for producing the same: A semiconductor package includes a rewiring substrate and a semiconductor chip. The semiconductor chip includes: a first face with an active surface including integrated circuit devices and chip contact pads, a second face lying in a plane essentially parallel to the first face and side faces. Each side face of... Agent: Edell, Shapiro & Finnan, LLC

20080006901 - Soi device with reduced junction capacitance: An SOI FET comprising a silicon substrate having silicon layer on top of a buried oxide layer having doped regions and an undoped region is disclosed. The doped region has a dielectric constant different from the dielectric constant of the doped regions. A body also in the silicon layer separates... Agent: Schmeiser, Olsen & Watts

20080006902 - A mosfet fuse programmed by electromigration: A one-time programmable field effect transistor (FET) e-fuse has a silicided gate connected to the drain while the source is grounded. A voltage stimulus applied to the drain forces current to flow through the channel coupling the drain to the source. The magnitude of the current exceeding the threshold current... Agent: International Business Machines Corporation Dept. 18g

20080006903 - Semiconductor device mounted with fuse memory: A fuse element utilizing a reaction between two layers by feeding current is manufactured. A fuse element including a first layer formed of an oxide or a nitride and a second layer that becomes high resistant by nitridation or oxidation, in which the first layer and the second layer are... Agent: Eric Robinson

20080006904 - Semiconductor device and method of manufacturing same: A semiconductor device includes an etching protection layer to protect a metal layer in a bonding pad area when a metal fuse is etched.... Agent: Volentine & Whitt PLLC

20080006905 - Method for production of an integrated circuit bar arrangement, in particular comprising a capacitor assembly, as well as an integrated circuit arrangement: A method for production of an integrated circuit arrangement which contains a capacitor. A dielectric layer is structured with the aid of a two-stage etching process, and with the aid of a hard mask. In the case of an electrically insulating hard mask, the hard mask is removed again. In... Agent: Brinks Hofer Gilson & Lione Infineon

20080006906 - Semiconductor device: An n+-emitter layer arranged under an emitter electrode is formed of convex portions arranged at predetermined intervals and a main body coupled to the convex portions. A convex portion region is in contact with the emitter electrode, and a p+-layer doped more heavily than a p-base layer is arranged at... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080006907 - Non-volatile memory device including a variable resistance material: A non-volatile memory device including a variable resistance material is provided. The non-volatile memory device may include a buffer layer, a variable resistance material layer and/or an upper electrode, for example, sequentially formed on a lower electrode. A schottky barrier may be formed on an interface between the buffer layer... Agent: Harness, Dickey & Pierce, P.L.C

20080006908 - Body-tied, strained-channel multi-gate device and methods of manufacturing same: A fin-FET or other multi-gate transistor is disclosed. The transistor comprises a semiconductor substrate having a first lattice constant, and a semiconductor fin extending from the semiconductor substrate. The fin has a second lattice constant, different from the first lattice constant, and a top surface and two opposed side surfaces.... Agent: Slater & Matsil, L.L.P.

20080006909 - Method of increasing the area of a useful layer of material transferred onto a support: A composite structure that includes front faces of the first and second substrates that are molecularly bonded to each other. The dimensions of the second substrate outline are larger than the first substrate outline, and a peripheral side of the second substrate substantially borders the second front face and is... Agent: Winston & Strawn LLP Patent Department

20080006910 - Semiconductor device and method for manufacturing semiconductor device: An inventive semiconductor device includes a semiconductor chip having a passivation film, and a sealing resin layer provided over the passivation film for sealing a front side of the semiconductor chip. The sealing resin layer extends to a side surface of the passivation film to cover the side surface.... Agent: Rabin & Berdo, PC

20080006911 - Silver layer formed by electrosilvering substrate material: The inventors have conducted vigorous studies, and discovered as a result that it is possible to form a silver layer having a high reflectance of about 90 to 99% in a visible light are a by setting a grain size of an outermost surface of a silver plated layer within... Agent: Greenblum & Bernstein, P.L.C

20080006912 - Electrical connector: An electrical connector (1) comprises a housing (1) fixed on a PCB, a metal cover (40) pivotally mounted to the housing (10), and a lever (50) attached to the housing (10). The housing (10) defines a plurality of passageways receiving a plurality of terminals (20) therein. The cover (40) defines... Agent: Wei Te Chung Foxconn International, Inc.

20080006913 - Integrated semiconductor chip with lateral thermal insulation: An integrated semiconductor with lateral thermal insulation is disclosed. In one embodiment, the chip has, on a common substrate, at least one power semiconductor circuit region and, laterally adjacent to the power semiconductor circuit region, at least one further temperature-sensitive semiconductor circuit region, interspaces being maintained between the circuit regions.... Agent: Dicke, Billig & Czaja

20080006914 - Semiconductor device: It is an aspect of the embodiments discussed herein to provide a semiconductor device including: a substrate; a base on the substrate; an integrated circuit chip on the base; and a ball grid array type package material made of a resin and encapsulating the integrated circuit chip.... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20080006915 - Semiconductor package, method of production of same, printed circuit board, and electronic apparatus: A semiconductor package provided with a heat radiator achieving a further improvement of reliability by reducing an influence of thermal stress. For this purpose, the heat radiator is formed by a heat radiator comprised of a heat radiation plate plus a box shaped part and comprised so that the entire... Agent: Staas & Halsey LLP

20080006916 - Method of manufacturing a semiconductor device: The quality of a non-leaded semiconductor device is to be improved. The semiconductor device comprises a sealing body for sealing a semiconductor chip with resin, a tab disposed in the interior of the sealing body, suspension leads for supporting the tab, plural leads having respective to-be-connected surfaces exposed to outer... Agent: Miles & Stockbridge PC

20080006917 - Chip package structure and fabricating method threrof: A chip package structure including a chip, a lead frame, first bonding wires and second bonding wires is provided. The chip has an active surface, first bonding pads and second bonding pads, wherein the first bonding pads and the second bonding pads are disposed on the active surface. The chip... Agent: J C Patents, Inc.

20080006918 - Surface mounting structure for electronic component: A surface mounting structure for an electronic component is provided. A lead of the electronic component is soldered to a land including a first land portion to which a bottom surface of the lead is soldered, and a second land portion having a greater width than the first land portion... Agent: Roylance, Abrams, Berdo & Goodman, L.L.P.

20080006919 - Flip chip package and method of fabricating the same: A flip chip package may include a semiconductor substrate, the semiconductor substrate having a metal interconnection formed in the semiconductor substrate. A passivation layer formed over the semiconductor substrate exposing at least a portion of a metal interconnection formed in the semiconductor substrate. A conductive pad may be formed over... Agent: Harness, Dickey & Pierce, P.L.C

20080006920 - Multi-chip semiconductor connector assemblies: In one exemplary embodiment, a multi-chip semiconductor connector is utilized for forming a semiconductor package having a plurality of semiconductor die. The multi-chip semiconductor connector is utilized to mechanically attach the plurality of semiconductor die together and to provide electrical connection to the plurality of semiconductor die.... Agent: Mr. Jerry Chruma Semiconductor Components Industries , L.L.C.

20080006923 - Electronic module with switching functions and method for producing the same: An electronic module with switching functions includes integrated circuit chips arranged in a chip stack. The integrated circuit chips of the chip stack in each case includes a large-area contact on the top side and/or the rear side, the areal extent of the large-area contact completely occupies the top side... Agent: Edell, Shapiro & Finnan, LLC

20080006921 - Integrated circuit packaging system with ultra-thin die: An integrated circuit packaging system with ultra-thin die is provided including providing an ultra-thin integrated circuit stack, having a vertical sidewall contact, including providing a semiconductor wafer having an active side, forming a solder bump on the active side of the semiconductor wafer, forming a support layer over the solder... Agent: Ishimaru & Zahrt LLP

20080006922 - Thermal release adhesive-backed carrier tapes: The specification describes methods for releasing adhered components to adhesive-backed carrier tapes. It is based on the recognition that with proper choice of the adhesive, i.e. a thermal release adhesive, selectively applied heat will modify the adhesive, eliminating or substantially reducing the adhesion between the tape and the IC chip.... Agent: Rozsa Law Group Lc

20080006925 - Integrated circuit package-in-package system: An integrated circuit package-in-package system is provided forming a first integrated circuit package having a first interface, stacking a second integrated circuit package having a second interface above the first integrated circuit package, fitting the first interface and the second interface, and attaching a third integrated circuit package on the... Agent: Ishimaru & Zahrt LLP

20080006924 - Package mounted module: A package mounted module wherein a package board on the topside surface of which a semiconductor chip such as an LSI is mounted is further mounted on the topside surface of the motherboard of a large-scale computing machine such as a large-sized computer, and a stiffener is provided on the... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20080006926 - Integrated circuit package system with stiffener: An integrated circuit package system is provided including forming a mounting structure having an external interconnect, a paddle, and a tie bar; mounting an integrated circuit die on the paddle; soldering a stiffener structure; having an opening; on the mounting structure; connecting the stiffener structure to a ground; and molding... Agent: Ishimaru & Zahrt LLP

20080006928 - Composite multi-layer substrate and module using the substrate: A composite multi-layer substrate comprising a flat plate-like core member formed of a material having an excellent electric conductivity, an excellent heat conductivity, and a high rigidity, a front resin layer and a rear resin layer covering at least the front and rear surfaces of the core member, and a... Agent: Blank Rome LLP

20080006927 - Manufacturing process for single-chip mmc/sd flash memory device with molded asymmetric circuit board: An MMC/SD core unit includes a PCBA in which all passive components and unpackaged IC chips are attached to a single side of a PCB opposite to the metal contacts. The IC chips include, for example, a controller chip and a flash memory chip, or a single-chip (combined controller/flash memory)... Agent: Bever Hoffman & Harms, LLP Tri-valley Office

20080006929 - Integrated circuit package system with ground bonds: An integrated circuit package system comprising: forming leads adjacent a die paddle having a die pad extension; forming a region having one of the leads depopulated for the die pad extension; and connecting an integrated circuit die to the die pad extension.... Agent: Ishimaru & Zahrt LLP

20080006930 - Semiconductor package: A semiconductor package, has a multilayer wiring board that has a first wiring layer on which an inner lead, a first signal wire for transmission of a desired signal, a power supply ring, and a ground ring are formed, a second wiring layer that has a first solder ball, a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080006933 - Heat-dissipating package structure and fabrication method thereof: The invention provides a heat-dissipating package structure and a fabrication method thereof. The fabrication method includes the steps of mounting and electrically connecting a semiconductor chip to a chip carrier; mounting on the semiconductor chip a heat-dissipating member having an interface layer; performing a molding process to form an encapsulant... Agent: Edwards Angell Palmer & Dodge LLP

20080006931 - Semiconductor constructions and assemblies, electronic systems, and methods of forming semiconductor constructions and assemblies: The invention includes semiconductor assemblies having two or more dies. An exemplary assembly has circuitry associated with a first die front side electrically connected to circuitry associated with a second die front side. The front side of the second die is adjacent a back side of the first die, and... Agent: Wells St. John P.s.

20080006932 - Semiconductor device: A semiconductor device according to the present invention has an insulating substrate having an upper conductor formed on the upper surface and a lower conductor formed on the lower surface; a semiconductor element mounted on the insulating substrate with an under-element solder therebetween; a heat sink whereon the insulating substrate... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080006934 - Flip chip package including a non-planar heat spreader and method of making the same: A flip chip package generally includes a substrate, a flip chip die, and a heat spreader. The flip chip die is coupled to the substrate. The heat spreader is coupled to the flip chip die. The heat spreader can include one or more walls. Generally, the one or more walls... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20080006935 - Semiconductor device with pipe for passing refrigerant liquid: A semiconductor device includes 1) a conductive pipe including an inner surface forming an inner space shaping a path of an insulative cooling refrigerant liquid and an outer surface including a plane potion partially formed thereof, 2) a power semiconductor element fixed onto the plane portion of the conductive pipe... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080006936 - Superfine-circuit semiconductor package structure: A superfine-circuit semiconductor package structure includes a carrier board, a support board having at least one through hole and mounted on the carrier board, at least one semiconductor chip received in the through hole of the support board and mounted on the carrier board, at least one circuit built-up structure... Agent: Sawyer Law Group LLP

20080006938 - Method for bonding wafers to produce stacked integrated circuits: A basic building block for wafer scale stacked integrated circuits is disclosed. The building block includes an integrated circuit device having an integrated circuit substrate having a circuit layer sandwiched between a buffer layer and a dielectric layer. The dielectric layer has a top side and a bottom side, the... Agent: The Law Office Of Calvin'b. Ward

20080006937 - Solderability improvement method for leaded semiconductor package: A microelectronic device package that includes a microelectronic device encapsulated within a packaging material. The microelectronic device package also includes a lead attached to a portion of the microelectronic device extending through the packaging material. The lead has a break portion and a non-break portion on a tip of the... Agent: Texas Instruments Incorporated

20080006939 - Packaging of hybrib integrated circuits: Improved sensor packaging is provided with a hybrid integration approach. In one example, an application specific integrated circuit (ASIC) for sensor signal conditioning is packaged. The ASIC package has an aperture in it that exposes a chip to chip bonding interface of the ASIC chip. The rest of the ASIC... Agent: Lumen Intellectual Property Services, Inc.

20080006940 - Lead frames, microelectronic devices with lead frames, and methods for manufacturing lead frames and microelectronic devices with lead frames: Lead frames, microelectronic devices with lead frames, and methods for manufacturing lead frames and microelectronic devices with lead frames are disclosed herein. An embodiment of one such microelectronic device includes a microelectronic die and a plurality of conductive leads connected to the die. The die includes an integrated circuit and... Agent: Perkins Coie LLP Patent-sea

20080006941 - Semiconductor package and method of manufacturing the same: A package may include a semiconductor chip mounted on a film substrate. A method of manufacturing the same may involve providing a semiconductor chip. The semiconductor chip may include recesses and bumps. A film substrate including a through hole may be provided. The semiconductor chip may be inserted into the... Agent: Harness, Dickey & Pierce, P.L.C

20080006942 - Bottom substrate of package on package and manufacturing method thereof: A bottom substrate of package on package and manufacturing method thereof is disclosed. A bottom substrate of a package on package electrically connected to a top substrate by means of a solder ball, including a core board, a solder ball pad formed on a surface of the core board in... Agent: Staas & Halsey LLP

20080006943 - Semiconductor device including semiconductor element surrounded by an insulating member and wiring structures on upper and lower surfaces of the semiconductor element and insulating member, and manufacturing method thereof: A first semiconductor element is mounted on a base plate, and is in a sealed state by the periphery thereof being covered by an insulation member, and the upper surface thereof being covered by an upper insulation film. An upper wiring layer formed on the upper insulation film, and the... Agent: Frishauf, Holtz, Goodman & Chick, PC

20080006944 - Interconnect structure and method of fabrication of same: A damascene wire and method of forming the wire. The method including: forming a mask layer on a top surface of a dielectric layer; forming an opening in the mask layer; forming a trench in the dielectric layer where the dielectric layer is not protected by the mask layer; recessing... Agent: Schmeiser, Olsen & Watts

20080006945 - Integrated circuit and method for fabricating the same: A method for fabricating an integrated circuit (IC) chip includes forming a metal trace having a thickness of between 5 μm and 27 μm over a semiconductor substrate, and forming a passivation layer on the metal trace, wherein the passivation layer includes a layer of silicon nitride on the metal... Agent: Megica Corporation

20080006946 - Post passivation interconnection schemes on top of the ic chips: A new method is provided for the creation of interconnect lines. Fine line interconnects are provided in a first layer of dielectric overlying semiconductor circuits that have been created in or on the surface of a substrate. A layer of passivation is deposited over the layer of dielectric, a thick... Agent: John Chen

20080006947 - Semiconductor device and method of manufacturing the same: A semiconductor device having a microcomputer chip and a plurality of high-speed memory chips and capable of making wiring lines of the memory chips equal in length is disclosed. The semiconductor device comprises a first wiring substrate, a microcomputer chip mounted over the first wiring substrate, a second wiring substrate... Agent: Miles & Stockbridge PC

20080006948 - Stack die packages: Integrated circuit packages having corresponding methods comprise: a substrate comprising first electric contacts; a first wirebond integrated circuit die mechanically coupled to the substrate and comprising second electric contacts electrically coupled to the first electric contacts of the substrate by first electrically conductive wires; a flip-chip integrated circuit die comprising... Agent: Harness, Dickey & Pierce P.L.C

20080006949 - Semiconductor package and method of fabricating the same: Provided are a semiconductor package and a method of fabricating the same. The semiconductor package includes a semiconductor chip, and a plurality of conductive balls, e.g., solder balls formed on a joint surface of the semiconductor chip. A dummy board includes openings aligned with the solder balls and is bonded... Agent: Marger Johnson & Mccollom, P.C.

20080006950 - Bonding pad structure for electronic device: A pad structure for an electronic device is disclosed. The pad structure comprises an insulating layer, an uppermost metal layer and a metal layer. The insulating layer is disposed on a substrate. The uppermost metal layer is disposed on the insulating layer. The metal layer is disposed in the insulating... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20080006951 - Copper bonding compatible bond pad structure and method: A copper bonding compatible bond pad structure and associated method is disclosed. The device bond pad structure includes a buffering structure formed of regions of interconnect metal and regions of non-conductive passivation material, the buffering structure providing buffering of underlying layers and structures of the device.... Agent: Fortune Law Group LLP

20080006952 - Misalignment detection devices: A misalignment detection device comprising a substrate, at least one integrated circuit (IC), and at least one detection unit is disclosed. The substrate comprises a first positioning pad and a second positioning pad adjacent to the first positioning pad. The integrated circuit is disposed on the substrate and comprises a... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP