Active solid-state devices (e.g., transistors, solid-state diodes) inventions 10/07

20070246700 - Light emitting device and method of manufacturing the same: Provided are embodiments of a light emitting device and a method of manufacturing the same. The light emitting device can include a substrate having a nano-sized structure and a semiconductor light emitting structure on the substrate. The method of manufacturing the light emitting device can include forming a nano-sized structure... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20070246707 - Thin film transistor liquid crystal display array substrate and manufacturing method thereof: A TFT LCD array substrate and a manufacturing method thereof. The manufacturing method includes the steps of: forming a thin film transistor on a substrate to form a gate line and a gate electrode connected with the gate line on the substrate; forming a gate insulating layer and a semiconductor... Agent: Hasse & Nesbitt LLC

20070246708 - Semiconductor device: A semiconductor device comprising a high-dielectric film in a part of a gate insulation film is provided by a more simplified method. In a semiconductor device having a first region and a second region, a first gate electrode, a second gate electrode and a high-dielectric gate insulation film are formed... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070246714 - Led package: An LED package improved in efficiency and brightness. In the package, a body has a mounting part thereon. A plurality of light emitting diode chips are mounted on the mounting part. The mounting part has a cross-section upwardly convexed with a non-planar top portion so that at least two adjacent... Agent: Mcdermott Will & Emery LLP

20070246712 - Light emitting diode module: A long life light-emitting diode (LED) module is provided. The LED module includes: a light-emitting chip; a phosphor layer formed of phosphor materials that transform light emitted from the light-emitting chip into light having a longer wavelength than the light emitted from the light-emitting chip; a capping layer that is... Agent: Buchanan, Ingersoll & Rooney PC

20070246715 - Light emitting diode package having multi-stepped reflecting surface structure and fabrication method thereof: A high luminance and high output LED package using an LED as a light source and a fabrication method thereof. The LED package includes an Al substrate with a recessed multi-stepped reflecting surface formed therein and a light source composed of LEDs mounted on the reflecting surface and electrically connected... Agent: Mcdermott Will & Emery LLP

20070246718 - Composite semiconductor device, led print head that employs the composite semiconductor device, and image forming apparatus that employs the led print head: A composite semiconductor device includes a plurality of semiconductor thin films and a substrate on which the semiconductor thin films are attached. Each semiconductor thin film includes a plurality of semiconductor elements. Each semiconductor element includes a first contact region and a second contact region. The first contact region is... Agent: Akin Gump Strauss Hauer & Feld L.L.P.

20070246720 - Nitride semiconductor light-emitting device and method of manufacturing nitride semiconductor light-emitting device: A nitride semiconductor light-emitting device including a coating film and a reflectance control film successively formed on a light-emitting portion, in which the light-emitting portion is formed of a nitride semiconductor, the coating film is formed of an aluminum oxynitride film or an aluminum nitride film, and the reflectance control... Agent: Harness, Dickey & Pierce, P.L.C

20070246723 - Method for forming film pattern, method for manufacturing active matrix substrate, device, electro-optical device and electronic apparatus: A method for forming a film pattern by disposing a functional liquid in a pattern forming region partitioned by a bank includes: disposing a first bank forming material to a substrate so as to form a first bank layer; and forming a second bank layer on the first bank layer,... Agent: Harness, Dickey & Pierce, P.L.C

20070246724 - Package base structure and associated manufacturing method: A package base structure of a light emitting device and associated manufacturing method is provided. The method includes steps of forming a first mask layer and a second mask layer on a first surface and a second surface of a substrate; defining a first opening and a second opening on... Agent: Madson & Austin Gateway Tower West

20070246727 - Chip seat structuer for light-emitting crystal and a packaging structure thereof: A chip seat structure for light-emitting crystal and a packaging structure thereof. The chip seat structure includes: a model body made of a thermoconductive nonelectroconductive material, the model body having an integrated thermoconductive section; at least one cup seat disposed on a top face of the model body for mounting... Agent: Kamrath & Associates P.A.

20070246729 - High efficiency led package: A light emitting diode (LED) package is disclosed. In one embodiment, the LED package includes an LED, which emits light corresponding to an electric signal and a substrate, which is mounted to electrically couple to the LED and has an anode lead frame and a cathode lead frame. The package... Agent: Knobbe Martens Olson & Bear LLP

20070246726 - Package structure of light emitting device: The present invention relates to a package structure of light emitting device, comprising a light emitting diode disposed on a submount, wherein the light emitting diode comprises a first contact and a second contact respectively connected with a first conductive lead and a second conductive lead of the submount. The... Agent: Rosenberg, Klein & Lee

20070246728 - Surface mounting device-type light emitting diode: A surface mounting device-type light emitting diode (SMD-type LED) comprises a lead frame composed of a pair of lead terminals; a package housing a portion of the lead frame therein, the package having an emission window which is opened so that light is emitted through the emission window; an LED... Agent: Lowe Hauptman Ham & Berner, LLP

20070246699 - Phase change memory cell with vacuum spacer: A memory device. The device includes first and second electrode members, in spaced relation on a substrate. A phase change element lies in electrical contact with the first and second electrode elements and spans the space separating them. The phase change element includes two segments, each in contact with one... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20070246701 - Generating multiple bandgaps using multiple epitaxial layers: A quantum well intermixing (QWI) technique for modifying an energy bandgap during the formation of optical semi-conductor devices enables spatial control of the QWI process so as to achieve differing bandgap shifts across a wafer, device or substrate surface. The method includes: forming a substrate comprising one or more core... Agent: Momkus Mccluskey Monroe Marsh & Spyratos, LLC

20070246702 - Fabrication of active areas of different natures directly onto an insulator: application to the single or double gate mos transistor: The invention concerns a micro-electronic device comprising a substrate, a first insulating zone and a second insulating zone laying on said substrate, a first active zone comprising at least one layer made of a first semi-conductor crystalline material, resting on said first insulating zone which insulates it from the substrate,... Agent: Mckenna Long & Aldridge LLP

20070246705 - High performance light-emitting devices: An organic light emitting device consists of a layered structure including a top multilayer stack, a bottom multilayer stack, a cavity layer between the top multilayer stack and the bottom multilayer stack, and an organic light emitting region within the cavity layer. The layered structure is constructed such that the... Agent: Marks & Clerk

20070246703 - Nanoparticle positioning technique: Embodiments of the present invention are generally directed to a method for disposing nanoparticles on a substrate. In one embodiment, a substrate having a plurality of recesses is provided. In this embodiment, a plurality of nanoparticles is also provided. The nanoparticles include a catalyst material coupled to one or more... Agent: Fletcher Yoder (micron Technology, Inc.)

20070246704 - Polymerisable thieno[3,2-b]thiophenes: The invention relates to novel polymerisable thieno[3,2-b]thiophenes, to their use as semiconductors or charge transport materials, in optical, electro-optical or electronic devices like for example liquid, crystal displays, optical films, organic field effect transistors (FET or OFET) for thin film transistor liquid crystal displays and integrated circuit devices such as... Agent: Millen, White, Zelano & Branigan, P.C.

20070246706 - Electronic circuit with repetitive patterns formed by shadow mask vapor deposition and a method of manufacturing an electronic circuit element: An electronic circuit with repetitive patterns formed by shadow mask vapor deposition includes a repetitive pattern of electronic circuit elements formed on a substrate. Each electronic circuit element includes the following elements in the desired order of deposition: a first semiconductor segment, a second semiconductor segment, a first metal segment,... Agent: The Webb Law Firm, P.C.

20070246709 - Thin film semiconductor device: A thin film semiconductor device is provided which includes an insulating substrate, a Si thin film formed over the insulating substrate, and a transistor with the Si thin film as a channel thereof. The Si thin film includes a polycrystal where a plurality of narrow, rectangular crystal grains are arranged.... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070246710 - Semiconductor device and method of manufacturing same: A semiconductor device with high reliability and operation performance is manufactured without increasing the number of manufacture steps. A gate electrode has a laminate structure. A TFT having a low concentration impurity region that overlaps the gate electrode or a TFT having a low concentration impurity region that does not... Agent: Fish & Richardson P.C.

20070246713 - Light source and method for producing a light source: The invention relates to a light source comprising at least one p-n-junction which is formed by the arrangement of two suitable semi-conductor materials for the induced emission of light. Said light source is embodied and improved in such a manner that at least one of the semi-conductor materials is in... Agent: Alston & Bird LLP

20070246711 - Multi-directional light scattering led and manufacturing method thereof: A multidirectional light scattering LED and a manufacturing method thereof are disclosed. A metal oxide is irregular disposed over a second semiconductor layer and then is removed by etching. Part of the second semiconductor layer, part of a light-emitting layer or part of the first semiconductor layer is also removed... Agent: Rosenberg, Klein & Lee

20070246717 - Light source having both thermal and space efficiency: A light source that is both thermally and spatially efficient can be achieved by attaching a light source, such as an LED chip, to a flexible circuit and positioning a light conductive material around the light source. For one embodiment, a cavity is created around the light source such that... Agent: Kathy Manke Avago Technologies Limited

20070246716 - Semiconductor light emitting device with integrated electronic components: One or more circuit elements such as silicon diodes, resistors, capacitors, and inductors are disposed between the semiconductor structure of a semiconductor light emitting device and the connection layers used to connect the device to an external structure. In some embodiments, the n-contacts to the semiconductor structure are distributed across... Agent: Patent Law Group LLP

20070246719 - P-n junction-type compound semiconductor light-emitting diode: In a p-n junction-type compound semiconductor light-emitting diode provided on a crystal substrate with at least an n-type active layer formed of a Group m nitride semiconductor as a light emitting layer, and with a Group m nitride semiconductor layer containing a p-type impurity on the n-type active layer, the... Agent: Sughrue Mion, PLLC

20070246722 - Sealed led having improved optical transmissibility: A light emitting diode (LED) having enhanced integrity. The light emitting source of the LED is preferably an LED chip encapsulated by a compliant material, preferably silicone. The LED chip is supported within an optical shell so that a gap exists between the compliant material and the interior surface of... Agent: Kathy Manke Avago Technologies Limited

20070246721 - Semiconductor component having a curved mirror and method for producing a semiconductor component having a curved semiconductor body: A semiconductor component having a semiconductor body, the semiconductor body comprising a curved mirror (3), which is monolithically integrated in the semiconductor body. A method for curving a semiconductor body is also disclosed.... Agent: Cohen, Pontani, Lieberman & Pavane

20070246725 - Semiconductor display device: It is an object of the present invention to provide a semiconductor display device using a protective circuit in which dielectric breakdown is prevented more effectively. In the invention, in the cases that a first interlayer insulating film is formed covering a TFT used for a protective circuit and a... Agent: Eric Robinson

20070246730 - Light emitting diode and light emitting diode device including the light emitting diode element and method for manufacturing the light emitting diode: A light emitting element has a base made of heat conductive material, a wire plate made of an insulation material and secured to an upper surface of the base. Conductive patterns are secured to the wire plate, and a light emitting chip is secured to the base at an exposed... Agent: Dennison, Schultz & Macdonald

20070246731 - Semiconductor device using semiconductor chip: A semiconductor device includes an insulating substrate 2 having an obverse surface formed with a die pad 3, a rectangular semiconductor chip 7 such as an LED chip bonded to the die pad with a die bonding material 10, and a molded portion 9 made of a synthetic resin for... Agent: Hamre, Schumann, Mueller & Larson, P.C.

20070246734 - Multilayered white light emitting diode using quantum dots and method of fabricating the same: A multilayered white light emitting diode and a method of fabricating the same include forming a phosphor mixture layer including a green phosphor and a blue phosphor on a UV light emitting diode and forming a red quantum dot layer on the phosphor mixture layer. In the white light emitting... Agent: Cantor Colburn, LLP

20070246733 - Nitride-based semiconductor substrate, method of making the same and epitaxial substrate for nitride-based semiconductor light emitting device: A nitride-based semiconductor substrate has a substrate formed of a nitride-based semiconductor crystal having a mixed crystal composition with three elements or more. The substrate has a diameter of not less than 25 mm, and a thermal resistivity in a range of 0.02 Kcm2/W to 0.5 Kcm2/W in its thickness... Agent: Foley And Lardner LLP Suite 500

20070246736 - Light emitting element and communication device using same: A light emitting element has a well layer formed of a GaN-based semiconductor, a barrier layer next to the well layer, the barrier layer being formed of a GaN-based semiconductor, and a GaN-based semiconductor layer formed between the well layer and the barrier layer. The GaN-based semiconductor layer has a... Agent: Mcginn Intellectual Property Law Group, PLLC

20070246732 - Oxynitride phosphor and a light emitting device: One preferred embodiment according to the present invention, there is provided an oxynitride phosphor and a light emitting device using the same that is able to reduce production costs and chromaticity shifts. The phosphor is represented by a general formula of (Ca1−zYz)x(Si, Al)12(O, N)16:Eu2+y, and has a main phase of... Agent: Sughrue Mion, PLLC

20070246735 - Semiconductor light emitting element: A semiconductor light emitting element has an electrode formed on a semiconductor layer, a passivation film covering a part of a top surface of the electrode, and a multilayer film formed on the electrode. The multilayer film has at least one pair of a Ti layer and a Ni layer,... Agent: Mcginn Intellectual Property Law Group, PLLC

20070246737 - Electrostatic discharge protection apparatus for integrated circuits: An electrostatic discharge (ESD) protection apparatus for integrated circuits is provided. The ESD protection apparatus includes an ESD protection device. The ESD protection device is disposed in a guard ring and includes a special ESD protection unit and an ESD protection unit. The special ESD protection unit is parallel to... Agent: J.c. Patents, Inc.

20070246738 - Semiconductor device and method of manufacturing the same: In a semiconductor device of the present invention, an N type epitaxial layer is divided into a plurality of element formation regions by an isolation region. In one of the element formation regions, a MOS transistor is formed. Around the MOS transistor, a protection element having a PN junction region... Agent: Fish & Richardson P.C.

20070246739 - Semiconductor device and method of manufacturing the same: In a semiconductor device of the present invention, an N type epitaxial layer is divided into a plurality of element formation regions by an isolation region. In one of the element formation regions, an NPN transistor is formed. Around the NPN transistor, a protection element having a PN junction region... Agent: Fish & Richardson P.C.

20070246740 - Transistor with increased esd robustness and related layout method thereof: The invention relates to a layout method for a transistor with improved ESD robustness. The layout method includes defining a ring region from a first conductive type; defining a first and a second rectangular diffusion regions from a second conductive type, wherein the first and second rectangular diffusion regions are... Agent: North America Intellectual Property Corporation

20070246741 - Stress relaxation for top of transistor gate: An improved way to apply tensile or compressive stress to one or more transistors on a semiconductor device is described. A portion of the tensile or compressive stress liner may be removed or modified such that a reduced amount of stress, or even no stress, is applied above the transistor... Agent: Banner & Witcoff, Ltd.

20070246742 - Method of manufacturing a strained semiconductor layer, method of manufacturing a semiconductor device and semiconductor substrate suitable for use in such a method: The invention relates to a method of manufacturing a semiconductor strained layer and to a method of manufacturing a semiconductor device (10) in which a semiconductor body (11) of silicon is provided, at a surface thereof, with a first semiconductor layer (1) having a lattice of a mixed crystal of... Agent: Nxp, B.v. Nxp Intellectual Property Department

20070246743 - Method of forming a phase change material layer, method of forming a phase change memory device using the same, and a phase change memory device so formed: A method of forming a phase change material layer includes preparing a substrate having an insulator and a conductor, loading the substrate into a process housing, injecting a deposition gas into the process housing to selectively form a phase change material layer on an exposed surface of the conductor, and... Agent: Lee & Morse, P.C.

20070246744 - Method of manufacturing a coreless package substrate and conductive structure of the substrate: A method of manufacturing a coreless package substrate together with a conductive structure of the substrate is disclosed. The method can produce a coreless package substrate which comprises: at least a built-up structure having a first solder mask and a second solder mask, wherein a plurality of openings are formed... Agent: Bacon & Thomas, PLLC

20070246745 - Complementary metal oxide semiconductor image sensor and method for fabricating the same: A complementary metal oxide semiconductor image sensor and a method for fabricating the same are disclosed, wherein a width of a depletion area of a photodiode is varied by variably applying a back bias voltage to a semiconductor substrate without using any color filter, thereby preventing a back bias voltage... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070246746 - Solid-state image pickup device: A solid-state image pickup device 1 according to the present invention includes a semiconductor substrate 2 on which a pixel 20 composed of a photodiode 3 and a transistor is formed. The transistor comprising the pixel 20 is formed on the surface of the semiconductor substrate, a pn junction portion... Agent: Robert J. Depke Lewis T. Steadman

20070246747 - Image display apparatus: An image display apparatus includes a front substrate, and a rear substrate opposed to the front substrate. The front substrate has phosphor layers, resistor layers provided between the phosphor layers, a metal-back layer divided into metal-back segments covering the phosphor layers and resistor layers at least in part, and spaced... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070246748 - Phase change memory cell with limited switchable volume: A memory cell comprises a dielectric layer and a phase change material. The dielectric layer defines a trench having both a wide portion and a narrow portion. The narrow portion is substantially narrower than the wide portion. The phase change material, in turn, at least partially fills the wide and... Agent: Ryan, Mason & Lewis, LLP

20070246749 - Solution of power consumption reduction for inverter covered by metal case: For improving efficiency of a power device having an exposed surface capable of radiating energy, a shielding layer is disposed in between the exposed surface and a conductive layer. The shielding layer causes at least a portion of the energy to be directed back into the power device, thereby substantially... Agent: Haynes And Boone, LLP

20070246750 - Control of body potential of partially-depleted field-effect transistors: A partially-depleted silicon-on-insulator (SOI) field-effect transistor (FET) with a reduced off-current is described, as well as methods for manufacturing. This may be accomplished by providing an SOI FET having a lower body potential than in previous SOI FETs. To lower the body potential, carrier traps may be formed mainly in... Agent: Banner & Witcoff, Ltd.

20070246755 - Method for fabricating recessed gate mos transistor device: A method of fabricating self-aligned gate trench utilizing TTO poly spacer is disclosed. A semiconductor substrate having thereon a pad oxide layer and pad nitride layer is provided. A plurality of trench capacitors are embedded in a memory array region of the semiconductor substrate. Each of the trench capacitors has... Agent: North America Intellectual Property Corporation

20070246753 - Metal gated ultra short mosfet devices: MOSFET devices suitable for operation at gate lengths less than about 40 nm, and methods of their fabrication is being presented. The MOSFET devices include a ground plane formed of a monocrystalline Si based material. A Si based body layer is epitaxially disposed over the ground plane. The body layer... Agent: Innovation Interface, LLC

20070246754 - Semiconductor device and method for manufacture: A semiconductor device is formed with a lower field plate (32) and optional lateral field plates (34) around semiconductor (20) in which devices are formed, for example power FETs or other transistor or diode types. The semiconductor device is manufactured by forming trenches with insulated sidewalls, etching cavities (26) at... Agent: Nxp, B.v. Nxp Intellectual Property Department

20070246752 - Semiconductor device structures with reduced junction capacitance and drain induced barrier lowering and methods for fabricating such device structures and for fabricating a semiconductor-on-insulator substrate: Semiconductor device structures with reduced junction capacitance and drain induced barrier lowering, methods for fabricating such device structures, and methods for forming a semiconductor-on-insulator substrate. The semiconductor structure comprises a semiconductor layer and a dielectric layer disposed between the semiconductor layer and the substrate. The dielectric layer includes a first... Agent: Wood, Herron & Evans, L.L.P. (ibm)

20070246751 - Spacer structure and fabrication method thereof: A spacer structure contains a carbon-containing oxynitride film positioned on a gate sidewall and a nitride film covering the carbon-containing oxide film. The carbon-containing oxynitride film has low etch rate so that the spacer structure can have a good profile during etching the carbon-containing oxynitride film.... Agent: North America Intellectual Property Corporation

20070246757 - Cmos image sensor and method for fabricating the same: A CMOS image sensor and a method for fabricating the same is disclosed, to improve reliability of a driving part transistor and to improve an output voltage of a photodiode, which includes a semiconductor substrate defined as a photodiode transistor region and a driving part transistor region; a first gate... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070246756 - Image sensor with soi substrate: An imager pixel utilizing a silicon-on-insulator substrate, a photodiode in said substrate below the buried oxide, and a dual contact to said photodiode and methods of forming said imager pixel. The photodiode has an increased fill factor due to its increased size relative to the pixel.... Agent: Dickstein Shapiro LLP

20070246758 - Semiconductor device: A semiconductor device includes a semiconductor element that is set up on a semiconductor layer, a light shielding wall that is set up around the semiconductor element, a hole that is set up on the light shielding wall, and a wiring layer that is electrically connected to the semiconductor element... Agent: Harness, Dickey & Pierce, P.L.C

20070246759 - Semiconductor device: A semiconductor device includes a semiconductor element that is set up on a semiconductor layer, a light shielding wall that is set up around the semiconductor element, a hole that is set up on the light shielding wall, and a wiring layer that is electrically connected to the semiconductor element... Agent: Harness, Dickey & Pierce, P.L.C

20070246760 - Semiconductor device: A semiconductor device includes a semiconductor element that is set up on a semiconductor layer, a light shielding wall that is set up around the semiconductor element, a hole that is set up on the light shielding wall, and a wiring layer that is electrically connected to the semiconductor element... Agent: Harness, Dickey & Pierce, P.L.C

20070246761 - Electrical lapping guides made from tunneling magnetoresistive (tmr) material: Tunneling magnetoresistive (TMR) electrical lapping guides (ELG) are disclosed for use in wafer fabrication of magnetic sensing devices, such as magnetic recording heads using TMR read elements. A TMR ELG includes a TMR stack comprising a first conductive layer, a barrier layer, and a second conductive layer of TMR material.... Agent: Duft Bornsen & Fishman, LLP

20070246762 - Semiconductor device including a tcam having a storage element formed: In order to improve the discharging speed of potential from a match line, a semiconductor device includes a capacitor, a memory transistor having a source/drain region connected to a storage node of the capacitor, a search transistor having a gate electrode connected to the storage node, and a stacked contact... Agent: Mcdermott Will & Emery LLP

20070246763 - Trench step channel cell transistor and manufacture method thereof: A trench step channel cell transistor and a manufacture method thereof are disclosed. The transistor could be applied to increase the channel length thereof. The transistor comprises a step silicon layer formed by a selective growth, while the step silicon layer is located above the active area of the transistor.... Agent: Grossman, Tucker, Perreault & Pfleger, PLLC

20070246764 - Low-temperature metal-induced crystallization of silicon-germanium films: The present invention provides for a low-temperature method to crystallize a silicon-germanium film. Metal-induced crystallization of a deposited silicon film can serve to reduce the temperature required to crystallize the film. Increasing germanium content in a silicon-germanium alloy further decreases crystallization temperature. By using metal-induced crystallization to crystallize a deposited... Agent: Patent Dept., Sandisk Corporation

20070246766 - Phase change memory elements using self-aligned phase change material layers and methods of making and using same: A phase change memory element and method of forming the same. The memory element includes a substrate supporting a first electrode. An insulating material element is positioned over the first electrode, and a phase change material layer is formed over the first electrode and surrounding the insulating material element such... Agent: Dickstein Shapiro LLP

20070246767 - Semiconductor device formed on a soi substrate: Thresholds of MISFETS of a Full Depletion-type SOI substrate cannot be controlled by changing impurity density as with bulk silicon MISFETs. Therefore, it is difficult to set a suitable threshold for each circuit. According to the semiconductor device of the present invention, gate electrodes of P-channel type MISFETs composing a... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070246765 - Semiconductor memory device and method for production: Parallel fins or ridges are arranged on a main surface of a semiconductor substrate. Source/drain regions are provided at top and bottom portions of said fins, and wordlines comprising gate electrodes are arranged in interspaces between neighboring fins. The channels of individual memory cells are directed vertically with respect to... Agent: Slater & Matsil LLP

20070246769 - Semiconductor device including adjacent two interconnection lines having different distances therebetween: A semiconductor device includes an interconnection layer including adjacent two interconnection lines extending adjacent to each other. A plurality of contact plugs pass through the space between the adjacent two interconnection lines. The adjacent two interconnection lines have different distances therebetween due to a concave-and-convex surface of the sidewall of... Agent: Sughrue Mion, PLLC

20070246768 - Nonvolatile memory device and method of fabricating the same: A nonvolatile memory device and a method of fabricating the same are disclosed. The method includes forming a tunnel oxide film and a conductive film for a floating gate on a semiconductor substrate; nitriding the top surface of the conductive film for a floating gate; oxidizing the nitrided top surface... Agent: Mills & Onello LLP

20070246770 - Semiconductor device and method of manufacturing the same: A semiconductor device, including a semiconductor region of the first conduction type which is formed on a semiconductor substrate; a gate electrode at least part of which is present within a trench which is selectively formed in part of the semiconductor region, and an extended top end portion of which... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070246771 - Lateral double-diffused metal oxide semiconductor (ldmos) device with an enhanced drift region that has an improved ron area product: A lateral double-diffused metal oxide semiconductor (LDMOS) device is disclosed. The LDMOS device comprises a gate region and a body region under the gate region. The LDMOS device includes an enhanced drift region under the gate region. The enhanced drift region touches the body region. By designing the device such... Agent: Sawyer Law Group LLP

20070246772 - Mosfet power package: A power MOSFET package is disclosed. The power MOSFET package includes a leadframe having first and second die pads insulated one from the other, the first die pad being coupled to a first drain lead and the second die pad being coupled to a second drain lead. A first MOSFET... Agent: Fortune Law Group LLP

20070246773 - Drive circuit and drain extended transistor for use therein: A transistor comprises a source region of a first conductivity type and electrically communicating with a first semiconductor region. The transistor also comprises a drain region of the first conductivity type and electrically communicating with a second semiconductor region that differs from the first semiconductor region. An interface exists between... Agent: Texas Instruments Incorporated

20070246775 - Soi substrate and method for forming the same: Provided are an SOI substrate, memory devices using the SOI substrate, and a method of manufacturing the same. The SOI substrate includes a thermal oxide layer pattern which minimizes leakage current but allows back biasing and heat dissipation through the substrate. The SOI substrate also includes a metal-gettering site to... Agent: Marger Johnson & Mccollom, P.C.

20070246774 - Semiconductor device with substantial driving current and decreased junction leakage current: The semiconductor device includes an active region, a stepped recess channel region including vertical channel structures, a gate insulating film, and a gate structure. The active region is defined by a device isolation structure formed in a semiconductor substrate. The stepped recess channel region is formed in the active region.... Agent: Heller Ehrman LLP

20070246776 - Stress engineering for cap layer induced stress: Improved layouts take better advantage of desirable cap-layer induced transverse and vertical stress. In one aspect, roughly described, a tensile strained cap material overlies the transistor channels in the N-channel diffusion regions but not the P-channel diffusion regions. The material terminates at an edge that is located as far as... Agent: Synopsys, Inc. C/o Haynes Beffel & Wolfeld LLP

20070246777 - Electronic appliance including transistor having ldd region: A high reliability semiconductor display device is provided. A semiconductor layer in the semiconductor display device has a channel forming region, an LDD region, a source region, and a drain region, and the LDD region overlaps a first gate electrode, sandwiching a gate insulating film.... Agent: Fish & Richardson P.C.

20070246778 - Electrostatic discharge panel protection structure: An electrostatic discharge protection structure disposed in a peripheral area of a display panel is electrical connected to a wire of a display area of the display panel and a short ring of the peripheral area. The electrostatic discharge protection structure comprises a first path having a first resistance, and... Agent: North America Intellectual Property Corporation

20070246779 - Dual gate oxide structure in semiconductor device and method thereof: In the method of manufacturing a dual gate oxide layer of a semiconductor device, which has first and second active regions operating at mutually different voltages on a semiconductor substrate, the first and second active regions having a device isolation layer of STI (Shallow Trench Isolation) structure; the method of... Agent: Marger Johnson & Mccollom, P.C.

20070246780 - Semiconductor device and a method of manufacturing the same: A technology is provided where a high performance Schottky-barrier diode and other semiconductor elements can be formed in the same chip controlling the increase in the number of steps. After a silicon oxide film is deposited over a substrate where an n-channel type MISFET is formed and the silicon oxide... Agent: Miles & Stockbridge PC

20070246781 - Mos semiconductor device and method of fabricating the same: A MOS semiconductor device includes a substrate having a first region with a Si(110) surface and a second region with a Si(100) surface, a p-channel MOSFET formed in the first region, and an n-channel MOSFET formed in the second region. The p-channel MOSFET including a first silicide layer formed on... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070246782 - Memory cell having sidewall spacer for improved homogeneity: A memory cell includes a first electrode, a second electrode, a layer of phase change material extending from a first contact with the first electrode to a second contact with the second electrode, and a sidewall spacer contacting the second electrode and a sidewall of the layer of phase change... Agent: Dicke, Billig & Czaja

20070246783 - Methods of manufacturing semiconductor devices and semiconductor devices manufactured using such a method: A method of manufacturing a semiconductor device includes forming a pillar-shaped active region by etching a portion of a semiconductor substrate, forming a blocking film selectively exposing a sidewall of a lower portion of the pillar-shaped active region, and forming a bit-line selectively on the exposed sidewall of the lower... Agent: Lee & Morse, P.C.

20070246784 - Unipolar nanotube transistor using a carrier-trapping material: An ambipolar nanotube field effect transistor is converted to a unipolar nanotube field effect transistor by providing a carrier-trapping material such as oxygen molecules for the nanotube such as by adsorption or by providing a layer of material containing the carrier-trapping material adjacent to the nanotube.... Agent: Buchanan, Ingersoll & Rooney PC

20070246785 - Locking device, adjustment mechanism and lithographic apparatus: A locking device to lock a six degree of freedom positioned body is disclosed. The device has a clamping bushing to clamp against a surface of a bore extending through the body, a clamping ring to expand when subject to a compression force, and a lock actuator configured to cause... Agent: Pillsbury Winthrop Shaw Pittman, LLP Eric S. Cherry - Docketing Supervisor

20070246786 - Doping of sic structures and methods associated with same: Doped silicon carbide structures, as well as methods associated with the same, are provided. The structures, for example, are components (e.g., layer, patterned structure) in MEMS structures. The doped silicon carbide structures may be highly conductive, thus, providing low resistance to electrical current. An in-situ doping process may be used... Agent: Demont & Breyer, LLC

20070246787 - On-plug magnetic tunnel junction devices based on spin torque transfer switching: Techniques and device designs associated with devices having magnetic or magnetoresistive tunnel junctions (MTJs) configured to operate based on spin torque transfer switching. On-plug MTJ designs and fabrication techniques are described.... Agent: Fish & Richardson, PC

20070246788 - N-well barrier pixels for improved protection of dark reference columns and rows from blooming and crosstalk: The barrier region for isolating one or more dark regions of the pixel array of an image sensor from the active array or from the peripheral circuitry includes N-well pixel isolation region. The N-well pixel isolation region includes at least one N-well implant or at least one N-well stripe. The... Agent: Dickstein Shapiro LLP

20070246789 - Thermionic flat electron emitter: A thermionic flat electron emitter has an emitter arrangement with an emitter plate having slits therein that produce serpentine current paths. The emitter arrangement has a structure that, in operation, causes the electron density of the emitted electrons to be lower in the central region of the emitter plate than... Agent: Schiff Hardin, LLP Patent Department

20070246790 - Transistor process using a double-epitaxial layer for reduced capacitance: In a method to form a DMOS or bipolar transistor, two epitaxial silicon layers are grown over a silicon substrate instead of the typical one low-resistivity epitaxial layer. The bottom epitaxial layer has a relatively high resistivity of, for example 10 ohms-cm, while the upper epitaxial layer, acting as a... Agent: Patent Law Group LLP

20070246791 - Power semiconductor device: A The semiconductor device has a heavily doped substrate and an upper layer with doped silicon of a first conductivity type disposed on the substrate, the upper layer having an upper surface and including an active region that comprises a well region of a second, opposite conductivity type. An edge... Agent: Baker Botts, L.L.P.

20070246793 - Electronic device including a semiconductor layer and another layer adjacent to an opening within the semiconductor layer and a process of forming the same: A process of forming an electronic device can include patterning a semiconductor layer to define an opening. After patterning the semiconductor layer, the opening can have a bottom, and the semiconductor layer can have a sidewall and a surface. The surface is spaced apart from the bottom of the opening.... Agent: Larson Newman Abel Polansky & White, LLP

20070246792 - Method for fabricating back end of the line structures with liner and seed materials: A sputter-etching method employed to achieve a thinned down noble metal liner layer deposited on the surface or field of an intermediate back end of the line (BEOL) interconnect structure. The noble metal liner layer is substantially thinned down to a point where the effect of the noble metal has... Agent: Hoffman, Warnick & D'alessandro LLC

20070246794 - Integrated circuit including power diode: A method of fabricating a semiconductor integrated circuit including a power diode includes providing a semiconductor substrate of first conductivity type, fabricating a integrated circuit such as a CMOS transistor circuit in a first region of the substrate, and fabricating a power diode in a second region in the semiconductor... Agent: Courtney Staniford & Gregory LLP

20070246795 - Dual depth shallow trench isolation and methods to form same: Trench isolation structures and methods to form same for use in the manufacture of semiconductor devices are described. The trench isolation structures are formed using several processing schemes that utilize disclosed dry etching processes to form a significant depth A between an array trench depth and a periphery trench depth.... Agent: David J. Paul Micron Technology, Inc.

20070246797 - Fuse corner pad for an integrated circuit: A fuse corner pad is part of an integrated circuit that includes a built-in fuse contact and a plurality of auxiliary pads. The fuse contact is a conductive metallic or metalloid structure that is connected to a fuse element. The fuse contact and fuse element are used inside of the... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20070246796 - Semiconductor device with improved contact fuse: One aspect of the invention provides an integrated circuit (IC). The IC comprises transistors and contact fuses. The contact fuses each comprise a conducting layer, a frustum-shaped contact has a narrower end that contacts the conducting layer and a first metal layer that is located over the conducting layer. A... Agent: Texas Instruments Incorporated

20070246798 - Inductor energy loss reduction techniques: An inductive device including an inductor coil located over a substrate, at least one electrically insulating layer interposing the inductor coil and the substrate, and a plurality of current interrupters each extending into the substrate, wherein a first aggregate outer boundary of the plurality of current interrupters substantially encompasses a... Agent: Haynes And Boone, LLP

20070246799 - Semiconductor device: A first opening portion for via hole opening is formed above an electrode groove and a second opening portion for via hole opening for connecting with wiring layer is formed on interlayer insulation film at a position corresponding to the top portion of wiring layer provided out of a capacitor... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070246800 - Transistor apparatus: A transistor apparatus includes a silicon substrate and a barrier structure extending substantially from generally adjacent the silicon substrate to a locus displaced from the silicon substrate. The barrier structure generally surrounds a volume containing connection loci for the transistor apparatus and a buried layer in a silicon medium. The... Agent: Texas Instruments Incorporated

20070246801 - Varactor: A varactor on a substrate is provided. The varactor comprises a bottom electrode, an upper electrode, a first dielectric layer and a conductive layer. The bottom electrode has several doped regions arranged in the substrate as an array with several rows and several columns, wherein the doped regions in adjacent... Agent: J.c. Patents, Inc.

20070246802 - Semiconductor device and methods thereof: A semiconductor device and method thereof. The example method may include forming a semiconductor device, including forming a first layer on a substrate, the first layer including aluminum nitride (AlN), forming a second layer by oxidizing a surface of the first layer and forming a third layer on the second... Agent: Harness, Dickey & Pierce, P.L.C

20070246803 - Semiconductor constructions, and methods of forming semiconductor constructions: The invention includes a method in which a semiconductor substrate is provided to have a memory array region, and a peripheral region outward of the memory array region. Paired transistors are formed within the memory array region, with such paired transistors sharing a source/drain region corresponding to a bitline contact... Agent: Wells St. John P.s.

20070246804 - Organic insulating film, manufacturing method thereof, semiconductor device using such organic insulating film and manufacturing method thereof: The dielectric constants of SiC and SiCN that are currently the subjects of much investigation are both 4.5 to 5 or so and that of SiOC, 2.8 to 3.0 or so. With further miniaturization of the interconnection size and the spacing of interconnections brought about by the reduction in device... Agent: Hayes Soloway P.C.

20070246805 - Multi-die inductor: A technique for improving the quality factor of an inductor includes increasing a cross-sectional area of the inductor by increasing a vertical dimension associated with the inductor. An apparatus includes an inductor formed partially in a first integrated circuit die and formed partially in at least a second integrated circuit... Agent: Zagorin O'brien Graham LLP

20070246806 - Embedded integrated circuit package system: An embedded integrated circuit package system is provided forming a first conductive pattern on a first structure, connecting a first integrated circuit die on the first conductive pattern, forming a substrate forming encapsulation to cover the first integrated circuit die and the first conductive pattern, forming a channel in the... Agent: Ishimaru & Zahrt LLP

20070246807 - Semiconductor device having charge accumulation layers and control gates and memory circuit system: A semiconductor device includes a plurality of semiconductor chips and a memory device. The semiconductor chips are provided in a package. Each of the semiconductor chips includes a memory cell array having memory cells which stores data, an output buffer which outputs data read from the memory cell array to... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070246808 - Power semiconductor module having surface-mountable flat external contacts and method for producing the same: The invention relates to a power semiconductor module (1) comprising surface-mountable flat external contact areas (3) and a method for producing the same. The top sides (10) of the external contacts (3) form an inner housing plane (11), on which at least one power semiconductor chip (6) is fixed by... Agent: Dicke, Billig & Czaja

20070246809 - Package for optical device and method of manufacturing the same: A package for an optical device includes a plurality of ceramic layers 101, 102 and 103 stacked on a base 2 and a recessed portion 18 formed to mount an optical element at the center. Reversely rounded portions 11 are formed on the corners of the ceramic layers 100, 101... Agent: Steptoe & Johnson LLP

20070246811 - Stack structure of semiconductor packages and method for fabricating the stack structure: A stack structure of semiconductor packages and a method for fabricating the stack structure are provided. A plurality of electrical connection pads and dummy pads are formed on a surface of a substrate of an upper semiconductor package and at positions corresponding to those around an encapsulant of a lower... Agent: Edwards Angell Palmer & Dodge LLP

20070246812 - High reliability power module: A high reliability power module which includes a plurality of hermetically sealed packages each having electrical terminals formed from an alloy of tungsten copper and brazed onto a surface of a ceramic substrate.... Agent: Ostrolenk Faber Gerb & Soffen

20070246810 - Leadframe enhancement and method of producing a multi-row semiconductor package: A semiconductor package includes a plurality of first leads, each with a top outer portion removed from the lead and an outer end, and a plurality of second leads, each with a bottom outer portion removed from the lead and an outer end. The first and second leads alternate with... Agent: Sughrue Mion, PLLC

20070246814 - Ball grid array package structure: A ball grid array structure includes a substrate, wherein a plurality of electric contacts are arranged on its lower surface; a chip arranged on the upper surface of the substrate and electrically connecting with those electric-connecting points; at least a through hole on the substrate and arranged around the edge... Agent: Birch Stewart Kolasch & Birch

20070246816 - Semiconductor integrated circuit device and method for fabricating the same: A semiconductor integrated circuit device is made by stacking a plurality of semiconductor chips. The semiconductor integrated circuit device includes: a penetrating electrode formed to penetrate the plurality of semiconductor chips; a plurality of electrodes formed in respective layers constituting each of the plurality of semiconductor chips and having respective... Agent: Mcdermott Will & Emery LLP

20070246815 - Stackable semiconductor package: The present invention relates to a stackable semiconductor package, comprising a first substrate, a chip, a second substrate, a plurality of second wires, a plurality of supporting elements and a molding compound. The chip is disposed on and electrically connected to the first substrate. The second substrate is disposed above... Agent: North America Intellectual Property Corporation

20070246813 - Embedded integrated circuit package-on-package system: An embedded integrated circuit package-on-package system is provided forming a first integrated circuit package system, forming a second integrated circuit package system, and mounting the second integrated circuit package system over the first integrated circuit package system with the first integrated circuit package system, the second integrated circuit package system,... Agent: Ishimaru & Zahrt LLP

20070246817 - Solder ball assembly for a semiconductor device and method of fabricating same: Solder ball assembly for a semiconductor device and method of fabricating the same is described. In one example, a solder mask is formed on a substrate having an aperture exposing at least a portion of a conductive pad of the substrate. A solder pillar is formed in the aperture and... Agent: Xilinx, Inc Attn: Legal Department

20070246818 - Semiconductor module featuring solder balls having lower melting point than that of solder electrode terminals of electronic device containing additional metal powder component: A semiconductor module includes a wiring board having a bottom surface and a top surface. A first solder electrode terminal has a given melting point, and is provided on the bottom surface of the wiring board. An electrode pad is provided on or above the top surface of the wiring... Agent: Mcginn Intellectual Property Law Group, PLLC

20070246819 - Semiconductor components and systems having encapsulated through wire interconnects (twi) and wafer level methods of fabrication: A semiconductor component includes a semiconductor substrate having a substrate contact, and a through wire interconnect (TWI) attached to the substrate contact. The through wire interconnect provides a multi level interconnect having contacts on opposing first and second sides of the semiconductor substrate. The through wire interconnect (TWI) includes a... Agent: Stephen A Gratton The Law Office Of Steve Gratton

20070246820 - Die protection process: A method of protecting a microelectronic chip contained in a microelectronic assembly, including the steps of depositing a protective coating across the exposed faces of the chip. The coating, having a low modulus of elasticity, is applied across the chip so as to reduce the overall height of the assembly... Agent: Tessera Lerner David Et Al.

20070246821 - Utra-thin substrate package technology: A semiconductor package assembly having reduced stresses and a method for forming the same are provided. The method includes providing a package substrate comprising a base material, forming an interconnect structure overlying the package substrate, attaching at least one chip to a first surface of the package substrate, thinning the... Agent: Slater & Matsil, L.L.P.

20070246822 - Hard disk drive preamp heat dissipation methods: A heatsink architecture employing a combination of stiffeners and flex substrate to improve the sinking of heat from the integrated circuit. The stiffener may be employed in numerous locations, including above the integrated circuit, or interposed between the integrated circuit and an e-block. The flex substrate may be interposed between... Agent: Texas Instruments Incorporated

20070246823 - Thermally enhanced bga package with ground ring: The invention provides thermally enhanced BGAs and methods for their fabrication with a ground ring suitable for operably coupling to either the frontside or backside, or both, of an IC chip mounted on a substrate. The methods and devices of the invention disclosed include the fabrication of a ground ring... Agent: Texas Instruments Incorporated

20070246824 - Heat sink design using clad metal: According to some embodiments, an outer metal is cladded to a core metal to create a cladded heat sink fin, the cladded heat sink fin is inserted in a groove of a heat sink base, and the outer metal is heated to a reflow temperature of the outer metal. Embodiments... Agent: Buckley, Maschoff & Talwalkar LLC

20070246825 - High frequency module using metal-wall and method of manufacturing the same: A high frequency module and a manufacturing method thereof In the module, a substrate has a ground. A plurality of surface mounted devices are mounted on the substrate. A metal wall is connected to the ground of the substrate. A resin molding hermetically seals the surface mounted devices and the... Agent: Lowe Hauptman Ham & Berner, LLP

20070246826 - Wafer level semiconductor module and method for manufacturing the same: A wafer level semiconductor module may include a module board and an IC chip set mounted on the module board. The IC chip set may include a plurality of IC chips having scribe lines areas between the adjacent IC chips. Each IC chip may have a semiconductor substrate having an... Agent: Harness, Dickey & Pierce, P.L.C

20070246827 - Semiconductor integrated circuit and method of designing semiconductor integrated circuit: A semiconductor integrated circuit has: a power pad placed on a chip; and a circuit group connected to the power pad through a power wiring structure. The power wiring structure includes: a plurality of first power wirings and a plurality of second power wirings that are formed in different wiring... Agent: Mcginn Intellectual Property Law Group, PLLC

20070246828 - Semiconductor device and method of manufacturing the same: There are included a semiconductor substrate provided with a desirable element region, an electrode pad formed to come in contact with a surface of the semiconductor substrate or a wiring layer provided on the surface of the semiconductor substrate, a bonding pad formed on a surface of the electrode pad... Agent: Hamre, Schumann, Mueller & Larson, P.C.

20070246829 - Semiconductor device and method for producing the same: A method for producing a semiconductor device of the present invention includes forming a surface electrode on a semiconductor element, forming a solder layer by plating on one principal surface of the surface electrode, mounting the semiconductor element on the sub-mount so that the solder layer contacts a principal surface... Agent: Hamre, Schumann, Mueller & Larson P.C.

20070246830 - Long-lifetime interconnect structure and method for making: An interconnect structure and method for manufacturing are described wherein an insulating material adjacent to or at least partially surrounding a conductive interconnect has a coefficient of thermal expansion (CTE) equal to or larger than the CTE of the interconnect. For example, a copper-based damascene interconnect layer may be provided,... Agent: Banner & Witcoff, Ltd.

20070246831 - Method for manufacturing a layer arrangement and layer arrangement: In a method for manufacturing a layer arrangement, a plurality of electrically conductive structures are embedded in a substrate. Material of the substrate is removed at least between adjacent electrically conductive structures. An interlayer is formed on at least one portion of sidewalls of each of the electrically conductive structures.... Agent: Slater & Matsil LLP

20070246832 - Electro-resistance element and electro-resistance memory using the same: An electro-resistance element that has a different configuration from conventional elements and is excellent in both affinity with semiconductor manufacturing processes and heat treatment stability under a hydrogen-containing atmosphere is provided. An electro-resistance element includes an electro-resistance layer that has two or more states in which electric resistance values are... Agent: Hamre, Schumann, Mueller & Larson P.C.

20070246833 - Semiconductor power module: Use of Pb-free solder has become essential due to the environmental problem. A power module is formed by soldering substrates with large areas. It is known that in Sn-3Ag-0.5Cu which hardly creeps and deforms with respect to large deformation followed by warpage of the substrate, life is significantly shortened with... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070246834 - Post passivation interconnection schemes on top of the ic chips: A new method is provided for the creation of interconnect lines. Fine line interconnects are provided in a first layer of dielectric overlying semiconductor circuits that have been created in or on the surface of a substrate. A layer of passivation is deposited over the layer of dielectric and a... Agent: Saile Ackerman LLC

20070246835 - Semiconductor device: In the case where a first semiconductor chip and a second semiconductor chip are stacked, both the semiconductor chips are connected using micro bumps, such that a circuit block in the first semiconductor chip and a circuit block in the second semiconductor chip are connected by the micro bumps, and... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070246837 - Ic chip package with minimized packaged-volume: An IC chip package, including a single chip package, two stacked chips package or a System-In-Package (SIP), is created to minimize the assembled volume, which basic structure comprises a chip, a circuited substrate provided for the chip electrically mounted thereon and an encapsulated means for covering the chip to constitute... Agent: Bacon & Thomas, PLLC

20070246836 - Electric terminal device and method of connecting the same: An electric terminal device is provided with glass substrate 11, glass-substrate-side electric terminals 15 formed on glass substrate 11, tape carrier packages 16a and 16b which are larger in thermal expansion rate than glass substrate 11, and tape-side electric terminals 21 provided to correspond to glass-substrate-side electric terminals 15. Tape-side... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070246838 - Power semiconductor component, power semiconductor device as well as methods for their production: A power semiconductor component (2) has a semiconductor body with a front face (7) and a rear face (9). The front face (7) has a front-face metallization (8), which provides at least one first contact pad (11). A structured metal seed layer (14) is provided as the front-face metallization (8),... Agent: Baker Botts, L.L.P.

20070246840 - Integrated circuit devices with stacked package interposers: An IC device includes a die and a first package interposer stacked over a second package interposer. The IC device includes a first conductive connection from a first bond pad of the die directly to a bond pad of the first interposer and a second conductive connection from a second... Agent: Wells St. John P.s.

20070246839 - Method of proximity pin manufacture: A method and apparatus related to a substrate support structure are provided. In accordance with one embodiment of the present invention, a method for manufacturing a substrate support structure including proximity pins and apparatus for supporting a substrate inside a semiconductor processing equipment are provided. The method includes providing a... Agent: Townsend And Townsend And Crew, LLP

20070246841 - Semiconductor device: The semiconductor device of the present invention comprises a semiconductor element 28 having a pair of electrodes, a housing 12 having the recess 14 for accommodating the semiconductor element 28, a first lead electrode 18 and the second lead electrode 20 which are exposed on the bottom of the recess... Agent: Birch Stewart Kolasch & Birch

20070246842 - Semiconductor device, electronic apparatus and semiconductor device fabricating method: There is provided a semiconductor device which includes a primary semiconductor chip 11, a secondary semiconductor chip 12 stacked on the primary semiconductor chip 11, primary external connecting terminals 16 which are electrically connected with the primary semiconductor chip 11 via wires 21, secondary external connecting terminals 17 which are... Agent: Rankin, Hill, Porter & Clark LLP

20070246844 - Multi-layer registration and dimensional test mark for scatterometrical measurement: A layered test pattern for measuring registration and critical dimension (CD) for multi-layer semiconductor integrated circuits is disclosed. A first layer includes a first pattern having vertical and horizontal portions. A second layer is formed over the first layer and includes a second pattern having vertical and horizontal portions having... Agent: Intellectual Property Law Department Lsi Logic Corporation

20070246843 - Pattern registration mark designs for use in photolithography and methods of using the same: Pattern registration marks which include: a substrate and an upper material layer disposed above the substrate; an outer trench formed in the upper material layer, the outer trench having an outer trench width; an inner trench formed in the upper material layer, the inner trench having an inner trench width;... Agent: Akin Gump Strauss Hauer & Feld L.L.P.

20070246845 - Method of forming a metal line and method of manufacturing a display substrate by using the same: In a method of forming a metal line and a method of manufacturing a display substrate, a channel layer and a metal layer are successively formed on a base substrate. A photoresist pattern is formed in a wiring area. The metal layer is etched by using the photoresist pattern to... Agent: Frank Chau, Esq. F. Chau & Associates, LLC

20070241319 - Phase change memory device having carbon nano tube lower electrode material and method of manufacturing the same: Disclosed is a phase change memory device including: a semiconductor substrate formed with a first insulating interlayer having a first contact hole; a contact plug formed in such a manner so as to be recessed within the first contact hole; a catalyst layer formed on the contact plug in such... Agent: Ladas & Parry LLP

20070241320 - Thin film electron source: A thin film electron source comprising a substrate, a lower electrode formed on one main face of said substrate, an insulation layer formed in contact with said lower electrode and an upper electrode formed in contact with said insulation layer. The upper electrode comprises a first under-layer, a second under-layer,... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070241321 - Light-emitting diode structure: A light-emitting diode (LED) structure including a substrate, a first type doped semiconductor layer, an active layer, a second type doped semiconductor layer and a transparent conductive layer is provided. The first type doped semiconductor layer is located on the substrate. The active layer is located on the first type... Agent: Jianq Chyun Intellectual Property Office

20070241326 - Organic light emitting diode display and manufacturing method thereof: An organic light emitting device and manufacturing method thereof includes a substrate; a first electrode formed on the substrate; a second electrode formed on the first electrode; an light emitting member interposed between the first electrode and the second electrode; and a photonic crystal member disposed in proximity to the... Agent: Cantor Colburn, LLP

20070241327 - Fabrication methods of a zno thin film structure and a zno thin film transistor, and a zno thin film structure and a zno thin film transistor: Provided is a method of fabricating a ZnO thin film structure and a ZnO thin film transistor (TFT), and a ZnO thin film structure and a ZnO thin film transistor. The method of fabricating a ZnO thin film structure may include forming a ZnO thin film on a substrate in... Agent: Harness, Dickey & Pierce, P.L.C

20070241329 - Semiconductor integrated circuit and method for manufacturing same, and mask: A semiconductor integrated circuit includes a first conductor provided in a first region on a substrate and a second conductor provided in a second region on the substrate. The second region is a region enclosing the first region. A minimum design dimension in linewidth of the first conductor is smaller... Agent: Young & Thompson

20070241331 - Electroluminescent device and methods for fabricating the same: Electroluminescent devices and methods for fabricating the same are provided. An exemplary embodiment of an electroluminescent device comprises a substrate. A thin film transistor (TFT) is formed on the substrate. An insulating layer is formed to overlie the TFT and the substrate. An opening is formed in the insulating layer,... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070241332 - Liquid crystal display device: A liquid crystal display device having a liquid crystal display panel includes a first substrate, a second substrate, and liquid crystal interposed between the first and second substrates. The first substrate includes an active element, a first insulating film formed on the active element, a plurality of first electrodes disposed... Agent: Reed Smith LLP

20070241333 - Amorphous silicon thin film transistor, organic light-emitting display device including the same and method thereof: An amorphous silicon thin film transistor, an organic light-emitting display (OLED) device including the same and method thereof are provided. The example amorphous silicon thin film transistor may include an amorphous silicon thin film transistor portion including a gate electrode, a gate insulating layer, an amorphous silicon layer, and source/drain... Agent: Harness, Dickey & Pierce, P.L.C

20070241334 - Thin film transistor, method of manufacturing the thin film transistor, and display device: A thin film transistor according to an embodiment of the present invention includes: a semiconductor layer formed on a substrate and having a first diffusion region, a channel region, and a second diffusion region; a gate electrode opposite to the semiconductor layer across a gate insulating film formed on the... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070241336 - Thin film transistor: In first and second gate electrodes constituting a gate electrode, the gate length of the second gate electrode is set shorter than the gate length of the first gate electrode and short enough to produce the short channel effect. The threshold voltage of a second transistor corresponding to the second... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070241341 - Light reflecting device with stray light extinction capability: A light reflecting device includes: a substrate having front and back surfaces; a light absorbing layer formed on a selected one of the front and back surfaces of the substrate; a buffer layer formed on the light absorbing layer when the light absorbing layer is formed on the front surface... Agent: Mcnees Wallace & Nurick LLC

20070241345 - Semiconductor light-emitting device and method of fabricating the same: The present invention provides a semiconductor light emitting device which includes a multi-layer structure. Additionally, an electrode is disposed on a first surface of the multi-layer structure. Furthermore, the electrode includes a plurality of bonding pads.... Agent: Birch Stewart Kolasch & Birch

20070241346 - Light emitting device and method for producing light emitting device: A light emitting device of the present invention includes: a substrate including wire patterns separated from each other on a basic material and a runner section to which sealing resin is poured, which runner section is a space between the wire patterns; a light emitting element die-bonded on the substrate;... Agent: Morrison & Foerster LLP

20070241347 - Reflection type liquid crystal display apparatus and liquid crystal projector system: In order to suppress the effect due to electrons (holes) generated by incident light that cannot be prevented from entering only by means of light shielding, rather than the drain region 34 of a transistor, with respect to a majority carrier, a region 36 whose voltage is set to a... Agent: Fitzpatrick Cella Harper & Scinto

20070241349 - Semiconductor device with a driver circuit for light emitting diodes: A novel semiconductor device includes a plurality of light emitting diodes, a plurality of transistors, a source pad, and a plurality of wires. The plurality of transistors drive the plurality of light emitting diodes. The source pad is connected to sources of the plurality of transistors and supplies an electric... Agent: Cooper & Dunham, LLP

20070241348 - Semiconductor light emitting device: An excellent light emitting element capable of improving problems caused by a material having high light-reflectivity and susceptible to electromigration, especially Al used for the electrode. FIG. 2A depicts semiconductor light emitting element having a first and second electrodes 20 and 30 disposed at a same surface side respectively on... Agent: Birch Stewart Kolasch & Birch

20070241350 - Light emitting device and fabrication method thereof: Provided are embodiments of a light emitting device and fabrication methods thereof. The light emitting device can include a buffer layer provided between a substrate and a semiconductor layer incorporating a high fusion point metal. In a fabrication method of the light emitting device, the buffer layer incorporating a high... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20070241356 - Semiconductor light emitting device: This invention relates to a semiconductor light-emitting device including a semiconductor light-emitting chip and a transparent carrier. The semiconductor light-emitting chip includes an active layer and transparent substrate. The active layer emits light under a bias. At least a portion of the light emitted from the active layer enters into... Agent: Bacon & Thomas, PLLC

20070241322 - Long wavelength induim arsenide phosphide (inasp) quantum well active region and method for producing same: An InAsP active region for a long wavelength light emitting device and a method for growing the same are disclosed. In one embodiment, the method comprises placing a substrate in an organometallic vapor phase epitaxy (OMVPE) reactor, the substrate for supporting growth of an indium arsenide phosphide (InAsP) film, forming... Agent: Avago Technologies, Ltd.

20070241323 - Trench-edge-defect-free recrystallization by edge-angle-optimized solid phase epitaxy: method and applications to hybrid orientation substrates: Edge-angle-optimized solid phase epitaxy is described as a method for forming hybrid orientation substrates comprising changed-orientation Si device regions free of the trench-edge defects typically seen when trench-isolated regions of Si are recrystallized to the orientation of an underlying single-crystal Si template after an amorphization step. For the case of... Agent: Ibm Corporation, T.j. Watson Research Center

20070241324 - Functional molecular element and functional molecular device: A functional molecular element exhibiting its function under the operation of an electrical field is provided. A compound is used in which a pendant molecule, formed by 4-pentyl-4′-cyanobiphenyl, exhibiting positive dielectric constant anisotropy or a dipole moment along the direction of the long axis of the molecule, is covalently bonded... Agent: Bell, Boyd & Lloyd, LLP

20070241325 - Schottky gate organic field effect transistor and fabrication method of the same: A Schottky gate field effect transistor with high speed and simple structure is provided. The Schottky gate field effect transistor includes: a source, a channel and a drain formed by one organic conductive material, in which the source, channel and drain are formed in a continuous structure within an organic... Agent: Birch Stewart Kolasch & Birch

20070241328 - Process for producing power semiconductor components using a marker: A power semiconductor component and process for producing power semiconductor components is disclosed. In one embodiment, a power semiconductor component is produced, including applying a semiconductor ship to a substrate using a fluorescent marker substance.... Agent: Dicke, Billig & Czaja

20070241330 - Semiconductor integrated circuit device and manufacture thereof: In a semiconductor integrated circuit device, testing pads (209b) using a conductive layer, such as relocation wiring layers (205) are provided just above or in the neighborhood of terminals like bonding pads (202b) used only for probe inspection at which bump electrodes (208) are not provided. Similar testing pads may... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070241335 - Methods of fabricating semiconductor integrated circuits using selective epitaxial growth and partial planarization techniques and semiconductor integrated circuits fabricated thereby: Methods of fabricating a semiconductor integrated circuit having thin film transistors using an SEG technique are provided. The methods include forming an inter-layer insulating layer on a single-crystalline semiconductor substrate. A single-crystalline semiconductor plug extends through the inter-layer insulating layer, and a single-crystalline epitaxial semiconductor pattern is in contact with... Agent: Marger Johnson & Mccollom, P.C.

20070241337 - Nitride semiconductor device: In a nitride semiconductor device according to one embodiment of the invention, a p-type gallium nitride (GaN) layer electrically connected to a source electrode and extending and projecting to a drain electrode side with respect to a gate electrode is formed on an undoped or n-type aluminum gallium nitride (AlGaN)... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070241338 - Sic semiconductor device and method for manufacturing the same: A SiC semiconductor device includes: a SiC substrate having a drain layer, a drift layer and a source layer stacked in this order; multiple trenches penetrating the source layer and reaching the drift layer; a gate layer on a sidewall of each trench; an insulation film on the sidewall of... Agent: Posz Law Group, PLC

20070241339 - Light-emitting diode with low thermal resistance: A light-emitting diode (LED) structure providing an improved heat transfer path with a lower thermal resistance than conventional LEDs without significantly deviating from the conventional dimensions is described. For some embodiments, a light-emitting diode structure is illustrated that includes a lead frame that is substantially exposed for low thermal resistance... Agent: Patterson & Sheridan, L.L.P.

20070241340 - Micro-mirror based display device having an improved light source: A display device includes one or more light emitting diodes (LEDs) configured to emit light and a spatial light modulator comprising one or more tiltable micro mirrors each configured to receive the light emitted from the one or more LEDs and reflect the emitted light in two or more directions.... Agent: Fish & Richardson P.C.

20070241343 - Photo coupler: A photo coupler includes a semiconductor laser, a semiconductor light-receiver, a resin protector, a reflective film, a light pipe, and electrodes. The light pipe is made of resin, has a rectangular parallelepiped shape, and is provided so as to surround an outer circumferential portion of the semiconductor light-receiver. On a... Agent: Mcdermott Will & Emery LLP

20070241342 - Semiconductor light emitting device: In at least one aspect, a semiconductor light emitting device may include a f