Active solid-state devices (e.g., transistors, solid-state diodes) inventions 09/07

20070221907 - Light emitting device having vertical structure and mehod for manufacturing the same: A light emitting device having a vertical structure and a method for manufacturing the same, which are capable of increasing light extraction efficiency, are disclosed. The method includes forming a light extraction layer on a substrate, forming a plurality of semiconductor layers on the light extraction layer, forming a first... Agent: Mckenna Long & Aldridge LLP

20070221915 - Compound for organic electroluminescence and organic electroluminescent device: l

20070221916 - Organic semiconductor formulation: This invention relates to an organic semiconductor formulation comprising one or more surfactants and to its use in electrically conducting, photoconducting and semiconducting components and devices.... Agent: Millen, White, Zelano & Branigan, P.C.

20070221922 - Layer-stacked wiring and method for manufacturing same and semiconductor device using same and method for manufacturing semiconductor device: A layer-stacked wiring made up of a microcrystalline silicon thin film and a metal thin film is provided which is capable of suppressing an excessive silicide formation reaction between the microcrystalline silicon thin film and metal thin film, thereby preventing peeling of the thin film. In a polycrystalline silicon TFT... Agent: Young & Thompson

20070221923 - Array substrate and method of manufacturing the same: A method of manufacturing an array substrate comprising forming a plurality of scanning lines, a plurality of signal lines and a plurality of switching elements on a substrate, forming an under layer having a plurality of color layers overlapping the scanning lines, the signal lines and the switching elements, a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070221928 - Light emitting diode package: A light emitting diode package which is superior in heat radiation and easily manufacturable. In the light emitting diode package, an Al substrate has a reflective cup formed thereon. At least one light emitting diode chip is disposed on a bottom surface of the reflective cup. An Al anodized film... Agent: Mcdermott Will & Emery LLP

20070221927 - Light-emitting diode and method for manufacturing the same: A light-emitting diode (LED) and a method for manufacturing the same are described. The method for manufacturing the LED comprises the following steps. An illuminant epitaxial structure is provided, in which the illuminant epitaxial structure has a first surface and a second surface on opposite sides, and a substrate is... Agent: Kinney & Lange, P.A.

20070221929 - Semiconductor light-emitting device and fabrication method thereof: A semiconductor light-emitting device is disclosed. The semiconductor light-emitting device comprises a multilayer epitaxial structure disposed on a semiconductor substrate. The semiconductor substrate has a predetermined lattice direction perpendicular to an upper surface thereof, wherein the predetermined lattice direction is angled toward [0ī1] or [01ī] from [100], or toward [011]... Agent: Birch Stewart Kolasch & Birch

20070221925 - Semiconductor white light sources: Semiconductor white light sources presented herein include special combinations of a blue source and a yellow source where these light fields are substantially overlapped. The source of blue light includes a blue emitting semiconductor operating in a conventional manner. However, this blue light source is combined with a special yellow... Agent: Acol Technologies S.a.

20070221932 - Method of fabricating nitride-based semiconductor light-emitting device and nitride-based semiconductor light-emitting device: A method of fabricating a nitride-based semiconductor light-emitting device capable of suppressing reduction of characteristics and a yield is obtained. This method of fabricating a nitride-based semiconductor light-emitting device comprises steps of forming a groove portion on a nitride-based semiconductor substrate by selectively removing a prescribed region of a second... Agent: Ndq&m Watchstone LLP

20070221935 - Package structure of light-emitting diode: A package structure of a light-emitting diode (LED) comprises a package carrier, an LED die mounted and electrically connected to the package carrier, a molding compound covering the package carrier and the LED die, and two electrodes disposed on opposite end portions of the molding component. A reflecting layer is... Agent: Oliff & Berridge, PLC

20070221941 - Backlight unit equipped with light emitting diodes: Disclosed herein is a backlight unit equipped with LEDs. The backlight includes an insulating substrate, a plurality of LED packages, an upper heat dissipation plate, and a lower heat dissipation plate. The insulating substrate is provided with predetermined circuit patterns. The LED packages are mounted above the insulating substrate, and... Agent: Mcdermott Will & Emery LLP

20070221942 - Led backlight unit without printed circuit board and method of manufacturing the same: Disclosed herein is a Light Emitting Diode (LED) backlight unit without a Printed Circuit board (PCB). The LED backlight unit includes a chassis, insulating resin layer, and one or more light source modules. The insulating resin layer is formed on the chassis. The circuit patterns are formed on the insulating... Agent: Mcdermott Will & Emery LLP

20070221940 - Led device and production method thereof: An LED device includes an LED chip die-bonded to a frame with a die-bonding material, wherein the die-bonding material contains Ag, a fine white powder, and solder particles. The LED device is superior in both reflectance and bonding strength because of the use of the die-bonding material.... Agent: Rohm Co., Ltd. C/o Keating & Bennett, LLP

20070221906 - Phase-changeable memory devices including nitrogen and/or silicon dopants: A phase-changeable memory device includes a substrate having a field effect transistor therein and a phase-changeable material electrically coupled to a source region of the field effect transistor. The phase-changeable material includes a chalcogenide composition containing at least germanium, bismuth and tellurium and at least one dopant selected from a... Agent: Myers Bigel Sibley & Sajovec

20070221905 - Reduced power consumption phase change memory and methods for forming the same: Memory cells for reduced power consumption and methods for forming the same are provided. A memory cell has a layer of phase change material. A first portion of the phase change material layer includes the programmable volume of the memory cell and its crystalline state has a higher resistivity than... Agent: Dickstein Shapiro LLP

20070221908 - Semiconductor light emitter: A semiconductor light emitter includes a quantum well active layer which includes nitrogen and at least one other Group-V element, and barrier layers which are provided alongside the quantum well active layer, wherein the quantum well active layer and the barrier layers together constitute an active layer, wherein the barrier... Agent: Dickstein Shapiro LLP

20070221909 - Optical device with quantum well: An optical device with a quantum well is provided. The optical device includes an active layer made of a Group III-V semiconductor compound and having a quantum well of a bandgap grading structure in which conduction band energy and valence band energy change linearly with a slope with the content... Agent: Buchanan, Ingersoll & Rooney PC

20070221913 - Aromatic imide-based dispersant for carbon nanotubes and carbon nanotube composition comprising the same: Disclosed herein are an aromatic imide-based dispersant for CNTs and a carbon nanotube composition comprising the same. Having an aromatic ring structure advantageously realizing adsorption on carbon nanotubes, the dispersant, even if used in a small amount, can disperse a large quantity of carbon nanotubes.... Agent: Cantor Colburn, LLP

20070221914 - Electronic devices comprising organic semiconductors: The present invention describes organic electronic devices in which at least one organic layer off low refractive index is introduced. The light output of the electronic devices is thereby improved.... Agent: Connolly Bove Lodge & Hutz, LLP

20070221910 - Intermediate layer in electroluminescent arrangements and electroluminescent arrrangement: An intermediate layer (11) comprises a basic material such as a conductive polymer that taken alone still absorbs some light. Combined with colloidal particles (12) the intermediate layer (11) becomes almost fully transparent. An electroluminescent arrangement with an intermediate layer (11) that is almost fully transparent because of colloidal particle... Agent: Philips Intellectual Property & Standards

20070221917 - Method of preparing nanowire(s) and product(s) obtained therefrom: The present invention provides a method of preparing at least one nanowire comprising the steps of: (a) providing at least one nanotemplate and at least one electrically conductive element in contact with the nanotemplate; (b) providing at least one organic linker, the organic linker having a first end and a... Agent: Dickstein Shapiro LLP

20070221918 - Organic thin-film transistor manufacturing method, organic thin-film transistor, and organic thin-film transistor sheet: An organic thin-film transistor is disclosed. The transistor may include a substrate, a gate electrode, a gate insulating layer, an organic semiconductor layer protective layer, a source electrode, and a drain electrode, wherein a layer formed on the organic semiconductor layer may have a light transmittance of not more than... Agent: Cantor Colburn, LLP

20070221911 - Polymer optoelectronic device and methods for making the same: The invention relates to a polymer optoelectronic device comprising at least a transparent conductive oxide layer, an active polymer layer, a back electrode layer and a substrate layer, wherein the transparent conductive oxide (TCO) layer has a controlled surface structure which is characterised by having an X-value in the range... Agent: Nixon & Vanderhye, PC

20070221912 - Stacked organic light emitting device having high efficiency and high brightness: A stacked organic light emitting device that includes an anode connected to an external power source, a cathode connected to the external power source, at least two light emitting sections aligned between the anode and the cathode, including a light emitting layer, and an internal electrode aligned between the light... Agent: Mckenna Long & Aldridge LLP

20070221919 - Diode with lead terminal for solar cell: The object of the present invention is to provide a diode that acts as a cell string bypass diode or a reverse-current preventive diode, has excellent heat dissipativity, and are preferably sealed integrally in a solar cell module. An N terminal 11 has an N substrate part 12 having an... Agent: Kanesaka Berner And Partners LLP

20070221920 - Semiconductor component having test pads and method and apparatus for testing same: A semiconductor component having test pads and a method and apparatus for testing the same is described. In an example, an un-bumped substrate is obtained having a pattern of bond pads configured to support bumped contacts and a plurality of test pads. Each of the plurality of test pads is... Agent: Xilinx, Inc Attn: Legal Department

20070221921 - Photodiode: An optical diode 21 of the present invention comprises a cholesteric liquid crystal (CLC) layer 2 having a selective reflection wavelength band with a left-handed helical structure, and a phase shifter 24 for changing the phase difference between two intrinsic polarized light components of left-handed circularly polarized light having a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070221924 - Semiconductor devices: A silicon carbide semiconductor device such as JFET, SIT and the like is provided for accomplishing a reduction in on-resistance and high-speed switching operations. In the JFET or SIT which turns on/off a current with a depletion layer extending in a channel between a gate region formed along trench grooves,... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070221926 - Passivating layer for flexible electronic devices: An electronic device which comprises a first electrode, a second electrode, an active polymer layer between the first and the second electrodes, and a passivating layer adapted to enhance the lifetime of the electronic device. The passivating layer comprises a substantially amorphous titanium oxide having the formula of TiOx where... Agent: Foley & Lardner LLP

20070221930 - Apparatus comprising a single photon photodetector having reduced afterpulsing and method therefor: A single-photon detector is disclosed that provides reduced afterpulsing without some of the disadvantages for doing so in the prior art. An embodiment of the present invention provides a stimulus pulse to the active area of an avalanche photodetector to stimulate charges that are trapped in energy trap states to... Agent: Demont & Breyer, LLC

20070221931 - Optoelectronic semiconductor device and light signal input/output device: A optoelectronic semiconductor device, mountable on and electrically connectable to an electro-optical wiring board, a substrate thereof having a light input/output through-hole and electric connection through-holes, the light input/output through-hole being not formed in a stressed area of the circuit wiring board, but formed in a non-stressed area of the... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070221934 - Light emitting diode lamp: The present invention relates to an LED lamp including a pair of lead terminals 2 and 3, a cup portion 8 formed at an end of one of the lead terminals by denting the end and having a conical inner peripheral surface serving as a light-reflective surface 9, an LED... Agent: Hamre, Schumann, Mueller & Larson, P.C.

20070221933 - Light-emitting element and method of manufacturing the same, and light-emitting device using the light-emitting element: It is an object of the present invention to provide a light-emitting element and a light-emitting device, in which a plurality of electroluminescent layers are stacked with a charge generation layer interposed therebetween between a pair of electrodes that are opposed to each other, and for which the charge generation... Agent: Eric Robinson

20070221936 - Light-emitting-diode chip comprising a sequence of gan-based epitaxial layers which emit radiation and a method for producing the same: A light-emitting diode chip (1) comprises a GaN-based, radiation-emitting epitaxial layer sequence (3), an active region (19), an n-doped layer (4) and a -doped layer (5). The p-doped layer (5) is provided, on its main surface (9)facing away from the active region (19), with a reflective contact metallization (6)comprising a... Agent: Fish & Richardson PC

20070221939 - Optically reliable nanoparticle based nanocomposite hri encapsulant, photonic waveguiding material and high electric breakdown field strength insulator/encapsulant: An optically reliable high refractive index (HRI) encapsulant for use with Light Emitting Diodes (LED's) and lighting devices based thereon. This material may be used for optically reliable HRI lightguiding core material for polymer-based photonic waveguides for use in photonic-communication and optical-interconnect applications. The encapsulant includes treated nanoparticles coated with... Agent: William L. Botjer

20070221937 - Semiconductor light emitting apparatus and its manufacturing method: A semiconductor light emitting apparatus comprises: a semiconductor light emitting device; resin that seals the semiconductor light emitting device; and antireflective coating provided on a surface of the resin. The antireflective coating is made of material having an intermediate refractive index between the refractive index of the resin and the... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070221938 - Warm white lamps with customizable cri: Light emitting apparatuses including warm white LED based lights including a semiconductor light source and a phosphor material including a yellow emitting phosphor, a red emitting phosphor, and, optionally, at least one of a green, blue or green-blue emitting phosphor.... Agent: Fay Sharpe LLP

20070221943 - Backlight device and display device: It is an object to manufacture a highly reliable backlight device with less color unevenness and less luminance unevenness, and a high-performance and highly reliable display device including the backlight device, which can display a high quality image. A light emitting diode (LED) is used as a light source of... Agent: Cook, Alex, Mcfarron, Manzo, Cummings & Mehler Ltd

20070221944 - Light emitting diodes and fabrication methods thereof: A light emitting diode (LED)) may be disclosed. The LED may include a light-emitting side. The LED may also include a first electrode disposed on the light-emitting side. The LED may also include a second electrode. The LED may also include a semiconductor element disposed between the first electrode and... Agent: Ipsg, P.C.

20070221945 - Light-emitting element, display device, and electronic appliance: An object is to provide an inorganic light-emitting element capable of low-voltage driving. Moreover, another object is to provide a display device and an electronic appliance with low power consumption by using this light-emitting element. The light-emitting element includes a layer containing a light-emitting substance and an electron supplying layer... Agent: Fish & Richardson P.C.

20070221946 - Compound semiconductor light-emitting device: This pn-junction compound semiconductor light-emitting device includes a crystal substrate; an n-type light-emitting layer formed of a hexagonal n-type Group III nitride semiconductor and provided on the crystal substrate; a p-type Group III nitride semiconductor layer formed of a hexagonal p-type Group III nitride semiconductor and provided on the n-type... Agent: Sughrue Mion, PLLC

20070221948 - Group iii nitride semiconductor thin film and group iii semiconductor light emitting device: A group III nitride semiconductor thin film and a group III nitride semiconductor light emitting device using the same. The group III nitride semiconductor thin film includes a substrate with a concave and convex portions formed thereon; a buffer layer formed on the substrate and made of a group III... Agent: Mcdermott Will & Emery LLP

20070221947 - High-refractive index materials comprising semiconductor nanocrystal compositions, methods of making same, and applications therefor: A high-refractive index material that includes semiconductor nanocrystal compositions. The high-refractive index material has at least one semiconductor nanocrystal composition incorporated in a matrix material and has a refractive index greater than 1.5. The semiconductor nanocrystal composition has a semiconductor nanocrystal core of a II-VI, III-V, or IV-VI semiconductor material.... Agent: Kenyon & Kenyon LLP

20070221949 - Power semiconductor devices: This invention generally relates to power semiconductor devices, and in particular to improved thyristor devices and circuits. The techniques we describe are particularly useful for so-called MOS-gated thyristors. We describe a thyristor comprising a plurality of power thyristor devices connected in parallel, each said thyristor device being operable at a... Agent: Tarolli, Sundheim, Covell & Tummino L.L.P.

20070221950 - Semiconductor device and a method for producing the same: A semiconductor device having a substrate; an emitter electrode or source electrode formed on the top surface side of the substrate; a gate electrode formed on the top surface side of the substrate; and a collector electrode or drain electrode formed on the bottom surface side of the substrate. The... Agent: Mcginn Intellectual Property Law Group, PLLC

20070221951 - E-ink display and method for repairing the same: An E-ink display and method for repairing the same is provided. The method is for repairing a thin film transistor array substrate of the E-ink display. The thin film transistor array substrate having a plurality of pixel units is provided initially. Each of the pixel unit includes a thin film... Agent: Sheehan Phinney Bass & Green, PA C/o Peter Nieves

20070221953 - Semiconductor device: A semiconductor device such as a reverse blocking type switching element is provided with a switching element made of a wide band gap semiconductor on the side of a first major plane where a first terminal is formed, while the wide band gap semiconductor is operable at a high voltage... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070221952 - High density trench fet with integrated schottky diode and method of manufacture: A monolithically integrated trench FET and Schottky diode includes a pair of trenches terminating in a first silicon region of first conductivity type. Two body regions of a second conductivity type separated by a second silicon region of the first conductivity type are located between the pair of trenches. A... Agent: Townsend And Townsend And Crew, LLP

20070221954 - Group iii-v nitride-based semiconductor substrate, group iii-v nitride-based device and method of fabricating the same: A group III-V nitride-based semiconductor substrate has: a first layer made of GaN single crystal; and a second layer formed on the first layer, the second layer made of group III-V nitride-based semiconductor single crystal represented by AlxGa1-xN, where 0.9<x≦1, wherein a top surface and a back surface of the... Agent: Foley And Lardner LLP Suite 500

20070221955 - Semiconductor device and method of manufacturing the same: A trench is formed extending from a surface of a hetero semiconductor region of a polycrystal silicon to the drain region. Further, a driving point of the field effect transistor, where a gate insulating film, the hetero semiconductor region and the drain region are adjoined, is formed at a position... Agent: Young & Basile, P.C.

20070221956 - Semiconductor device and method of fabricating the same: A semiconductor device according to one embodiment of the present invention includes: a fin including a buffer layer made of SiGe and formed on a Si layer, and a SiGe layer formed on the buffer layer, the SiGe layer having a Ge concentration corresponding to a Ge concentration of the... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070221957 - Semiconductor integrated circuit device and dummy pattern arrangement method: A semiconductor integrated circuit device according to an embodiment of the present invention includes a functional circuit region including a functional circuit, a dummy region formed in a region other than the functional circuit region, and plural dummy MOSFETs formed in a dummy region and having a dummy gate electrode... Agent: Foley And Lardner LLP Suite 500

20070221958 - Circuit board and manufacturing method thereof, electro-optical device, and electronic apparatus: A circuit board includes: a substrate; source and drain electrodes formed on the substrate; an organic semiconductor layer formed on the source and drain electrodes; a gate insulating layer formed on the organic semiconductor layer; and a gate electrode formed on the gate insulating layer, wherein: the substrate includes a... Agent: Harness, Dickey & Pierce, P.L.C

20070221960 - Semiconductor memory device and manufacturing method thereof: A semiconductor memory device includes: a semiconductor substrate; a first impurity region; a second impurity region; a channel region; a first gate formed on a main surface on a side of the first impurity region; a second gate formed on the main surface on a side of the second impurity... Agent: Mcdermott Will & Emery LLP

20070221959 - Structure and method for fabricating recessed channel mosfet with fanned out tapered surface raised source/drain: A raised source/drain field effect transistor has a surface of a raised source/drain that tapers downward in a direction of a gate electrode that is also included within the field effect transistor. The downward tapered surface is preferably an end surface. Due to the downward taper, the field effect transistor... Agent: Scully Scott Murphy & Presser, PC

20070221961 - Forming a hybrid device: In one embodiment, the present invention includes a hybrid device having a first die including a semiconductor device and a second die coupled to the first die, where the second die includes a magnetic structure. The first die may be a semiconductor substrate, while the second die may be a... Agent: Trop Pruner & Hu, PC

20070221962 - Semiconductor device and method for manufacturing the same: An active region and an isolation region are formed in the surface of a silicon semiconductor substrate having a (100) crystal plane as a principal surface. A gate insulating film and a gate electrode are formed on the active region in this order. A stress control film is formed to... Agent: Mcdermott Will & Emery LLP

20070221963 - Junction field effect transistor, integrated circuit for switching power supply, and switching power supply: A switching power supply has a start-up circuit that includes a field effect transistor (JFET), which has a gate region (a p-type well region) formed in a surface layer of a p-type substrate and a drift region (a first n-type well region). A plurality of source regions (second n-type well... Agent: Rossi, Kimms & Mcdowell LLP.

20070221964 - Field effect device with reduced thickness gate: A semiconductor structure is fabricated with reduced gate capacitance by thinning of a gate electrode to provide a reduced thickness gate electrode. The gate electrode is thinned after forming a spacer layer adjoining the gate electrode. In addition, the height of the spacer layer may also be reduced. The spacer... Agent: Scully Scott Murphy & Presser, PC

20070221970 - Manufacturing method of semiconductor device and semiconductor device: In a manufacturing process of a semiconductor device having a CMISFET, first, a silicon film and a first metal film made of a first metal are reacted with each other through heat treatment, thereby forming a gate electrode of a p-channel type MISFET and a dummy gate electrode of an... Agent: Stanley P. Fisher Reed Smith LLP

20070221971 - Nonvolatile semiconductor memory device: A semiconductor layer having a channel formation region provided between a pair of impurity regions spaced from each other is provided, and a first insulating layer a floating gate, a second insulating layer, and a control gate are provided above the semiconductor layer. The semiconductor material forming the floating gate... Agent: Eric Robinson

20070221968 - Transistor of semiconductor device and method for manufacturing the same: A transistor of a semiconductor device comprises a gate dielectric layer formed over a semiconductor substrate and comprising a hafnium oxide; and a gate electrode formed over the gate dielectric layer.... Agent: Marshall, Gerstein & Borun LLP

20070221965 - Dmos device with sealed channel processing: A method of fabricating an electronic device and a resulting electronic device. The method includes forming a pad oxide layer on a substrate, forming a silicon nitride layer over the pad oxide layer, and forming a top oxide layer over the silicon nitride layer. A first dopant region is then... Agent: Schneck & Schneck

20070221966 - Method for integrally forming an electrical fuse device and a mos transistor: A method for integrally forming a metal-oxide-semiconductor (MOS) device and an electrical fuse device on a semiconductor substrate includes the following steps. An isolation structure is formed on the semiconductor substrate. A dielectric layer is deposited over the isolation structure and the semiconductor substrate. A metal layer is deposited on... Agent: L. Howard Chen, Esq. Kirkpatrick & Lockhart Preston Gates Ellis LLP

20070221972 - Mosfet for synchronous rectification: This invention discloses a new MOSFET device. The MOSFET device has an improved operation characteristic achieved by connecting a shunt FET of low impedance to the MOSFET device. The shunt FET is to shunt a transient current therethrough. The shunt FET is employed for preventing an inadvertent turning on of... Agent: Bo-in Lin

20070221967 - Semiconductor device and method for forming the same: A semiconductor device may include a semiconductor substrate having a first dopant type. A first semiconductor region within the semiconductor substrate may have a plurality of first and second portions (44, 54). The first portions (44) may have a first thickness, and the second portions (54) may have a second... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20070221969 - Semiconductor device and method of manufacturing the same: In a semiconductor device of the present invention, an N type epitaxial layer is formed on a P type silicon substrate. In the epitaxial layer, P type diffusion layers as a base region, N type diffusion layers as collector regions and an N type diffusion layer as an emitter region... Agent: Fish & Richardson P.C.

20070221973 - Solid-state imaging device and method for manufacturing the same: A solid-state imaging device includes: a plurality of photodiodes arranged in a matrix on a semiconductor substrate 1 for storing a signal charge converted from incident light; MOS transistors for reading the signal charge stored in the photodiode, an element isolation region for isolating the photodiode from the MOS transistors,... Agent: Hamre, Schumann, Mueller & Larson P.C.

20070221975 - Bipolar switching pcmo capacitor: A multi-layer PrxCa1-xMnO3 (PCMO) thin film capacitor and associated deposition method are provided for forming a bipolar switching thin film. The method comprises: forming a bottom electrode; depositing a nanocrystalline PCMO layer; depositing a polycrystalline PCMO layer; forming a multi-layer PCMO film with bipolar switching properties; and forming top electrode... Agent: Sharp Laboratories Of America, Inc. C/o Law Office Of Gerald Maliszewski

20070221974 - Method for forming ferroelectric memory capacitor: A ferroelectric memory capacitor is formed by forming a barrier layer, a first metal layer, a ferroelectric layer, a second metal layer, and a hard mask layer, on dielectric layer (70). Using the patterned hard mask layer (255), the layers are etched to form an etched barrier layer (205), and... Agent: Texas Instruments Incorporated

20070221976 - Trench capacitor and fabrication method thereof: A method of fabricating trench capacitors is provided. A plurality of trenches is formed in the substrate by performing a patterning process with a patterned mask layer on a substrate. A bottom electrode is formed in the substrate of the surface of the trench. A portion of the patterned mask... Agent: Jianq Chyun Intellectual Property Office

20070221977 - Semiconductor device with trench isolation structure and method of manufacturing the same: A semiconductor device has: a substrate provided with a trench; and a device isolation structure formed in the trench. The device isolation structure has: a silicon oxynitride film formed on a surface of the substrate through an interfacial oxide film; and an embedded insulating film formed on the silicon oxynitride... Agent: Mcginn Intellectual Property Law Group, PLLC

20070221978 - Semiconductor device: The semiconductor device comprises a substrate, a semiconductor element mounted on the substrate, a heat diffusion member mounted on the substrate while covering the semiconductor element, and a resin seal for covering the semiconductor element. An integrated capacitor is mounted on the heat diffusion member in an opposed relationship to... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070221980 - One time programmable memory and the manufacturing method thereof: A one time programmable memory including a substrate, a plurality of isolation structures, a first transistor, and a second transistor is provided. The isolation structures are disposed in the substrate for defining an active area. A recess is formed on each of the isolation structures so that the top surface... Agent: Jianq Chyun Intellectual Property Office

20070221981 - Semiconductor memory and semiconductor device with nitride memory elements: A semiconductor memory has a gate electrode and a pair of multilayer memory elements formed on side surfaces of the gate electrode. Each multilayer memory element includes, in sequence from the gate electrode outward, a first silicon oxide layer, a charge trapping silicon nitride layer, a second silicon oxide layer,... Agent: Rabin & Berdo, PC

20070221982 - Semiconductor storage device and method of manufacturing same: The ratio of capacitance between a floating gate and a control gate to total capacitance in a semiconductor storage device is raised and reliability at read-out is improved by adopting a structure comprising select gates disposed on a substrate in first areas; floating gates disposed in second areas adjacent to... Agent: Mcginn Intellectual Property Law Group, PLLC

20070221979 - Method for production of memory devices and semiconductor memory device: At least one memory layer is provided on a substrate surface. A plurality of parallel conductor strips is formed from electrically conductive material above the memory layer. Sidewalls of the conductor strips are provided with spacers of an electrically conductive material.... Agent: Slater & Matsil LLP

20070221985 - Nonvolatile semiconductor memory device: A nonvolatile semiconductor memory device which is superior in writing and charge holding properties, including a semiconductor substrate in which a channel formation region is formed between a pair of impurity regions formed with an interval, and a first insulating layer, a floating gate, a second insulating layer, and a... Agent: Eric Robinson

20070221983 - Dual gate memory with fast erase: An electronic non-volatile memory device comprising a base substrate doped with a source region and a drain region. The base substrate can be, for example, a silicon wafer with implanted source and drain regions. A channel region is disposed between the source region and the drain region with a floating... Agent: Schneck & Schneck

20070221984 - Nonvolatile semiconductor memory device and method for manufacturing same: A nonvolatile semiconductor memory device includes: a semiconductor layer; a gate insulating film provided on the semiconductor layer; a floating gate electrode provided on the gate insulating film; a control gate electrode opposed to an upper face of the floating gate electrode; a first dielectric film interposed between the upper... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070221987 - Split gate type non-volatile semiconductor memory device and method of manufacturing the same: A split gate-type non-volatile semiconductor memory device includes a floating gate having an acute-angled portion between a side surface and an upper surface above a semiconductor substrate; a control gate provided apart from the floating gate to oppose to the acute-angled portion; and an insulating portion provided on the floating... Agent: Foley And Lardner LLP Suite 500

20070221986 - Memory device using quantum dots: A memory device, which includes a memory layer having quantum dots uniformly dispersed in organic material disposed between an upper electrode layer and a lower electrode layer. The memory device is advantageous because it is nonvolatile and inexpensive, and realizes high integration and high speed switching. Further, size and distribution... Agent: Buchanan, Ingersoll & Rooney PC

20070221988 - Charge trapping device and method of producing the charge trapping device: A charge-trapping device includes a field effect transistor, which has source and drain regions. The source and drain regions have a dopant concentration profile, which has a gradient each in a vertical and a lateral direction with respect to a surface of a semiconductor substrate. The gradient in the lateral... Agent: Slater & Matsil LLP

20070221989 - Ultra-low drain-source resistance power mosfet: Ultra-low drain-source resistance power MOSFET. In accordance with an embodiment of the preset invention, a semiconductor device comprises a plurality of trench power MOSFETs. The plurality of trench power MOSFETs is formed in a second epitaxial layer. The second epitaxial layer is formed adjacent and contiguous to a first epitaxial... Agent: Wagner, Murabito & Hao LLP

20070221990 - Grounding front-end-of-line structures on a soi substrate: Structures and a method are disclosed for grounding gate-stack and/or silicon active region front-end-of-line structures on a silicon-on-insulator (SOI) substrate, which may be used as test structures for VC inspection. In one embodiment, a structure includes a grounded bulk silicon substrate having the SOI substrate thereover, the SOI substrate including... Agent: Hoffman, Warnick & D'alessandro LLC

20070221991 - Semiconductor device with increased channel area and decreased leakage current: The semiconductor device includes an active region, a recess channel region including vertical channel structures, a gate insulating film, and a gate structure. The active region is defined by a device isolation structure formed in a semiconductor substrate. The recess channel region is formed in the active region. The vertical... Agent: Heller Ehrman LLP

20070221992 - Castellated gate mosfet device capable of fully-depleted operation: A castellated-gate MOSFET I/O device capable of fully depleted operation is disclosed. The device includes a semiconductor substrate region having an upper portion with a top surface and a lower portion with a bottom surface. A source region and a drain region are formed in the semiconductor substrate region, and... Agent: Law Office Of John L. Isaac

20070221993 - Method for making a thermally stable silicide: A semiconductor device and method of manufacturing are provided that include forming an alloy layer having the formula MbX over a silicon-containing substrate, where Mb is a metal and X is an alloying additive, the alloy layer being annealed to form a metal alloy silicide layer on the gate region... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070221994 - Driver circuit for switching device: A driver circuit that lowers the dependence of the loss in the wide gap semiconductor device upon the temperature is provided. A gate driver circuit for voltage driven power semiconductor switching device includes a power semiconductor switching device, a driver circuit for supplying a drive signal to a gate terminal... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070221995 - Semiconductor device and a method of manufacturing the same: The present invention realizes the miniaturization of a semiconductor device. On a first insulation film, an island-like semiconductor layer and a second insulation film which surrounds the semiconductor layer are formed, and resistance elements (for example, poly-silicon resistance elements) which are formed of a conductive film are arranged to be... Agent: Miles & Stockbridge PC

20070221996 - Cascode circuit and semiconductor device: A reference voltage circuit having a high power supply rejection ratio, and can operate at low voltage is provided. The reference voltage circuit includes a bias circuit constructed such that a depletion type transistor (3) is connected in series to a power supply voltage supply terminal of a load circuit,... Agent: Brinks Hofer Gilson & Lione

20070221997 - Driving circuit to avoid reverse current for soft switching dc motor: A driving circuit includes a power supply, an input capacitor, a Hall sensor, a first amplifier, a second amplifier, a full-bridge driver circuit, and a first operational amplifier. The input capacitor is coupled to the power supply. The input end of the first amplifier and the second amplifier is coupled... Agent: North America Intellectual Property Corporation

20070221998 - Semiconductor integrated circuit device and related method: Embodiments of the invention provide a semiconductor integrated circuit device and a method for fabricating the device. In one embodiment, the method comprises forming a plurality of preliminary gate electrode structures in a cell array region and a peripheral circuit region of a semiconductor substrate; forming selective epitaxial films on... Agent: Volentine & Whitt PLLC

20070222000 - Method of forming silicided gate structure: A method of forming a silicided gate on a substrate having active regions is provided. The method comprises forming silicide in the active regions and a portion of the gate, leaving a remaining portion of the gate unsilicided; forming a shielding layer over the active regions and gate after the... Agent: Duane Morris, LLPIPDepartment

20070221999 - Semiconductor devices and methods of manufacture thereof: A semiconductor device includes a gate electrode, and a source region and a drain region proximate the gate electrode. A silicide region is disposed over a top surface of the gate electrode, the source region, or the drain region. A non-silicide region is disposed proximate the silicide region over an... Agent: Slater & Matsil, L.L.P.

20070222001 - Semiconductor integrated circuit device: Interconnections are formed over an interlayer insulating film which covers MISFETQ1 formed on the principal surface of a semiconductor substrate, while dummy interconnections are disposed in a region spaced from such interconnections. Dummy interconnections are disposed also in a scribing area. Dummy interconnections are not formed at the peripheries of... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070222002 - Intermediate semiconductor device having nitrogen concentration profile: A method for reducing the effective thickness of a gate oxide using nitrogen implantation and anneal subsequent to dopant implantation and activation is provided. More particularly, the present invention provides a method for fabricating semiconductor devices, for example, transistors, which include a hardened gate oxide and which may be characterized... Agent: Trask Britt, P.C./ Micron Technology

20070222003 - Semiconductor device and method of manufacturing the same: According to an aspect of the present invention, there is disclosed a semiconductor device comprising a semiconductor substrate, and a gate insulating film of a P-channel MOS transistor, formed on the semiconductor substrate. The gate insulating film has an oxide film (SiO2), and a diffusion preventive film (BN) containing boron... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070222005 - Integrated circuit having a semiconductor sensor device and method for producing the same: An integrated circuit having a semiconductor sensor device including a sensor housing partly filled with a rubber-elastic composition is disclosed. One embodiment has a sensor chip with sensor region arranged in the interior of the housing. The sensor housing has an opening to the surroundings which is arranged in such... Agent: Dicke, Billig & Czaja

20070222004 - Mems device using nimn alloy and method of manufacture: A material for forming a conductive structure for a MEMS device is described, which is an alloy containing about 0.01% manganese and the remainder nickel. Data shows that the alloy possesses advantageous mechanical and electrical properties. In particular, the sheet resistance of the alloy is actually lower than the sheet... Agent: Jaquelin K. Spong

20070222006 - Micromechanical component and corresponding manufacturing method: A micromechanical component which includes a substrate; a first rigid electrode system situated on or in the substrate; a second electrode system suspended on the substrate; an intermediate space provided between the first electrode system and the second electrode system; the second electrode system being mounted on the suspension post... Agent: Kenyon & Kenyon LLP

20070222009 - Integrated pedestal mount for mems structure: A substrate is provided for supporting a MEMS device. The substrate includes a housing with an integral pedestal mount for supporting the MEMS device. The substrate can be combined with a MEMS device to form a sensor.... Agent: Edell, Shapiro & Finnan, LLC

20070222008 - Method for manufacturing plastic packaging of mems devices and structure thereof: A plastic packaging of MEMS device and a method therefore are provided. The method includes the steps of: provide a carrier having a surface; provide at least one MEMS device having an active surface with a sensitive area and bonding pads thereon and a back surface; proceed a photoresist process... Agent: Workman Nydegger (f/k/a Workman Nydegger & Seeley)

20070222011 - Resonant inertial microsensor with variable thickness produced by surface engineering: p

20070222010 - Semiconductor integrated circuit chip with a nano-structure-surface passivation film and method of fabricating the same: A semiconductor integrated circuit (IC) chip includes an IC chip body and a nano-structure-surface passivation film. The IC chip body has at least one surface. The nano-structure-surface passivation film is formed on the at least one surface. The nano-structure-surface passivation film including nano-particles and a carrier resin protects the IC... Agent: Birch Stewart Kolasch & Birch

20070222007 - Method of manufacturing an electronic device and electronic device: A method for manufacturing a micro-electromechanical systems (MEMS) device, comprising providing a base layer (10) and a mechanical layer (12) on a substrate (14), providing a sacrificial layer (16) between the base layer (10) and the mechanical layer (12), providing an etch stop layer (18) between the sacrificial layer (16)... Agent: Nxp, B.v. Nxp Intellectual Property Department

20070222012 - Semiconductor device: A semiconductor device, including a first region (100) of semiconductor material of a first conductivity type. The semiconductor device comprises an elongated spatial element (111, 112, 113) of semiconductor material of a second conductivity type protruding into a first region (100) of semiconductor material of a first conductivity type; and... Agent: Sughrue Mion, PLLC

20070222013 - Nanoscale volumetric imaging device: The invention provides an imaging device comprised of nanoscale crossbar arrays upon a transmissive medium. The preferred embodiment employs a BOPET film as the transparent material bearing addressable nanoscale arrays, and the arrays connected to leads through micro lithographic techniques, and in turn connected to a logic device. An imaging... Agent: Deborah Neville

20070222014 - Integrated sheet metal forming, assembly and inspection system: An integrated forming, assembly and inspection system includes a plurality of robotic material conveyors. The integrated system also includes a forming subsystem including sheet metal drawing apparatus, a roller hemming subsystem, and an inspection subsystem. The plurality of robotic material conveyors are operable to convey assembly workpieces to and from... Agent: Christopher J. Fildes Fildes & Outland. P.C.

20070222015 - Trench photodetector: Trench type PIN photodetectors are formed by etching two sets of trenches simultaneously in a semiconductor substrate, the wide trenches having a width more than twice as great as the narrow trenches by a process margin; conformally filling both types of trenches with a sacrificial material doped with a first... Agent: International Business Machines Corporation Dept. 18g

20070222016 - Photodetector arrangement, measurement arrangement with a photodetector arrangement and process for operating a measurement arrangement: A photodetector arrangement has a semiconductor body formed of a substrate, a first layer at a first main surface of the semiconductor body, and a second layer at a second main surface of the semiconductor body. The second main surface is remote from the first main surface. A first and... Agent: Roberts, Mlotkowski & Hobbes

20070222017 - Photodetector arrangement, measurement arrangement with a photodetector arrangement and process for operating a measurement arrangement: A photodetector arrangement has a semiconductor body with a substrate, and first, second and third layers. The first layer is located at the first main surface of the semiconductor body which is suited for reception of incident photon radiation which is to be detected. The second layer is located at... Agent: Roberts, Mlotkowski & Hobbes

20070222018 - Forming of the periphery of a schottky diode with mos trenches: A method for forming a component of TMBS type having its periphery formed of a trench with insulated walls filled with a conductor, including the steps of depositing on a semiconductor substrate a thick layer of a first insulating material and a thin layer of a second material; simultaneously digging... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20070222019 - Trench semiconductor device and method of manufacturing it: Consistent with an example embodiment, a reduced surface field effect type (RESURF) semiconductor device is manufactured having a drift region over a drain region. Trenches are formed through openings in mask. A trench insulating layer is deposited on the sidewalls and base of the trenches followed by an overetching step... Agent: Philips Electronics North America Corporation Intellectual Property & Standards

20070222022 - Semiconductor device: A semiconductor device for improving performance of a p-channel transistor and an n-channel transistor having multi-finger structures. Gates of the n-channel transistor are arranged so that their gate width direction is parallel to one side of a first region. Gates of the p-channel transistor are arranged so that their gate... Agent: Ditthavong Mori & Steiner, P.C.

20070222020 - Dram (dynamic random access memory) cells: A DRAM cell with a self-aligned gradient P-well and a method for forming the same. The DRAM cell includes (a) a semiconductor substrate; (b) an electrically conducting region including a first portion, a second portion, and a third portion; (c) a first doped semiconductor region wrapping around the first portion,... Agent: Schmeiser, Olsen & Watts

20070222024 - Integrated circuit and production method: An integrated circuit and a production method is disclosed. One embodiment forms reverse-current complexes in a semiconductor well, so that the charge carriers, forming a damaging reverse current, cannot flow into the substrate.... Agent: Dicke, Billig & Czaja

20070222023 - Integrated circuit having a semiconductor arrangement and method for producing it: An integrated circuit having a semiconductor component arrangement and production method is disclosed. In one embodiment, an oxide layer region is provided as a protection against oxidation in the edge region on the surface region of an underlying semiconductor material region.... Agent: Dicke, Billig & Czaja

20070222021 - Shielded through-via: A shielded through-via that reduces the effect of parasitic capacitance between the through-via and surrounding wafer while providing high isolation from neighboring signals. A shield electrode is formed in the insulating region and spaced apart from the through-via. A coupling element couples at least the time-varying portion of the signal... Agent: Koppel, Patrick & Heybl

20070222025 - Termination for a superjunction device: A superjunction device that includes a termination region having a transition region adjacent the active region thereof, the transition region including a plurality of spaced columns.... Agent: Vishay/siliconix C/o Murabito, Hao & Barnes LLP

20070222026 - Method of manufacturing semiconductor device: A semiconductor device includes a semiconductor substrate having trenches extending thereinto. A trench type insulating film fills the trenches. The trench type insulating film includes a first and second insulating film and is laminated in a portion of the trenches.... Agent: Mcginn Intellectual Property Law Group, PLLC

20070222028 - Efuse and method of manufacturing efuse: A silicide region includes a first contact region, a fuse region having a narrower longitudinal width than that of the first contact region, and a second contact region provided on an opposite side of the fuse region with respect to the first contact region. A non-silicide region is provided at... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070222027 - Electronic fuse elements with constricted neck regions that support reliable fuse blowing: Integrated circuit devices include a substrate and a fuse element on the substrate. The fuse element includes a metal pattern (e.g., dumbell-shaped) having a neck region therein that is sufficiently constricted to enable complete rupture of the neck region when the metal pattern in the fuse element is blown. A... Agent: Myers Bigel Sibley & Sajovec

20070222029 - Semiconductor device having a fuse element: A portion to be melted of a fuse is surrounded by plates, so that heat to be generated in a meltdown portion of the fuse under current supply can be confined or accumulated in the vicinity of the meltdown portion of the fuse. This makes it possible to facilitate meltdown... Agent: Young & Thompson

20070222031 - Capacitor structure: A capacitor structure with a cross-coupling design is provided. In the capacitor structure, conductive lines or electrode plates are coupled together by cross coupling an electrode above or below or aside the other electrode. By cross coupling and fewer vias, the largest capacitance value can be obtained within a minimum... Agent: Jianq Chyun Intellectual Property Office

20070222030 - Low temperature deposition and ultra fast annealing of integrated circuit thin film capacitor: Some embodiments of the invention include thin film capacitors formed on a package substrate of an integrated circuit package. At least one of the film capacitors includes a first electrode layer, a second electrode layer, and a dielectric layer between the first and second electrode layers. Each of the first... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070222032 - Bipolar transistor and method for producing a bipolar transistor: A bipolar transistor has a base, an emitter and an emitter contact. The emitter has a monocrystalline layer and a polycrystalline layer, which are disposed between the base and the emitter contact in the mentioned order.... Agent: Maginot, Moore & Beck Chase Tower

20070222033 - Semiconductor device and power amplifier: A semiconductor device 1 includes a plurality of amplifier circuits 2 connected in parallel between an input terminal RFin and an output terminal RFout. Each of the amplifier circuits 2 includes an HBT 3, an oscillation stabilizing circuit 4 connected between the input terminal RFin and a base B of... Agent: Ostrolenk Faber Gerb & Soffen

20070222034 - Graded index silicon geranium on lattice matched silicon geranium semiconductor alloy: A lattice matched silicon germanium (SiGe) semiconductive alloy is formed when a {111} crystal plane of a cubic diamond structure SiGe is grown on the {0001} C-plane of a single crystalline Al2O3 substrate such that a <110> orientation of the cubic diamond structure SiGe is aligned with a <1,0,−1,0> orientation... Agent: National Aeronautics And Space Administration Langley Research Center

20070222035 - Stress intermedium engineering: Embodiments of the invention provide structures and methods for forming a strained MOS transistor. A stressor layer is formed over the transistor. Embodiments include an intermedium layer between the stressor layer and a portion of the transistor. In an embodiment, the intermedium comprises a layer formed between the stressor layer... Agent: Slater & Matsil, L.L.P.

20070222036 - Semiconductor memory device and methods of manufacturing and operating the same: A semiconductor memory device and methods of manufacturing and operating the same may be provided. The semiconductor memory device may include a substrate, at least a pair of fins protruding from the semiconductor substrate and facing each other with a gap between fins of the pair of fins, an insulating... Agent: Harness, Dickey & Pierce, P.L.C

20070222037 - Semiconductor wafer and method for making the same: A semiconductor wafer includes a plurality of active circuit die areas, each of which being bordered by a dicing line through which the plurality of active circuit die areas are separated from each other by mechanical wafer dicing. WAT pads are disposed along the dicing line. Each of the WAT... Agent: North America Intellectual Property Corporation

20070222038 - Crystalline semiconductor film, semiconductor device, and method for manufacturing thereof: A method for manufacturing is: forming an insulating film over a substrate; forming an amorphous semiconductor film over the insulating film; forming over the amorphous semiconductor film, a silicon nitride film in which a film thickness is equal to or more than 200 nm and equal to or less than... Agent: Nixon Peabody, LLP

20070222039 - Semiconductor device and manufacturing method of a semiconductor device: A semiconductor device includes a multi-layer substrate and a semiconductor element mounted on the multi-layer substrate. The multi-layer substrate contains a plurality of circuit-formation layers joined by a first resin material. The semiconductor element is mounted on the multi-layer substrate by being joined to the multi-layer substrate by a second... Agent: Kratz, Quintos & Hanson, LLP

20070222041 - Chip package: A chip package including a package substrate, a chip, several bonding wires, a flash-resisting ring and a molding compound. The package substrate includes a carrying surface and several contacts disposed on the carrying surface. The chip is disposed on the carrying surface. A surface of the chip away from the... Agent: Birch Stewart Kolasch & Birch

20070222040 - Leadless semiconductor package with electroplated layer embedded in encapsulant and the method for manufacturing the same: A leadless semiconductor package with an electroplated layer embedded in an encapsulant and its manufacturing processes are disclosed. The package primarily includes a half-etched leadframe, a chip, an encapsulant, and an electroplated layer. The half-etched leadframe has a plurality of leads and a plurality of outer pads integrally connected to... Agent: Troxell Law Office PLLC

20070222043 - Semiconductor device and a method of manufacturing the same: A technique is provided for improving the security of information stored in a semiconductor device. Multilayer wiring layers are formed over a semiconductor substrate. Wirings are formed on the uppermost wiring layer among those multilayer wiring layers. On the wirings, there is formed, in the following order, a silicon oxide... Agent: Miles & Stockbridge PC

20070222042 - Semiconductor devices and electrical parts manufacturing using metal coated wires: The device of this invention includes a semiconductor die attached to a bare copper lead frame and electrically coupled to a lead by a metal wire coated with a metallic material. The device would function similarly to devices where the lead frames were coated with other metallic materials, but at... Agent: Hiscock & Barclay, LLP

20070222049 - Package structure and manufacturing method thereof: A package structure and a manufacturing method thereof are provided. The package structure includes a substrate, a chip and a packing material layer. The substrate has a top surface and a lateral surface. The top surface is connected with the lateral surface. The chip is disposed on the top surface.... Agent: Birch Stewart Kolasch & Birch

20070222050 - Package structure and manufacturing method thereof: A stack package includes a printed circuit board; at least two semiconductor chips stacked on the printed circuit board, each having first re-distribution lines formed on the upper surface thereof and connected to bonding pads, through silicon vias which are formed therethrough and connected to the first re-distribution lines, and... Agent: Ladas & Parry LLP

20070222045 - Semiconductor device for chip-on-chip configuration and method for manufacturing the same: A semiconductor device that reduces the size and cost of functional macro chips used in a chip-on-chip configuration. Functional macro chips each include a macro region. The macro regions are formed adjacent to one another. A pad region for testing the functional macro chips is formed surrounding the macro regions.... Agent: Staas & Halsey LLP

20070222047 - Semiconductor package structure: A semiconductor package structure includes a substrate, a first chip, a second chip, a wire, and an encapsulant. The substrate with a cavity has a first surface and a second surface. The cavity penetrates the first surface and the second surface. The first surface and the second surface have a... Agent: Birch Stewart Kolasch & Birch

20070222051 - Stacked semiconductor device: A stacked semiconductor device includes a first semiconductor element bonded on a circuit base. The first semiconductor element is electrically connected to a connection part of the circuit base via a first bonding wire. A second semiconductor element is bonded on the first semiconductor element via a second adhesive layer... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070222046 - Electronic circuit device: An electronic circuit device includes a sub-board disposed upright on a main board. The sub-board is electrically coupled to the main board via a board terminal) disposed at sub-board edge. A semiconductor element is mounted on the sub-board facing the sub-board in parallel. A temperature sensor is also mounted on... Agent: Ratnerprestia

20070222044 - Electronic component and methods to produce an electronic component: An electronic component includes at least one vertical MOSFET device, a leadframe and a contact clip. A source electrode and gate electrode are provided on a lower surface of the MOSFET device and are mounted on a source portion and a gate portion, respectively, of the leadframe. The contact clip... Agent: Baker Botts, L.L.P.

20070222048 - Package structure: A package structure is provided herein. The package structure includes a first substrate and a second substrate. A first seal ring having a first height is disposed around a predetermined area of the first substrate and between the first and second substrates. A second seal ring having a second height... Agent: Lowe Hauptman Berner, LLP

20070222052 - Wiring structure, multilayer wiring board, and electronic device: A wiring structure includes a general signal line, a differential signal line having a pair of signal wiring lines and a reference potential layer. The signal wiring lines respectively transmit differential signals of which waveforms are inverted from each other. The reference potential layer is arranged to have a distance... Agent: Ditthavong Mori & Steiner, P.C.

20070222055 - Method and system for stacking integrated circuits: A design for stacking integrated circuits is described. Some integrated circuits have multiple signal pads that are common between a top integrated circuit and a bottom integrated circuit in an integrated circuit pair. These common pads are placed symmetrically on the integrated circuit. Unique signal pads are provided independently to... Agent: Honeywell International Inc.

20070222054 - Semiconductor components with through wire interconnects: A method for fabricating a semiconductor component with a through wire interconnect includes the step of providing a substrate having a circuit side, a back side, and a through via. The method also includes the steps of: threading a wire through the via, forming a contact on the wire on... Agent: Stephen A. Gratton

20070222053 - Semiconductor constructions having interconnect structures, methods of forming interconnect structures, and methods of forming semiconductor constructions: The invention includes methods of forming semiconductor interconnect structures. A substrate is provided having metal bumps associated with contact pads. A plate having a plurality of cavities containing solder is provided. The metal bumps are inserted into the cavities. The invention includes methods of forming surface-mounting structures. A wafer having... Agent: Wells St. John P.s.

20070222056 - Encapsulated electrical component and production method: A micro-electro-mechanical systems (MEMS) component includes a panel, a chip having an underside containing active component structures, where the chip is mounted on the panel via bumps, a frame structure on the panel and enclosing an installation site of the chip, and a jet-printed structure closing a seam between frame... Agent: Fish & Richardson PC

20070222057 - Perpendicularly oriented electrically active element method and system: Embodiments of the present invention provide an apparatus, a system, and a method, and include a generally rectilinear body having a first surface and a second surface. The second surface is substantially perpendicular to the first surface. An electrically operative element is disposed on the first surface, and has opposite... Agent: Schwabe, Williamson & Wyatt, P.C.

20070222058 - Stitched micro-via to enhance adhesion and mechanical strength: A method for forming a via in an integrated circuit packaging substrate includes embedding an interfacial adhesion layer at a base of a via, and heating the materials at the base of the via. Embedding the interfacial adhesion layer further includes placing a conductive material over the interfacial adhesion layer.... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070222060 - Compact power semiconductor module having a connecting device: A power semiconductor module having a housing, a substrate with conductor tracks and power semiconductor components arranged on the conductor tracks, and a connecting device. The connecting device comprises a film composite with first and second conductive layers, which are respectively patterned and thus form conductor tracks, and an insulating... Agent: Cohen, Pontani, Lieberman & Pavane

20070222059 - Direct power delivery into an electronic package: In some embodiments, direct power delivery into an electronic package is presented. In this regard, a substrate is introduced having a conductive substrate core designed to physically connect with a power cable. Other embodiments are also disclosed and claimed.... Agent: Intel Corporation C/o Intellevate, LLC

20070222061 - Semiconductor module with serial bus connection to multiple dies: The semiconductor module includes a heat spreader and at least two semiconductors coupled thereto. Each of the semiconductors comprises a die containing integrated circuitry and electrical connectors coupled to the die. The module also includes a flexible circuit having opposing first and second sides. The first side of the flexible... Agent: Morgan Lewis & Bockius LLP/rambus Inc.

20070222062 - Electronic parts packaging structure in which a semiconductor chip is mounted on a wiring substrate and buried in an insulation film: The present invention includes the steps of forming a first resin film uncured on a wiring substrate including a wiring pattern, burying an electronic parts having a connection terminal on an element formation surface in the first resin film uncured in a state where the connection terminal is directed upward,... Agent: Kratz, Quintos & Hanson, LLP

20070222063 - Electronic device capable of varying appearance: An electronic device capable of varying appearance includes a first cover, a second cover, and a third cover. The second cover is rotatably connected to the first cover. The third cover is movably connected to the first cover. The third cover is moved relative to the first cover from a... Agent: Quintero Law Office, PC

20070222064 - Thermal paste containment for semiconductor modules: A semiconductor module structure and a method of forming the semiconductor module structure are disclosed. The structure incorporates a die mounted on a substrate and covered by a lid. A thermal compound is disposed within a thermal gap between the die and the lid. A barrier around the periphery of... Agent: Frederick W. Gibb, Iii Gibb & Rahman, LLC

20070222065 - Method for precision assembly of integrated circuit chip packages: An electronic dive and method of fabricating an electronic device. The method including placing a placement guide over a top surface of a module substrate, the placement guide having a guide opening, the guide opening extending from a top surface of the placement guide to a bottom surface of the... Agent: Schmeiser, Olsen & Watts

20070222067 - Dielectric device: The dielectric device includes a substrate, a lower electrode, a dielectric layer, and an upper electrode. The lower electrode is bonded onto the substrate. The dielectric layer is bonded onto the lower electrode. The dielectric layer is obtained through thermal treatment of a film layer formed by spraying of a... Agent: Burr & Brown

20070222068 - Semiconductor device having multilayered interconnection structure formed by using cu damascene method, and method of fabricating the same: Disclosed are a semiconductor device having a multilayered interconnection structure formed by using a Cu damascene method, and a method of fabricating the same. A Cu interconnection is buried on a first barrier metal layer in a trench formed in the surface of an insulating film. An interlayer dielectric film... Agent: Foley And Lardner LLP Suite 500

20070222069 - Semiconductor integrated circuit device: A semiconductor integrated circuit device according to an embodiment of the invention includes: a protective element formed on a semiconductor substrate; and a plurality of wiring layers composed of insulating layers including a layer that is a low dielectric-constant film, and metal lines, in which a metal line in a... Agent: Foley And Lardner LLP Suite 500

20070222070 - Contact piece member, contactor and contact method: In a contactor contact piece members can be arranged at a fine pitch, and a contact can be made surely by a small contact pressure. The contact piece members electrically connect an electronic part to an external circuit. The contact piece member is formed of an electrically conductive material in... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070222066 - Structure and method of forming electrodeposited contacts: A contact metallurgy structure comprising a patterned dielectric layer having cavities on a substrate; a silicide or germanide layer such as of cobalt and/or nickel located at the bottom of cavities; a contact layer comprising Ti or Ti/TiN located on top of the dielectric layer and inside the cavities and... Agent: Connolly Bove Lodge & Hutz LLP (for IBM Yorktown)

20070222071 - Nitrogen rich barrier layers and methods of fabrication thereof: A semiconductor device includes a material layer and a first barrier layer disposed over the material layer. The first barrier layer includes a nitrogen-rich region formed at a top surface of the first barrier layer. A conductor is disposed over the first barrier layer such that the first barrier layer... Agent: Slater & Matsil LLP

20070222072 - Chip package and fabricating method thereof: A chip package including a chip, a package substrate, and a plurality of bumps is provided. The chip has a plurality of chip pads disposed on a surface of the chip. The package substrate has a plurality of first substrate pads, a plurality of second substrate pads, and a surface... Agent: J.c. Patents, Inc. Suite 250

20070222073 - Structure and method to improve current-carrying capabilities of c4 joints: A system and method comprises depositing a dielectric layer on a substrate and depositing a metal layer on the dielectric layer. The system and method further includes depositing a high temperature diffusion barrier metal cap on the metal layer. The system and method further includes depositing a second dielectric layer... Agent: Greenblum & Bernstein, P.L.C

20070222074 - Electric device with vertical component: A method of providing an electric device with a vertical component and the device itself are disclosed. The electric device may be a transistor device, such as a FET device, with a vertical channel, such as a gate around transistor, or double-gate transistor First an elongate structure, such as a... Agent: Philips Intellectual Property & Standards

20070222075 - Wiring material and a semiconductor device having a wiring using the material, and the manufacturing method thereof: An object of the present invention is to realize a semiconductor device having a high TFT characteristic. In manufacturing an active matrix display device, electric resistivity of the electrode material is kept low by preventing penetration of oxygen ion into the electrode in doping of an impurity ion. A display... Agent: Cook, Alex, Mcfarron, Manzo, Cummings & Mehler Ltd

20070222076 - Single or dual damascene structure reducing or eliminating the formation of micro-trenches arising from lithographic misalignment: A semiconductor device is provided that includes a substrate, a lower dielectric layer located on a substrate, and at least one lower conductive interconnect located in the lower dielectric layer. A cap layer is located over the lower conductive interconnect and at least a first dielectric layer is located on... Agent: Mayer & Williams PC

20070222077 - Composite semiconductor device, led head that employs the composite semiconductor device, and image forming apparatus that employs the led head: A composite semiconductor device includes a substrate, a plurality of circuits, a semiconductor thin film layer, and a dummy pattern. The circuits are formed on the substrate, and include one or more wiring layers. The semiconductor thin film layer includes semiconductor elements and is disposed on an uppermost surface of... Agent: Rabin & Berdo, PC

20070222079 - Method of manufacturing wiring substrate, and liquid ejection head manufactured by same: The method of manufacturing a wiring substrate includes the steps of: forming a photocatalyst containing layer which is made of a material containing a photocatalytic material, on a substrate made of an insulating material; forming a resin layer in regions other than wire regions on the photocatalyst containing layer; radiating... Agent: Birch Stewart Kolasch & Birch

20070222078 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a first copper-containing conductive film formed on a substrate, insulating films formed on the first copper-containing conductive film with a concave portion reaching the first copper-containing conductive film, a second barrier insulating film formed to cover the side wall of the concave portion of these insulating... Agent: Young & Thompson

20070222080 - Semiconductor device and a method of manufacturing the same and designing the same: There is provided a technique for improving the flatness at the surface of members embedded in a plurality of recesses without resulting in an increase in the time required for the manufacturing processes. According to this technique, the dummy patterns can be placed up to the area near the boundary... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070222082 - Semiconductor integrated circuit device: A semiconductor integrated circuit device of improved wireability, fewer number of wiring layers and strengthened power supply includes a plurality of power pads placed on a semiconductor chip and a plurality of signal pads placed on the semiconductor chip and configured to have a width less than that of the... Agent: Young & Thompson

20070222081 - Surface treatment of inter-layer dielectric: When an interconnect structure is built on porous ultra low k (ULK) material, the bottom of the trench and/or via is usually damaged by a following metallization process which may be suitable for dense higher dielectric materials. Embodiment of the present invention may provide a method of forming an interconnect... Agent: International Business Machines Corporation Dept. 18g

20070222083 - Rf and mmic stackable micro-modules: A new method to form shielded vias with microstrip ground plane in the manufacture of an integrated circuit device is achieved. The method comprises, first, providing a substrate. The substrate is etched through to form holes for planned shielded vias with microstrip ground plane. A first dielectric layer is formed... Agent: Saile Ackerman LLC

20070222084 - Device for avoiding parasitic capacitance in an integrated circuit package: An integrated circuit package substrate includes a first and an additional electrically conductive layer separated from each other by an electrically insulating layer, a contact pad formed in the first electrically conductive layer for making a direct connection between the integrated circuit package substrate and a printed circuit board, and... Agent: Lsi Corporation

20070222085 - Semiconductor device and fabrication process thereof: A semiconductor device includes a mount substrate and a semiconductor chip mounted upon the mount substrate via a metal bump, wherein metal bump includes an inner part joined to the semiconductor chip and an outer part covering the inner part, the outer part having an increased hardness as compared with... Agent: Kratz, Quintos & Hanson, LLP

20070222087 - Semiconductor device with solderable loop contacts: A method of easily manufacturing reliable solder contacts on semiconductor dies are made in the shape of a loop made from metal wires or ribbons that may be coated with other solderable metals. The loops can be in multi loop form, single loop forms or both on the semiconductor die.... Agent: Hiscock & Barclay, LLP

20070222086 - On-die bond wires system and method for enhancing routability of a redistribution layer: An integrated circuit includes a first die and a second die positioned in a package. The first die has a redistribution layer formed on the die and including a plural