Active solid-state devices (e.g., transistors, solid-state diodes) inventions 08/07

20070200108 - Storage node, phase change random access memory and methods of fabricating the same: A storage node, a phase change random access memory having an improved structure to improve adhesion of a phase change material layer and methods of fabricating the same are provided. The storage node may include a bottom electrode, a top electrode, a phase change material layer inserted between the bottom... Agent: Harness, Dickey & Pierce, P.L.C

20070200126 - Method of manufacturing nitride semiconductor light emitting device: An object is to provide a method of manufacturing a nitride semiconductor light emitting device having high light emission output and allowing decrease in forward voltage (Vf). The invention is directed to a method of manufacturing a nitride semiconductor light emitting device including at least an n-type nitride semiconductor, a... Agent: Morrison & Foerster LLP

20070200109 - Method for the manufacture of a piezoelectric component: A method for the determination of the arrangement of electrodes in the manufacture of a piezoelectric component, in particular of a piezoactuator, comprises the steps of making available of a base body consisting of a multilayer structure of at least one piezoelectric ceramic layer and at least two electrodes, wherein... Agent: Delphi Technologies, Inc.

20070200110 - Methods of making semiconductor-based electronic devices on a wire and articles that can be made thereby: Strands of active electronic devices (AEDs), such as field-effect transistors, are made by processing a semiconductor substrate so that it yields a number of elongate semiconductor members liberated from the starting substrate. The elongate semiconductor members are secured to wires or wire-like structures so as to form semiconductor-member-on-a-wire composites upon... Agent: Downs Rachlin Martin PLLC

20070200111 - Image display device: An additional circuit is formed on a glass substrate, and a passivation film is deposited thereon. After an insulation film is deposited on the passivation film, a contact hole is formed, and a signal line is deposited and connected to the additional circuit. After the signal line and the insulation... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070200112 - Light-emitting device: It is an object of the present invention to provide a light-emitting device with high current efficiency and high display quality, in which a change in luminance with time is suppressed. The light-emitting device is provided with a plurality of light-emitting elements in each of which a plurality of light-emitting... Agent: Cook, Alex, Mcfarron, Manzo, Cummings & Mehler Ltd

20070200113 - Semiconductor device and fabrication method thereof: This invention provides a semiconductor device having high operation performance and high reliability. An LDD region 707 overlapping with a gate wiring is arranged in an n-channel TFT 802 forming a driving circuit, and a TFT structure highly resistant to hot carrier injection is achieved. LDD regions 717, 718, 719... Agent: Eric Robinson

20070200114 - Compound semiconductor device, production method of compound semiconductor device and diode: A compound semiconductor device includes hexagonal silicon carbide crystal substrate and a boron-phosphide-based semiconductor layer formed on the silicon carbide crystal substrate, wherein the silicon carbide crystal substrate has a surface assuming a {0001} crystal plane, and the boron-phosphide-based semiconductor layer is composed of a {111} crystal stacked on and... Agent: Sughrue Mion, PLLC

20070200115 - High power silicon carbide (sic) pin diodes having low forward voltage drops: Silicon Carbide (SiC) PiN Diodes are provided having a reverse blocking voltage (VR) from about 3.0 kV to about 10.0 kV and a forward voltage (VF) of less than about 4.3 V.... Agent: Elizabeth A. Stanek Myers Bigel Sibley & Sajovec, P.A.

20070200116 - Silicon carbide dimpled substrate: A dimpled substrate and method of making including a substrate of high thermal conductivity having a first main surface and a second main surface opposite the first main surface. Active epitaxial layers are formed on the first main surface of the substrate. Dimples are formed as extending from the second... Agent: Volentine & Whitt PLLC

20070200117 - Silicon carbide semiconductor device having junction field effect transistor and method for manufacturing the same: A silicon carbide semiconductor device includes a substrate and a junction field effect transistor. The transistor includes: a first semiconductor layer disposed on the substrate; a first gate layer disposed on a surface of the first semiconductor layer; a first channel layer adjacent to the first gate layer on the... Agent: Posz Law Group, PLC

20070200119 - Flip-chip led package and led chip: A light emitting diode (LED) chip mainly includes a substrate, a first type doped semiconductor layer, light-emitting layers, second type doped semiconductor layers, a first electrode and second electrodes. The first type doped semiconductor layer is disposed on the substrate and includes protrusions which is upward extended; the light-emitting layers... Agent: Jianq Chyun Intellectual Property Office

20070200118 - Led light confinement element: An optical assembly includes a reflective layer, an optical element covering at least a portion of the reflective layer, and an LED having a light-emitting axis and disposed to emit light between the optical element and the reflective layer. The optical element has a rotationally symmetric funnel-shaped recess in substantial... Agent: 3m Innovative Properties Company

20070200122 - Light emitting device and method of manufacturing the same: A light emitting device having improved light extraction efficiency is disclosed. The light emitting device includes a nitride semiconductor layer including a first semiconductor layer, an active layer, and a second semiconductor layer, which are sequentially stacked, a portion of the first semiconductor layer being exposed to the outside by... Agent: Birch Stewart Kolasch & Birch

20070200120 - Light emitting diode chip with double close-loop electrode design: An LED chip with double close-loop electrode design includes a substrate, a first-type doped semiconductor layer, a light emitting layer, a second-type doped semiconductor layer, a first electrode and a second electrode. The first-type doped semiconductor layer is disposed on the substrate, the light emitting layer is disposed on the... Agent: Jianq Chyun Intellectual Property Office

20070200121 - Multi-colored led array with improved color uniformity: A backlight uses an array of red, green, and blue LEDs in a mixing chamber. The mixing chamber has reflecting surfaces and a top opening for illuminating LCD layers. The LEDs are arranged in clusters of red, green, and blue LEDs, where there are at least two types of clusters... Agent: Patent Law Group LLP

20070200123 - Organic electroluminescence display device: An organic electroluminescent display (1) including: a substrate (11); and a first organic electroluminescent device part (10) and a second organic electroluminescent device part (20) placed side by side on a surface of the substrate; the first organic electroluminescent device part (10) including at least a light reflective conductive layer... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070200124 - Organic electroluminescent element, display and illuminator: An organic electroluminescent element comprising an anode; a cathode; at least two light emission layers provided between the anode and the cathode; and at least one intermediate layer provided between the two light emission layers, wherein the two light emission layers each comprise the same host compound A; one of... Agent: Cantor Colburn, LLP

20070200125 - Light-emitting device and method for manufacturing the same: A light-emitting element is disclosed that can drive at a low driving voltage and that has a longer lifetime than the conventional light-emitting element, and a method is disclosed for manufacturing the light-emitting element. The disclosed light-emitting element includes a plurality of layers between a pair of electrodes; and at... Agent: Eric Robinson

20070200127 - Power surface mount light emitting die package: A light emitting die package is provided which includes a metal substrate having a first surface and a first conductive lead on the first surface. The first conductive lead is insulated from the substrate by an insulating film. The first conductive lead forms a mounting pad for mounting a light... Agent: D. James Chung Silicon Edge Law Group LLP

20070200132 - Electrical connection for optoelectronic devices: A structure having an optical element thereon has a portion of the structure extending beyond a region having the optical element in at least one direction. The structure may include an active optical element, with the different dimensions of the substrates forming the structure allowing access for the electrical interconnections... Agent: Digital Optics Corporation

20070200130 - Electronic device: An electronic device according to the invention includes a housing, a recess containing an optoelectronic component, and a film including a polyimide, which is over the recess covering the optoelectronic component.... Agent: Fish & Richardson P.C.

20070200128 - Light emitting device: A light emitting apparatus 10 includes an aluminum nitride co-fired substrate 11 and a light emitting device 12 arranged on a front surface of the co-fired substrate, in which the front surface of the aluminum nitride substrate 11 bearing the light emitting device 12 is mirror-polished so as to have... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070200131 - Light emitting device package and method of manufacturing the same: A light emitting device package and a method of manufacturing the same are disclosed. The light emitting device package includes a package structure, two diffusion layers formed on the package structure such that the two diffusion layers are electrically separated from each other, and first and second electrodes insulated from... Agent: Birch Stewart Kolasch & Birch

20070200129 - Transparent positive electrode: An object of the present invention is to provide a positive electrode having high transparency, low contact resistance and excellent current diffusibility and not requiring electron beam irradiation, high-temperature annealing or heat treatment, for alloying, in an oxygen atmosphere. The inventive transparent positive electrode for gallium nitride-based compound semiconductor light-emitting... Agent: Sughrue Mion, PLLC

20070200133 - Led assembly and manufacturing method: An LED assembly including a wiring substrate with an opening at its center; a heat sink housed inside the opening; an LED chip mounted on the heat sink; a connecting section for electrically coupling the LED chip and wiring substrate; and a transparent resin covering the LED chip and connecting... Agent: Mcdermott Will & Emery LLP

20070200134 - Gallium nitride material devices including conductive regions and methods associated with the same: Semiconductor structures comprising a III-nitride (e.g., gallium nitride) material region and methods associated with such structures are provided. In some embodiments, the structures include an electrically conductive material (e.g., gold) separated from certain other region(s) of the structure (e.g., a silicon substrate) by a barrier material in order to limit,... Agent: Wolf Greenfield & Sacks, P.C.

20070200135 - Iii-v group compound semiconductor light-emitting diode: A III-V group compound semiconductor light-emitting diode, containing a substrate 1 having plural crystal planes, and a grown layer formed on the substrate by epitaxial growth, the grown layer at least including a barrier layer 2 and 3 and an active layer 8, wherein at least the active layer of... Agent: Birch Stewart Kolasch & Birch

20070200136 - Isolated zener diodes: The present disclosure relates to isolated Zener diodes (100) that are substantially free of substrate current injection when forward biased. In particular, the Zener diodes (100) include an “isolation tub” structure that includes surrounding walls (150, 195) and a base (130) formed of semiconductor regions. In addition, the diodes (100)... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20070200137 - Dilithium crystal trigger module - solid state: The acquisition of seismic data is increasingly more important in today's modern world. There are many forms of seismic data. Seismic data records are acquired and analyzed for applications ranging from subsurface engineering, environmental and/or water exploration, to deep oil-gas applications. It is very important to understand that for the... Agent: Bret W. Smith

20070200138 - Semiconductor device having igbt and diode: A semiconductor device includes: a semiconductor substrate; a IGBT region including a first region on a first surface of the substrate and providing a channel-forming region and a second region on a second surface of the substrate and providing a collector; a diode region including a third region on the... Agent: Posz Law Group, PLC

20070200139 - Semiconductor device, manufacturing method thereof, and display device: A multi-gate structure is used and a width (d1) of a high concentration impurity region sandwiched by two channel forming regions in a channel length direction is set to be shorter than a width (d2) of low concentration impurity regions in the channel length direction. Thus, a resistance of the... Agent: Nixon Peabody, LLP

20070200140 - Electrostatic protection device for semiconductor circuit for decreasing input capacitance: An electrostatic protection device for a semiconductor circuit for protecting an internal circuit from static electricity applied to the pad includes a first conductivity type semiconductor substrate; second conductivity type diffusion regions formed on the surface of the semiconductor substrate at regular intervals into a dot type; isolation structures formed... Agent: Ladas & Parry LLP

20070200141 - Avalanche photodiode: An ultra high speed APD capable of realizing reduction in an operating voltage and quantum efficiency enhancement at the same time is provided. Under operating conditions APD, a doping concentration distribution of each light absorbing layer is determined so that a p-type light absorbing layer (16) maintains a p-type neutrality... Agent: Workman Nydegger (f/k/a Workman Nydegger & Seeley)

20070200142 - High linear enhancement-mode heterostructure field-effect transistor: The present invention relates to a high linear enhancement-mode heterostructure field-effect transistor. More, the present invention uses an InGaAs channel structure with a linear change, and integrates an adjusting effect of working region corresponding to the threshold voltage of the element. It not only directly provides a complementary structure for... Agent: Rosenberg, Klein & Lee

20070200143 - Nitride semiconductor device: A nitride semiconductor device comprises: a laminated body; a first and second main electrode provided in a second and third region, respectively, adjacent to either end of the first region on the major surface of the laminated body; and a third main electrode. The laminated body includes a first semiconductor... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070200144 - Method for producing partial soi structures comprising zones connecting a superficial layer and a substrate: n

20070200145 - Non-volatile memory device with conductive sidewall spacer and method for fabricating the same: The present invention relates to a non-volatile memory device having conductive sidewall spacers and a method for fabricating the same. The non-volatile memory device includes: a substrate; a gate insulation layer formed on the substrate; a gate structure formed on the gate insulation layer; a pair of sidewall spacers formed... Agent: Mcdermott Will & Emery LLP

20070200146 - Electronic device, method for producing the same, and communication apparatus including the same: An electronic device according to the present invention includes a functional element acting as a predetermined circuit packaged using a resin member. The electronic device comprises a wiring substrate having a wiring member for electric connection with an external circuit; the functional element mounted on one main surface of the... Agent: Wenderoth, Lind & Ponack L.L.P.

20070200147 - Method for manufacturing an optical film, apparatus for manufacturing the same optical film, polarizing plate and image display device: A method for manufacturing an optical film comprising a transparent substrate and at least one functional layer on or above the transparent substrate, wherein said at least one functional layer to be laminated on the transparent substrate is formed by a layer-forming method comprising the following steps (1) and (2):... Agent: Buchanan, Ingersoll & Rooney PC

20070200148 - Element for solid-state imaging device: In an element for a MOS type solid-state imaging device, a leakage current caused by a stress generated in a vicinity of an element isolation region having an STI structure is reduced. The element for the MOS type solid-state imaging device comprises: a signal accumulation region 102, of a second... Agent: Mcdermott Will & Emery LLP

20070200149 - Semiconductor device and method of production: A layer sequence with lateral boundaries, especially a gate electrode stack, comprises a cover layer between a metal layer and a top layer that is provided as a hardmask. The cover layer, which is preferably polysilicon, enables the application of a cleaning agent to remove a resist layer, clean the... Agent: Slater & Matsil LLP

20070200150 - Voltage-controlled semiconductor device: SiC-IGBTs, which have an inversion-type channel with high channel resistance and have high on-voltage due to an influence from the surface state of the interface between a gate insulating film and a base layer, are required to decrease the on-voltage. An embedded collector region is partially formed in a base... Agent: Nixon & Vanderhye, PC

20070200151 - Semiconductor device and method of fabricating the same: A semiconductor device capable of suppressing reduction of the electric characteristics and fluctuation of the threshold voltage resulting from ion implantation is obtained. This semiconductor device comprises a pair of source/drain regions formed on the main surface of a semiconductor region to hold a channel region therebetween and a gate... Agent: Mcdermott Will & Emery LLP

20070200152 - Image sensor with inter-pixel isolation: An image sensor with a plurality of photodiodes that each have a first region constructed from a first type of material and a second region constructed from a second type of material. Located adjacent to the first region and between second regions of adjacent photodiodes is a barrier region. The... Agent: Irell & Manella LLP

20070200153 - Electronic device: According to one embodiment, an electronic device includes a housing including an opening, a button disposed in the opening, a switch contained in the housing and operated by using the button, a wall extending in the housing from that part of the housing which surrounds the opening, a sealing member... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20070200154 - Semiconductor memory device and method for manufacturing semiconductor memory device: A semiconductor memory device includes: a semiconductor substrate; a field effect transistor formed on the semiconductor substrate; a first interlayer dielectric layer formed on the field effect transistor; a first contact plug connected to the field effect transistor through the first interlayer dielectric layer; a ferroelectric capacitor disposed on the... Agent: Harness, Dickey & Pierce, P.L.C

20070200156 - Single-charge tunnelling device: A single-electron transistor (1) has an elongate conductive channel (2) and a side gate (3) formed in a 5 nm-thick layer (4) of Ga0.98Mn0.02As. The single-electron transistor (1) is operable, in a first mode, as a transistor and, in a second mode, as non-volatile memory.... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070200155 - Method of fabricating an integrated electronic circuit with programmable resistance cells: Method of fabricating an integrated electronic circuit with programmable resistance cells, which comprises providing a substrate; forming an inert electrode; forming a solid electrolyte on the inert electrode; forming an interlayer on the solid electrolyte, the interlayer comprising an active electrode material and nitrogen; and forming an active electrode on... Agent: Morrison & Foerster LLP

20070200157 - Semiconductor memory device and manufacturing method thereof: This disclosure concerns a semiconductor memory device comprising a supporting substrate including semiconductor materials; an insulation film provided above the supporting substrate; a first diffusion layer provided on the insulation film; a second diffusion layer provided on the insulation film; a body region provided between the first diffusion layer and... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070200159 - Capacitor having high electrostatic capacity, integrated circuit device including the capacitor and method of fabricating the same: A capacitor may include a first electrode, a second electrode, a low dielectric layer, and/or a high dielectric layer. The first electrode may include at least one first electrode branch. The second electrode may face the first electrode and include at least one second electrode branch. The low dielectric layer... Agent: Harness, Dickey & Pierce, P.L.C

20070200158 - Electrode structure having at least two oxide layers and non-volatile memory device having the same: An electrode structure having at least two oxide layers that more reliably switch and operate without the use of additional devices and a non-volatile memory device having the same are provided. The electrode structure may include a lower electrode, a first oxide layer formed on the lower electrode, a second... Agent: Harness, Dickey & Pierce, P.L.C

20070200160 - Semiconductor device and method of fabricating the same: A semiconductor device includes a semiconductor substrate comprising an active area where a first conductive channel is formed, a gate electrode formed on the active area formed on the semiconductor substrate and a gate dielectric layer interposed between the active area and the gate electrode. The semiconductor device further includes... Agent: F. Chau & Associates, LLC

20070200161 - High performance tapered varactor: Disclosed is a semiconductor structure, which includes a non-planar varactor having a geometrically designed depletion zone with a taper, as to provide improved Cmax/Cmin with low series resistance. Because of the taper, the narrowest portion of the depletion zone can be designed to be fully depleted, while the remainder of... Agent: Scully, Scott, Murphy & Presser, P.C.

20070200163 - Non-volatile electrically alterable memory cell for storing multiple data and manufacturing thereof: A memory cell that includes two control gates disposed laterally between two floating gates where each floating gate is capable of holding data. The memory cell is formed by placing a first polysilicon on a substrate of semiconductor material, on which a well is placed. The control gates are preferably... Agent: Macpherson Kwok Chen & Heid LLP

20070200162 - Reducing dielectric constant for mim capacitor: A memory device having improved sensing speed and reliability and a method of forming the same are provided. The memory device includes a first dielectric layer having a low k value over a semiconductor substrate, a second dielectric layer having a second k value over the first dielectric layer, and... Agent: Slater & Matsil, L.L.P.

20070200165 - Floating gate, a nonvolatile memory device including the floating gate and method of fabricating the same: Example embodiments may provide a nonvolatile memory device. The example embodiment nonvolatile memory device may include a floating gate structure formed on a semiconductor substrate with a gate insulating layer between them and/or a control gate formed adjacent to the floating gate with a tunneling insulation layer between them. The... Agent: Harness, Dickey & Pierce, P.L.C

20070200164 - Single poly embedded memory structure and methods for operating the same: A single poly embedded memory structure comprises an access transistor and a storage device formed on a silicon substrate. The access transistor comprises source and drain diffusion regions implanted in the silicon substrate and a polysilicon control gate formed over the silicon substrate between the source and drain diffusion regions.... Agent: Baker & Mckenzie LLP Patent Department

20070200166 - Semiconductor device and manufacturing method of the same: Disclosed is a method of manufacturing a semiconductor device, including the steps of: forming on a second insulating film a first resist pattern having a first window; employing the first resist pattern as an etching mask to form first openings exposed from contact regions CR; forming, on a second conductive... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070200168 - Monos type nonvolatile memory cell, nonvolatile memory, and manufacturing method thereof: A MONOS type nonvolatile memory cell is structured such that a laminated insulating film which is formed by sequentially laminating a tunnel insulating layer, a charge storage insulating layer, and a charge block insulating layer is provided on a convex curved surface portion of a semiconductor substrate, and a control... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070200167 - Nonvolatile semiconductor storage device and manufacturing method thereof: An object of the present invention is to provide a nonvolatile semiconductor storage device with a superior charge holding characteristic in which highly-efficient writing is possible at low voltage, and to provide a manufacturing method thereof. The nonvolatile semiconductor storage device includes a semiconductor film having a pair of impurity... Agent: Eric Robinson

20070200169 - Gate electrode of semiconductor device and method for fabricating the same: A gate electrode of a semiconductor device according to the present invention includes a substrate, a bulb type recess with an upper recess and a bottom recess, the bottom recess formed in a round shape and having a larger width than the upper recess, a gate insulation layer formed over... Agent: Lowe Hauptman Berner, LLP

20070200170 - Semiconductor device and method of manufacturing the same: A semiconductor device includes an isolation region, a semiconductor element region defined by the isolation region, and having a channel forming portion and a recessed portion, the recessed portion being formed between the isolation region and the channel forming portion, and an epitaxial semiconductor portion formed in the recessed portion,... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070200171 - Seminconductor device and method of manufacturing the same: The invention provides a high voltage MOS transistor having a high gate breakdown voltage and a high source/drain breakdown voltage and having a low on-resistance. A gate electrode is formed on an epitaxial silicon layer with a LOCOS film being interposed therebetween. A P-type first drift layer is formed on... Agent: Morrison & Foerster LLP

20070200176 - Formation of silicided surfaces for silicon/carbon source/drain regions: Formation of a silicide layer on the source/drain regions of a field effect transistor with a channel under tensile strain is disclosed. The strain is originated by the silicon/carbon source/drain regions which are grown by CVD deposition. In order to form the silicide layer, a silicon cap layer is deposited... Agent: Williams, Morgan & Amerson

20070200173 - Embedded substrate interconnect for underside contact to source and drain regions: A semiconductor topography (10) is provided which includes a semiconductor-on-insulator (SOI) substrate having a conductive line (16) arranged within an insulating layer (22) of the SOI substrate. A method for forming an SOI substrate with such a configuration includes forming a first conductive line (16) within an insulating layer (22)... Agent: Larson Newman Abel Polansky & White, LLP

20070200175 - Functional device and method of manufacturing it: A functional device which is composed of a nanometer-sized functional structure, which can reduce connection resistance in connecting the functional structure to an external electrode, and which includes a wiring section capable of minimizing constraints given to structural designs of various functional structures, and a method of manufacturing it are... Agent: Bell, Boyd & Lloyd, LLP

20070200177 - Semiconductor laser device and semiconductor laser device manufacturing method: A semiconductor laser device comprising: an active layer, a semiconductor layer formed on the active layer and having a wurtzite structure, wherein a principal surface of the active layer is substantially perpendicular to a (0001) surface of the semiconductor layer, a current path portion in the semiconductor layer extends along... Agent: Ndq&m Watchstone LLP

20070200174 - Soi substrate, mask blank for charged particle beam exposure, and mask for charged particle beam exposure: The invention provides an SOI substrate 10 comprising on one major surface of a silicon single crystal 13 a silicon thin-film layer 11 via a buried silicon oxide film 12, characterized in that a substrate warp preventive layer 14 is provided on another major surface of the silicon single crystal... Agent: Sughrue Mion, PLLC

20070200172 - Thin film power mos transistor, apparatus, and method: A thin film power transistor includes a plurality of first doped regions over a substrate and a second doped region forming a body. At least a portion of the body is disposed between the plurality of first doped regions. The thin film power transistor also includes a gate over the... Agent: Stmicroelectronics, Inc.

20070200178 - Gate-all-around type of semiconductor device and method of fabricating the same: A gate-all-around (GAA) transistor device has a pair of pillars that include the source/drain regions, a channel region bridging the source/drain regions, and a gate electrode and gate oxide which surround the channel region. The pillars are formed by providing a mono-crystalline silicon substrate, etching the substrate to form a... Agent: Volentine & Whitt PLLC

20070200179 - Strain enhanced cmos architecture with amorphous carbon film and fabrication method of forming the same: A strain enhanced CMOS device using amorphous carbon films and fabrication methods of forming the same. The amorphous carbon (a-C) film, such as fluorinated amorphous carbon (a-C:F), is formed of a tensile film or a compressive film to act a stress capping film on the pMOS device region or the... Agent: Birch, Stewart, Kolasch & Birch, LLP

20070200180 - Double density nrom with nitride strips (ddns): An NVM cell such as an NROM cell is formed using a portion of one ONO stack and an adjacent portion of a neighboring NROM stack. A gate structure is formed between (and atop) the two ONO portions, or “strips” (or “stripes”). This provides having two physically separated charge storage... Agent: Empk & Shiloh, LLP

20070200181 - Buried conductor for imagers: A pixel cell having a photo-conversion device at a surface of a substrate and at least one contact area from which charge or a signal is output or received. A first insulating layer is located over the photo-conversion device and the at least one contact area. The pixel cell further... Agent: Dickstein Shapiro LLP

20070200182 - Memory array structure with strapping cells: A memory array with a row of strapping cells is provided. In accordance with embodiments of the present invention, strapping cells are positioned between two rows of a memory array. The strapping cells provide a P+strap between N+active areas of two memory cells in a column and provide an N+strap... Agent: Slater & Matsil, L.L.P.

20070200183 - Power semiconductor component with a drift zone and a high-dielectric compensation zone and method for producing a compensation zone: A power semiconductor component includes a drift zone in a semiconductor body, a component junction and a compensation zone. The component junction is disposed between the drift zone and a further component zone, which is configured such that when a blocking voltage is applied to the component junction, a space... Agent: Maginot, Moore & Beck Chase Tower

20070200184 - Methods and apparatus for a stepped-drift mosfet: A power metal-oxide-semiconductor field effect transistor (MOSFET) (100) incorporates a stepped drift region including a shallow trench insulator (STI) (112) partially overlapped by the gate (114) and which extends a portion of the distance to a drain region (122). A silicide block extends from and partially overlaps STI (112) and... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20070200185 - Semiconductor device and method for fabricating the same: A high dielectric constant gate insulating film is formed on an active region of a substrate, and a gate electrode is formed on the high dielectric constant gate insulating film. A high dielectric constant insulating sidewall is formed on a side face of the gate electrode.... Agent: Mcdermott Will & Emery LLP

20070200186 - Semiconductor device: A semiconductor device capable of reducing a threshold voltage is obtained. The semiconductor device includes a pair of source/drain regions formed on the main surface of a semiconductor region to hold a channel region therebetween, and a gate electrode formed on the channel region through a gate insulating film and... Agent: Mcdermott Will & Emery LLP

20070200187 - Nanowire device and method of making: A method (40) for fabricating a nanoscale device, includes nano-imprinting (44) a one dimensional nanostructure (20) on a material (12), forming (46) a patterning layer (22, 26) over the one dimensional nanostructure (20) and the material (12), patterning (48) the patterning layer (22, 26) to differentiate an area over the... Agent: Ingrassia Fisher & Lorenz, P.C.

20070200188 - Magnetic random access memory with reference magnetic resistance and reading method thereof: A magnetic random access memory having reference magnetic resistance is provided. The memory includes at least one magnetic memory cell having an antiferromagnet layer, a pinned layer formed thereon, a tunnel barrier layer formed thereon, and a free layer formed thereon. The pinned layer and free layer are arranged orthogonally... Agent: Rabin & Berdo, PC

20070200189 - Semiconductor device and method of manufacturing semiconductor device: Provided is a semiconductor device for performing photoelectric conversion of incident light, including: a p-type substrate (1), an n-type well (2) having a predetermined depth and formed in a predetermined region of the p-type substrate (1), and a depletion layer generated at a junction interface between the p-type substrate (1)... Agent: Bruce L. Adams, Esq.

20070200190 - Substrate unit, cooling device, and electronic device: According to one embodiment, a substrate unit of the present invention comprises a first substrate, a second substrate and a coupling member. The first substrate has a first substrate main body and a circuit component. The second substrate has a second substrate main body, an opening portion provided at the... Agent: Knobbe Martens Olson & Bear LLP

20070200191 - Semiconductor device and method of manufacturing the same: Provided are a semiconductor device having a multilayer wiring structure and a method of manufacturing the semiconductor device having the multilayer wiring structure, including a method of forming an antireflection film. According to the method, no crown is produced in a contact hole, long-term reliability is high, productivity and cost... Agent: Bruce L. Adams, Esq.

20070200192 - Photovoltaic apparatus: A photovoltaic apparatus includes a first photoelectric conversion portion so formed on an insulating surface of a substrate as to cover a first substrate electrode and a second substrate electrode isolated from each other by a first groove, a second photoelectric conversion portion formed on the surface of the first... Agent: Ndq&m Watchstone LLP

20070200194 - Apparatus and method for temperature-interrupting protection of an electric device: A current load of an electric device having a current inlet or current outlet can be protected cost-effectively and efficiently via a contact pad in the current inlet or current outlet when a first conductive material and the second conductive material are connected conductively in the contact pad such that... Agent: Baker Botts, L.L.P.

20070200193 - Component arrangement and method for determining the temperature in a semiconductor component: c

20070200195 - Semiconductor device and method of manufacturing the same: The invention provides a high voltage MOS transistor having a high source/drain breakdown voltage of about 300V and a low on-resistance. An N-type body layer is formed extending from a source layer side to under a gate electrode. A P-type second drift layer is formed in an epitaxial semiconductor layer... Agent: Morrison & Foerster LLP

20070200196 - Shallow trench isolation (sti) devices and processes: Improved shallow trench isolation (STI) techniques are provided for semiconductor devices. For example, in accordance with an embodiment of the present invention, an integrated circuit includes a substrate, a first trench in the substrate, and a second trench in the substrate. A first transistor region in the substrate is adjacent... Agent: Macpherson Kwok Chen & Heid LLP

20070200197 - Mim capacitor: A capacitor formed in an insulating porous material.... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20070200198 - Transistor or triode structure with tunneling effect and insulating nanochannel: A microelectronic device is provided with at least one transistor or triode with Fowler-Nordheim tunneling current modulation, and supported on a substrate. The triode or the transistor includes at least one first block forming a cathode and at least one second block that forming an anode. The first block and... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist P.A.

20070200199 - Semiconductor bulk resistance element: Providing a technology capable of obtaining a desired resistance value through preferable controllability, and improving linearity between voltage and current. A semiconductor bulk resistance element of the present invention comprise a semiconductor chip having a main surface (first main surface), and on the first main surface of a semiconductor resistor... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070200200 - Semiconductor device and method of manufacturing the same: Provided are a semiconductor device including a highly precise resistor formed of a polycrystalline silicon film and a method of manufacturing the same, in which: a portion of a base insulating film below a portion of the polycrystalline silicon film which becomes a resistance region into a convex shape; and... Agent: Bruce L. Adams, Esq.

20070200201 - Structure and method for performance improvement in vertical bipolar transistors: A method of forming a semiconductor device having two different strains therein is provided. The method includes forming a strain in a first region with a first straining film, and forming a second strain in a second region with a second straining film. Either of the first or second strains... Agent: Greenblum & Bernstein, P.L.C

20070200202 - Phase change memory structure having an electrically formed constriction: A PCM structure configurable for use as a nonvolatile storage element includes a first electrode, a first phase change material layer formed on at least a portion of an upper surface of the first electrode, at least one insulating layer formed on an upper surface of the first phase change... Agent: Ryan, Mason & Lewis, LLP

20070200203 - Semiconductor device and method for fabricating the same: A semiconductor device in which selectivity in epitaxial growth is improved. There is provided a semiconductor device comprising a gate electrode formed over an Si substrate, which is a semiconductor substrate, with a gate insulating film therebetween and an insulating layer formed over sides of the gate electrode and containing... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070200204 - Transmission line substrate and semiconductor package: A transmission line substrate includes a spurious-wave suppression circuit in which a divider divides a signal line of a driving control signal connected to a semiconductor device into two signal lines of the same phase. A delay unit is connected to one of the two signal lines, and includes a... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070200205 - Integrated circuit package system including die stacking: An integrated circuit package system including a leadframe with an aperture formed therein. An integrated circuit package is mounted on the leadframe over or under the aperture and a die is mounted within the aperture to the integrated circuit package.... Agent: Ishimaru & Zahrt LLP

20070200206 - Multi-row lead frame: A lead frame (10) for a semiconductor device includes a first row of terminals (12) surrounding a die receiving area (14) and a second row of terminals (16) spaced from and surrounding the first row of terminals (12). The first and second rows of terminals (12, 16) have a first... Agent: Freescale Semiconductor, Inc. Law Department

20070200207 - No lead package with heat spreader: A no-lead electronic package including a heat spreader and method of manufacturing the same. This method includes the steps of selecting a matrix or mapped no-lead lead frame with die receiving area and leads for interconnect; positioning an integrated circuit device within the central aperture and electrically interconnecting the integrated... Agent: Wiggin And Dana LLP Attention: Patent Docketing

20070200208 - Variable-tooth gear with sliding-sheet deforming teeth: A variable-tooth gear with sliding-sheet deforming teeth pertains to the technical fields of gearing, and continuously variable mechanical transmissions. The variable-tooth gear is designed in accordance with “the principle of configuring variable-teeth through infinitely deforming sliding-sheets”. The working surface is composed of a large number of thin sliding-sheets (sliding-needles) superposed... Agent: Hanley, Flight & Zimmerman, LLC

20070200209 - Semiconductor device and heat radiation member: A semiconductor device includes a semiconductor element mounted on a substrate; at least one electronic part arranged around the semiconductor element; and a heat radiation member bonded to a backside of the semiconductor element by a bonding material. The heat radiation member has an isolation part extending between an outer... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070200210 - Methods and apparatus for improved thermal performance and electromagnetic interference (emi) shielding in integrated circuit (ic) packages: Methods and apparatus for improved thermal performance and electromagnetic interference (EMT) shielding in integrated circuit (IC) packages is described. A die-up or die-down package includes a heat spreader cap defining a cavity, an IC die, and a leadframe. The leadframe includes a centrally located die attach pad, a plurality of... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20070200211 - Multilayer wiring substrate and method of connecting the same: In the case in which an electrical connection between upper and lower layers is to be carried out through a via opening portion 16 provided on an insulating layer 14 of a wiring substrate constituting a multilayer wiring substrate, the electrical connection between the upper and lower layers is performed... Agent: Drinker Biddle & Reath (dc)

20070200214 - Board strip and method of manufacturing semiconductor package using the same: Provided is a board strip that includes a base substrate that has at least one hole and a plurality of functional portions in which at least one semiconductor chip is packaged; a circuit layer having a circuit pattern formed on the functional portions and dummy patterns formed on non-functional portions... Agent: Drinker Biddle & Reath LLP Attn: Patent Docket Dept.

20070200212 - Image sensor package: An image sensor package includes a substrate, a lens module and a bottom cover. Herein the substrate has an upper surface and a lower surface, a plurality of passive components is fabricated on the lower surface and a chip is disposed on the upper surface. The lens module is mounted... Agent: Jianq Chyun Intellectual Property Office

20070200213 - Integrated circuit chip and package: An integrated circuit chip and a package supported by a device or a semiconductor chip are provided. The integrated circuit chip comprises a substrate, a device part, and a first integrated circuit chip. The device part is formed over the substrate, and the first integrated circuit chip is formed over... Agent: Foley And Lardner LLP Suite 500

20070200215 - Smart card module and substrate for a smart card module: A chip card module including a substrate with a first side and an opposite second side. Contact areas are arranged on the first side, and a first conductor structure is arranged on the second side, the first conductor structure runs from one contact region to one of a another contact... Agent: Dickstein Shapiro LLP

20070200216 - Chip stack package: Provided is a chip stack package that may include a lower semiconductor chip, an upper semiconductor chip stacked on the lower semiconductor chip, and at least one adhesive formed in space between the lower semiconductor chip and the upper semiconductor chip. The at least one adhesive may include a first... Agent: Harness, Dickey & Pierce, P.L.C

20070200217 - Method and apparatus for manufacturing electronic component-mounted component, and electronic component-mounted component: After a first electronic component is inserted into a base substrate, first circuit patterns are formed on the inserted first electronic component, and then a second electronic component is mounted on the first circuit patterns to complete an electronic component-mounted component. According to the above method, a thickness of a... Agent: Wenderoth, Lind & Ponack, L.L.P.

20070200218 - Printed board and semiconductor integrated circuit: An IC which includes a first circuit and a plurality of first paired terminals each including a first power supply terminal and a first GND terminal which are connected to the first circuit, and a second circuit and a plurality of second paired terminals each including a second power supply... Agent: Fitzpatrick Cella Harper & Scinto

20070200219 - Power semiconductor device and method for producing it: A power semiconductor device (1; 37) has a leadframe (4), at least one vertical power semiconductor component (2) and at least one further electronic device (3) which is arranged on the power semiconductor component (2). The chip carrier (5) of the leadframe (4) has at least two separate parts (7,... Agent: Baker Botts, L.L.P.

20070200221 - Electronic component module: An electronic component module is provided with a ceramic substrate and a plurality of bonding material applying lands. The ceramic substrate has a rear surface that is substantially rectangular. The plurality of bonding material applying lands are arranged on the rear surface. The plurality of bonding material applying lands includes... Agent: Murata Manufacturing Company, Ltd. C/o Keating & Bennett, LLP

20070200220 - Flexible substrate: A flexible substrate is provided which contains not only flexibility but also rigidity and hear resistance. A flexible substrate includes a first wiring layer, an insulating resin layer, a glass cloth and a second wiring layer. The insulating layer is formed by an insulating material, such as a BT resin,... Agent: Fish & Richardson P.C.

20070200222 - Semiconductor device and method of fabrication: A MEMS (micro electro-mechanical system) semiconductor device and a method for producing such a device. A preferred embodiment of the present invention comprises the a wafer having a continuous BCS (bondline control structure) surrounding a MEMS active area that is affixed to an interposer layer, which is in turn affixed... Agent: Texas Instruments Incorporated

20070200223 - Semiconductor device and semiconductor module therewith: A semiconductor device capable of dissipating heat with a high degree of efficiency without impairing the strength thereof is provided. The semiconductor device includes a semiconductor chip 2, a heatsink plate 1 overlapping a rear face of the semiconductor chip 2, and an adhesive 4 for adhesively fixing the semiconductor... Agent: Nixon & Vanderhye, PC

20070200224 - Thermally-enhanced ball grid array package structure and method: A thermally-enhanced ball grid array package structure is provided that includes an integrated circuit chip, a heat spreader and a substrate. The integrated circuit chip has a specified surface area. The heat spreader is coupled to the integrated circuit chip. The substrate is coupled to the heat spreader. The substrate... Agent: Stmicroelectronics, Inc.

20070200225 - Heat sink for semiconductor package: A heat sink (10) for a semiconductor package (38) includes a top surface (12) having a recessed hole (16) at its center. A sidewall (14) formed around the top surface (12) of the heat sink (10) has gaps (18) formed in the sidewall (14). An air vent (22) is formed... Agent: Freescale Semiconductor, Inc. Law Department

20070200226 - Cooling micro-channels: The present disclosure relates generally to microelectronic technology, and more specifically, to an apparatus used for the cooling of active electronic devices utilizing micro-channels or micro-trenches, and a technique for fabricating the same.... Agent: Trop Pruner & Hu, PC

20070200228 - Semiconductor package having heat dissipating device and fabrication method of the semiconductor package: A semiconductor package with a heat dissipating device and a fabrication method of the semiconductor package are provided. A chip is mounted on a substrate. The heat dissipating device is mounted on the chip, and includes an accommodating room, and a first opening and a second opening that communicate with... Agent: Edwards Angell Palmer & Dodge LLP

20070200227 - Power semiconductor arrangement: A power semiconductor arrangement has a heat-removing base with at least one planar exterior. The base consists of a metal material or is provided with a metal coat. The exterior is at least partially provided with an electrically insulating oxide layer on top of the metal material. The power semiconductor... Agent: Baker Botts, L.L.P.

20070200229 - Chip underfill in flip-chip technologies: A semiconductor structure and method for forming the same. The semiconductor structure includes (a) a substrate and (b) a chip which includes N chip solder balls, N is a positive integer, and the N chip solder balls are in electrical contact with the substrate. The semiconductor structure further includes (c)... Agent: Schmeiser, Olsen & Watts

20070200230 - Stackable integrated circuit package system: A stackable integrated circuit package system is provided placing a first integrated circuit die having an interconnect provided thereon in a substrate having a cavity, encapsulating the first integrated circuit die, having the interconnect exposed, in the cavity and along a first side of the substrate, mounting a second integrated... Agent: Ishimaru & Zahrt LLP

20070200232 - Printed-wiring board with built-in component, manufacturing method of printed-wiring board with built-in component, and electronic device: According to one embodiment, there is provided a printed-wiring board with a built-in component including a first base material including a pattern forming surface on which a plurality of conductive patterns are formed. A circuit component is mounted on the pattern forming surface of the first base material, and is... Agent: Knobbe Martens Olson & Bear LLP

20070200236 - Base semiconductor chip, semiconductor integrated circuit device, and semiconductor integrated circuit device manufacturing method: A semiconductor integrated circuit device includes: a semiconductor substrate; a semiconductor chip including a plurality of functional blocks formed independently from each other in predetermined regions of the semiconductor substrate and each including a pad for transmitting a signal; and a plurality of inter-pad interconnects being connected to the pads... Agent: Mcdermott Will & Emery LLP

20070200235 - Semiconductor device having reinforced low-k insulating film and its manufacture method: (a) coating a low dielectric constant low-level insulating film above a semiconductor substrate formed with a plurality of semiconductor elements; (b) processing the low-level insulating film to increase a mechanical strength of the low-level insulating film; (c) coating a low dielectric constant high-level insulating film above the low-level insulating film;... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070200238 - Semiconductor integrated circuit apparatus and method of designing the same: In a semiconductor integrated circuit apparatus formed by a core cell constituting a circuit function and a power wiring cell including a power wiring, a metal of a power wiring unit cell constituting the power wiring cell is formed to take a shape of T, and the power wiring unit... Agent: Mcdermott Will & Emery LLP

20070200233 - Bond pad structures with reduced coupling noise: A bond pad structure with reduced coupling noise is provided. An exemplary embodiment of the bond pad structure comprises a first dielectric layer with a first conductive layer therein, wherein the first conductive layer is grounded. A second dielectric layer with a second conductive layer, a plurality of conductive contacts... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070200234 - Flip-chip device having underfill in controlled gap: A flip-chip and underfilled device, which includes a semiconductor chip (101) with contact pads and a workpiece (102) with contact pads in matching locations; the workpiece may be an insulating substrate or another semiconductor chip. The workpiece and the chip are spaced by a gap (103) of substantially uniform average... Agent: Texas Instruments Incorporated

20070200237 - Semiconductor device and method of manufacturing the same: An interlayer insulator includes a first interlayer insulator and a second interlayer insulator formed on the first interlayer insulator and having a property of preventing diffusion of copper. A barrier metal film is formed on an inner wall in the wiring trench except an upper end and operative to prevent... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070200239 - Redistribution connecting structure of solder balls: A redistribution connecting structure for solder balls is disclosed. A substrate includes a plurality of bonding pads. A plurality of dielectric layers, a redistribution conductive layer between the dielectric layer, and a plurality of solder balls are formed on the substrate. The redistribution layer has a redistribution pad disposed adjacent... Agent: North America Intellectual Property Corporation

20070200240 - Semiconductor device, electronic device and fabrication method of the same: A semiconductor device includes a lower pad layer, an insulating layer and an upper pad layer. The lower pad layer is provided on a semiconductor substrate. The insulating layer is away from a surrounding of the lower pad layer so that a space having a recess on a surface between... Agent: Armstrong, Kratz, Quintos, Hanson & Brooks, LLP Kratz, Quintos & Hanson, LLP

20070200241 - Dual damascene process without an etch stop layer: A non-ESL semiconductor interconnection structure and a method of forming the same are provided. The non-ESL semiconductor interconnection structure includes a first low-k dielectric layer comprising a first region and a second region overlying the substrate, a plurality of conductive features in the first low-k dielectric layer, a cap layer... Agent: Slater & Matsil, L.L.P.

20070200242 - Semiconductor apparatus: In a semiconductor apparatus having a plurality of wiring layers, the semiconductor apparatus includes a bonding pad formed by an uppermost wiring layer, a first-layer plug wire formed by a first lower wiring layer in a region under the bonding pad, and a first conductive plug connecting the bonding pad... Agent: Young & Thompson

20070200243 - Ald formed titanium nitride films: The use of atomic layer deposition (ALD) to form a conductive titanium nitride layer produces a reliable structure for use in a variety of electronic devices. The structure is formed by depositing titanium nitride by atomic layer deposition onto a substrate surface using a titanium-containing precursor chemical such as TDEAT,... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070200244 - Post passivation interconnection schemes on top of the ic chips: A new method is provided for the creation of interconnect lines. Fine line interconnects are provided in a first layer of dielectric overlying semiconductor circuits that have been created in or on the surface of a substrate. A layer of passivation is deposited over the layer of dielectric, a thick... Agent: Saile Ackerman LLC

20070200245 - Semiconductor device and pattern generating method: Capacitance generated by a dummy pattern can be reduced without lowering wiring density by arranging the dummy pattern on one wiring layer in a manner responding to an actual pattern or the dummy pattern on the other wiring layer, whereby at least one of the following can be improved: distances... Agent: Staas & Halsey LLP

20070200246 - Chip package: A chip package including a flexible substrate, a plurality of conductive plugs, a wiring layer, and a chip is provided. The flexible substrate has a first surface and a second surface opposite to the first surface. The conductive plugs pass through the flexible substrate. The wiring layer is located on... Agent: J.c. Patents, Inc.

20070200247 - Interconnect structure to reduce stress induced voiding effect: An interconnect structure that may reduce or eliminate stress induced voids is provided. In an embodiment, a via is formed below a conductive line to provide an electrical connection to an underlying conductive region. The conductive line includes a widened region above the via. The widened region serves to reduce... Agent: Slater & Matsil, L.L.P.

20070200248 - Stacked integrated circuit package system: A stacked integrated circuit package system is provided forming a lead and a die paddle from a lead frame, forming a first integrated circuit die having an interconnect provided thereon, placing a second integrated circuit die over the first integrated circuit die and the die paddle, connecting the second integrated... Agent: Ishimaru & Zahrt LLP

20070200252 - Circuit board apparatus, circuit component reinforcing method and electronic device: According to one embodiment, a circuit board apparatus includes a substrate mounting a semiconductor component. A circuit board mounts the substrate. A solder bonding portion is provided in a side surface of the substrate. A pad is provided on the circuit board and solder bonded to the solder bonding portion.... Agent: Knobbe Martens Olson & Bear LLP

20070200251 - Method of fabricating ultra thin flip-chip package: Provided is a method of fabricating an ultra thin flip-chip package. In the above method, an under barrier metal film is formed on a bond pad of a semiconductor chip. Three-dimensional structured solder bumps are formed on the under barrier metal film. each of the solder bumps including a bar... Agent: Marger Johnson & Mccollom, P.C.

20070200250 - Semiconductor device with a semiconductor chip using lead technology and method of manufacturing the same: A semiconductor device using lead technology includes a semiconductor chip with external side electrodes of semiconductor components disposed on its top side. On its rear side, the semiconductor chip is connected to a rear side internal lead adapted to the rear side of semiconductor chip. On its top side, the... Agent: Edell, Shapiro & Finnan, LLC

20070200249 - Wiring board and semiconductor device: The invention provides a wiring board (2,15) to which a semiconductor chip (3) is to be bonded while directing a surface of the semiconductor chip toward the wiring board. The wiring board includes a connection electrode (14) that is formed on a bonding surface (2a, 15a) to which the semiconductor... Agent: Rabin & Berdo, PC

20070200254 - Method and apparatus for using flex circuit technology to create an electrode: A method of creating an active electrode that may include providing a flex circuit having an electrode made of a first material and providing a first mask over the flex circuit, the first mask having an offset region and an opening that exposes the electrode. The method may also include... Agent: Edwards Lifesciences Corporation

20070200253 - Electronic assembly and method for forming the same: Methods are provided for forming an electronic assembly (54). At least one depression (38) is formed in a surface of a substrate (20). A contact formation (44) is placed in the depression. A microelectronic die (46) is attached to the substrate using the contact formation. An electronic assembly is also... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20070200255 - System for fabricating semiconductor components with through wire interconnects: A method for fabricating a semiconductor component with a through wire interconnect includes the step of providing a substrate having a circuit side, a back side, and a through via. The method also includes the steps of: threading a wire through the via, forming a contact on the wire on... Agent: Stephen A. Gratton

20070200256 - Wiring configuration for semiconductor component: In a wiring configuration for a semiconductor component, an unused terminal is insulated from a third land via an insulating film, and thus no connecting member (solder) is required for the unused terminal. With this, the third land is not accidentally removed from a circuit board during exchange of the... Agent: Beyer Weaver LLP

20070200258 - Semiconductor device with semiconductor device components embedded in plastic package compound: A semiconductor device includes semiconductor device components embedded in plastic package compound, with a buffer layer being arranged on surfaces of the semiconductor device components of the semiconductor device. The buffer layer includes a thermoplastic material.... Agent: Edell, Shapiro & Finnan, LLC

20070200257 - Stackable integrated circuit package system with multiple interconnect interface: A stackable integrated circuit package system is provided forming a first integrated circuit die having an interconnect provided thereon, forming an external interconnect, having an upper tip and a lower tip, from a lead frame, mounting the first integrated circuit die on the external interconnect with the interconnect on the... Agent: Ishimaru & Zahrt LLP

20070200259 - Touch panel: The touch panel of the invention includes an optically transparent upper substrate having an upper conductive layer formed on an undersurface thereof, an optically transparent lower substrate having a lower conductive layer formed on an upper surface thereof and facing the upper conductive layer with a predetermined space, a spacer... Agent: Wenderoth, Lind & Ponack L.L.P.

20070194294 - Phase change memory devices and methods for fabricating the same: In a phase change memory, an interlayer insulating layer is disposed on a substrate. A heater plug includes a lower portion disposed in a contact hole penetrating the interlayer insulating layer and an upper portion protruding upward over the top surface of the interlayer insulating layer. A phase change pattern... Agent: Harness, Dickey & Pierce, P.L.C

20070194296 - Light emitting diode and manufacturing method therefor: A light emitting diode is composed of a p-type GaP substrate 12 and layers laminated on the p-type GaP substrate 12, including a p-type GaP contact layer 13, a p-type AlInP second cladding layer 14, a p-type AlGaInP active layer 15, an n-type AlInP first cladding layer 16 and an... Agent: Morrison & Foerster LLP

20070194297 - Quantum dot switching device: A multifunctional, programmable quantum confinement switching device uses the quantum confinement of charge carriers to operate on an input signal or energy and to release an output signal or energy. Energy enters the device through an input path and leaves through an output path, after being selectively blocked or modified... Agent: Hensley Kim & Edgington, LLC

20070194306 - Light emitting element, light emitting device, and electronic appliance: It is an object to provide a light emitting element capable of low-voltage driving; with high luminous efficiency; with high emission luminance; and with long emission lifetime. It is another object to provide a light emitting device and an electronic appliance in which power consumption is reduced; and which can... Agent: Fish & Richardson P.C.

20070194307 - Organic light emitting device: Provided is an organic light emitting device comprising: a substrate; and a plurality of sub-pixels, each sub-pixel comprising a thin film transistor formed on the substrate; a planarization layer formed on the thin film transistor, and having a contact hole exposing a portion of a source electrode or a drain... Agent: Ked & Associates, LLP

20070194304 - Organic light emitting display and method of fabricating the same: An organic light emitting display in which differential pressure is controlled to prevent Newton's rings from being generated and a method of fabricating the same are provided. The organic light emitting display includes a first substrate including a pixel region in which at least one organic light emitting diode (OLED)... Agent: Knobbe Martens Olson & Bear LLP

20070194305 - Organic thin film transistor comprising fluorine-based polymer thin film and method for fabricating the same: Disclosed is an organic thin film transistor, including a substrate, a gate electrode, a gate insulating layer, an organic semiconductor layer, and source/drain electrodes, in which a fluorine-based polymer thin film is provided between the source/drain electrodes and the organic semiconductor layer. A method of fabricating such an organic thin... Agent: Harness, Dickey & Pierce, P.L.C

20070194310 - Non-contact electrical connections test device: The invention relates to the non-contact testing of electrical characteristics of substrates carrying dense electrical connections (“chip-carriers” and others). The testing is non-contact in the sense that an injection or an extraction of electrons in the conductors to be tested is obtained by an electron tearing effect under the effect... Agent: Lowe Hauptman & Berner, LLP

20070194313 - Array substrate for liquid crystal display panel: An array substrate includes a substrate including a display area and a peripheral area, a thin film transistor formed in the display area and a capacitor formed in the peripheral area. The capacitor includes a first sub-capacitor and a second sub-capacitor. The first sub-capacitor includes a lower electrode layer, a... Agent: Cantor Colburn, LLP

20070194316 - Display apparatus: A display apparatus includes; a switching transistor, a driving transistor, a control terminal of which is connected to an output terminal of the switching transistor, a storage capacitor provided between the output terminal of the switching transistor and an output terminal of the driving transistor, and a complementary metal oxide... Agent: Cantor Colburn, LLP

20070194317 - Array substrate, display device having the same, and method thereof: An array substrate includes a base substrate, a dummy circuit section, a dummy pixel portion, an extended line, a common voltage line, and an overlap portion. Pixel portions are formed in a display area. The dummy circuit section is formed in a peripheral area to protect the pixel portions from... Agent: Cantor Colburn, LLP

20070194322 - Display apparatus and manufacturing method thereof: A display apparatus includes; a substrate, a transistor formed on the substrate, a pixel electrode connected to the transistor, a wall surrounding the pixel electrode, the wall including a main wall and a sub wall, the main wall having a first height and the sub wall having a second height... Agent: Cantor Colburn, LLP

20070194319 - Display device and method of driving the same: A display device includes a first display panel, a first gate driver, a second display panel and a second gate driver. The first display panel includes a first display region, in which first gate lines are formed, and a first peripheral region surrounding the first display region. The first gate... Agent: Frank Chau, Esq. F. Chau & Associates, LLC

20070194318 - Organic light emitting diode display: The present invention relates to an organic light emitting diode display having an optical film adhered to an outer surface of substrate and an external case covering a portion of the optical film so as to prevent display quality of the organic light emitting diode display from being degraded. The... Agent: Cantor Colburn, LLP

20070194323 - Semiconductor device and manufacturing method thereof: The invention provides a novel memory for which process technology is relatively simple and which can store multivalued information by a small number of elements. A part of a shape of the first electrode in the first storage element is made different from a shape of the first electrode in... Agent: Eric Robinson

20070194320 - Thin film transistor array panel and display device: A display device includes a first display panel including a common electrode disposed thereon, and a second display panel including; thin film transistors (“TFTs”) each including a gate electrode, a source electrode, and a drain electrode, a first passivation layer disposed on the source and drain electrodes, a second passivation... Agent: Cantor Colburn, LLP

20070194325 - Light emitting diode by use of metal diffusion bonding technology and method of producing light emitting diode: The main objective of present invention is to provide a manufacturing method of light emitting diode that utilizes metal diffusion bonding technology. AlInGaP light emitting diode epitaxial structure on a temporary substrate is bonded to a permanent substrate having a thermal expansion coefficient similar to that of the epitaxial structure,... Agent: Rosenberg, Klein & Lee

20070194328 - Nitride semiconductor light emitting device and manufacturing method thereof: An object is to provide a nitride semiconductor light emitting device capable of attaining high light emission output while lowering Vf, as well as to provide a manufacturing method thereof. The invention relates to a nitride semiconductor light emitting device, including at least an n-type nitride semiconductor, a p-type nitride... Agent: Morrison & Foerster LLP

20070194329 - Nitride semiconductor light-emitting device and method of manufacturing the same: There is provided a nitride semiconductor light emitting device. The nitride semiconductor light emitting device comprises a first nitride semiconductor layer including amorphous powder, an active layer on the first nitride semiconductor layer, and a second nitride semiconductor layer on the active layer.... Agent: Birch Stewart Kolasch & Birch

20070194326 - Organic light emitting diode display and method of manufacturing the same: An organic light emitting diode (“OLED”) display includes; a substrate, first and second signal lines which intersect each other and are disposed on the substrate, a switching control electrode connected to the first signal line, a switching input electrode connected to the second signal line, a switching output electrode disposed... Agent: Cantor Colburn, LLP

20070194327 - Semiconductor light-emitting device and method for fabricating the same: A semiconductor light-emitting device includes: a substrate; a plurality of semiconductor layers grown on the substrate and including an active layer; and an electrode formed on the semiconductor layers. An opening in which at least a portion of the semiconductor layers is exposed is formed in the substrate. The electrode... Agent: Mcdermott Will & Emery LLP

20070194333 - Light emitting diode package and method of manufacturing the same: Provided is a light emitting diode package and a method of manufacturing the same. The light emitting diode package includes a package main body with a cavity, a plurality of light emitting diode chips, a wire, and a plurality of lead frames. The plurality of light emitting diode chips are... Agent: Birch Stewart Kolasch & Birch

20070194334 - Light emitting device: An object is to provide a light emitting element using an inorganic compound as a light emitting material, which has ever-higher luminous efficiency and can be driven with low voltage. The chance of excitation of light emitting centers (atoms) in a light emitting layer is increased to enhance luminous efficiency... Agent: Fish & Richardson P.C.

20070194336 - Light emitting device package and method of manufacturing the same: A light emitting device package including: a heat dissipating substrate including a cavity; a first conductive pattern formed on the cavity; a light emitting device installed on the first conductive pattern; and a second conductive pattern formed on the heat dissipating substrate at a periphery of the first conductive pattern.... Agent: Sughrue Mion, PLLC

20070194338 - Light emitting diode package: A light emitting diode package with reduced light loss includes a package substrate, a light emitting diode chip mounted on the package substrate and an encapsulant formed on the package substrate to encapsulate the light emitting diode chip. The encapsulant has a refractive index gradient with refractive indices continuously increasing... Agent: Mcdermott Will & Emery LLP

20070194337 - Optoelectric composite substrate and electronic apparatus: An optoelectric composite substrate includes a substrate, a light emitting element positioned on the substrate, and a lens mold positioned on the light emitting element and contacting at least a part of the substrate, wherein the lens mold includes a lens element, the lens element positions so as to overlap... Agent: Oliff & Berridge, PLC

20070194341 - Light emitting diode package: A light emitting diode package. A package substrate has first and second electrode structures and a light emitting diode is mounted on the package substrate and electrically connected to the first and second electrode structures. A resin encapsulant is made of a transparent resin to seal the light emitting diode.... Agent: Mcdermott Will & Emery LLP

20070194340 - Light source and liquid crystal display device using the same: A widely applicable and low cost module substrate with a high accuracy, reliability and heat-radiation structure. A light source includes: a heat radiation substrate; an insulating layer formed in some regions in an upper surface of the substrate; a wiring layer having wiring patterns, the wiring layer being arranged on... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070194295 - Semiconductor device of group iii nitride semiconductor having oxide protective insulating film formed on part of the active region: An active region formed of a Group III nitride semiconductor is formed on a substrate. Then, an electrode is formed on the active region and a protective insulating film is formed on a part of the active region located in the peripheral portion of the electrode by oxidizing the Group... Agent: Mcdermott Will & Emery LLP

20070194298 - Semiconductor device comprising a lattice matching layer: A semiconductor device may include a first monocrystalline layer comprising a first material having a first lattice constant. A second monocrystalline layer may include a second material having a second lattice constant different than the first lattice constant. The device may also include a lattice matching layer between the first... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist P.A.

20070194299 - Optical semiconductor device and manufacturing method of the same: A side barrier is provided between columnar dots each constituted by directly stacking respective quantum dots in seven or more layers. Out of respective side barrier layers composing the side barrier, each of the lower side barrier layers (four layers of the undermost layer to the fourth layer from the... Agent: Armstrong, Kratz, Quintos, Hanson & Brooks, LLP

20070194300 - Low resistance tunnel junctions in wide band gap materials and method of making same: A low resistance tunnel junction that uses a natural polarization dipole associated with dissimilar materials to align a conduction band to a valence band is disclosed. Aligning the conduction band to the valence band of the junction encourages tunneling across the junction. The tunneling is encouraged, because the dipole space... Agent: Koppel, Patrick & Heybl

20070194303 - Method for manufacturing organic light-emitting element, organic light-emitting device and organic el panel: In a method for manufacturing an organic light-emitting element, comprising holding an organic light-emitting element substrate with the use of an electrostatic chuck and bonding it to a sealing substrate, the present invention prevents a driving circuit incorporated in the organic light-emitting element substrate from deteriorating due to static electricity... Agent: Masuvalley & Partners

20070194308 - Organic light emitting display capable of showing images on double sides thereof: An organic light emitting display (OLED) has a substrate, on two opposite sides of which a fist electrode, an organic layer and a second electrode are stacked in sequence respectively. To prevent the light of the organic layers at the opposite sides of the substrate from interference, the substrate or... Agent: Bacon & Thomas, PLLC

20070194302 - Organic thin-film transistor and fabrication method thereof and organic thin-film device: An organic thin-film transistor having a higher carrier-mobility, a method of fabricating the organic thin-film transistor and an organic thin-film device including the organic thin-film transistor are provided. In an organic thin-film transistor having an organic semiconductor layer, the organic semiconductor layer contains a fluorinated acene compound which is represented... Agent: Ladas & Parry

20070194301 - Semiconductor arrangement with non-volatile memories: One aspect of the invention relates to a semiconductor arrangement having at least one nonvolatile memory cell which has a first electrode comprising at least two layers; and having an organic material, the organic material forming a compound with that layer of the first electrode which is in direct contact.... Agent: Dicke, Billig & Czaja

20070194309 - Nitride semiconductor light-emitting device and fabrication method thereof: Provided is a method of fabricating a nitride semiconductor light-emitting device comprising; providing a nitride semiconductor light-emitting device with a GaN layer, bringing the nitride semiconductor light-emitting device into contact with hydrogen separation metal, vibrating the nitride semiconductor light-emitting device and the hydrogen separation metal, removing hydrogen from the GaN... Agent: Birch Stewart Kolasch & Birch

20070194311 - Photoelectric transducer and its manufacturing method: A photoelectric transducer comprises an electrode (5) on which a semiconductor layer (7) carrying a sensitizing dye is deposited. The semiconductor layer (7) contains semiconductor particles and a binder and has a porosity of 40 to 80%. A method for manufacturing a photoelectric transducer by applying a solution containing semiconductor... Agent: Osha Liang L.L.P.

20070194312 - Subpixel: There is provided a subpixel that is free from an increase in its overall size and can ensure a large size of its display portion, even when easily producible and inexpensive organic or amorphous Si thin film transistors are used. The subpixel includes one display portion and a plurality of... Agent: Sughrue Mion, PLLC

20070194314 - Display device and electronic apparatus having the display device: A light-emitting element has a property that a resistance value (internal resistance) changes in accordance with an environmental temperature. It is an object to downsize a monitoring element which corrects an influence of variations in current value of the light-emitting element, which are caused by an environmental temperature change and... Agent: Fish & Richardson P.C.

20070194315 - Semiconductor device and fabrication method thereof: For forming a gate electrode, a conductive film with low resistance including Al or a material containing Al as its main component and a conductive film with low contact resistance for preventing diffusion of Al into a semiconductor layer are laminated, and the gate electrode is fabricated by using an... Agent: Fish & Richardson P.C.

20070194321 - Light emitting element, light emitting device, and electronic device: It is an object of the present invention to provide a light emitting element which can be driven at a low voltage. Other objects of the present invention are to provide a light emitting element with a high luminescent efficiency; a light emitting element with a high luminance; a light... Agent: Fish & Richardson P.C.

20070194324 - Vertical gallium-nitride based light emitting diode: A vertical GaN-based LED is provided. The vertical GaN-based LED includes: an n-electrode; an n-type GaN layer formed under the n-electrode; an active layer formed under the n-type GaN layer; a p-type GaN layer formed under the active layer, the p-type GaN layer having a first uneven structure formed on... Agent: Mcdermott Will & Emery LLP

20070194330 - High efficiency leds with tunnel junctions: An LED made from a wide band gap semiconductor material and having a low resistance p-type confinement layer with a tunnel junction in a wide band gap semiconductor device is disclosed. A dissimilar material is placed at the tunnel junction where the material generates a natural dipole. This natural dipole... Agent: Koppel, Patrick & Heybl

20070194332 - Light active sheet material: Device structures for sheets of light active material. A first substrate has a transparent first conductive layer. A pattern of light active semiconductor elements are fixed to the first substrate. The light active semiconductor elements have an n-side and a p-side. Each light active semiconductor element has either of the... Agent: Michaud-duffy Group LLP

20070194331 - Liquid crystal display device and defect repairing method for the same: A liquid crystal display device comprises a pixel electrode, a thin film transistor, a gate line electrically coupled to the pixel through the thin film transistor and a first auxiliary layer having a first connecting portion overlapped with the pixel electrode and a second connecting portion overlapped with the gate... Agent: Lowe Hauptman Berner, LLP

20070194335 - Boron phosphide-based semiconductor light-emitting device: A boron phosphide-based semiconductor light-emitting device includes a substrate of silicon single crystal, a first cubic boron phosphide-based semiconductor layer that is provided on a surface of the substrate and contains twins, a light-emitting layer that is composed of a hexagonal Group III nitride semiconductor and provided on the first... Agent: Sughrue Mion, PLLC

20070194339 - Optical data communication module: Disclosed is an infrared data communication module (1) comprising an infrared light-emitting device (3), an infrared light-receiving device (4) and an IC chip (5). The light-emitting device (3), light-receiving device (4) and IC chip (5) are mounted on a substrate (2) and covered with a sealing resin package (6). The... Agent: Hamre, Schumann, Mueller & Larson, P.C.

20070194344 - Nitride semiconductor light-emitting device and method for manufacturing the same: Provided is a nitride semiconductor light-emitting device. The device includes a buffer layer, a first conduction type semiconductor layer, an active layer, and a second conduction type semiconductor layer. The buffer layer comprises amorphous metal. The first conduction type semiconductor layer is on the buffer layer, and the active layer... Agent: Birch Stewart Kolasch & Birch

20070194342 - Gan semiconductor device and process employing gan on thin saphire layer on polycrystalline silicon carbide: A substrate for a GaN based semiconductor device is formed by a poly SiC substrate having a thin sapphire layer on the top surface thereof Sapphire layer may be 0.1 to 1.0 microns thick. GaN type layers are then grown atop the sapphire layer with a transition layer between them... Agent: Ostrolenk Faber Gerb & Soffen

20070194343 - Light emitting device having vertical structure, package thereof and method for manufacturing the same: A light emitting device having a vertical structure, a package thereof and a method for manufacturing the same, which are capable of damping impact generated in a substrate separation process, and achieving an improvement in mass productivity, are disclosed. The method includes growing a semiconductor layer having a multilayer structure... Agent: Mckenna Long & Aldridge LLP

20070194345 - Thin-film device: A thin-film device incorporates: a substrate; an insulating layer, a plurality of lower conductor layers, a dielectric film, an insulating layer, a plurality of upper conductor layers and a protection film that are stacked in this order on the substrate; and a plurality of terminal electrodes. One of the terminal... Agent: Oliff & Berridge, PLC

20070194346 - Semiconductor device and inverter device using the same: In a semiconductor device having a pair of IGBT and diode which are connected to each other in inverse-parallel in which a collector-electrode of the IGBT and a cathode-electrode of the diode are wired to each other, and an emitter-electrode of the IGBT and an anode-electrode of the diode are... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070194347 - Compound semiconductor device and method of fabricating the same: In formation-by-growth of an AlGaN layer 3 as having a double-layered structure, a non-doped AlGaN layer (i-AlGaN layer) having an Al compositional ratio of approximately 15% is formed to a thickness of approximately 3 nm on an i-GaN layer, and further thereon, an AlGaN layer (n-AlGaN layer) doped with Si... Agent: Armstrong, Kratz, Quintos, Hanson & Brooks, LLP

20070194349 - Active matrix substrate, electro-optic device and electronic apparatus: An active matrix substrate comprises a substrate, a first electrode disposed on one surface side of the substrate, an insulating film, a plurality of second electrodes, and a plurality of switching elements. The insulating film is disposed between the first electrode and the plurality of second electrodes, and each of... Agent: Advantedge Law Group, LLC

20070194348 - Circuit and a display using same: A circuit of a display comprises a substrate, at least one thin film transistor, at least one first wire and at least one second wire formed on the substrate. The substrate has an active area and a bonding area. The thin film transistor is disposed in the active area. The... Agent: Birch Stewart Kolasch & Birch

20070194350 - Semiconductor device: A semiconductor device includes the following: a well layer formed in the surface region of a silicon layer; a source layer formed in the surface region of the well layer; a high-concentration well layer formed in the well layer so that its depth from the surface of the silicon layer... Agent: Hamre, Schumann, Mueller & Larson, P.C.

20070194351 - Radiation tolerant ccd structure: A CCD structure (20) tolerant to the adverse formation of traps resulting from exposure to irradiation by particles such as protons and neutrons is described. The CCD comprises an image plane (22) having a number of parallel transfer channels. Path defining structures (24), such as barrier implants, define a principal... Agent: Venable LLP

20070194352 - Cmos image sensor and method for manufacturing the same: A CMOS image sensor and a manufacturing method thereof are disclosed. The gates of the transistors are formed in an active region of a unit pixel, and at the same time, a passivation layer is formed on an edge portion of the active region of a photodiode to have the... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20070194353 - Metal source/drain schottky barrier silicon-on-nothing mosfet device and method thereof: A Schottky barrier MOSFET (SB-MOS) device and a method of manufacturing having a silicon-on-nothing (SON) architecture in a channel region is provided. More specifically, metal source/drain SB-MOS devices are provided in combination with a channel structure comprising a semiconductor channel region such as silicon isolated from a bulk substrate by... Agent: Dorsey & Whitney LLP Intellectual Property Department

20070194354 - Nitride based transistors for millimeter wave operation: Field effect transistors having a power density of greater than 5 W/mm when operated at a frequency of at least 30 GHz are provided. The power density of at least 5 W/mm may be provided at a drain voltage of 28 V. Transistors with a power density of at least... Agent: Myers Bigel Sibley & Sajovec

20070194355 - Transistor device with two planar gates and fabrication process: A planar transistor device includes two independent gates (a first and second gates) along with a semiconductor channel lying between the gates. The semiconductor channel is formed of a first material. The channel includes opposed ends comprising dielectric zone with a channel region positioned between the gates. The dielectric zones... Agent: Gardere Wynne Sewell LLP Intellectual Property Section

20070194356 - Image sensor having improved sensitivity and decreased crosstalk and method of fabricating same: An image sensor is provided. The image sensor includes a substrate; a first isolation region, a second isolation region, a plurality of photoelectric transducer devices, a read element and a floating diffusion region. The second isolation region has a depth that is less than that of the first isolation region.... Agent: Volentine & Whitt PLLC

20070194358 - Solid-state imaging device: A first imaging portion includes a first group of photoelectric conversion elements. A second imaging portion includes a second group of photoelectric conversion elements. The first imaging portion and the second imaging portion are disposed at adjacent positions. An array pattern of the imaging portions is determined so that photoelectric... Agent: Birch Stewart Kolasch & Birch

20070194357 - Photodiode and method for fabricating same: A Schottky photodiode includes a semiconductor layer and a conductive film provided in contact with the semiconductor layer. The conductive film has an aperture and a periodic structure provided around said aperture for producing a resonant state by an excited surface plasmon in a film surface of the conductive film... Agent: Hayes Soloway P.C.

20070194359 - Magnetic memory devices using magnetic domain dragging: A magnetic memory device includes a memory region, an input and a sensor. The memory region includes a free layer, a pinned layer and a non-magnetic layer. The free layer has adjacent sectors and a magnetic domain wall. The pinned layer corresponds to the sectors and has a fixed magnetization... Agent: Harness, Dickey & Pierce, P.L.C

20070194360 - Nonvolatile ferroelectric memory device and method for manufacturing the same: A nonvolatile ferroelectric memory device includes a plurality of unit cells. Each of the unit cells includes a cell capacitor and a cell transistor. The cell capacitor includes a storage node, a ferroelectric layer, and a plate line. The cell capacitors of more than one of the plurality of unit... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070194361 - Semiconductor memory device and method for manufacturing semiconductor memory device: A semiconductor memory device includes: a semiconductor substrate; a field effect transistor formed on the semiconductor substrate; an interlayer dielectric layer formed on the field effect transistor; a contact plug connected to the field effect transistor through the interlayer dielectric layer; and a ferroelectric capacitor disposed on the interlayer dielectric... Agent: Harness, Dickey & Pierce, P.L.C

20070194362 - Semiconductor device and process for production thereof: Disclosed herein is a semiconductor device with high reliability which has TFT of adequate structure arranged according to the circuit performance required. The semiconductor has the driving circuit and the pixel portion on the same substrate. It is characterized in that the storage capacitance is formed between the first electrode... Agent: Cook, Alex, Mcfarron, Manzo, Cummings & Mehler Ltd

20070194363 - Fractional charge pump for step-down dc-dc converter: A charge pump provides a multiplication factor of ⅔ by using a three-phase mode of operation. In a first mode, first and second capacitors are charged from an input voltage while a third capacitor drives the output voltage based on stored charge in the third capacitor. In a second mode,... Agent: Bever Hoffman & Harms, LLP Tri-valley Office

20070194364 - Diode: A transistor and diode having a low resistance and a high breakdown voltage are provided. When the bottom portion of a narrow trench having the shape of a rectangular parallelepiped is filled with a semiconductor grown by epitaxial method, a {1 0 0} plane is exposed at the sidewalls of... Agent: Armstrong, Kratz, Quintos, Hanson & Brooks, LLP

20070194367 - Storage node, nonvolatile memory device, methods of fabricating the same and method of operating the nonvolatile memory device: Provided are a storage node, a nonvolatile memory device, methods of fabricating the same and a method of operating the nonvolatile memory device. The storage node may include a lower metal layer and a first insulation layer, an intermediate metal layer, a second insulation layer, an upper metal layer and... Agent: Harness, Dickey & Pierce, P.L.C

20070194365 - Dual gate multi-bit semiconductor memory array: An array of memory cells is arranged in columns and one or more rows on a semiconductor substrate. Each cell has a source, a drain, a first gate and a second gate. The array includes a plurality of gate control lines, each of which corresponds to one of the columns... Agent: Akin Gump Strauss Hauer & Feld L.L.P.

20070194366 - Single poly non-volatile memory device with inversion diffusion regions and methods for operating the same: A non-volatile memory device comprises a substrate with the dielectric layer formed thereon. A control gate and a floating gate are then formed next to each other on top of the dielectric layer separated by a gap. Accordingly, a non-volatile memory device can be constructed using a single poly process... Agent: Baker & Mckenzie LLP Patent Department

20070194369 - Nonvolatile memory devices and methods of forming the same: In a nonvolatile memory device and a method of fabricating the same, a device isolation layer is formed defining an active region in a semiconductor substrate. A gate insulation layer and a first conductive layer are formed on the semiconductor substrate. A pair of stack patterns are formed, each having... Agent: Mills & Onello LLP

20070194368 - Disposable device for diffusion of volatile substances: The device comprises a laminar element (1) made of a flexible material adapted to be folded along a folding line (26), comprising at least a first part (2) and a second part (4). Said first part (2) has a deposit (3) containing a product (30) origin of volatile substances. The... Agent: Knobbe Martens Olson & Bear LLP

20070194370 - Non-volatile semiconductor memory device: A non-volatile semiconductor memory device includes a semiconductor substrate, an insulating film formed on the semiconductor substrate, a plurality of memory cells formed on the semiconductor substrate, a plurality of first assist gates extending toward the memory cell, a connection portion connecting end portions of the first assist gates, a... Agent: Mcdermott Will & Emery LLP

20070194371 - Gate-coupled eprom cell for printhead: An EPROM cell in a printhead control circuit for an inkjet printer, having exactly one polysilicon layer and a conductive layer disposed above the polysilicon layer, includes a control transistor and an EPROM transistor. The control and EPROM transistors each have floating gates comprising a portion of the polysilicon layer,... Agent: Hewlett Packard Company

20070194372 - Trench-gated mosfet including schottky diode therein: Disclosed is a trench MOSFET, including: a trench gate structure having a gate electrode and a gate insulating film; an n-type diffusion layer formed to face the gate electrode via the gate insulating film at an upper portion of the trench; a p-type base layer formed to face the gate... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070194375 - Semiconductor device: This semiconductor device comprises a first semiconductor layer of a first conductivity type, an epitaxial layer of a first conductivity type formed in the surface on the first semiconductor layer, and a base layer of a second conductivity type formed on the surface of the epitaxial layer. Column layers of... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070194374 - Shielded gate trench (sgt) mosfet devices and manufacturing processes: This invention discloses a semiconductor power device that includes a plurality of power transistor cells surrounded by a trench opened in a semiconductor substrate. At least one of the cells constituting an active cell has a source region disposed next to a trenched gate electrically connecting to a gate pad... Agent: Bo-in Lin

20070194373 - Cmos structure and method including multiple crystallographic planes: A complementary metal oxide semiconductor (CMOS) structure includes a semiconductor substrate having first mesa having a first ratio of channel effective horizontal surface area to channel effective vertical surface area. The CMOS structure also includes a second mesa having a second ratio of the same surface areas that is greater... Agent: Scully, Scott, Murphy & Presser, P.C.

20070194376 - Mos transistors and methods of manufacturing the same: MOS transistors having a low junction capacitance between their halo regions and their source/drain extension regions and methods for manufacturing the same are disclosed. A disclosed MOS transistor includes: a semiconductor substrate of a first conductivity type; a gate insulating layer pattern and a gate on an active region of... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20070194377 - Thin film semiconductor device and manufacturing method: When n-channel thin film transistors(TFTs) and p-channel TFTs are formed on a polycrystalline silicon film formed on a glass substrate, a process is included in which P-dopant or N-dopant is introduced at the same time to the channel region of a part of the n-channel TFTs and a part of... Agent: Sughrue Mion, PLLC

20070194379 - Amorphous oxide and thin film transistor: The present invention relates to an amorphous oxide and a thin film transistor using the amorphous oxide. In particular, the present invention provides an amorphous oxide having an electron carrier concentration less than 1018/cm3, and a thin film transistor using such an amorphous oxide. In a thin film transistor having... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070194378 - Eeprom memory cell for high temperatures: An electrically erasable programmable read-only memory (EEPROM) memory cell is produced using a silicon on insulator (SOI) technology, which is suitable for use at high temperatures. An EEPROM cell is formed from a memory transistor comprising a floating gate and a high-voltage select transistor. The select transistor comprises a freely... Agent: Stevens & Showalter LLP

20070194380 - Method for fabricating an esd protection apparatus for discharging electric charge in a depth direction: To make electric current concentration and electric field concentration hardly take place in junction parts even in case of performing miniaturization and to achieve triggering at low voltage. An ESD protection apparatus is installed between an input terminal 6 of a semiconductor integrated circuit chip and a CMOS transistor 100... Agent: Young & Thompson

20070194381 - Memory integrated circuit device providing improved operation speed at lower temperature: An example embodiment of the memory integrated circuit device may include a first temperature sensing unit, a first voltage adjusting unit, and a MOS back bias voltage outputting unit. The first voltage adjusting unit may be configured to output a voltage based on an output signal of the temperature sensing... Agent: Harness, Dickey & Pierce, P.L.C

20070194382 - Semiconductor device comprising metal silicide films formed to cover gate electrode and source-drain diffusion layers and method of manufacturing the same: The present invention provides a semiconductor device, comprising a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film, and source-drain diffusion layer formed within the semiconductor substrate in the vicinity of the gate electrode. A silicide film is formed... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20070194383 - Semiconductor device: A semiconductor device, includes: a semiconductor layer, arranged, via an insulation layer, on a region of a part of a semiconductor substrate; a first circuit block formed on the semiconductor layer; and a second and a third circuit blocks formed on the semiconductor substrate, isolated from each other by the... Agent: Advantedge Law Group, LLC

20070194384 - Topside thermal management of semiconductor devices: A semiconductor device including at least one gate terminal in operational contact with an active layer or top surface of the semiconductor substrate includes a deposited layer of boron phosphide covering the gate terminal and at least a portion of the active layer or the top surface next to and... Agent: Bond, Schoeneck & King, PLLC

20070194385 - Gate stacks: A gate stack structure. The structure includes (a) a semiconductor region and (b) a gate stack on top of the semiconductor region. The gate stack includes (i) a gate dielectric region on top of the semiconductor region, (ii) a first gate polysilicon region on top of the gate dielectric region,... Agent: Schmeiser, Olsen & Watts

20070194386 - Methods of fabricating organic thin film transistors and organic thin film transistors fabricated using the same: Disclosed are methods of fabricating organic thin film transistors composed of a substrate, a gate electrode, a gate insulating film, metal oxide source/drain electrodes, and an organic semiconductor layer. The methods include applying a sufficient quantity of a self-assembled monolayer compound containing a live ion to the surfaces of the... Agent: Harness, Dickey & Pierce, P.L.C

20070194387 - Extended raised source/drain structure for enhanced contact area and method for forming extended raised source/drain structure: A semiconductor device comprises a gate electrode stack having sidewalls and a top surface with a gate dielectric layer and the gate electrode, and LDD/LDS regions in the substrate aligned with the stack. Conformal L-shaped etch-stop layers with a thickness from about 50 Å to about 200 Å are formed... Agent: International Business Machines Corporation Dept. 18g

20070194388 - Semiconductor device having internal stress film: A semiconductor device includes a first-type internal stress film formed of a silicon oxide film over source/drain regions of an nMISFET and a second-type internal stress film formed of a TEOS film over source/drain regions of a pMISFET. In a channel region of the NMISFET, a tensile stress is generated... Agent: Mcdermott Will & Emery LLP

20070194389 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a silicon substrate, a strain-inducing layer, a silicon layer, a FET, and an isolation region. On the silicon substrate, the strain-inducing layer is provided. On the strain-inducing layer, the silicon layer is provided. The strain-inducing layer induces lattice strain in a channel region of the FET... Agent: Mcginn Intellectual Property Law Group, PLLC

20070194390 - Method of fabricating a precision buried resistor: The present invention provides a semiconductor structure including a buried resistor with improved control, in which the resistor is fabricated in a region of a semiconductor substrate beneath a well region that is also present in the substrate. In accordance with the present invention, the inventive structure includes a semiconductor... Agent: Scully, Scott, Murphy & Presser, P.C.

20070194391 - Fabricating strained channel epitaxial source/drain transistors: The mobility of carriers may be increased in strained channel epitaxial source/drain transistors. Doped silicon material may be blanket deposited after removing ion implanted source/drain regions. The blanket deposition forms amorphous films over non-source/drain areas and crystalline films in source/drain regions. By using an etch which is selective to amorphous... Agent: Trop Pruner & Hu, PC

20070194392 - Method and apparatus for indicating directionality in integrated circuit manufacturing: An integrated circuit includes a visually discernable indicator formed as part of the integrated circuit to indicate a directionality of a non-visually discernable characteristic of the integrated circuit.... Agent: Freescale Semiconductor, Inc. Law Department

20070194393 - Electronic device containing semiconductor polymers and corresponding manufacturing process: Described herein is an electronic device provided with an electrode and a region of polymeric material set in contact with the electrode. The electrode has a polysilicon region and a silicide region, which coats the polysilicon region and is arranged, as interface, between the polysilicon region and the region of... Agent: Graybeal, Jackson, Haley LLP

20070194394 - Noise isolation between circuit blocks in an integrated circuit chip: An integrated circuit includes a p-well block region having a high resistivity due to low doping concentration formed in a region of a substrate for providing noise isolation between a first circuit block and a second circuit block. The integrated circuit further includes a guard region formed surrounding the p-well... Agent: Freescale Semiconductor, Inc. Law Department

20070194395 - Capacity type sensor: In a capacity type sensor including a guard electrode which is disposed between a first electrode and a second electrode, an alternating current potential difference between the first electrode and the guard electrode is made substantially close to zero by a potential equalizing means, and impedance change between the first... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070194396 - Semiconductor device and method for manufacturing same: The absorption of moisture from a wall surface of an apertured part formed in an interlayer insulating film in accordance with a light-receiving part of a light detector is minimized and deterioration of wiring in the interlayer insulating film is prevented. A position that corresponds to a light-receiving part 52... Agent: Oliff & Berridge, PLC

20070194398 - Light emitting diode module: Provided an LED module comprising a metallic thin film having a flexibility; a circuit pattern printed on the metallic thin film so as to be insulated from the metallic thin film; one or more LEDs mounted on the metallic thin film on which the circuit pattern is not formed; wire... Agent: Mcdermott Will & Emery LLP

20070194399 - Optoelectronic devices and solar cells: The invention includes optoelectronic devices containing one or more layers of semiconductor-enriched insulator (with exemplary semiconductor-enriched insulator being silicon-enriched silicon oxide and silicon-enriched silicon nitride), and includes solar cells containing one or more layers of semiconductor-enriched insulator. The invention also includes methods of forming optoelectronic devices and solar cells.... Agent: Wells St. John P.s.

20070194397 - Photo-sensor and pixel array with backside illumination and method of forming the photo-sensor: An imaging sensor with an array of FET pixels and method of forming the imaging sensor. Each pixel is a semiconductor island, e.g., N-type silicon on a Silicon on insulator (SOI) wafer. FETs are formed in one photodiode electrode, e.g., a P-well cathode. A color filter may be attached to... Agent: Law Office Of Charles W. Peterson, Jr. Burlington

20070194400 - Photoelectric conversion device and solid-state imaging device: A photoelectric conversion device comprising a photoelectric conversion part including a first electrode, a second electrode opposing to the first electrode and a photoelectric conversion layer provided between the first electrode and the second electrode, wherein a smoothing layer for reducing roughness of a surface of the photoelectric conversion layer... Agent: Sughrue-265550

20070194401 - Photodetector: A photodetector having a mechanism of suppressing light crosstalk includes a plurality of photodiodes disposed on a common semiconductor substrate, each photodiode including an absorption layer epitaxially grown on the common semiconductor substrate and being provided with an epitaxial-side electrode. Each photodiode is provided with at least one of a... Agent: Fish & Richardson P.C.

20070194403 - Methods for fabricating semiconductor device structures with reduced susceptibility to latch-up and semiconductor device structures formed by the methods: Semiconductor methods and device structures for suppressing latch-up in bulk CMOS devices. The method comprises forming a trench in the semiconductor material of the substrate with first sidewalls disposed between a pair of doped wells, also defined in the semiconductor material of the substrate. The method further comprises forming an... Agent: Wood, Herron & Evans, L.L.P. (ibm)

20070194402 - Shallow trench isolation structure: Structures, methods, devices, and systems are provided, including shallow trench isolation structures. In particular, a semiconductor device including a substrate and a shallow trench isolation structure on the substrate. The shallow trench isolation structure includes a first isolation trench portion and a second isolation trench portion. The first isolation trench... Agent: Brooks, Cameron & Huebsh , PLLC

20070194404 - Thin-film device: A thin-film device incorporates: a substrate; an insulating layer, a lower conductor layer, a dielectric film, an insulating layer, an upper conductor layer and a protection film that are stacked in this order on the substrate; and four terminal electrodes. The four terminal electrodes touch part of end faces of... Agent: Oliff & Berridge, PLC

20070194405 - Dielectric material with reduced dielectric constant and methods of manufacturing the same: In a first aspect, a first method of manufacturing a dielectric material with a reduced dielectric constant is provided. The first method includes the steps of (1) forming a dielectric material layer including a trench on a substrate; and (2) forming a cladding region in the dielectric material layer by... Agent: Ibm Corporation Intellectual Property Law Dept. 917

20070194406 - Fixed parallel plate mems capacitor microsensor array: A fixed parallel plate micro-mechanical systems (MEMS) based sensor is fabricated to allow a dissolved dielectric to flow through a porous top plate, coming to rest on a bottom plate. A post-deposition bake ensures further purity and uniformity of the dielectric layer. In one embodiment, the dielectric is a polymer.... Agent: Biotechnology Law Group C/o Portfolioip

20070194407 - Semiconductor device and manufacturing the same: A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070194408 - Group iii nitride crystal, crystal growth process and crystal growth apparatus of group iii nitride: A crystal growth method of a group III nitride includes the steps of forming a melt mixture of an alkali metal and a group III element in a reaction vessel, and growing a crystal of a group III nitride formed of the group III element and nitrogen from the melt... Agent: Dickstein Shapiro LLP

20070194409 - Method of manufacturing semiconductor device with crack prevention ring: A crack prevention ring at the exterior edge of an integrated circuit prevents delamination and cracking during the separation of the integrated circuits into individual die. The crack prevention ring extends vertically into a semiconductor workpiece to at least a metallization layer of the integrated circuit. The crack prevention ring... Agent: Slater & Matsil, L.L.P.

20070194410 - Multi-chip device and method for manufacturing the same: A multi-chip device includes a plurality of chips, a metal pad on a first one of the chips, a through-hole plug electrode in the first one of the chips, a contact node in the first one of the chips connecting the metal pad to the through-hole plug electrode in the... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070194412 - Resin layer formation method, semiconductor device and semiconductor device fabrication method: The resin layer formation method comprises the step of forming on a substrate 10 a resin layer 34 for containing a substance for decreasing the thermal expansion coefficient to thereby forming a resin layer 34 having said substance localized in the side thereof nearer to the substrate 10; and the... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070194411 - Thermal treatment apparatus, method for manufacturing semiconductor device, and method for manufacturing substrate: A substrate support 30 is formed from a main body portion 56 and a supporting portion 58. In the main body portion 56, a plurality of placing portions 66 extend parallel, and supporting portions 58 are provided on the placing portions 66. A substrate 68 is placed on the supporting... Agent: Oliff & Berridge, PLC

20070194413 - Method for manufacturing semiconductor substrate: An epitaxial layer is formed on a high-resistance semiconductor substrate containing interstitial oxygen at a high concentration, and then a heat treatment is performed to the semiconductor substrate at a high temperature in an oxidizing atmosphere. Accordingly, a stratiform region of SiO2 is formed by deposition at an interface between... Agent: Posz Law Group, PLC

20070194417 - Semiconductor apparatus containing multi-chip package structures: The present invention is applied to a semiconductor apparatus using a lead frame as a base frame. A semiconductor apparatus according to the present invention includes a first multi-chip structure, which comprises a plurality of semiconductor chips mounted on the base frame and a terminal region formed on at least... Agent: Rabin & Berdo, PC

20070194419 - Semiconductor module and method of manufacturing the same: A semiconductor module of the present invention includes a wiring substrate having a wiring layer, a passive component mounted to be connected to the wiring layer in a center major portion of the wiring substrate, a resin portion formed selectively in an area except the wiring layer on a peripheral... Agent: Armstrong, Kratz, Quintos, Hanson & Brooks, LLP

20070194416 - Apparatus and methods for high-density chip connectivity: Self-alignment structures, such as micro-balls and V-grooves, may be formed on chips made by different processes. The self-alignment structures may be aligned to mask layers within an accuracy of one-half the smallest feature size inside a chip. For example, the alignment structures can align an array of pads having a... Agent: Fish & Richardson P.C.

20070194414 - Method for providing and removing discharging interconnect for chip-on-glass output leads and structures thereof: Microelectronic devices may be fabricated while being protected from damage by electrostatic discharge. In one embodiment, a shorting circuit is connected to elements of the microelectronic device, where the microelectronic device is part of a chip-on-glass system. In one aspect of this embodiment, a portion of the shorting circuit is... Agent: Knobbe, Martens, Olson & Bear, LLP

20070194418 - Semiconductor device: A semiconductor device (10) includes: a substrate (1), including an electrode pad (1a); an IC chip (4), mounted on the substrate (1); and an externally connecting terminal (7), formed on the electrode pad (1a) and electrically connected with the IC chip (4), the externally connecting terminal (7) including a resin... Agent: Nixon & Vanderhye, PC

20070194415 - Semiconductor device assemblies including face-to-face semiconductor dice, systems including such assemblies, and methods for fabricating such assemblies: Semiconductor device assemblies include at least first and second semiconductor dice disposed in a face-to-face configuration. At least some of a plurality of conductive structures are electrically and structurally coupled to a bond pad of the first semiconductor die and a bond pad of the second semiconductor die. A first... Agent: Trask Britt, P.C./ Micron Technology

20070194420 - Semiconductor package having an optical device and a method of making the same: A semiconductor package having an optical device and a method of making the same, the package including a chip, an upper metal redistribution layer, a transparent insulating layer, and a lower metal redistribution layer. The chip has an active surface, a back surface, at least one through hole, an optical... Agent: Volentine & Whitt PLLC

20070194421 - Chip module having a protection device: Some embodiments of a chip module comprise a substrate, a semiconductor chip on the substrate, and a first layer between the substrate and the semiconductor chip, the first layer having high reflectivity for electromagnetic waves. Methods of protecting a chip module from electromagnetic radiation by interposing a protective layer between... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070194422 - Light emitting diode package and fabricating method thereof: A Light Emitting Diode (LED) package including a carrier, a package housing, an LED chip, and an electrostatic discharge protector (ESD protector) is provided. The package housing encapsulates a part of the carrier so as to provide a chip-accommodating space on the carrier. The LED chip disposed on the carrier... Agent: Jianq Chyun Intellectual Property Office

20070194426 - Chip package and stacked structure of chip packages: A chip package is provided, which includes a dielectric layer, at least a conductive layer, a chip, a wiring layer and at least a conductive via. The dielectric layer has a first surface, a second surface opposite to the first surface and a plurality of lateral surfaces joined between the... Agent: J.c. Patents, Inc.

20070194427 - Semiconductor package including transformer or antenna: A semiconductor package comprises a package board and a plurality of semiconductor chips sequentially stacked on the package board. Each of the semiconductor chips comprises a semiconductor substrate and an open loop-shaped chip line formed on the semiconductor substrate. The open loop-shaped chip line has first and second end portions.... Agent: Volentine & Whitt PLLC

20070194428 - Connection structure and method for connecting flexible printed circuit to main substrate: A main substrate is provided with a wiring pattern on its surface and in the inner layer. A wiring pattern for connecting the signal line or power line of the main substrate to an external circuit is formed on the flexible printed circuit. A connection terminal to which a corresponding... Agent: Woodcock Washburn LLP

20070194424 - Integrated circuit package system with die on base package: The present invention provides an integrated circuit package system with die on base package comprising forming a base package comprising, forming a substrate, mounting a first integrated circuit on the substrate, encapsulating the integrated circuit and the substrate with a molding compound, and testing the base package, attaching a bare... Agent: Ishimaru & Zahrt LLP

20070194425 - Single-chip and multi-chip module for proximity communication: An apparatus includes a two-dimensional array of single-chip modules (SCMs) and at least one component. A respective SCM in the array includes at least a semiconductor die that is configured to communicate data signals by capacitive coupling using one or more proximity connectors in a first set of proximity connectors.... Agent: Sun Microsystems Inc. C/o Park, Vaughan & Fleming LLP

20070194423 - Stacked integrated circuit package-in-package system with recessed spacer: A stacked integrated circuit package-in-package system is provided forming a first integrated circuit spacer package including a mold compound with a recess provided therein, stacking the first integrated circuit spacer package on an integrated circuit die on a substrate with the recess positioned therebetween, and attaching a first electrical interconnect... Agent: Ishimaru & Zahrt LLP

20070194429 - Pressure contact power semiconductor module: A power semiconductor module in a pressure contact embodiment, for disposition on a cooling component, in which load terminals are formed as metal molded bodies, each with at least one flat portion and having a plurality of contact feet extending from the flat portion. Each flat portion of the load... Agent: Cohen, Pontani, Lieberman & Pavane

20070194430 - Substrate of chip package and chip package structure thereof: A substrate of chip package and the chip package structure thereof centralizes the bonding area under a chip carrier area and protrudes the bonding area from the chip carrier area to a chip package so as to increase the reliability of bump type surface mount technology during the second-level electronic... Agent: Abelman, Frayne & Schwab

20070194432 - Arrangement of non-signal through vias and wiring board applying the same: An arrangement of non-signal through vias suitable for a wiring board is provided. The wiring board has a contact surface, a core layer and pads. The contact pads are disposed on the contact surface, while the arrangement of non-signal through vias includes first non-signal through vias and a second non-signal... Agent: J.c. Patents, Inc.

20070194431 - Conductive vias having two or more conductive elements for providing electrical communication between traces in different planes in a substrate, semiconductor device assemblies including such vias, and accompanying methods: Electronic devices include a substrate with first and second pairs of conductive traces extending in or on the substrate. A first conductive interconnecting member extends through a hole in the substrate and communicates electrically with a first trace of each of the first and second pairs, while a second conductive... Agent: Trask Britt, P.C./ Micron Technology

20070194436 - Ball grid array package: A ball grid array package includes a substrate having a lower surface formed with several ball-mounting regions, a selective pad-mounting block, and an identifying mark for indicating the selective pad-mounting block. A die is disposed on an upper surface of the substrate. A molding resin is encapsulated on the substrate... Agent: Birch Stewart Kolasch & Birch

20070194435 - Semiconductor device and method of manufacturing the same: The multi-chip substrate is divided so that the foldout direction of fiber and the dividing direction of a substrate in each of first core material of two sheets of a multi-chip substrate may accomplish an acute angle, and fiber is exposed to the end face formed of this division. When... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070194434 - Differential signal transmission structure, wiring board, and chip package: A wiring board including a plurality of patterned conductive layers and a plurality of insulating layers is provided. The patterned conductive layers include a first patterned conductive layer and at least one second patterned conductive layer. The first patterned conductive layer has at least one pair of differential signal lines... Agent: J.c. Patents, Inc. Suite 250

20070194433 - Electronic circuit, a semiconductor device and a mounting substrate: An electronic circuit includes a first semiconductor device (4) and a second semiconductor device (3) on a mounting substrate. The mounting substrate includes a plurality of mounting substrate lines (201 to 204) which are connected in common with external terminals of a plurality of bits of the first semiconductor device... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070194437 - Substrate having a functionally gradient coefficient of thermal expansion: A substrate and a method of making a substrate having a functionally gradient coefficient of thermal expansion are described herein. A system having a silicon die, an organic package substrate, and a substrate having a functionally gradient coefficient of thermal expansion, connecting the silicon die and the organic substrate is... Agent: Jennifer Hayes Blakely, Sokoloff, Taylor & Zafman LLP

20070194438 - Device and method for joining substrates: A device for joining substrates (11) is provided inside a clean booth (12). a single axis robot (46) and a five axis robot (47) convey a wafer (25) and a glass substrate (33). A transcribing station (91) obtains a transcribing film (112) on which adhesive is applied from a film... Agent: Sughrue Mion, PLLC

20070194439 - Solid-state imaging device, fabrication method of the same, and camera module: There is provided a solid-state imaging device including: a semiconductor package support mounting a solid-state image sensor; bonding wires electrically connecting first terminals formed on the solid-state image sensor and second terminals formed on the semiconductor package support; a sealing member sealing at least the second terminals to which the... Agent: Sonnenschein Nath & Rosenthal LLP

20070194440 - Substrate for semiconductor device and semiconductor device: A configuration for a substrate for a semiconductor device which makes it possible to achieve further stabilization of the voltage for driving a semiconductor element (5) to be mounted is provided. The substrate for a semiconductor device is provided with a base (1) and an electrically insulating film (3) formed... Agent: Mcdermott Will & Emery LLP

20070194441 - Redistributed solder pads using etched lead frame: A semiconductor package has a thinned semiconductor die fixed in a shallow opening in a conductive body. The die electrodes at the bottom of the die are plated with a redistributed contact which overlaps the die bottom contact and an insulation body which fills the annular gap between the die... Agent: Kourosh Salehi

20070194442 - Multisurfaced microdevice system array and a method of producing the array: A multisurfaced microdevice system array is produced from a wafer formed of semiconductor substrate material. Sensing, controlling and actuating microdevices are fabricated at specific location on both sides of the wafer, and the wafer is diced. Each die thus created is then formed into a multisurfaced, multifaced structure having outer... Agent: Brooks Kushman P.C.

20070194443 - Power semiconductor modules having a cooling component and method for producing them: An arrangement with an associated production method, of a power semiconductor module in a pressure contact embodiment and a cooling component. The module includes load terminals embodied as metal molded bodies with a flat portion and a contact device originating at the flat portion, disposed within a housing. Each flat... Agent: Cohen, Pontani, Lieberman & Pavane

20070194444 - Protecting apparatus of chip: A protecting apparatus is provided for protecting a chip that is mounted on a subminiature circuit board. The protecting apparatus includes a supporting seat for mounting the subminiature circuit board thereon, and a protective cover for receiving the subminiature circuit board and the supporting seat therein. The supporting seat includes... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang Jeffrey T. Knapp

20070194446 - Memory module comprising an electronic printed circuit board and a plurality of semiconductor components and method: A memory module is proposed which has a first contact bank at a first edge of its electronic printed circuit board and a second contact bank at a second edge. The printed circuit board has first lines that reach from the first contact bank as far as input connections of... Agent: Slater & Matsil LLP

20070194447 - Semiconductor component comprising an integrated semiconductor chip and a chip housing, and electronic device: A semiconductor component includes an integrated semiconductor chip and a chip housing. The chip housing has first, second, third and fourth conductor tracks that connect input and output connections of the semiconductor chip to external contact connections on the underside and top side of the chip housing in such a... Agent: Slater & Matsil LLP

20070194445 - Semiconductor device and manufacturing method for the same: To provide a semiconductor device with high performance and reliability, in which peeling off an interconnection layer caused due to peeling off of a resin film at a land part is suppressed and thus electrical break down is prevented, and an efficient method for manufacturing the semiconductor device. The semiconductor... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070194448 - Semiconductor interconnection line and method of forming the same: An interconnection line of a semiconductor device and a method of forming the same using a dual damascene process are disclosed. An example interconnection line of a semiconductor device includes a semiconductor substrate, a first interconnection line formed on the substrate, an insulating layer pattern formed on the substrate to... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20070194449 - Pattern and fabricating method therefor, device and fabricating method therefor, electro-optical apparatus, electronic apparatus, and method for fabricating active matrix substrate: A method for fabricating a pattern on a substrate, includes the steps of forming banks according to formation areas of the pattern on the substrate, disposing a first function liquid between the banks, disposing a second function liquid on the first function liquid, and applying predetermined treatments to the first... Agent: Oliff & Berridge, PLC

20070194450 - Beol compatible fet structure: This invention provides structures and a fabrication process for incorporating thin film transistors in back end of the line (BEOL) interconnect structures. The structures and fabrication processes described are compatible with processing requirements for the BEOL interconnect structures. The structures and fabrication processes utilize existing processing steps and materials already... Agent: Daniel P. Morris

20070194451 - Apparatus for integrated input/output circuit and verification method thereof: An apparatus for integrated input/output circuit and a verification method thereof are provided. The apparatus effectively reduces the chip area occupation and cost, and decreases the resistance on an electrical transmission path of the integrated input/output circuit to improve the circuit efficiency. The apparatus comprises a metal structure and a... Agent: J.c. Patents, Inc.

20070194452 - Hydrogen permeable membrane, fuel cell and hydrogen extracting apparatus equipped with the hydrogen permeable membrane, and method of manufacturing the hydrogen permeable membrane: A hydrogen permeable membrane (10) for selectively allowing hydrogen to permeate therethrough includes a metal base layer (12) containing vanadium (V), a metal coating layer (16) containing palladium (Pd), and an intermediate layer (14) that is formed between the metal base layer (12) and the metal coating layer (16) and... Agent: Oliff & Berridge, PLC

20070194454 - Semiconductor device: This invention is to provide a nonvolatile memory device that enhances a size reduction and mass productivity while ensuring reliability and signal transmission performance. A nonvolatile memory chip having a first side formed with no pads and a second side formed with pads is mounted on a mounting substrate. A... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070194455 - Stacked semiconductor memory device and control method thereof: A stacked semiconductor memory device includes an interface chip and a plurality of core chips, in which the interface chip and the plurality of core chips are stacked. The core chips are mutually connected by a plurality of data through electrodes. The core chips each include a plurality of memory... Agent: Young & Thompson

20070194453 - Integrated circuit architecture for reducing interconnect parasitics: An integrated circuit includes a first semiconductor chip including one or more circuits thereon performing substantially core logic functions, the first semiconductor chip including multiple signal pads for providing electrical connection to the one or more circuits. The integrated circuit further includes at least a second semiconductor chip including one... Agent: Ryan, Mason & Lewis, LLP

20070194456 - Flexible circuit substrate for flip-chip-on-flex applications: A circuit substrate for attachment to an integrated circuit chip comprises an electrical trace, a mounting pad and a dielectric layer. The mounting pad has a first surface, one or more sidewalls and a second surface. The first surface is attached to the electrical trace. The dielectric layer substantially covers... Agent: Ryan, Mason & Lewis, LLP

20070194457 - Semiconductor package featuring thin semiconductor substrate and liquid crystal polymer sheet, and method for manufacturing such semiconductor package: In a semiconductor package, a wiring board includes an insulating substrate, and a plurality of first electrode terminals formed on a surface thereof. A semiconductor chip includes a semiconductor substrate, and a plurality of second electrode terminals formed on a surface thereof, and is mounted on the wiring board so... Agent: Young & Thompson

20070194458 - Methods of redistributing bondpad locations on an integrated circuit: Integrated circuits and methods of redistributing bondpad locations are disclosed. In one implementation, a method of redistributing a bondpad location of an integrated circuit includes providing an integrated circuit comprising an inner lead bondpad. A first insulative passivation layer is formed over the integrated circuit. A bondpad-redistribution line is formed... Agent: Wells St. John P.s.

20070194459 - Wiring substrate of a semiconductor component comprising external contact pads for external contacts and method for producing the same: A wiring substrate of a semiconductor component includes: an underside with a wiring structure; a top side with cutouts; a rubber-elastic material arranged in the cutouts; and external contact pads arranged on the rubber-elastic material and configured to be coupled to external contacts. A method for producing a wiring substrate... Agent: Edell, Shapiro & Finnan, LLC

20070194460 - Cap layer for an aluminum copper bond pad: A bond pad for an electronic device such as an integrated circuit makes electrical connection to an underlying device via an interconnect layer. The bond pad has a first layer of a material that is aluminum and copper and a second layer, over the first layer, of a second material... Agent: Freescale Semiconductor, Inc. Law Department

20070194461 - Apparatus and method for manufacturing semiconductor package capable of potting thermosetting resin while being heated: In an apparatus for manufacturing a semiconductor package including a semiconductor chip electronically and mechanically mounted on a tape-automated bonding tape, a resin potting unit is adapted to pot thermosetting resin into a gap between the semiconductor chip and the tape-automated bonding tape while the semiconductor chip and the tape-automated... Agent: Young & Thompson

20070194462 - Integrated circuit package system with bonding lands: An integrated circuit package system includes a first integrated circuit die having die pads only adjacent a single edge of the first integrated circuit die, forming first bonding lands adjacent the single edge, connecting the die pads and the first bonding lands, and encapsulating the die pads and a portion... Agent: Ishimaru & Zahrt LLP

20070194463 - Integrated circuit package system with l-shaped leadfingers: An integrated circuit package system includes a first integrated circuit die having die pads only adjacent a single edge of the first integrated circuit die, forming first L-shaped leadfingers adjacent the single edge, connecting the die pads and the first L-shaped leadfingers, and encapsulating the die pads and portions of... Agent: Ishimaru & Zahrt LLP

20070194464 - Semiconductor device and a manufacturing method thereof: A semiconductor device and a manufacturing method of the device are disclosed. The semiconductor device includes a substrate that mounts a semiconductor element, a first stiffener, a reinforcement resin member, and a second stiffener for reinforcing the reinforcement resin member.... Agent: Staas & Halsey LLP

20070194465 - Light emitting diode package structure and fabricating method thereof: A light emitting diode (LED) package structure including a first substrate, an LED chip, a second substrate, and a thermoelectric cooling device is provided. The first substrate has a first surface and a corresponding second surface. The LED chip suitable for emitting a light is arranged on the first surface... Agent: Jianq Chyun Intellectual Property Office

20070194466 - Overlay measurement mark and pattern formation method for the same: Fine projection patterns are added to each side of a base mark pattern of an overlay measurement mark. Thus, film separation in the overlay measurement mark can be prevented.... Agent: Mcginn Intellectual Property Law Group, PLLC

20070194467 - Nanowire array and nanowire solar cells and methods for forming the same: Homogeneous and dense arrays of nanowires are described. The nanowires can be formed in solution and can have average diameters of 40-300 nm and lengths of 1-3 μm. They can be formed on any suitable substrate. Photovoltaic devices are also described.... Agent: Lawrence Berkeley National Laboratory

20070187668 - Crystal substrates and methods of fabricating the same: A single crystal substrate and method of fabricating the same are provided. The single crystal substrate includes an insulator having a window exposing a portion of a substrate, a selective epitaxial growth layer formed on the portion of the substrate exposed through the window and a single crystalline layer formed... Agent: Harness, Dickey & Pierce, P.L.C

20070187676 - Organic electro-luminescent display and method of fabricating the same: Provided are an organic electro-luminescent display (“OELD”) and a method of fabricating the OLED. The OELD includes an organic light emitting diode (“OLED”), a driving transistor driving the OLED, and a switching transistor controlling an operation of the driving transistor. The driving transistor includes an active layer having a crystal... Agent: Cantor Colburn, LLP

20070187680 - Organic electro-luminescent display and fabrication method thereof: In an organic electro-luminescent display, a pixel circuit is disposed in a unit pixel region defined on a substrate. A passivation layer covers the entire unit pixel region including the pixel circuit. An organic light emitting diode (“OLED”) including a transparent lower electrode formed on a portion of the passivation... Agent: Cantor Colburn, LLP

20070187689 - Array substrate for liquid crystal display device and fabrication metho thereof: Provided is a liquid crystal display (LCD) device and a fabrication method thereof. An array substrate for the LCD includes a gate line formed on a substrate, and a gate electrode extending from the gate line; a data line intersected with the gate line, wherein the data line is configured... Agent: Brinks Hofer Gilson & Lione

20070187699 - Light emitting element, light emitting device, and electronic device: A light emitting element is provided, which comprises a pair of electrodes, a p-type semiconductor layer, and an n-type semiconductor layer. The p-type semiconductor layer and the n-type semiconductor layer are interposed between the pair of electrodes. The p-type semiconductor layer includes a first sulfide, and the n-type semiconductor layer... Agent: Fish & Richardson P.C.

20070187698 - Nitride-based semiconductor light emitting device and method of manufacturing the same: A nitride-based semiconductor light emitting device having an improved structure in which light extraction efficiency is improved and a method of manufacturing the same are provided. The nitride-based semiconductor light emitting device comprises an n-clad layer, an active layer, and a p-clad layer, which are sequentially stacked on a substrate,... Agent: Buchanan, Ingersoll & Rooney PC

20070187702 - Facet extraction led and method for manufacturing the same: A facet extraction LED improved in light extraction efficiency and a manufacturing method thereof. A substrate is provided. A light emitting part includes an n-type semiconductor layer, an active layer and a p-type semiconductor layer sequentially stacked on the substrate. A p-electrode and an n-electrode are connected to the p-type... Agent: Mcdermott Will & Emery LLP

20070187705 - Illuminating device and liquid crystal display device using the same: An illuminating device is provided for enhancing evenness of a brightness distribution or a chromaticity distribution of a light-emitting diode device. The illuminating device is made up of a substrate, one or more light-emitting diode devices located on the substrate, a reflector plate located on the substrate, and a transparent... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070187706 - Light-emitting device and method for manufacturing the same: The invention provides a light-emitting device 10 including an light-emitting element 12 and a substrate 11 where the light-emitting element 12 is arranged, characterized in that a housing part 28 housing the light-emitting element 12 and having a shape that is tapered upward from the substrate 11 and a metal... Agent: Rankin, Hill, Porter & Clark LLP

20070187707 - Semiconductor device and production method thereof: A method of producing a semiconductor device, comprising: a first plasma processing step of processing a surface of a resin layer laid on a semiconductor element and containing silicon, with a first plasma generated from a gas containing oxygen and fluorine, thereby forming an oxide film; and an electrode pad... Agent: Smith, Gambrell & Russell

20070187663 - Damascene phase change memory: A phase change material may include a pore formed of a relatively smaller phase change material and a relatively larger resistance heater. As a result, the relatively smaller portion of phase change material may have improved properties.... Agent: Trop Pruner & Hu, PC

20070187664 - Phase change memory cell with high read margin at low power operation: A memory cell device includes a first electrode, phase-change material adjacent the first electrode, a second electrode adjacent the phase-change material, a diffusion barrier adjacent the phase-change material, and isolation material adjacent the diffusion barrier for thermally isolating the phase-change material. The diffusion barrier prevents diffusion of the phase-change material... Agent: Dicke, Billig & Czaja

20070187665 - Light-emitting transistor: The present invention intends to provide a light-emitting transistor (LEFET), a light-emitting device with a switching function, which can produce an adequately strong emission of light with higher emission efficiency. The drain electrode 25 is made of aluminum and the source electrode 24 is made of gold. When a voltage... Agent: Oliff & Berridge, PLC

20070187666 - Gallium nitride-based compound semiconductor light-emitting device: An object of the present invention is to provide a gallium nitride compound semiconductor light-emitting device having excellent heat resistance, which device is resistive to an increase in the forward operation voltage (VF) caused by mild heating performed after formation of the light-emitting device (e.g., heating to about 300° C.... Agent: Sughrue Mion, PLLC

20070187667 - Electronic device including a selectively polable superlattice: An electronic device may include a selectively polable superlattice comprising a plurality of stacked groups of layers. Each group of layers of the selectively polable superlattice may include a plurality of stacked semiconductor monolayers defining a semiconductor base portion and at least one non-semiconductor monolayer thereon. The at least one... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist P.A.

20070187669 - Field effect transistor and a method for manufacturing the same: A field effect transistor fabricated in a device isolation region includes a Si1-xGex layer (0<x≦1) that a lattice strain is relaxed, a strained Si layer formed on the Si1-xGex, a gate electrode insulatively disposed over a part of the strained Si layer, source and drain regions formed in the strained... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070187670 - Opto-thermal annealing mask and method: An opto-thermal annealing mask stack layer includes a thermal dissipative layer located over a substrate. A reflective layer is located upon the thermal dissipative layer. A transparent capping layer, that may have a thickness from about 10 to about 100 angstroms, is located upon the reflective layer. The opto-thermal annealing... Agent: Scully Scott Murphy & Presser, PC

20070187672 - Charge-transporting varnish and organic electro-luminescent devices made by using the same: A charge-transporting varnish containing either a charge-transporting substance consisting of a charge-transporting oligoaniline or a charge-transporting organic material consisting of the charge-transporting substance and a charge-accepting dopant and at least one polymer selected from among polyimides and polyimide precursors; and charge-transporting thin films and organic EL devices, made by using... Agent: Birch Stewart Kolasch & Birch

20070187677 - Dual panel-type organic electroluminescent device and method for fabricating the same: A method of fabricating a dual panel-type active matrix organic electroluminescent device includes patterning a first metal layer to form a gate electrode, a gate line, a power line, a gate pad, and a power pad on a first substrate, forming a first insulating layer on the first substrate to... Agent: Morgan Lewis & Bockius LLP

20070187673 - Electroluminescent devices having pendant naphthylanthracene-based polymers: R1, R2, and R3 are the same or different, and are each individually hydrogen, or alkyl, or alkenyl, or alkynyl, or alkoxy, or amino, or thioalkyl, or carboxyl, or carbonyl, wherein the alkyl, alkenyl, alkynyl, alkoxy, amino, thioalkyl, carboxy, or carbonyl can have from 1 to 40 carbon atoms; or... Agent: Pamela R. Crocker Patent Legal Staff

20070187671 - Organic electronic component with high resolution structuring, and method of the production thereof: The invention relates to an electronic component made primarily from organic materials with high resolution structuring, in particular to an organic field effect transistor (OFET) with a small source-drain distance, and to a production method thereof. The organic electronic component has depressions and/or modified regions in which the conductor tracks/electrodes,... Agent: Carella, Byrne, Bain, Gilfillan, Cecchi, Stewart & Olstein

20070187675 - Organic light emitting device: Provided is an organic light emitting device that includes at least one organic layer between a first electrode and an emissive layer wherein the organic layer includes at least two organic materials and at least one of the organic materials consequently has a concentration gradient in the direction from the... Agent: Robert E. Bushnell

20070187674 - Organic thin film transistor: A thin film transistor comprising at least three terminals consisting of a gate electrode, a source electrode and a drain electrode; an insulator layer and an organic semiconductor layer on a substrate, which controls its electric current flowing between the source and the drain by applying a electric voltage across... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070187678 - Semiconductor device including active layer made of zinc oxide with controlled orientations and manufacturing method thereof: A semiconductor device includes an oxide semiconductor thin film layer primarily including zinc oxide having at least one orientation other than (002) orientation. The zinc oxide may have a mixed orientation including (002) orientation and (101) orientation. Alternatively, the zinc oxide may have a mixed orientation including (100) orientation and... Agent: Frishauf, Holtz, Goodman & Chick, PC

20070187679 - Technique for evaluating a fabrication of a die and wafer: The fabrication of the wafer may be analyzed starting from when the wafer is in a partially fabricated state. The value of a specified performance parameter may be determined at a plurality of locations on an active area of a die of the wafer. The specified performance parameter is known... Agent: Shemwell Mahamedi LLP

20070187681 - Thin film transistor: A thin film transistor and method of fabrication a thin film transistor and a pixel structure are provided. First, a gate is formed on the substrate. Then, a gate-isolating layer is formed on the substrate to cover the gate electrode. After that, a source/drain is formed on the gate-isolating layer... Agent: Jianq Chyun Intellectual Property Office

20070187682 - Semiconductor device having fin-type effect transistor: There is provided a semiconductor device comprising an n-type and a p-type field effect transistors, meeting the conditions that in terms of a crystal orientation of the protruding semiconductor region constituting the n-type field effect transistor, its plane parallel to the substrate is substantially a {100} plane and its side... Agent: Sughrue Mion, PLLC

20070187683 - Localized compressive strained semiconductor: One aspect of the present subject matter relates to a method for forming strained semiconductor film. According to an embodiment of the method, a crystalline semiconductor bridge is formed over a substrate. The bridge has a first portion bonded to the substrate, a second portion bonded to the substrate, and... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070187684 - Semiconductor device, cpu, image processing circuit and electronic device, and driving method of semiconductor device: The invention provides a semiconductor device which consumes less power in pending. The invention further provides a semiconductor device in which a gate electrode is provided over both sides of a semiconductor thin film which forms a transistor, a logic signal is applied to a first gate electrode, a threshold... Agent: Fish & Richardson P.C.

20070187688 - Co-planar thin film transistor having additional source/drain insulation layer: A co-planar thin film transistor, TFT (22), and a method of fabricating the same, in which an additional insulating layer is provided on the source contact (30) and the drain contact (32) and defined such that a first region (34) of the additional insulating layer occupies substantially the same area... Agent: Philips Intellectual Property & Standards

20070187692 - Electro-optical device, wiring substrate, and electronic apparatus: The invention provides an electro-optical device in which a voltage drop due to the wiring resistance of a cathode is reduced and therefore steady image signals are transmitted such that erroneous image display, such as low contrast, is reduced or prevented. The invention also provides an electronic apparatus including such... Agent: Oliff & Berridge, PLC

20070187687 - Pixel structure and liquid crystal display panel: A pixel structure including a scan line, a data line, a first thin film transistor, a second thin film transistor, a first pixel electrode and a second pixel electrode, is described. The first thin film transistor is electrically connected to the scan line and the data line and has a... Agent: J.c. Patents, Inc.

20070187685 - Thin film transistor and thin film transistor array substrate: A thin film transistor including a gate, a gate insulating layer, a channel layer, a spiral source and a spiral drain is provided. The gate insulating layer covers the gate. The channel layer is disposed on the gate insulating layer above the gate. The spiral source and the spiral drain... Agent: Jianq Chyun Intellectual Property Office

20070187691 - Thin film transistor array panel and liquid crystal display including the panel: A thin film transistor array panel is provided, which includes: a plurality of gate lines formed on a substrate and including a plurality of oblique portions and a plurality of gate electrodes; a first insulating layer on the gate line; a semiconductor layer formed on the first insulating layer; a... Agent: Macpherson Kwok Chen & Heid LLP

20070187690 - Thin film transistor substrate and method for forming metal wire thereof: The present invention relates to a thin film transistor substrate and a metal wiring method thereof, more particularly to a thin film transistor substrate comprising self-assembled monolayers between the substrate and the metal wiring, and a metal wiring thereof. Since a thin film transistor substrate of the present invention comprises... Agent: Macpherson Kwok Chen & Heid LLP

20070187686 - Thin film transistor, thin film transistor array and repairing method thereof: A thin film transistor (TFT) including a gate, a semiconductor layer, a source and a drain is provided. The gate has a control part, a connection part and a capacitance compensation part. The connection part is disposed between the control part and the capacitance compensation part for joining the two... Agent: Jianq Chyun Intellectual Property Office

20070187694 - Devices including graphene layers epitaxially grown on single crystal substrates: An electronic device comprises a body including a single crystal region on a major surface of the body. The single crystal region has a hexagonal crystal lattice that is substantially lattice-matched to graphene, and a at least one epitaxial layer of graphene is disposed on the single crystal region. In... Agent: Michael J. Urbano

20070187693 - Gallium nitride-based semiconductor device: A gallium nitride-based semiconductor device has a p-type layer that is a gallium nitride compound semiconductor layer containing a p-type impurity and exhibiting p-type conduction. The p-type layer includes a top portion and an inner portion located under the top portion. The inner portion contains the p-type impurity element and,... Agent: Sughrue Mion, PLLC

20070187695 - Semiconductor device and method of forming the same: A semiconductor device and a method of forming thereof has a base body has a field stopping layer, a drift layer, a current spreading layer, a body region, and a source contact region layered in the order on a substrate. A trench that reaches the field stopping layer or the... Agent: Rossi, Kimms & Mcdowell LLP.

20070187700 - Method of manufacturing group iii nitride substrate and semiconductor device: The present invention provides a method of manufacturing a Group III nitride substrate that has less variations in in-plane carrier concentration and includes crystals grown at a high growth rate. The manufacturing method of the present invention includes: (i) forming a semiconductor layer (a seed layer 12) on a substrate,... Agent: Hamre, Schumann, Mueller & Larson P.C.

20070187697 - Nitride based mqw light emitting diode having carrier supply layer: A MQW LED structure is provided herein, which contains a carrier supply layer joined to a side of the MQW light emitting layer to provide additional carriers for recombination and to avoid/reduce the use of impurity in the light emitting layer. The carrier supply layer contains multiple and interleaving well... Agent: Lin & Associates Intellectual Property

20070187696 - Semiconductor light emitting device: A semiconductor light emitting device including a transparent compound semiconductor substrate whose lattice constant is inconsistent with the compound semiconductor emitting the light and exhibiting high light output is obtained. A semiconductor light emitting device includes a GaP substrate, an active layer located above GaP substrate and including an n-type... Agent: Mcdermott Will & Emery LLP

20070187701 - Compact multi-led light source with improved heat dissipation: A light source having a substrate having first and second surfaces is disclosed. The substrate has first and second conducting traces on the first surface. A heat conducting metallic layer is attached to the second surface. First and second LEDs are disposed on the first surface, each LED having first... Agent: Kathy Manke Avago Technologies Limited

20070187703 - Light emitting systems: Light-emitting systems, and related components, systems and methods are disclosed.... Agent: Wolf Greenfield & Sacks, P.C.

20070187704 - Semiconductor light emitting element, manufacturing method thereof, integrated semiconductor light emitting device, manufacturing method thereof, image display device, manufacturing method thereof, illuminating device and manufacturing method thereof: A semiconductor light emitting element, manufacturing method. thereof, integrated semiconductor light emitting device, manufacturing method thereof, illuminating device, and manufacturing method thereof are provided. An n-type GaN layer is grown on a sapphire substrate, and a growth mask of SiN, for example, is formed thereon. On the n-type GaN layer... Agent: Bell, Boyd & Lloyd, LLP

20070187708 - Led illumination apparatus and card-type led illumination source: An LED illumination includes an insertable and removable LED illumination source having a feeder terminal on one surface of a substrate on which an LED has been mounted; a thermal conductor member, which contacts with a back surface of the substrate on which the LED is not present; at least... Agent: Akin Gump Strauss Hauer & Feld L.L.P.

20070187709 - Semiconductor device and method for manufacturing the same: The semiconductor device 1 comprises a housing 12 which has the recess 24 in the front surface 14, the pair of lead electrodes 20 which have the distal ends 34 exposed in the recess 24, protrude from the external surface of the housing 12 and are bent along the bottom... Agent: Birch Stewart Kolasch & Birch

20070187711 - Wafer level package for image sensor components and fabricating method thereof: A wafer level package for image sensor components includes an image sensor chip and several metal pillars. Several vias formed in the image sensor chip are aligned with several bonding pads. The metal pillars are formed in the vias. First ends of the metal pillars are bonded to the bonding... Agent: Birch Stewart Kolasch & Birch

20070187710 - Led light source: An LED unit (20) having increased light output. The LED unit (20) includes a submount substrate (22) having a cavity (24). An LED chip (30) is electrically mounted within the cavity (24) and a phosphor layer (34) is deposited in the cavity (24) that converts blue light from the LED... Agent: Warn, Hoffmann, Miller & Lalone, .p.c

20070187713 - Nitride semiconductor light-emitting device and method for manufacturing the same: Disclosed are a nitride semiconductor light emitting device and a method for manufacturing the same. The nitride semiconductor light emitting device includes a first nitride layer, an active layer including at least one delta-doping layer on the first nitride layer through delta-doping, and a second nitride layer on the active... Agent: Birch Stewart Kolasch & Birch

20070187712 - Light emitting device and method of fabricating the same: A composite growth-assisting substrate 10 is formed by epitaxially growing a separation-assisting compound semiconductor layer 10k composed of a non-GaAs III-V compound semiconductor single crystal, and then a sub-substrate 10e composed of a GaAs single crystal in this order, on a first main surface of a substrate bulk 10m composed... Agent: Snider & Associates

20070187714 - Oled lighting apparatus and method: The disclosure relates to organic light emitting diode devices for area illumination. The devices include an organic light emitting diode lamp responsive to electrical power for emitting light. A controller regulates the light output from the organic light emitting diode lamp using a range selection switch for varying a power... Agent: Pamela R. Crocker Patent Legal Staff

20070187715 - Power junction field effect power transistor with highly vertical channel and uniform channel opening: A semiconductor vertical junction field effect power transistor formed by a semiconductor structure having top and bottom surfaces and including a plurality of semiconductor layers with predetermined doping concentrations and thicknesses and comprising at least a bottom layer as drain layer, a middle layer as blocking and channel layer, a... Agent: Lerner, David, Littenberg, Krumholz & Mentlik

20070187716 - High speed ge channel heterostructures for field effect devices: A method and a layered heterostructure for forming high mobility Ge channel field effect transistors is described incorporating a plurality of semiconductor layers on a semiconductor substrate, and a channel structure of a compressively strained epitaxial Ge layer having a higher barrier or a deeper confining quantum well and having... Agent: Scully, Scott, Murphy & Presser, P.C.

20070187717 - Semiconductor device having reduced on-resistance and method of forming the same: A semiconductor device and method of forming the same. The semiconductor device includes an epitaxially grown and conductive buffer layer having a contact covering a substantial portion of a bottom surface thereof and a lateral channel above the buffer layer. The semiconductor device also includes another contact above the lateral... Agent: Slater & Matsil, L.L.P.

20070187718 - Normally-off field-effect semiconductor device, and a method of initializing the same: A HEMT-type field-effect semiconductor device has a main semiconductor region formed on a silicon substrate. The main semiconductor region is a lamination of a buffer layer on the substrate, an electron transit layer on the buffer layer, and an electron supply layer on the electron transit layer. A source and... Agent: Woodcock Washburn LLP

20070187719 - Method for double-sided processing of thin film transistors: This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and... Agent: Foley & Lardner LLP

20070187720 - Light sensing panel, and liquid crystal display apparatus having the same: A light sensing panel includes a scan line transmitting a scan signal, a power source line transmitting a bias voltage, a readout line transmitting a light sensing signal and a light sensing device. The light sensing device includes a control electrode that is electrically connected to the scan line to... Agent: F. Chau & Associates, LLC

20070187721 - Semiconductor device, method of manufacturing the same, sense amplifier and method of forming the same: A semiconductor device includes first and second unit circuits. Each first unit circuit has first transistors connected in series, wherein each of the first transistors includes a first gate structure having a pitch. Each second unit circuit has second transistors connected in series, wherein each of the second transistors includes... Agent: Marger Johnson & Mccollom, P.C.

20070187722 - Apparatus and method of manufacture for an imager equipped with a cross-talk barrier: An imager apparatus and associated starting material are provided. In one embodiment, an imager is provided including a silicon layer of a first conductivity type acting as a junction anode. Such silicon layer is adapted to convert light to photoelectrons. Also included is a semiconductor well of a second conductivity... Agent: Zilka-kotab, PC

20070187723 - Two-branch outputting solid-state imaging device and imaging apparatus: A two-branch outputting solid-state imaging device is provided and includes: two output amplifiers including a first output amplifier and a second output amplifier, each outputting a voltage signal in accordance with the signal charge transferred toward the output end through the charge transfer path; and a branching part that distributes... Agent: Birch Stewart Kolasch & Birch

20070187724 - Image sensor with large-area, high-sensitivity and high-speed pixels: The pixel for use in an image sensor comprises a low-doped semiconductor substrate (A). On the substrate (A), an arrangement of a plurality of floating areas e.g., floating gates (FG2-FG6), is provided. Neighboring floating gates are electrically isolated from each other yet capacitively coupled to each other. By applying a... Agent: Weingarten, Schurgin, Gagnebin & Lebovici LLP

20070187725 - Method and apparatus for a semiconductor device with a high-k gate dielectric: A process and apparatus for a high-k gate dielectric MOS transistor is described. A substrate is provided, a high-k gate dielectric material is deposited over the substrate, a gate electrode layer is deposited over the dielectric material and a patterning step is performed creating sidewalls of the electrode and dielectric... Agent: Slater & Matsil, L.L.P.

20070187726 - Solid-state imaging device, method for driving the same, method for manufacturing the same, camera, and method for driving the same: A solid-state imaging device includes a two-dimensional array of photosensor sections on a semiconductor substrate, and a vertical transfer section including two-layer vertical transfer electrodes. The photosensor sections store signal charges generated by photoelectric conversion. The vertical transfer section reads signal charges from the photosensor sections and vertically transfers the... Agent: Rader Fishman & Grauer PLLC

20070187727 - Semiconductor mos transistor device and method for making the same: A method of manufacturing a metal-oxide-semiconductor (MOS) transistor device is disclosed. A gate dielectric layer is formed on an active area of a substrate. A gate electrode is patterned on the gate dielectric layer. The gate electrode has vertical sidewalls and a top surface. A liner is formed on the... Agent: North America Intellectual Property Corporation

20070187730 - Memory devices having charge trap layers: Example embodiments may provide memory devices having a charge trap layer which includes a hole trap and an electron trap. The memory device may generate a relatively large flat band voltage gap according to an applied bias voltage. Accordingly, a stable multilevel cell may be realized.... Agent: Harness, Dickey & Pierce, P.L.C

20070187729 - Unipolar nanotube and field effect transistor having the same: Example embodiments relate to a unipolar carbon nanotube having a carrier-trapping material and a unipolar field effect transistor having the unipolar carbon nanotube. The carrier-trapping material, which is sealed in the carbon nanotube, may readily transform an ambipolar characteristic of the carbon nanotube into a unipolar characteristic by doping the... Agent: Harness, Dickey & Pierce, P.L.C

20070187728 - Field effect transistor with suitable source, drain and channel materials and integrated circuit comprising same: The normally on transistor comprises a source, a drain and a channel. The source, drain and channel materials are chosen such that, for a NMOS type transistor, the electronic affinity of the drain material is lower than the electronic affinity of the channel material and the electronic affinity of the... Agent: Oliff & Berridge, PLC

20070187731 - Methods for forming semiconductor wires and resulting devices: Methods for forming a wire from silicon or other semiconductor material are disclosed. Also disclosed are various devices including such a semiconductor wire. According to one embodiment, a wire is spaced apart from an underlying substrate, and the wire extends between a first end and an opposing second end, each... Agent: Intel Corporation C/o Intellevate, LLC

20070187733 - Monolithic photodetector: A photodetector including a photodiode formed in a semiconductor substrate and a waveguide element formed of a block of a high-index material extending above the photodiode in a thick layer of a dielectric superposed to the substrate, the thick layer being at least as a majority formed of silicon oxide... Agent: Graybeal, Jackson, Haley LLP

20070187732 - Solid-state image sensor using junction gate type field-effect transistor as pixel: A source region and drain region are formed in a surface region of a first semiconductor region. Moreover, a second semiconductor region connected to the drain region is formed in the surface region of the first semiconductor region. A third semiconductor region is formed in the first semiconductor region under... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070187734 - A cmos imager photodiode with enhanced capacitance: A pixel sensor cell having a semiconductor substrate having a surface; a photosensitive element formed in a substrate having a non-laterally disposed charge collection region entirely isolated from a physical boundary including the substrate surface. The photosensitive element comprises a trench having sidewalls formed in the substrate of a first... Agent: Scully, Scott, Murphy & Presser, P.C.

20070187735 - Method of manufacturing semiconductor device, and semiconductor device: A first hydrogen barrier film and an intermediate layer are formed on an interlayer dielectric film. A ferroelectric capacitor is formed on the intermediate layer, and a second hydrogen barrier film is formed over the entire surface including on the upper surface and side surfaces of the ferroelectric capacitor and... Agent: Harness, Dickey & Pierce, P.L.C

20070187736 - Semiconductor memory device: A sense amplifier is constructed to reduce the occurrence of malfunctions in a memory read operation, and thus degraded chip yield, due to increased offset of the sense amplifier with further sealing down. The sense amplifier circuit is constructed with a plurality of pull-down circuits and a pull-up circuit, and... Agent: Miles & Stockbridge PC

20070187738 - Stud electrode and process for making same: A process of making a stud capacitor structure is disclosed. The process includes embedding the stud in a dielectric stack. In one embodiment, the process includes forming an electrically conductive seed film in a contact corridor of the dielectric stack. A storage cell stud is also disclosed. The storage cell... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070187737 - Terraced film stack: A process and apparatus directed to forming a terraced film stack of a semiconductor device, for example, a DRAM memory device, is disclosed. The present invention addresses etch undercut resulting from materials of different etch selectivity used in the film stack, which if not addressed can cause device failure.... Agent: Dinsmore & Shohl LLP

20070187739 - Three-dimensional capacitor structure: A three-dimensional capacitor structure has a first conductive layer, a second conductive layer disposed above the first conductive layer, and a plug layer disposed therebetween. The first conductive layer includes a plurality of grid units arranged in a matrix, where in odd rows of the matrix, a first conductive grid... Agent: North America Intellectual Property Corporation

20070187740 - Capacitance cell, semiconductor device, and capacitance element arranging method: A capacitance cell 21 is wired while using adjacent wiring layers Ma and Mb as a pair of electrode layers T1 and T2 orthogonally to opposed lateral end faces out of lateral end faces X1, X2, Y1, and Y2 that section the cell in a plane direction. Contact surfaces of... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070187741 - Thin film transistor substrate, method of manufacturing the same and display apparatus having the same: In a thin film transistor substrate, a method of manufacturing the same, and a display apparatus having the same, a thin film transistor, a gate member, and a storage member are formed on an insulating substrate. The gate member has a gate line and a gate electrode electrically connected to... Agent: Cantor Colburn, LLP

20070187742 - Semiconductor memory device and manufacturing method thereof: The disclosure concerns a semiconductor memory device including an insulating film; a semiconductor layer provided on the insulating film; a source layer and a drain layer formed on the semiconductor layer; a body region provided between the source layer and the drain layer, the body region being in an electrically... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070187744 - Integrated circuits, memory device, method of producing an integrated circuit, method of producing a memory device, memory module: The invention relates to integrated circuits, a memory device, a method of producing an integrated circuit, a method of producing a memory device, and a memory module.... Agent: Slater & Matsil LLP

20070187743 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a pair of select gate structures which are opposed to each other and which are formed in a select transistor formation area, each of the select gate structures including a gate insulating film formed on a semiconductor substrate and a gate electrode formed on the gate... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070187746 - Nonvolatile semiconductor memory device with trench structure: In a nonvolatile semiconductor memory device, a semiconductor substrate has trenches formed to extend in parallel. A first electrode formed on the semiconductor substrate through an insulating film in each of the trenches, and a second electrode is formed on the first electrodes and the semiconductor substrate through the insulating... Agent: Sughrue Mion, PLLC

20070187747 - Ballistic injection nrom flash memory: A split NROM flash memory cell is comprised of source/drain regions in a substrate. The split nitride charge storage regions are insulated from the substrate by a first layer of oxide material and from a control gate by a second layer of oxide material. The nitride storage regions are isolated... Agent: Leffert Jay & Polglaze, P.A. Attn: Kenneth W. Bolvin

20070187748 - Floating gate memory structures: Dielectric regions (210) are formed on a semiconductor substrate between active areas of nonvolatile memory cells. The top portions of the dielectric region sidewalls are etched to recess the top portions laterally away from the active areas. Then a conductive layer is deposited to form the floating gates (410). The... Agent: Macpherson Kwok Chen & Heid LLP

20070187745 - Nand-type semiconductor storage device and method for manufacturing same: According to this invention, there is provided a NAND-type semiconductor storage device including a semiconductor substrate, a semiconductor layer formed on the semiconductor substrate, a buried insulating film selectively formed between the semiconductor substrate and the semiconductor layer in a memory transistor formation region, diffusion layers formed on the semiconductor... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070187749 - Semiconductor device and manufacturing method: A semiconductor device comprises a memory cell array portion and peripheral circuit portion, wherein a first insulation film including elements as main components other than nitrogen fills between the memory cell gate electrodes of the memory cell array portion, the first insulation film is formed as a liner on a... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070187750 - Superjunction power semiconductor device: A superjunction power semiconductor device which includes spaced drift regions each extending from the bottom of a respective gate trench to the substrate of the device.... Agent: Ostrolenk Faber Gerb & Soffen

20070187752 - Memory cell with a vertical transistor and fabrication method thereof: A memory cell with a vertical transistor has a semiconductor silicon substrate with a deep trench, in which the deep trench has a first sidewall region and a second sidewall region. A first insulating layer is formed overlying the first sidewall region. A second insulating layer is formed overlying the... Agent: Quintero Law Office, PC

20070187751 - Method of fabrication and device configuration of asymmetrical dmosfet with schottky barrier source: A trenched semiconductor power device includes a trenched gate insulated by a gate insulation layer and surrounded by a source region encompassed in a body region above a drain region disposed on a bottom surface of a semiconductor substrate. The source region surrounding the trenched gate includes a metal of... Agent: Bo-in Lin

20070187753 - Super trench mosfet including buried source electrode and method of fabricating the same: In a trench MOSFET, the lower portion of the trench contains a buried source electrode, which is insulated from the epitaxial layer and semiconductor substrate but in electrical contact with the source region. When the MOSFET is in an “off” condition, the bias of the buried source electrode causes the... Agent: Patentability Associates

20070187754 - Process to control semiconductor wafer yield: The size of BVDSS distribution is controlled by the active manipulation of the distribution of silicon parameters across a wafer to offset opposing effects inherent in the wafer fabrication process. Thus, the resistivity of the silicon wafer is increased toward the edge of the wafer. This offsets the drop-off of... Agent: Ostrolenk Faber Gerb & Soffen

20070187755 - Non-volatile memory cells and methods for fabricating the same: A non-volatile memory cell and method of fabrication are provided. The non-volatile memory cell includes a substrate of a first conductivity type, a first dopant region of a second conductivity type in the substrate, a second dopant region of the first conductivity type in the first dopant region, a first... Agent: Sawyer Law Group LLP

20070187756 - Metal source power transistor and method of manufacture: A metal source power transistor device and method of manufacture is provided, wherein the metal source power transistor having a source which is comprised of metal and which forms a Schottky barrier with the body region and channel region of the transistor. The metal source power transistor is unconditionally immune... Agent: Dorsey & Whitney LLP Intellectual Property Department

20070187757 - Semiconductor devices and methods of fabricating the same: The present disclosure provides an example of a semiconductor device. In addition, a method for fabricating a semiconductor device is outlined. The semiconductor device may be fabricated by providing a semiconductor substrate, forming a gate over the substrate, forming diffusion barrier ion regions, forming halo regions, forming a source, and... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20070187759 - Display apparatus and fabricating method thereof: A method of fabricating a display apparatus includes depositing a first layer on a substrate while a mask is disposed at a first distance from the substrate, and forming a second layer on the substrate while the mask is disposed at a second distance larger than the first distance from... Agent: Cantor Colburn, LLP

20070187758 - Sb-mosfet (schottky barrier metal-oxide-semiconductor field effect transistor) with low barrier height and fabricating method thereof: Provided is a high-performance n-type Schottky barrier tunneling transistor with low Schottky barrier for electrons due to a Schottky junction formed on a Si (111) surface created through anisotropic etching. The Schottky barrier tunneling transistor includes: a silicon on insulator (SOI) substrate; a source and a drain formed on the... Agent: Ladas & Parry LLP

20070187760 - Thin film transistor including low resistance conductive thin films and manufacturing method thereof: A thin film transistor includes a substrate, and a pair of source/drain electrodes (i.e., a source electrode and a drain electrode) formed on the substrate and defining a gap therebetween. A pair of low resistance conductive thin films are provided such that each coats at least a part of one... Agent: Frishauf, Holtz, Goodman & Chick, PC

20070187761 - Semiconductor device and method of manufacturing the same: The present invention is characterized in that a semiconductor film containing a rare gas element is formed on a crystalline semiconductor film obtained by using a catalytic element via a barrier layer, and the catalytic element is moved from the crystalline semiconductor film to the semiconductor film containing a rare... Agent: Cook, Alex, Mcfarron, Manzo, Cummings & Mehler Ltd

20070187762 - Integrated circuit device and electronic instrument: A semiconductor integrated circuit includes N pad rows in which pads are respectively arranged, and electrostatic discharge protection elements disposed in a lower layer of the N pad rows and connected with each pad in the N pad rows. The electrostatic discharge protection elements are disposed in a lower layer... Agent: Oliff & Berridge, PLC

20070187764 - Method for manufacturing semiconductor integrated circuit device: In a process of forming MISFETs that have gate insulating films that are mutually different in thickness on the same substrate, the formation of an undesirable natural oxide film at the interface between the semiconductor substrate and the gate insulating film is suppressed. A gate insulating film of MISFETs constituting... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070187763 - Semiconductor apparatus: A semiconductor apparatus is disclosed. The semiconductor apparatus comprises a substrate with a pad, an internal circuitry region, and a protection resistance formed on the substrate. The pad is connected to a first electrode of the protection resistance by wiring, the internal circuitry region is connected to a second electrode... Agent: Cooper & Dunham, LLP

20070187765 - Wire bond and redistribution layer process: A manufacturing method of a semiconductor device with a copper redistribution line, a copper inductor and aluminum wire bond pads and the integration of the resulting device with an integrated circuit on a single chip, resulting in the decreased size of the chip.... Agent: Pillsbury Winthrop Shaw Pittman LLP

20070187766 - High voltage semiconductor device utilizing a deep trench structure: A semiconductor device includes a substrate having a source, a drain, and a gate between the source and the drain. Both the source and the drain include a first edge, and the gate includes a first portion. A first deep trench structure is situated under the first portion of the... Agent: Haynes And Boone, LLP

20070187768 - Nano-enabled memory devices and anisotropic charge carrying arrays: Methods and apparatuses for nanoenabled memory devices and anisotropic charge carrying arrays are described. In an aspect, a memory device includes a substrate, a source region of the substrate, and a drain region of the substrate. A population of nanoelements is deposited on the substrate above a channel region, the... Agent: Nanosys Inc.

20070187767 - Semiconductor device including misfet: A semiconductor device includes a semiconductor substrate, a gate insulating film, a gate electrode, a source/drain layer, and a germanide layer. The gate insulating film is formed on the semiconductor substrate. The gate electrode is formed on the gate insulating film. The source/drain layer is formed on both sides of... Agent: Foley And Lardner LLP Suite 500

20070187771 - Semiconductor device and method of manufacturing the same: In a semiconductor device 10, an electrode terminal 18 of a semiconductor element 14 embedded in an insulating layer 12 formed by a resin forming a substrate and a land portion 20 forming an external connecting terminal are electrically connected to each other through a wiring pattern 22 formed on... Agent: Drinker Biddle & Reath (dc)

20070187770 - Semiconductor integrated circuit device and method of manufacturing the same: A semiconductor integrated circuit device may include a semiconductor substrate, a static memory cell on the semiconductor substrate, a tensile stress film on the pull-down transistors, and a compressive stress film on the pass transistors. The static memory cell may include multiple pull-up transistors and pull-down transistors, which form a... Agent: Lee & Morse, P.C.

20070187772 - Ald of amorphous lanthanide doped tiox films: The use of atomic layer deposition (ALD) to form an amorphous dielectric layer of titanium oxide (TiOx) doped with lanthanide elements, such as samarium, europium, gadolinium, holmium, erbium and thulium, produces a reliable structure for use in a variety of electronic devices. The dielectric structure is formed by depositing titanium... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070187774 - Manufacturing method for an integrated semiconductor structure and corresponding integrated semiconductor structure: An integrated semiconductor structure includes an n-channel transistor at a surface of a semiconductor body. The n-channel transistor includes a polysilicon gate overlying a first gate dielectric. A p-channel transistor is also formed at the surface of the semiconductor body. The p-channel transistor includes an n-doped polysilicon gate overlying a... Agent: Slater & Matsil LLP

20070187773 - Structure and method to induce strain in a semiconductor device channel with stressed film under the gate: A semiconductor device is provided with a stressed channel region, where the stress film causing the stress in the stress channel region can extend partly or wholly under the gate structure of the semiconductor device. In some embodiments, a ring of stress film surrounds the channel region, and may apply... Agent: Greenblum & Bernstein, P.L.C

20070187769 - Ultra-thin logic and backgated ultra-thin sram: Disclosed are embodiments of a structure that comprises a first device, having multiple FETs, and a second device, having at least one FET. Sections of a first portion of a semiconductor layer below the first device are doped and contacted to form back gates. A second portion of the semiconductor... Agent: Frederick W. Gibb, Iii Gibb & Rahman, LLC

20070187775 - Multi-bit memory cell having electrically floating body transistor, and method of programming and reading same: There are many inventions described herein as well as many aspects and embodiments of those inventions, for example, multi-bit memory cell and circuitry and techniques for reading, writing and/or operating a multi-bit memory cell (and memory cell array having a plurality of such memory cells) having one or more electrically... Agent: Neil A. Steinberg

20070187776 - Semiconductor device and method of fabricating the same: A semiconductor device according to one embodiment of the present invention includes: a semiconductor substrate; a MOSFET formed on the semiconductor substrate and which has a silicided gate electrode; and a resistance element having a resistance region formed on the semiconductor substrate, and a wiring extraction region containing therein a... Agent: Foley And Lardner LLP Suite 500

20070187777 - Semiconductor device, method of generating pattern for semiconductor device, method of manufacturing semiconductor device, and apparatus for generating pattern for semiconductor device: It is an object of the invention to effectively absorb a power noise and to implement the stable operation of a circuit. The invention provides a semiconductor device comprising a bypass capacitor including an MOS structure having a gate electrode formed to be extended from a power wiring region to... Agent: Mcdermott Will & Emery LLP

20070187779 - Semiconductor device and fabricating method thereof: A method of fabricating a semiconductor device is described. A substrate having a memory cell region and a high voltage circuit region are provided. First and second source/drain regions are formed in the substrate within these two regions. A silicon oxide layer, a first conductive layer and a top layer... Agent: J C Patents, Inc.

20070187778 - Shallow trench isolation structure for shielding trapped charge in a semiconductor device: A semiconductor structure and associated method for forming the semiconductor structure. The semiconductor structure comprises a first field effect transistor (FET), a second FET, and a shallow trench isolation (STI) structure. The first FET comprises a channel region formed from a portion of a silicon substrate, a gate dielectric formed... Agent: Schmeiser, Olsen & Watts

20070187780 - High frequency transistor layout for low source drain capacitance: An RF field effect transistor has a gate electrode, and comb shaped drain and source electrodes, fingers of the comb shaped drain being arranged to be interleaved with fingers of the source electrode, the source and drain electrodes having multiple layers (110,120,130,140). An amount of the interleaving is different in... Agent: Nxp, B.v. Nxp Intellectual Property Department

20070187781 - Lateral power transistor with self-biasing electrodes: A semiconductor power transistor includes a drift region of a first conductivity type and a well region of a second conductivity type in the drift region such that the well region and the drift region form a pn junction therebetween. A first highly doped silicon region of the first conductivity... Agent: Townsend And Townsend And Crew, LLP

20070187782 - Semiconductor device: The semiconductor device in accordance with the present invention includes a transistor region, a first guard ring, a second guard ring, and a silicide region. A first-conductive-type transistor is formed in the transistor region. The first guard ring is a second-conductive-type first impurity diffusion layer surrounding the transistor region with... Agent: Volentine & Whitt PLLC

20070187783 - Method for manufacturing semiconductor integrated circuit device: Disclosed is a technique for reducing the leak current by reducing contamination of metal composing a polymetal gate of a MISFET. Of a polycrystalline silicon film, a WN film, a W film, and a cap insulating film formed on a gate insulating film on a p-type well (semiconductor substrate), the... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070187784 - Double-diffused-drain mos device with floating non-insulator spacer: A double-diffused-drain metal-oxide-semiconductor device has a gate structure overlying a semiconductor substrate, a pair of insulator spacers on the sidewalls of the gate structure respectively, and a pair of floating non-insulator spacers embedded in the pair of insulator spacers respectively.... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070187786 - Magnetic memory: A magnetic memory is less susceptible to external magnetic fields and, thus, to writing errors and other adverse effects caused by external magnetic fields. In the magnetic memory, a magnetoresistive element is arranged adjacent to a part of a conductor line. A shield structure is also arranged to shield the... Agent: Mathews, Shepherd, Mckay, & Bruneau, P.A.

20070187785 - Magnetic memory cell and manufacturing method thereof: A magnetic memory cell and a manufacturing method for the magnetic memory cell are provided. In the magnetic memory cell, a pinned layer of a magnetic bottom electrode can be formed with sizes different from the free layer. The wider magnetic bottom electrode produces a preferable uniform bias field that... Agent: Jianq Chyun Intellectual Property Office

20070187787 - Pixel sensor structure including light pipe and method for fabrication thereof: A pixel for an image sensor includes a photosensor located within a substrate. A patterned dielectric layer having an aperture registered with the photosensor is located over the substrate. A lens structure is located over the dielectric layer and also registered with the photosensor. A liner layer is located contiguously... Agent: Scully, Scott, Murphy & Presser, P.C.

20070187788 - Solid-state image sensor using junction gate type field-effect transistor as pixel: A source region and drain region are formed in a surface region of a first semiconductor region. Moreover, a second semiconductor region connected to the drain region is formed in the surface region of the first semiconductor region. A third semiconductor region is formed in the first semiconductor region under... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070187789 - Wafer based optical chassis and associated methods: An optical chassis includes a mount substrate an optoelectronic device on the mount substrate, a spacer substrate, and a sealer substrate. The mount substrate, the spacer substrate and the sealer substrate are vertically stacked and hermetically sealing the optoelectronic device. An external electrical contact for the optoelectronic device is provided... Agent: Digital Optics Corporation

20070187790 - Semiconductor device and method of manufacturing the same: [Abstract]Considering further promotion of high output and miniaturization of a sensor element, it is an object of the present invention to form a plurality of elements in a limited area so that an area occupied by the element is reduced for integration. It is another object to provide a process... Agent: Fish & Richardson P.C.

20070187791 - Solid state imaging device and producing method thereof: A semiconductor substrate of a solid state imaging device is connected to a cover glass, and then a backgrind is performed so as to make the thickness smaller. On a first face of the semiconductor substrate is formed plural units which is constructed of image sensors and plural contact terminals.... Agent: Sughrue Mion, PLLC

20070187792 - Photoelectric conversion element, method for manufacturing photoelectric conversion element, and electronic apparatus: A photoelectric conversion element includes a first electrode, a second electrode, and a photoelectric conversion element provided between the first electrode and the second electrode. The photoelectric conversion element includes a polymer. The polymer includes at least one light absorber which absorbs light and generates at least one kind of... Agent: Oliff & Berridge, PLC

20070187793 - Filter, color filter array, method of manufacturing the color filter array, and image sensor: Provided are color filters formed of alternately stacked inorganic materials having different refractive indices, a color filter array, a method of manufacturing the color filter array, and an image sensor. A color filter can include a substrate and first and second inorganic films configured to filter light of a specific... Agent: Myers Bigel Sibley & Sajovec

20070187794 - Imaging device: An imaging device comprises a filter used for extracting a specified color component of an incident light, and a light receiving element observing the incident light via the filter. The filter includes a transparent filter, a yellow filter used for extracting a yellow component and a red filter used for... Agent: Staas & Halsey LLP

20070187795 - Integrated circuit arrangement comprising a pin diode, and production method: An integrated circuit arrangement (10) containing a pin photodiode (14) and a highly doped connection region (62) of a bipolar transistor (58) is explained, inter alia. Skillful control of the method produces an intermediate region (30) of the pin diode (14) with a large depth and without autodoping in a... Agent: Brinks Hofer Gilson & Lione

20070187796 - Semiconductor photonic devices with enhanced responsivity and reduced stray light: In accordance with the invention, a photonic device comprises a semiconductor substrate including at least one circuit component comprising a metal silicide layer and an overlying layer including at least one photoresponsive component. The metal silicide layer is disposed between the circuit component and the photoresponsive component to prevent entry... Agent: Wolf Greenfield & Sacks, P.C.

20070187797 - Semiconductor device and method of manufacturing the same: A semiconductor device according to an example of the present invention includes a first semiconductor region of a first conductivity type, a first MIS transistor of a second conductivity type formed in the first semiconductor region, a second semiconductor region of a second conductivity type, and a second MIS transistor... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070187798 - Semiconductor device and method of manufacturing the same: A semiconductor device including a high voltage element and a low voltage element, including: a semiconductor substrate having high voltage element region where the high voltage element is formed, and a low voltage element region where the low voltage element is formed; a first LOCOS isolation structure disposed in the... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070187799 - Semiconductor device and method of manufacturing the same: A method of manufacturing a semiconductor device according to an aspect of the present invention comprises: depositing an insulation film on a silicon substrate; forming element isolation regions by processing the insulation film as well as exposing the surface of the silicon substrate in the region thereof acting as active... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070187800 - Resistor tuning: A structure for resistors and the method for tuning the same. The resistor comprises an electrically conducting region coupled to a liner region. Both the electrically conducting region and the liner region are electrically coupled to first and second contact regions. A voltage difference is applied between the first and... Agent: Schmeiser, Olsen & Watts

20070187801 - Semiconductor device: A semiconductor device comprising a semiconductor substrate, a switching element which is provided on the semiconductor substrate, a first interconnect layer which is provided above the semiconductor substrate, a plurality of phase-change memory devices which have phase-change material whose resistance changes by a phase-change due to a temperature change, being... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070187802 - Semiconductor device and manufacturing method thereof: A semiconductor device includes: a substrate having a main surface, a rear surface and four side surfaces; a semiconductor element formed on the main surface of the substrate; a notch formed in at least one bottom part of the side surfaces of the substrate; and a curved surface provided at... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070187803 - Plasma enhanced deposited, fully oxidized psg film: A method of forming a plasma enhanced deposited oxide film on a substrate includes introducing into a chamber containing the substrate silane gas and a dopant gas such as phosphine. The chamber is pressurized and energy is applied to create a plasma. The energy may be a dual frequency energy.... Agent: Barnes & Thornburg LLP

20070187804 - Monolithic integrated circuit: A monolithic integrated circuit is provided that includes at least one transmission line integrated into the circuit. The transmission line includes a series circuit of at least two elementary circuits, wherein each elementary circuit has at least one lumped inductive element (L) and/or at least one lumped capacitive element (C).... Agent: Mcgrath, Geissler, Olds & Richardson, PLLC

20070187805 - Col-tsop with nonconductive material for reducing package capacitance: A method of fabricating a semiconductor package, and a semiconductor package formed thereby, are disclosed. The semiconductor package may include one or more semiconductor die having die attach pads along a single side. The leadframe may include a plurality of elongated electrical leads, extending from a first side of the... Agent: Vierra Magen/sandisk Corporation

20070187806 - Semiconductor chip package mounting structure implementing flexible circuit board: A semiconductor chip package mounting structure may mount a semiconductor chip package on a module board by implementing a flexible circuit board. The semiconductor chip package may be electrically connected to a first surface of the flexible circuit board and the module board may be electrically connected to a second... Agent: Harness, Dickey & Pierce, P.L.C

20070187807 - Multi-chip module for battery power control: A multi-chip module suitable for use in a battery protection circuit. The multi-chip module includes an integrated circuit chip, a first power transistor, a second power transistor, a first connection structure electrically coupling the integrated circuit chip to the first power transistor, a second connection structure electrically coupling the integrated... Agent: Townsend And Townsend And Crew, LLP

20070187808 - Customizable power and ground pins: A configurable logic array composed of: a multiplicity of logic cells, each containing look-up tables, a multiplicity of customizable I/O cells, each containing a multiplicity of pads; and a customizable via connection layer for customizing the cells and interconnect between them, may be constructed to include the option of customizing... Agent: Connolly Bove Lodge & Hutz LLP

20070187809 - Rfic die and package: A radio frequency integrated circuit (RFIC) includes a die and a package. The die includes a radio frequency (RF) input/output (I/O) section, an RF to baseband conversion section, and a baseband processing section. The package includes a ball grid array and an antenna. The antenna is located on one edge... Agent: Garlick Harrison & Markison

20070187810 - Package on package with cavity and method for manufacturing thereof: An aspect of the present invention features a manufacturing method of a package on package with a cavity. The method can comprise (a) forming a first upper substrate cavity in one side of an upper substrate; (b) mounting an upper semiconductor chip on the other side of the upper substrate;... Agent: Staas & Halsey LLP

20070187811 - Stacked chip semiconductor device and method for manufacturing the same: A stacked chip semiconductor device including: a substrate having electrode pads; a first semiconductor chip that is flip-chip-packaged on the substrate via a first adhesive layer; a second semiconductor chip that is mounted on an upper part of the first semiconductor chip and that has electrode pads; wires for electrically... Agent: Hamre, Schumann, Mueller & Larson P.C.

20070187812 - Method for processing copper surface, method for forming copper pattern wiring and semiconductor device manufactured using such method: A gas inlet is disposed in a lower portion of a reaction chamber, a copper substrate is disposed in an upper portion thereof, and a tungsten catalytic body heated to 1600° C. is disposed midway between the two. Ammonia gas introduced from the gas inlet is decomposed by the tungsten... Agent: Mcglew & Tuttle, PC

20070187813 - Uv blocking and crack protecting passivation layer: A semiconductor device comprises a substrate, a patterned metal conductor layer over the substrate, and a passivation layer. The passivation layer may comprise a UV blocking, protection layer, over at least a portion of the substrate and patterned metal conductor layers, and a separation layer between the patterned metal conductor... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20070187817 - Power semiconductor modules and method for producing them: A power semiconductor module in a pressure contact embodiment and a method for producing such modules, for disposition on a cooling component. Load terminals of the modules are formed as metal molded bodies having at least one contact element, one flat portion, and contact feet emanating therefrom. Each flat portion... Agent: Cohen, Pontani, Lieberman & Pavane

20070187815 - Encapsulation and methods thereof: The invention discloses an encapsulation comprising a metal substrate, a PCB on the metal substrate, a thermo-electric element in and/or on the PCB, and an LED on the thermo-electric element. Encapsulating methods are also provided by the invention.... Agent: Birch Stewart Kolasch & Birch

20070187816 - Semiconductor component with semiconductor chip and adhesive film, and method for its production: A semiconductor component with a semiconductor chip and an adhesive film, and a method for its production is disclosed. In one embodiment, the semiconductor component has the adhesive film, which is internally prestressed and is adhesive on both faces, between the rear face of the semiconductor chip and a chip... Agent: Dicke, Billig & Czaja

20070187814 - System and method for routing supply voltages or other signals between side-by-side die and a lead frame for system in a package (sip) devices: An integrated circuit or chip includes a first die and a second die positioned on a lead frame of a package including a lead frame, such as a QFP, DIP, PLCC, TSOP, or any other type of package including a lead frame. The integrated circuit further includes a redistribution layer... Agent: Kathy Manke Avago Technologies Limited

20070187818 - Package on package design a combination of laminate and tape substrate: In a method and system for fabricating a semiconductor device (100) having a package-on-package structure, a bottom laminate substrate (BLS) (130) is formed to include interconnection patterns (170) coupled to a plurality of conductive bumps (130). A top substrate (TS) (140) is formed as a receptor to mount a top... Agent: Texas Instruments Incorporated

20070187819 - Semiconductor device: The semiconductor device, including an electrode formed on the surface of a semiconductor element; and a metallic ribbon connected to the electrode. The metallic ribbon has a depressed portion on a surface contacting to the electrode, and the metallic ribbon is connected to the electrode in such a state that... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070187820 - Semiconductor device: When a conductive layer occupying a large area is provided in a coiled antenna portion, it has been difficult to supply power stably. A memory circuit portion and a coiled antenna portion are disposed by being stacked together; therefore, it is possible to prevent a current from flowing through a... Agent: Eric Robinson

20070187821 - Chip with bump structure: A chip with a bump structure comprises a chip, a plurality of pads and a plurality of bumps. The chip includes a microcircuit fabricated by integrated circuit technique. The pads are metallized portions of the chip for electrical connection. The bumps are metal bulges on the pads of the chip... Agent: G. Link Co.,ltd

20070187825 - Electronic component, semiconductor device, methods of manufacturing the same, circuit board, and electronic instrument: The present invention is a semiconductor device capable of relieving thermal stress without breaking wire. It comprises a semiconductor chip (12), a solder ball (20) for external connection, wiring (18) for electrically connecting the semiconductor chip (12) and the solder ball (20), a stress relieving layer (16) provided on the... Agent: Oliff & Berridge, PLC

20070187822 - Patterned gold bump structure for semiconductor chip: A patterned gold bump structure for a semiconductor chip comprises at least a patterned gold bump disposed on an insulating layer of a semiconductor chip, wherein the gold bump is used as a circuit component or a passing line. In some embodiments, the circuit component is a capacitor, a resistor,... Agent: G. Link Co., Ltd

20070187823 - Semiconductor device: An object of the present invention is to establish, for an LSI having a stacked interconnection structure of Cu interconnect/Low-k material, a narrow pitch wire bonding technique enabling a reduction in damage to a bonding pad and application similar to the conventional LSI of an aluminum interconnection. In a semiconductor... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070187824 - Semiconductor device with signal line having decreased characteristic impedance: A semiconductor device includes a semiconductor chip, electrodes pads, first and second insulating layers, first and second conductive patterns and external terminals. The electrode pads are formed on a first area of a main surface of the semiconductor chip. The first insulating layer is formed on the first and second... Agent: Volentine & Whitt PLLC

20070187826 - 3-d package stacking system: The present invention provides a system for 3D package stacking system, comprising providing a substrate, attaching a ball grid array package, in an inverted position, to the substrate, forming a lower package, the lower package having the ball grid array package and the substrate encapsulated by a molding compound and... Agent: Ishimaru & Zahrt LLP

20070187827 - Semiconductor package, stack package using the same package and method of fabricating the same: A semiconductor package may include a substrate. A conductive bump may be provided on a bottom surface of the substrate. A semiconductor chip may be provided on a top surface of the substrate. A sealing material may seal the semiconductor chip on the top of the substrate. A first conductive... Agent: Harness, Dickey & Pierce, P.L.C

20070187828 - Ild layer with intermediate dielectric constant material immediately below silicon dioxide based ild layer: An integrated circuit (IC) chip and related package are disclosed including a first interlevel dielectric (ILD) layer(s) including an ultra low dielectric constant (ULK) material, a second ILD layer(s) including a silicon dioxide (SiO2) based dielectric material above the first ILD layer(s), and a transitional ILD layer including an intermediate... Agent: Hoffman, Warnick & D'alessandro LLC

20070187829 - Nonvolatile memory cell comprising a chalcogenide and a transition metal oxide: A memory cell for use in integrated circuits comprises a chalcogenide feature and a transition metal oxide feature. Both the chalcogenide feature and transition metal oxide feature each have at least two stable electrical resistance states. At least two bits of data can be concurrently stored in the memory cell... Agent: Ryan, Mason & Lewis, LLP

20070187830 - Semiconductor apparatus including a radiator for diffusing the heat generated therein: A semiconductor apparatus is provided that includes a radiator for efficiently radiating heat generated in a wiring layer used in a surge current path of an electrostatic discharge protection circuit, and also for protecting the wiring layer itself used as the surge current path. The semiconductor apparatus includes an input... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070187831 - Conductive layers for hafnium silicon oxynitride films: Electronic apparatus and methods of forming the electronic apparatus include a HfSiON film on a substrate for use in a variety of electronic systems. The HfSiON film may be structured as one or more monolayers. The HfSiON film may be formed by atomic layer deposition. Electrodes to a dielectric containing... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070187833 - Method of fabricating semiconductor memory device and semiconductor memory device driver: Disclosed is a method of fabricating a semiconductor memory device including the step of irradiating ultraviolet rays on a metal interconnection at a bonding pad part, so that the metal interconnection can be prevented from being corroded because of a corrodent element in the process of erasing charges stored in... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070187832 - Semiconductor device and method for fabricating the same: In a method for fabricating a semiconductor device, first, a first metal interconnect is formed in an interconnect formation region, and a second metal interconnect is formed in a seal ring region. Subsequently, by chemical mechanical polishing or etching, the upper portions of the first metal interconnect and the second... Agent: Mcdermott Will & Emery LLP

20070187834 - Connection structure and method for fabricating the same: There is provided a connection structure between a Si electrode (Si member) and an Al wire (Al member). Between the Si electrode and the Al wire, a first part and second parts are present in interposed relation. Each of the first and second parts is in contact with the Si... Agent: Mcdermott Will & Emery LLP

20070187835 - Packaging box: A packaging box for accommodating an electronic device is provided. The packaging box includes an outer box, a first wavy plate and a second wavy plate. The first wavy plate is disposed on one side inside the outer box. The first wavy plate has at least an embedding portion for... Agent: Jianq Chyun Intellectual Property Office

20070187836 - Package on package design a combination of laminate and tape substrate, with back-to-back die combination: In a method and system for fabricating a semiconductor device (100) having a package-on-package structure, a bottom laminate substrate (BLS) (130) is formed to include interconnection patterns (IP) (170, 172) coupled to a plurality of conductive bumps (PCB) (130). A top substrate (TS) (140) is formed to mount a top... Agent: Texas Instruments Incorporated

20070187837 - Active area bonding compatible high current structures: A semiconductor structure is provided. In one embodiment, the structure comprises at least one active device located in a substrate and directly under a bond pad. A conductor is located between the bond pad and the substrate. The conductor has a plurality of gaps filled with insulating material. The insulating... Agent: Fogg & Powers LLC

20070187838 - Pad structure for bonding pad and probe pad and manufacturing method thereof: A mark-shaped pad. A bonding pad structure with at least one mark-shaped bonding pad comprises: a bottom metal layer disposed over the surface of a rectangular semiconductor substrate to connect the circuit electrically, an inter-metal dielectric layer disposed over the bottom metal layer, metal plugs formed in the inter-metal dielectric... Agent: Merchant & Gould PC

20070187839 - Integrated circuit package system with heat sink: An integrated circuit package system is provided forming an external interconnect from a padless lead frame, encapsulating a heat sink and the external interconnect, mounting an integrated circuit die on the heat sink, and encapsulating the integrated circuit die, the heat sink, and the external interconnect.... Agent: Ishimaru & Zahrt LLP

20070187840 - Nanoscale probes for electrophysiological applications: A device comprising a planar integrated circuit that includes an array of electrodes and at least one nanostructure, having a major axis, in electrical contact with at least one electrode. The device forms an interface between an integrated circuit platform and electro-physiologically active cells and is used in manipulate the... Agent: Hamilton, Brook, Smith & Reynolds, P.C.

20070187841 - Power composite integrated semiconductor device and manufacturing method thereof: A high-reliability power composite integrated semiconductor device uses thick copper electrodes as current collecting electrodes of a power device portion to resist wire resistance needed for reducing ON-resistance. Furthermore, wire bonding connection of the copper electrodes is secured, and also the time-lapse degradation under high temperature which causes diffusion of... Agent: Posz Law Group, PLC

20070187842 - Printed circuit, method of manufacturing the printed circuit, printed circuit/electronic element assembly, and method of manufacturing the printed circuit/electronic element assembly: Provided is a printed circuit. The printed circuit includes a base layer, a plurality of bonding pads formed on the base layer, and an insulation barrier formed between the bonding pads. The insulation barrier prevents a short circuit caused by whisker growth on solder portions electrically connecting the bonding pads... Agent: Stanzione & Kim, LLP

20070187843 - Semiconductor device having improved wire-bonding reliability and method of manufacturing the same: Semiconductor devices that provide improved wire-bonding reliability are provided. A semiconductor device includes a substrate, an insulating film, a lower protective film, a plurality of bonding pads, and an upper protective film. The insulating film is formed on the substrate and includes a multilayer wiring structure embedded therein. The lower... Agent: Myers Bigel Sibley & Sajovec

20070187844 - Electronic assembly with detachable components: The present invention provides systems and methods for assembling an electronic assembly using an anisotropic conducting membrane (ACM) as a component interconnect and a substrate embossed with placement cavities or a positional fixture to facilitate component placement on the substrate in the electronic assembly. The fixture may comprise multiple layers... Agent: Carr & Ferrell LLP

20070187845 - Integrated stress relief pattern and registration structure: A semiconductor die having an integrated circuit region formed in a substrate comprises at least one die-corner-circuit-forbidden (DCCF) region disposed in the substrate, proximate to the integrated circuit region; and at least one registration feature formed within the at least one DCCF region. The at least one registration feature comprises... Agent: Haynes And Boone, LLP

20070187846 - Mask for crystallizing polysilicon and a method for forming thin film transistor using the mask: A mask for forming polysilicon has a first slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width, a second slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while baring the same width,... Agent: Frank Chau, Esq. F. Chau & Associates, LLC

20070181869 - Heterostructure including light generating structure contained in potential well: A light emitting heterostructure and/or device in which the light generating structure is contained within a potential well is provided. The potential well is configured to contain electrons, holes, and/or electron and hole pairs within the light generating structure. A phonon engineering approach can be used in which a band... Agent: Hoffman Warnick & D'alessandro, LLC

20070181872 - Organic light emitting display and manufacturing method thereof: An organic light emitting display and a manufacturing method thereof include an improved encapsulation layer. The encapsulation layer of the organic light emitting display includes an organic layer uniformly covering bank portions and light emitting areas on a substrate; and an inorganic layer formed thicker on the light emitting areas... Agent: Cantor Colburn, LLP

20070181873 - Organic-inorganic hybrid polymer and organic insulator composition having the same and methods thereof: Example embodiments of the present invention relate to an organic-inorganic hybrid polymer having capped terminal hydroxyl groups and an organic insulator composition including the hybrid polymer and methods thereof. The organic-inorganic hybrid polymer may be prepared by capping terminal hydroxyl groups of silanol moieties that do not participate in the... Agent: Harness, Dickey & Pierce, P.L.C

20070181875 - Semiconductor device: It is an object to provide a semiconductor device capable of transmitting and receiving data with a reader/writer and reducing breakdown or interference due to static electricity. A semiconductor device includes a semiconductor integrated circuit, a conductive layer serving as an antenna that is connected to the semiconductor integrated circuit,... Agent: Eric Robinson

20070181879 - Display device and manufacturing method thereof: A display device includes a plurality of thin film transistors, a passivation layer formed on the thin film transistors, a pixel electrode formed on the passivation layer and including a rectangular shape and a contact region electrically connected with the thin film transistors, and a wall formed around the pixel... Agent: Cantor Colburn, LLP

20070181877 - Thin film transistor substrate and method of manufacturing the same and mask for manufacturing thin film transistor substrate: A thin film transistor substrate, wherein the moving area of electrons between source and drain electrodes of a thin film transistor (TFT) is minimized, the moving distance of electrons is increased, and the sizes of capacitors defined by a gate electrode together with the respective source and drain electrodes are... Agent: F. Chau & Associates, LLC

20070181878 - Transparent electrode and preparation method thereof: Disclosed herein is a transparent electrode featuring the interposition of a nano-metal layer between a grid electrode on a transparent substrate and an electroconductive polymer layer, and a preparation method thereof. The transparent electrode can be produced in a continuous process at high productivity and low cost and can be... Agent: Cantor Colburn, LLP

20070181882 - Multi-level semiconductor device and method of fabricating the same: A multi-level semiconductor device includes a first transistor on a semiconductor substrate, the first transistor including a first source/drain region, a semiconductor layer on the semiconductor substrate, a second transistor on the semiconductor layer, the second transistor including a second source/drain region in a first portion of the semiconductor layer,... Agent: Lee & Morse, P.C.

20070181880 - Semiconductor device and method for forming the same: A semiconductor device includes a conductive layer formed on a semiconductor substrate. An insulation layer is formed on the conductive layer and includes an opening defined therein that exposes the conductive layer. A semiconductor pattern is formed on the insulation layer and is electrically connected to the conductive layer through... Agent: Marger Johnson & Mccollom, P.C.

20070181883 - Semiconductor device having a modified dielectric film: A semiconductor device has a plurality of interconnect layers each including a plurality of interconnect lines. The semiconductor device includes a dielectric film (HDP film) formed by means of high density plasma-enhanced CVD and including an edge formed on the side surface of the topmost-layer interconnect lines, a silicon oxide... Agent: Young & Thompson

20070181886 - Semiconductor device: A semiconductor device, includes: a first conductivity-semiconductor substrate; a hetero semiconductor region for forming a hetero junction with the first conductivity-semiconductor substrate; a gate electrode adjacent to a part of the hetero junction by way of a gate insulating film; a drain electrode connecting to the first conductivity-semiconductor substrate; a... Agent: Foley And Lardner LLP Suite 500

20070181888 - Flip-chip light emitting device: A flip-chip light emitting device including: a substrate; an n-type semiconductor layer formed on a top surface of the substrate; an active layer formed on a top surface of the n-type semiconductor layer; a p-type semiconductor layer formed on a top surface of the active layer; a p-type electrode formed... Agent: Buchanan, Ingersoll & Rooney PC

20070181889 - Semiconductor light emitting device and method for manufacturing the same: A semiconductor light emitting device comprises a semiconductor multilayer film including an active layer for generating light, a p electrode formed on the semiconductor multilayer film, and a plasmon generating layer, which are provided on a substrate. A portion of the semiconductor multilayer film including at least the active layer... Agent: Mcdermott Will & Emery LLP

20070181899 - Light emitting diode package: Provided an LED package comprising a first package composed of a first region serving as a first electrode and a second region which is formed so as to overlap a portion of the first region, the second region defining a molding material filling cavity; one or more LED chips mounted... Agent: Mcdermott Will & Emery LLP

20070181867 - Phase change memory materials, devices and methods: A new class of phase change materials has been discovered based on compounds of: Ga; lanthanide; and chalcogenide. This includes compounds of Ga, La, and S (GLS) as well as related compounds in which there is substitution of S with O, Se and/or Te. Moreover, La can be substituted with... Agent: Renner, Otto, Boisselle & Sklar, LLP

20070181868 - Silicon electrode plate for plasma etching with superior durability: This silicon electrode plate for plasma etching is a silicon electrode plate for plasma etching with superior durability including silicon single crystal which, in terms of atomic ratio, contains 3 to 11 ppba of boron, and further contains a total of 0.5 to 6 ppba of either or both of... Agent: Darby & Darby P.C.

20070181870 - Nanometric device for the measurement of the conductivity and quantum effects of individual molecules and methods for the manufacture and use thereof: A nanometric device is disclosed for the measurement of the electrical conductivity of individual molecules and their quantum effects having: a substrate surmounted by, in order, a barrier to diffusion layer, an electrically conductive layer, a “bounder” layer and an electrically insulating layer; and a suitable miniaturized probe; wherein the... Agent: Akerman Senterfitt

20070181874 - Charge transport layers and organic electron devices comprising same: Provided are organic n-doped electron transport layers comprising at least one electron transport material and at least one electron rich dopant material and organic p-doped hole transport layers comprising at least one hole transport material and at least one electron deficient dopant material.... Agent: E I Du Pont De Nemours And Company Legal Patent Records Center

20070181876 - Organic electroluminescence deivce: There is provided an organic electroluminescence device that is high in light emitting efficiency and excellent in driving durability, which contains at least a light emitting layer between an anode and a cathode opposing each other, and further has either 1) an organic layer containing at least a first acceptor... Agent: Birch Stewart Kolasch & Birch

20070181871 - Organic thin film transistor using ultra-thin metal oxide as gate dielectric and fabrication method thereof: The present invention provides a low-voltage organic thin film transistor having a gate dielectric layer of ultra-thin metal oxide self-grown on a metal gate electrode by O2 plasma process. The metal gate electrode is deposited on a plastic or glass substrate. By directly oxidizing the gate electrode by using O2... Agent: Ipla P.A.

20070181881 - Display device and manufacturing method of the same: A display device according to the present invention comprises an insulating substrate; a switching thin film transistor formed on the insulating substrate for receiving a data voltage has a first semiconductor layer comprising amorphous silicon; a driving thin film transistor formed on the insulating substrate, having a control terminal connected... Agent: Macpherson Kwok Chen & Heid LLP

20070181884 - Integrated circuitry, dynamic random access memory cells, and electronic systems: The invention includes semiconductor processing methods in which openings are formed to extend into a semiconductor substrate, and the substrate is then annealed around the openings to form cavities. The substrate is etched to expose the cavities, and the cavities are substantially filled with insulative material. The semiconductor substrate having... Agent: Wells St. John P.s.

20070181885 - Display device and method of manufacturing the same: Disclosed herein is a display device, including a display element, a first scanning line, a second scanning line, a data signal line, a switching element having a first terminal and a second terminal of a first conduction type, the first terminal being connected to the data signal line, for being... Agent: Robert J. Depke Lewis T. Steadman

20070181887 - Display device: In a stacked display device with light-emitting units composed of organic layers and stacked together, the use of a stable material in at least a portion of a charge generation layer makes it possible to achieve improvements in environmental stability and also to attain an improvement in the efficiency of... Agent: Sonnenschein Nath & Rosenthal LLP

20070181890 - Light emitting device: An object of the invention is to provide a technique for improving the characteristics of a TFT and realizing an optimum structure of the TFT for the driving conditions of a pixel section and a driving circuit by a small number of photo masks. Therefore, a light emitting device has... Agent: Eric Robinson

20070181891 - Semiconductor component: A semiconductor component having a light-emitting semiconductor layer or a light-emitting semiconductor element, two contact locations and a vertically or horizontally patterned carrier substrate, and a method for producing a semiconductor component are disclosed for the purpose of reducing or compensating for the thermal stresses in the component. The thermal... Agent: Cohen, Pontani, Lieberman & Pavane

20070181892 - Image display device: A spacer structure is provided between a first substrate formed with a phosphor screen and a second substrate provided with a plurality of electron emission sources. A supporting substrate of the spacer structure has a first surface opposed to the first substrate, a second surface opposed to the second substrate,... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070181893 - Image display device: An image display device includes a plurality of spacers which are arranged between a first substrate formed with a phosphor screen and a second substrate provided with a plurality of electron emission sources and support an atmospheric load acting on the first substrate and the second substrate. The plurality of... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070181895 - Nitride based led with a p-type injection region: An LED chip (2) is composed of a p-GaN layer (10), an n-GaN layer (14), and an MQW emission layer (12) that is sandwiched between the GaN layers (10 and 14). Each layer is made of a GaN semiconductor. Light exits the LED chip (2) through the n-GaN layer (14).... Agent: Snell & Wilmer L.L.P. (matsushita)

20070181894 - Radiation emitting semi-conductor element: A radiation-emitting semiconductor component with a semiconductor body, including a first principal surface (5), a second principal surface (9) and a semiconductor layer sequence (4) with an electromagnetic radiation generating active zone (7), in which the semiconductor layer sequence (4) is disposed between the first and the second principal surfaces... Agent: Fish & Richardson PC

20070181897 - High heat dissipating package baseplate for a high brightness led: A high heat dissipating package baseplate for a high brightness LED, wherein a package baseplate manufacturing process includes a baseplate manufacturing process, a wiring manufacturing process and a package manufacturing process. An arc concavity is formed in a surface of a heat dissipating piece, and a light reflecting layer having... Agent: Troxell Law Office PLLC

20070181898 - Pixel structure for a solid state light emitting device: A light emitting device includes an active layer structure, which has one or more active layers with luminescent centers, e.g. a wide bandgap material with semiconductor nano-particles, deposited on a substrate. For the practical extraction of light from the active layer structure, a transparent electrode is disposed over the active... Agent: Teitelbaum & Maclean

20070181901 - Power surface mount light emitting die package: A light emitting die (LED) package is provided which includes a substrate having traces, a LED mounted on the substrate and connected to the traces, and an encapsulant covering the LED. The package includes a lens sitting on the encapsulant and substantially covering the LED. The lens is free to... Agent: Harness, Dickey & Pierce, P.L.C

20070181900 - Semiconductor light emitting device and its manufacture method: A semiconductor light emitting device is provided having a highly reliable reflection and electrode layer. The semiconductor light emitting device is manufactured by the steps of: forming an insulating film on a surface of a silicon substrate; forming an adhesion layer made of at least one of Ti and Cr... Agent: Masao Yoshimura, Chen Yoshimura, LLP

20070181896 - Structure for a single light source multicolor led: A single light source multicolor LED, including a package baseplate having a high heat dissipation effect, and the package baseplate is provided with a heat dissipating layer and a printed circuit. The printed circuit includes an insulating layer, a conductive layer and a covering layer. A surface of the package... Agent: Troxell Law Office PLLC

20070181903 - Semiconductor device manufacturing method and semiconductor device manufacturing apparatus: A semiconductor device manufacturing method includes the steps of filling a cavity and a resin reservoir hole in a lower metal mold with a liquid-state resin, holding a semiconductor element between the lower metal mold and an upper metal mold, injecting the resin in the resin reservoir hole into the... Agent: Birch Stewart Kolasch & Birch

20070181902 - Transparent epoxy resin composition for molding optical semiconductor and optical semiconductor integrated circuit device using the same: s

20070181906 - Carbon passivation in solid-state light emitters: A solid state light emitting device comprises one or more active layers comprising semiconductor nano-particles in a host matrix, e.g. silicon nano-particles in silicon dioxide or silicon nitride. The incorporation of carbon in the active layers provides a great improvement in performance through shortened decay time and enhance emission spectra,... Agent: Teitelbaum & Maclean

20070181905 - Light emitting diode having enhanced side emitting capability: A LED structure with enhanced side-emitting capability is provided. An embodiment of The LED structure comprises, on top of a substrate, a metallic layer, a non-alloy ohmic contact layer, a thick transparent layer, a light generating structure, sequentially arranged in the this order from bottom to top. The metallic layer... Agent: Lin & Associates Intellectual Property

20070181907 - Positive electrode for compound semiconductor light-emitting device: An object of the present invention is to provide a positive electrode, in which the silver is used, for a compound-semiconductor light-emitting device high in inverse voltage and excellent in stability and productivity. The inventive positive electrode for a compound-semiconductor light-emitting device comprises a reflective layer of a silver alloy.... Agent: Sughrue Mion, PLLC

20070181904 - Semiconductor material and semiconductor device using the same:

20070181908 - Electronic module and method of producing the electronic module: An electronic module has a heat sink with an upper surface and a lower surface, a plurality of leads arranged adjacent the heat sink and at least one circuit element with two vertical semiconductor power switches. The two vertical semiconductor power switches of each circuit element are arranged in a... Agent: Baker Botts, L.L.P.

20070181909 - Schottky diode structure with enhanced breakdown voltage and method of manufacture: In one embodiment, a Schottky diode structure comprises a Schottky barrier layer in contact with a semiconductor material through a Schottky contact opening. A conductive ring is formed adjacent the Schottky contact opening and is separated from the semiconductor material by a thin insulating layer. Another insulating layer is formed... Agent: Semiconductor Components Industries, LLC Bradley J. Botsch

20070181910 - Heterobipolar transistor and method of fabricating the same: The present invention realizes a heterobipolar transistor using a SiGeC base layer in order to improve its electric characteristics. Specifically, the distribution of carbon and boron within the base layer is controlled so that the concentration of boron is higher than the concentration of carbon on the side bordering on... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070181911 - Transistor: A transistor and a semiconductor integrated circuit with a reduced layout area. Area reduction of a transistor is realized by arranging contacts at higher density. Specifically, in a transistor including a pair of impurity regions and a gate electrode 604 sandwiched therebetween, one of the impurity regions has respective contact... Agent: Nixon Peabody, LLP

20070181912 - Light-emitting element and display device: There has been a problem that difference in refractive index between an opposite substrate or a moisture barrier layer (passivation film) such as SiN provided thereover, and air is maintained large, and light extraction efficiency is low. Further, there has been a problem that peeling or cracking due to the... Agent: Fish & Richardson P.C.

20070181914 - Non-volatile memory device and method of fabricating the same: A non-volatile memory device and method of fabricating same are disclosed. The memory device comprises; a gate insulating film formed on a semiconductor substrate, a floating gate completely covering the gate insulating film, the floating gate comprising a conductive film pattern and a conductive spacer formed at one side of... Agent: Volentine & Whitt PLLC

20070181913 - Integrated circuit device: A commercially mass-produced, integrated circuit including: a solid substrate of one conductivity type; at least one solid material pocket of a different conductivity type having a side surface and positioned on a selected top surface of the substrate to thereby form a signal-translating, electronic rectifying barrier between the at least... Agent: Keith R. Lange Hall, Vande Sande & Pequignot, LLP

20070181915 - Partial confinement photonic crystal waveguides: An optical waveguide structure includes an air-via region that receives an optical signal from an optical source. A photonic crystal cladding region is formed on the surface of the air-via region. The photonic crystal cladding region confines the optical signal within the air-via region and propagates the optical signal along... Agent: Gauthier & Connors, LLP

20070181916 - Method of manufacturing flash memory device: A method of manufacturing a flash memory device, one embodiment of which includes the steps of forming a floating gate pattern in which a tunnel oxide film, a first conductive layer, and a nitride film are laminated on a semiconductor substrate of a first region, and forming isolation films on... Agent: Marshall, Gerstein & Borun LLP

20070181920 - Manufacturing method for a semiconductor substrate comprising at least a buried cavity and devices formed with this method: A method for manufacturing a semiconductor substrate of a first concentration type is described, which comprises at least a buried insulating cavity, comprising the following steps: forming on the semiconductor substrate a plurality of trenches, forming a surface layer on the semiconductor substrate in order to close superficially the plurality... Agent: Graybeal, Jackson, Haley LLP

20070181919 - Novel isolated ldmos ic technology: A lateral double diffused metal oxide semiconductor (LDMOS) device includes a gate to control the device, a drain coupled to the gate formed in a well of a first type, a source to form a current path with the drain, and a first field oxide region disposed between the gate... Agent: Tung & Associates

20070181918 - Semiconductor device: A semiconductor device has a MOS capacitor in which a drain region and a source region of a MOS structure are commonly connected, and a capacitance is formed between the commonly connected drain region/source region and a gate electrode of the MOS structure; and a wiring capacitor which has a... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070181917 - Split dual gate field effect transistor: A semiconductor device with at least two gate regions. The device includes a substrate region including a surface, a source region in the substrate region, and a drain region in the substrate region. The drain region and the source region are separate from each other. Additionally, the device includes a... Agent: Townsend And Townsend And Crew, LLP

20070181921 - Display device and manufacturing method therefor: A display device includes a first insulating substrate having thin film transistors; a second insulating substrate of plastic having a black matrix comprising a plurality of horizontal extending portions extending in one directions and a plurality of vertical portions extending at an irregular interval in a second direction perpendicular to... Agent: Macpherson Kwok Chen & Heid LLP

20070181922 - Cmos image sensor: A complementary metal oxide semiconductor (CMOS) image sensing device includes a semiconductor substrate; a photodiode defined on the substrate; a gate dielectric layer provided over the photodiode and the substrate; a polysilicon interconnect contacting a given area of the photodiode via an opening in the gate dielectric layer; a reset... Agent: Townsend And Townsend And Crew, LLP

20070181923 - Solid-state image sensor comprising plural lenses: A solid-state image sensor includes pixels and lenses. Each of the pixels on a semiconductor substrate includes a photodetecting section which photoelectrically converts incident light. Each of the lenses condenses the incident light on the photodetecting section. The lenses have a fixed curvature on an incident surface for the incident... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070181925 - Semiconductor device having a vertical channel and method of manufacturing same: A semiconductor device having a vertical channel capable of reducing the interface contact resistance between a gate electrode surrounding an active pillar and a word line connecting the gate electrode and a method of manufacturing the same is provided. The semiconductor device includes a plurality of active pillars extending in... Agent: Volentine & Whitt PLLC

20070181926 - Semiconductor devices and methods of fabricating the same: A semiconductor device includes a semiconductor substrate, a storage pad and a bit line pad on the semiconductor substrate, a first interlayer insulating layer covering the bit line pad and including a bit line contact hole having a width greater than a width of the bit line pad, a barrier... Agent: Lee & Morse, P.C.

20070181924 - Integrated capacitor structure: A semiconductor component includes an integrated capacitor structure embodied at least partly in an electrically conductive plane and which is patterned such that a multiplicity of strip elements are present. A first group of strip elements constitutes a first electrode of the capacitor structure and a second group of strip... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070181927 - Charge balance insulated gate bipolar transistor: An IGBT includes a first silicon region over a collector region, and a plurality of pillars of first and second conductivity types arranged in an alternating manner over the first silicon region. The IGBT further includes a plurality of well regions each extending over and being in electrical contact with... Agent: Townsend And Townsend And Crew, LLP

20070181928 - Capacitor and manufacturing method thereof: A capacitor having a high quality and a manufacturing method of the same are provided. A capacitor has a lower electrode formed on an oxide film, a dielectric layer formed on the lower electrode, an upper electrode formed so as to face the lower electrode with the dielectric layer between,... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070181929 - Semiconductor constructions, memory cells, dram arrays, electronic systems; methods of forming semiconductor constructions; and methods of forming dram arrays: The invention includes a semiconductor construction including rows of contact plugs, and rows of parallel bottom plates. The plug pitch is approximately double the plate pitch. The invention includes a method of forming a semiconductor construction. A plurality of conductive layers is formed over the substrate, the plurality of layers... Agent: Wells St. John P.s.

20070181930 - Structure and method of making double-gated self-aligned finfet having gates of different lengths: A gated semiconductor device is provided, in which the body has a first dimension extending in a lateral direction parallel to a major surface of a substrate, and second dimension extending in a direction at least substantially vertical and at least substantially perpendicular to the major surface, the body having... Agent: International Business Machines Corporation Dept. 18g

20070181931 - Hafnium tantalum oxide dielectrics: A dielectric layer containing a hafnium tantalum oxide film and a method of fabricating such a dielectric layer produce a dielectric layer for use in a variety of electronic devices. Embodiments include structures for capacitors, transistors, memory devices, and electronic systems with dielectric layers containing a hafnium tantalum oxide film... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070181933 - Non-volatile memory electronic device: A non-volatile memory device integrated on semiconductor substrate and having a matrix of non-volatile memory cells organized in rows, called word lines, and columns, called bit lines, the device including a plurality of active areas formed on the semiconductor substrate equidistant from each other, and having at least a first... Agent: Seed Intellectual Property Law Group PLLC

20070181932 - Thermal isolation of phase change memory cells: A memory includes an array of resistive memory cells, bit lines between rows of the memory cells for accessing the memory cells, and a conductive plate coupled to each of the memory cells.... Agent: Dicke, Billig & Czaja

20070181934 - Interdigitated conductive lead frame or laminate lead frame for gan die: A GaN die having a plurality of parallel alternating and closely spaced source and drain strips is contacted by parallel coplanar comb-shaped fingers of source and drain pads. A plurality of enlarged area coplanar spaced gate pads having respective fingers contacting the gate contact of the die. The pads may... Agent: Ostrolenk Faber Gerb & Soffen

20070181935 - Method of fabricating flash memory device and flash memory device fabricated thereby: There are provided a method of fabricating a flash memory device and a flash memory device fabricated thereby. The method of fabricating a flash memory device includes forming an isolation layer defining an active region in a semiconductor substrate, wherein the isolation layer is formed to have a protrusion being... Agent: Mills & Onello LLP

20070181936 - Novel architecture to monitor isolation integrity between floating gate and source line: A new method to form a floating gate isolation test structure in the manufacture of a memory device is achieved. The method comprises providing a substrate. A gate oxide layer is formed overlying the substrate. A floating gate conductor layer is deposited overlying the gate oxide layer. The floating gate... Agent: Thomas, Kayden, Hostemeyer & Risley LLP

20070181937 - P-channel non-volatile memory and operating method thereof: A P-channel non-volatile memory is described. The P-channel non-volatile memory includes a substrate, a first memory cell, and second memory cell. An N-well is disposed over the substrate, and the first cell and the second cell are disposed over the N-well. The first memory cell includes a first gate, a... Agent: Jianq Chyun Intellectual Property Office

20070181938 - Field-effect transistors with weakly coupled layered inorganic semiconductors: A field-effect transistor includes source, drain, and gate electrodes; a crystalline or polycrystalline layer of inorganic semiconductor; and a dielectric layer. The layer of inorganic semiconductor has an active channel portion physically extending from the source electrode to the drain electrode. The inorganic semiconductor has a stack of 2-dimensional layers... Agent: Lucent Technologies Inc. Docket Administrator

20070181939 - Trench-gate semiconductor devices and the manufacture thereof: A vertical trench-gate semiconductor device wherein the trench-gates extend in stripes, the source regions extend transversely between the trenchgates in stripes, projection (20) of the source stripes across the trench-gates defines intermediate trench portions (22) between the projected source stripes, and mutually spaced regions (14,14′) of the second conductivity type... Agent: Nxp, B.v. Nxp Intellectual Property Department

20070181940 - Trench field effect transistor and method of making it: Consistent with an example embodiment, a trench FET has source regions arranged above insulated gates in trenches. A body region of opposite conductivity type is arranged between the trenches and a body region is arranged above the body region. Source contact metallisation contacts the source and body contact region. In... Agent: Nxp, B.v. Nxp Intellectual Property Department

20070181941 - High voltage semiconductor devices and methods for fabricating the same: High voltage semiconductor devices and methods for fabricating the same are provided. An exemplary embodiment of a semiconductor device capable of high-voltage operation, comprising a substrate comprising a first well formed therein. A gate stack is formed overlying the substrate, comprising a gate dielectric layer and a gate electrode formed... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070181942 - Semiconductor circuit arrangement: The invention relates to a semiconductor circuit arrangement having at least one first and a second field effect transistor (T1, T2), where the field effect transistors respectively have at least two active regions (AA11 to AA22) with, respectively, a source region, a drain region and an intermediate channel region, the... Agent: Brinks Hofer Gilson & Lione

20070181943 - Lateral power transistor and method for producing same: A power transistor includes a semiconductor layer an electrode layer. The semiconductor layer having a source zone, a drain zone spaced apart from the source zone in a lateral direction, a drift zone adjacent to the drain zone, and a body zone. The body zone is interposed between the drift... Agent: Maginot, Moore & Beck Chase Tower

20070181944 - Electronic device including space-apart radiation regions and a process for forming the same: An electronic device can include a first radiation region, a second radiation region spaced apart from the first radiation region, and an insulating region. The insulating region can have a first side and a second side opposite the first side. The first radiation region can lie immediately adjacent to the... Agent: E I Du Pont De Nemours And Company Legal Patent Records Center

20070181946 - Method and apparatus for forming a semiconductor-on-insulator (soi) body-contacted device: A method for making a semiconductor device includes patterning a semiconductor layer, overlying an insulator layer, to create a first active region and a second active region, wherein the first active region is of a different height from the second active region, and wherein at least a portion of the... Agent: Freescale Semiconductor, Inc. Law Department

20070181945 - Semiconductor device and manufacturing method thereof: An island-like interlayer insulating film is formed selectively in a region where a source interconnection and a gate interconnection intersect. For example, by use of ink jet method, a solution containing an insulating material is dropped on a region where the gate interconnection and the source interconnection intersect or a... Agent: Cook, Alex, Mcfarron, Manzo, Cummings & Mehler, Ltd.

20070181947 - Complementary metal-oxide-semiconductor transistor structure for high density and high performance integrated circuits: A semiconductor device may include a substrate and an insulating layer formed on the substrate. A multi-layer fin may be formed on the insulating layer and may include two semiconducting layers isolated by an insulating layer in vertical direction. A first MOS type device comprising a first source region, a... Agent: Heslin Rothenberg Farley & Mesiti PC

20070181948 - Esd protection device: The junction breakdown voltage of an ESD protection device is adjusted by altering the distance between two diffusion regions of opposite conductivity types.... Agent: Rosenberg, Klein & Lee

20070181949 - Transistor and novolatile memory device including the same: A transistor includes a gate electrode on a substrate, source/drain regions in the substrate at both sides of the gate electrode, and a channel region defined between the source/drain regions, wherein the channel region includes a recessed region and at least one of the source/drain regions is spaced away from... Agent: Lee & Morse, P.C.

20070181950 - Semiconductor device and its manufacturing method capable of suppressing junction leakage current: In a semiconductor device including a semiconductor substrate, a gate insulating layer formed on the semiconductor substrate, a gate electrode layer formed on the gate insulating layer, a source region and a drain region formed within the semiconductor substrate adjacent to the gate electrode layer, and sidewall insulating layers formed... Agent: Mcginn Intellectual Property Law Group, PLLC

20070181951 - Selective cesl structure for cmos application: A PMOS device less affected by negative bias time instability (NBTI) and a method for forming the same are provided. The PMOS device includes a barrier layer over at least a portion of a gate structure, a gate spacer, and source/drain regions of a PMOS device. A stressed layer is... Agent: Slater & Matsil, L.L.P.

20070181952 - Band gap circuit: Provided is a band gap constant-voltage circuit which is configured by combining a PMOS transistor, an NMOS transistor, a bipolar transistor, and a resistor, and is capable of preventing an output voltage from being stabilized at 0 V immediately after power supply fluctuation. According to the band gap constant-voltage circuit... Agent: Brinks Hofer Gilson & Lione

20070181954 - Semiconductor device and method of manufacture thereof: The semiconductor device of present invention is provided with an impurity diffusion region formed in the surface part of a semiconductor layer and a metal silicide layer formed in the surface part of the impurity diffusion region. An interlayer insulating film is formed on the metal silicide layer, and a... Agent: Mcdermott Will & Emery LLP

20070181953 - Semiconductor device having stacked transistors and method of forming the same: A semiconductor device includes a first semiconductor layer, a first interlayer insulation layer, a second semiconductor layer, and a gate pattern. The first interlayer insulation layer covers the first semiconductor layer. The second semiconductor layer is formed on the first interlayer insulation layer and includes source regions, drain regions, and... Agent: Marger Johnson & Mccollom, P.C.

20070181955 - Metal oxide semiconductor transistor: A metal oxide semiconductor (MOS) transistor is disclosed. The MOS transistor includes: a semiconductor substrate; a gate disposed on the semiconductor substrate, wherein the gate comprises two sidewalls; a spacer formed on the sidewalls of the gate; a source/drain region disposed in the semiconductor substrate; a silicide layer disposed on... Agent: North America Intellectual Property Corporation

20070181956 - Field-effect transistors with weakly coupled layered inorganic semiconductors: A field-effect transistor includes source, drain, and gate electrodes; a crystalline or polycrystalline layer of inorganic semiconductor; and a dielectric layer. The layer of inorganic semiconductor has an active channel portion physically extending from the source electrode to the drain electrode. The inorganic semiconductor has a stack of 2-dimensional layers... Agent: Lucent Technologies Inc. Docket Administrator

20070181958 - Semiconductor device and method of forming the same: A semiconductor device such as a Static Random Access Memory (SRAM) cell includes an access transistor. A drain of the access transistor includes a first N-type impurity and a second N-type impurity. The diffusion coefficient of the first N-type impurity is smaller than the diffusion coefficient of the second N-type... Agent: Marger Johnson & Mccollom, P.C.

20070181957 - Semiconductor device having stacked transistors and method for manufacturing the same: Provided is a semiconductor device including a thin film transistor with at least one protruding impurity region and a method for manufacturing the same. The semiconductor device includes bulk transistors formed on a semiconductor substrate and an interlayer insulation layer covering the bulk transistor. At least one thin film transistor... Agent: Marger Johnson & Mccollom, P.C.

20070181959 - Semiconductor device having gate-all-around structure and method of fabricating the same: Semiconductor devices having a gate-all-around (GAA) structure capable of higher operating performance may be provided. A semiconductor device may include a semiconductor substrate, at least one gate electrode, and at least one gate insulating layer. The semiconductor substrate may have a body, at least one supporting post protruding from the... Agent: Harness, Dickey & Pierce, P.L.C

20070181961 - Intercalated superlattice compositions and related methods for modulating dielectric property: Compositions, methods of using inorganic moieties for dielectric modulation, and related device structures.... Agent: Reinhart Boerner Van Deuren S.c. Attn: Linda Kasulke, Docket Coordinator

20070181960 - Semiconductor device, an electronic device and an electronic apparatus: A semiconductor device 1 includes: a base 2 mainly formed of a semiconductor material; a gate electrode 5; and a gate insulating film 3 provided between the base 2 and the gate electrode 5. The gate insulating film 3 is formed of an insulative inorganic material containing silicon, oxygen and... Agent: Harness, Dickey & Pierce, P.L.C

20070181962 - Wafer encapsulated microelectromechanical structure and method of manufacturing same: There are many inventions described and illustrated herein. In one aspect, the present inventions relate to devices, systems and/or methods of encapsulating and fabricating electromechanical structures or elements, for example, accelerometer, gyroscope or other transducer (for example, pressure sensor, strain sensor, tactile sensor, magnetic sensor and/or temperature sensor), filter or... Agent: Neil A. Steinberg

20070181963 - Micro-electromechanical system (mems) based current and magnetic field sensor using tunneling current sensing: A micro-electro-mechanical system (MEMS) current sensor for sensing a magnetic field produced by an electrical current flowing in a conductor includes a first fixed element and a moving element. The moving element is spaced away from the first fixed element and is movable relative to the fixed element responsive to... Agent: General Electric Company Global Research

20070181964 - Magnetic memory, a method of manufacturing the same, and semiconductor integrated circuit apparatus: A magnetic memory includes a magnetic tunneling junction element having a reference layer, a tunnel barrier layer and a recording layer laminated in order, information being written to the recording layer in accordance with spin injection magnetization reversal caused by a current, information written to the recording layer being read... Agent: Rader Fishman & Grauer PLLC

20070181965 - Chip element, manufacturing method thereof, and electronic device or equipment using same: In a chip element having a substrate, an impedance element formed on the substrate, and a plurality of electrodes formed on the substrate to be connected to the impedance element, the substrate is formed of a low-permittivity material having a permittivity low enough to decrease the parasitic capacitance in a... Agent: Foley And Lardner LLP Suite 500

20070181966 - Fabrication process of semiconductor device and semiconductor device: A method of fabricating a semiconductor device comprises the steps of forming an isolation trench in a semiconductor substrate, depositing a silicon oxide film on the semiconductor substrate by a high-density plasma CVD process such that the silicon oxide film fills the isolation trench and such that the silicon oxide... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070181968 - Semiconductor device and method of manufacturing the same: Provided are a semiconductor device which substantially prevents repair failure and a method of manufacturing the same. The semiconductor device includes a plurality of first fuses formed apart from each other on a semiconductor substrate, and on which a protective layer is formed; a first insulating layer filled in between... Agent: Mills & Onello LLP

20070181969 - Semiconductor memory device and method of fabricating the same: A semiconductor memory device having an improved fuse structure may include an interlayer insulating film on a semiconductor substrate, an opening in the interlayer insulating film, a vertical fuse that may conform to the opening, a fuse insulating film on the vertical fuse that may fill the opening, and metal... Agent: Lee & Morse, P.C.

20070181967 - Semiconductor device with visible indicator and method of fabricating the same: A semiconductor device may include a fuse pattern and an interconnection pattern formed on a surface of a semiconductor substrate. An interlayer dielectric layer may be disposed on the surface of the semiconductor substrate including the fuse pattern and the interconnection pattern. A bonding pad may be formed over the... Agent: Harness, Dickey & Pierce, P.L.C

20070181971 - Semiconductor device and method of manufacturing the same: A semiconductor device including inductors with improved reliability and a method of manufacturing the same are provided. The semiconductor device may include a substrate, an insulating film pattern formed on the substrate and having an opening, an amorphous metal nitride film formed inside the opening, a diffusion reducing or preventing... Agent: Harness, Dickey & Pierce, P.L.C

20070181970 - High performance system-on-chip inductor using post passivation process: A system and method for forming post passivation inductors, and related structures, is described. High quality electrical components, such as inductors and transformers, are formed on a layer of passivation, or on a thick layer of polymer over a passivation layer.... Agent: Megica Corporation

20070181973 - Capacitor structure: A capacitor structure including a plurality of conductive layers, a dielectric layer and a plurality of contacts is disclosed. The conductive layers are stacked, and each conductive layer has a first conductive pattern and a second conductive pattern. The dielectric layer is disposed between the first conductive pattern and the... Agent: Jianq Chyun Intellectual Property Office

20070181972 - Integrated circuit structures with silicon germanium film incorporated as local interconnect and/or contact: Disclosed are integrated circuit structures each having a silicon germanium film incorporated as a local interconnect and/or an electrical contact. These integrated circuit structures provide improved local interconnects between devices and/or increased capacitance to devices without significantly increasing structure surface area or power requirements. Specifically, disclosed are integrated circuit structures... Agent: Frederick W. Gibb, Iii Gibb & Rahman, LLC

20070181974 - Planar vertical resistor and bond pad resistor and related method: Resistors that avoid the problems of miniaturization of semiconductor devices and a related method are disclosed. In one embodiment, a resistor includes a planar resistor material that extends vertically within at least one metal layer of a semiconductor device. In another embodiment, a resistor includes a resistor material layer extending... Agent: Hoffman, Warnick & D'alessandro LLC

20070181975 - Trench-gate transistors and their manufacture: A trench-gate transistor (1) has an integral first layer of silicon dioxide (31) which extends from the upper surface (10a) of the semiconductor body (10) over top corners of each cell array trench (20), the integral first layer also providing a thin gate dielectric insulating layer (31A) for a thick... Agent: Nxp, B.v. Nxp Intellectual Property Department

20070181976 - Semiconductor device, electronic device, and manufacturing method of the same: The present invention provides a technology that makes it possible to enhance the gain and the efficiency of an RF bipolar transistor. Device isolation is given between a p+ type isolation region and an n+ type collector embedded region and between a p+ type isolation region and an n type... Agent: Miles & Stockbridge PC

20070181977 - Solutions for integrated circuit integration of alternative active area materials: Methods of forming areas of alternative material on crystalline semiconductor substrates, and structures formed thereby. Such areas of alternative material are suitable for use as active areas in MOSFETs or other electronic or opto-electronic devices.... Agent: Goodwin Procter LLP Patent Administrator

20070181979 - Microelectromechanical semiconductor component with cavity structure and method for producing the same: One aspect of the invention relates to a semiconductor component with cavity structure and a method for producing the same. The semiconductor component has an active semiconductor chip with the microelectromechanical structure and a wiring structure on its top side. The microelectromechanical structure is surrounded by walls of at least... Agent: Dicke, Billig & Czaja

20070181978 - Total ionizing dose suppression transistor architecture: A total ionizing dose suppression architecture for a transistor and a transistor circuit uses an “end cap” metal structure that is connected to the lowest potential voltage to overcome the tendency of negative charge buildup during exposure to ionizing radiation. The suppression architecture uses the field established by coupling the... Agent: Hogan & Hartson LLP

20070181980 - Cmos devices with hybrid channel orientations and method for fabricating the same: The present invention relates to a semiconductor substrate comprising at least first and second device regions, wherein the first device region comprises a first recess having interior surfaces oriented along a first set of equivalent crystal planes, and wherein the second device region comprises a second recess having interior surfaces... Agent: Scully Scott Murphy & Presser, PC

20070181981 - Edge seal for improving integrated circuit noise isolation: An edge seal structure and fabrication method are described. The edge seal structure includes a high impedance substrate containing a base material and a grounded floating edge seal that is on the substrate but is isolated from the base material. The edge seal contacts a first doped well in the... Agent: Brinks Hofer Gilson & Lione

20070181982 - Integrated circuit package system with leadfinger support: An integrated circuit package system including forming a leadframe having a lead with a leadfinger support of a predetermined height, and attaching an integrated circuit die with an electrical interconnect at a predetermined collapse height determined by the predetermined height of the leadfinger support.... Agent: Ishimaru & Zahrt LLP

20070181985 - Method of manufacturing a semiconductor device and used for the same: In a lead frame, through holes are formed outside suspending leads and trenches are formed on a back surface along the suspending leads so as to communicate with the through holes. When sealing resin is injected into cavities of a resin molding die, air enters the through holes through air... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070181983 - Semiconductor device and manufacturing method thereof: A method of manufacturing a semiconductor device 28 in which a plating mask 38, 39 having a noble metal plating layer 35 as an uppermost layer is formed at a predetermined portion on an obverse surface side or a reverse surface side of a leadframe material 10, and the leadframe... Agent: Wood, Phillips, Katz, Clark & Mortimer

20070181984 - Semiconductor package suitable for high voltage applications: A semiconductor package has a structure in which a leadframe pad to which a semiconductor die is attached and inner leads electrically connected to the leadframe pad are covered by a molded housing, and outer leads extending from the inner leads protrude from a side surface of the molded housing... Agent: Hiscock & Barclay, LLP

20070181986 - Substrate for device bonding and method for manufacturing same: A substrate for device bonding is provided, which enables bonding of a device with high bond strength to an Au electrode formed on a substrate such as aluminum nitride by soldering the device at a low temperature using a soft solder metal having a low melting point such as an... Agent: The Webb Law Firm, P.C.

20070181988 - Bare chip embedded pcb and method of the same: A PCB having an embedded bare chip and a manufacturing method thereof are disclosed. A method of manufacturing a PCB may include embedding a bare chip in a board such that electrode pads of the bare chip are exposed, and forming electrode bumps on the electrode pads. In this way,... Agent: Staas & Halsey LLP

20070181987 - Highly reliable, cost effective and thermally enhanced ausn die-attach technology: In a circuit, an integrated circuit package and methods for attaching integrated circuit dies or discrete power components to flanges of integrated circuit packages, each of the integrated circuit dies is sawed from a wafer. The thickness of the wafer is reduced by mechanical grinding, applying an isotropic wet chemical... Agent: Baker Botts, L.L.P.

20070181991 - Stacked semiconductor device: A stacked semiconductor device includes an interposer substrate having external power supply terminals, and semiconductor chips stacked on the interposer substrate. A power supply wiring arranged in the semiconductor chip located in the bottom layer is connected to the external power supply terminal via a bump electrode, the power supply... Agent: Young & Thompson

20070181990 - Stacked semiconductor structure and fabrication method thereof: A stacked semiconductor structure and fabrication method thereof are provided. The method includes mounting and connecting electrically a semiconductor chip to a first substrate, mounting on the first substrate a plurality of supporting members corresponding in position to a periphery of the semiconductor chip, mounting a second substrate having a... Agent: Edwards Angell Palmer & Dodge LLP

20070181989 - Microelectronic devices, stacked microelectronic devices, and methods for manufacturing such devices: Stacked microelectronic devices and methods for manufacturing such devices are disclosed herein. In one embodiment, a stacked microelectronic device assembly can include a first known good packaged microelectronic device including a first interposer substrate. A first die and a first through-casing interconnects are electrically coupled to the first interposer substrate.... Agent: Perkins Coie LLP Patent-sea

20070181993 - Printed circuit board including reinforced copper plated film and method of fabricating the same: A printed circuit board (PCB) may include a substrate. A copper layer may be formed over a portion of the substrate, the copper layer including at least one of a metallic powder and a ceramic powder.... Agent: Harness, Dickey & Pierce, P.L.C

20070181992 - Microelectronic devices and methods for manufacturing microelectronic devices: Microelectronic devices and methods for manufacturing microelectronic devices are disclosed herein. In one embodiment, a microelectronic device includes a microelectronic die, a plurality of electrical couplers projecting from the die, and a flowable material disposed on the die. The die includes an integrated circuit and a plurality of terminals operably... Agent: Perkins Coie LLP Patent-sea

20070181995 - Circuit board structure embedded with semiconductor chips: A circuit board structure embedded with semiconductor chips is proposed. A semiconductor chip is received in a cavity of a supporting board. A dielectric layer and a circuit layer are formed on the supporting board and the semiconductor chip. A plurality of hollow conductive vias are formed in the dielectric... Agent: Mr. Joseph A. Sawyer, Jr. Sawyer Law Group LLP

20070181994 - Circuit board manufacturing method and circuit board: As means for solving a problem of a positional shift of a land and a hole which is caused by an alignment in the formation of an etching resist layer and a plated resist layer in a method of manufacturing a circuit board, there are provided a method of manufacturing... Agent: Rankin, Hill, Porter & Clark LLP

20070181996 - Circuit board: A circuit board including a first surface, a second surface, and a third surface is provided. The first surface has a first conductive region, and the second surface is opposite to the first surface. The third surface located between the first surface and the second surface and is connected with... Agent: Jianq Chyun Intellectual Property Office

20070181997 - Semiconductor device package with heat sink leadframe and method for producing it: Some embodiments have a semiconductor chip supported above a substrate, a filler layer encapsulating the semiconductor chip, a heat sink; and through contacts extending upwardly from the substrate nearly to an upper surface of the filler layer. In some embodiments of electronic packages, the through contacts separated from the heat... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070181999 - Memory module with rubber spring connector: A memory module comprises a base plate disposed with a plurality of printed circuit sets and one or more IC embedding frames fixed on the base plate, particularly each IC embedding frame having a rubber spring connector stored inside which comprises an insulating flexible silicone rubber layer embedded with a... Agent: Bacon & Thomas, PLLC

20070182000 - Module part: A module component which includes circuit substrate 3 having one or more components 1 on at least one of the surfaces, and junction circuit substrate 5 having hollow 4, or hole, disposed corresponding to the portion of the one or more components 1 mounted on the one surface of circuit... Agent: Steptoe & Johnson LLP

20070181998 - Stacked integrated circuit package system with face to face stack configuration: A stacked integrated circuit package system is provided forming a first molded chip comprises attaching a conductor on a wafer, applying an encapsulant around the conductor, and exposing a surface of the conductor in the encapsulant, attaching a first electrical interconnect on the conductor of the first molded chip and... Agent: Ishimaru & Zahrt LLP

20070182004 - Methods of forming electronic interconnections including compliant dielectric layers and related devices: An electronic device may include a substrate with an input/output pad thereon, and a compliant dielectric layer on a first portion of the substrate such that a second portion of the substrate is free of the compliant dielectric layer. A conductive redistribution line may extend from the input/output pad to... Agent: Myers Bigel Sibley & Sajovec

20070182005 - Semiconductor device, reticle used in fabricating method for the same and fabrication method thereof: A semiconductor device may include a substrate and a dielectric layer may be formed on the substrate. A multi-layered interconnection structure may be embedded in the dielectric layer. A plurality of bonding pads, which may be connected to an uppermost interconnection layer of the multi-layered interconnection structure, may be spaced... Agent: Harness, Dickey & Pierce, P.L.C

20070182002 - Package structure of a microphone: A kind of microphone package structure is disclosed. It comprises at least of a substrate, a sound processing unit, an upper cap and other devices. There would be at least one trench set on the substrate, and a separation gap between the trench and the bounding pad of the substrate... Agent: Rosenberg, Klein & Lee

20070182001 - Semiconductor device: The present invention aims at offering the semiconductor device which can improve the strength to the stress generated with a bonding pad. In the semiconductor device concerning the present invention, a plurality of bonding pads are formed on a semiconductor chip. In each bonding pad, a plurality of second line-like... Agent: Mcdermott Will & Emery LLP

20070182003 - Stackable semiconductor device and method for producing the same: The stackable semiconductor device includes at least one first electrode on a top side and a large-area second electrode on an underside of a semiconductor chip. The semiconductor chip also includes a control electrode on one of: the top side or the underside. Through contact blocks are arranged on the... Agent: Edell, Shapiro & Finnan, LLC

20070182009 - Wiring board and method for manufacturing the same and semiconductor device and method for manufacturing the same: A wiring board includes a film base, a plurality of conductive wirings aligned on the film base, and protrusion electrodes formed of a plated metal in the vicinity of end portions of the conductive wirings, respectively. An outer surface at both side portions of the protrusion electrodes in cross section... Agent: Hamre, Schumann, Mueller & Larson P.C.

20070182010 - Embossing processes for substrate imprinting, structures made thereby, and polymers used therefor: A mounting substrate includes an imprinted structure on one side for containing electrical bumps. The imprinted structure is imprinted and also cured under conditions that allow retention of significant features of the cured polymer film. A chip package is also made of the imprinted structure. A computing system is also... Agent: Intel/blakely

20070182011 - Method for forming a redistribution layer in a wafer structure: The present invention relates to a method for forming a redistribution layer in a wafer structure. The method comprises: (a) providing a wafer having a plurality of conductive structures and a first passivation layer thereon, wherein the first passivation layer covers the wafer except the conductive surfaces of the conductive... Agent: Volentine & Whitt PLLC

20070182006 - Semiconductor device with an improved solder joint: A semiconductor device with an improved solder joint system is described. The solder system includes two copper contact pads connected by a body of solder and the solder is an alloy including tin, silver, and at least one metal from the transition groups IIIA, IVA, VA, VIA, VIIA, and VIIIA... Agent: Texas Instruments Incorporated

20070182007 - Solder bump on a semiconductor substrate: A solder bump on a semiconductor substrate is provided. The solder bump comprises a semiconductor substrate having a top copper pad thereon, a protective layer on the semiconductor substrate and at least one inorganic passivation layer overlying the protective layer with a first opening exposing the top copper pad, wherein... Agent: Birch, Stewart, Kolasch & Birch, LLP

20070182008 - Substrate and method for mounting silicon device: A substrate on which a silicon device is mounted in accordance with an embodiment of the present invention includes a plurality of protrusions extending upward from a top surface of the substrate and a solder layer formed on the top of the substrate such that the plurality of protrusions extends... Agent: Ostrolenk Faber Gerb & Soffen

20070182012 - Methods for bonding and devices according to such methods: A method of bonding two elements such as wafers used in microelectronics applications is disclosed. One inventive aspect relates to a method for bonding comprising producing on a first main surface of a first element a first solder ball, producing on a first main surface of a second element a... Agent: Knobbe Martens Olson & Bear LLP

20070182013 - Damascene structure having a reduced permittivity and manufacturing method thereof: A semiconductor device includes a damascene structure and an air gap embedded in the damascene dielectric layer. A method of manufacturing a semiconductor device includes depositing a metal barrier in advance as an etch stop, forming a copper damascene interconnect structure, forming an air gap, and depositing a photosensitive passivation... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070182014 - Semiconductor device and method for manufacturing same: An improved migration resistance of the interconnect is provided and a diffusion of silicon into the inside of the interconnect is suppressed. A semiconductor device includes a silicon substrate, a first insulating film provided on the silicon substrate and composed of an SiCN film, an SiOC film and an SiO2... Agent: Young & Thompson

20070182015 - Fabrication of nanowires: This disclosure relates to a system and method for creating nanowires. A nanowire can be created by exposing layers of material in a superlattice and dissolving and transferring material from edges of the exposed layers onto a substrate. The nanowire can also be created by exposing layers of material in... Agent: Hewlett Packard Company

20070182016 - Method of making same low moisture absorptive circuitized substrave with reduced thermal expansion: A method of making a circuitized substrate including a composite layer including a first dielectric sub-layer including a plurality of fibers having a low coefficient of thermal expansion and a second dielectric sub-layer of a low moisture absorptivity resin, the second dielectric sub-layer not including continuous or semi-continuous fibers or... Agent: Lawrence R. Fraley Hinman, Howard. & Kattell, LLP

20070182017 - Semiconductor devices and methods of manufacturing the same: A semiconductor device includes a lower conductive layer formed on a semiconductor substrate, an interlayer insulating film that at least substantially covers the lower conductive layer, a plurality of contact holes formed in the interlayer insulating film to expose an upper surface of the lower conductive layer so that at... Agent: Harness, Dickey & Pierce, P.L.C

20070182020 - Chip connector: A method of electrically joining a first contact on a first wafer with a second contact on a second wafer, the first contact, a rigid material, and the second contact, a material that is malleable relative to the rigid material, such that when brought together the rigid material will penetrate... Agent: Morgan & Finnegan, L.L.P.

20070182018 - Integrated circuit package system including zero fillet resin: An integrated circuit packaging system comprised by providing a substrate with a first surface including conductive regions for receiving a flip chip die and a second surface including electrical contacts for external electrical connections. Providing the flip chip die over the substrate. Depositing a controlled volume of resin between the... Agent: Ishimaru & Zahrt LLP

20070182019 - Semiconductor device and manufacturing method for the same: To provide a high-performance, highly-reliable semiconductor device in which an adhesive used to mount (e.g., flip-chip mount) a semiconductor chip on a substrate has less air bubbles, and a low-cost, efficient method for manufacturing the same. Semiconductor device 10 of the present invention includes semiconductor chip 11 having a plurality... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070182022 - Wafer level chip scale package (wlcsp) with high reliability against thermal stress: A wafer level chip scale package includes a semiconductor chip having a plurality of pads; a lower insulation layer having a high Young's modulus of 1˜5 GPa formed on the semiconductor chip to expose the plurality of pads; a plurality of metal patterns formed on the lower insulation layer to... Agent: Ladas & Parry LLP

20070182021 - Semiconductor component comprising flip chip contacts and method for producing the same: A semiconductor component includes flip-chip contacts arranged on a wiring structure of a semiconductor chip. The wiring structure includes at least one metallization layer and at least one dielectric insulation layer made of a low-k material with a relative permittivity εr lower than the relative permittivity of a silicon dioxide.... Agent: Edell, Shapiro & Finnan, LLC

20070182023 - Semiconductor device: By making coefficients of linear thermal expansion of stress relief members on upper and lower surface sides of a semiconductor chip small, thermal strain on joint members above and below the semiconductor chip is decreased and development of a crack therein is suppressed to ensure a joint area. Furthermore, by... Agent: Townsend And Townsend And Crew, LLP

20070182024 - Integrated circuit packaging system including a non-leaded package: An integrated circuit non-leaded package system is provided including: forming a plurality of leads with a predetermined thickness and a predetermined interval gap between each of the plurality of leads; configuring each one of the plurality of leads to include first terminal ends disposed adjacent an integrated circuit and second... Agent: Ishimaru & Zahrt LLP

20070182025 - Laminate structure and method of producing the same: The invention relates to a laminate structure comprising a first carrier layer with a surface, a first active surface being electrically conducting and being supported by the first carrier layer, a second active surface being electrically conducting and being supported by the first carrier layer, wherein the first active surface... Agent: Greer, Burns & Crain

20070182026 - Semiconductor device: A semiconductor device having a plurality of pads P11, P12, P21, P22, P31, and P32 on the same plane of a semiconductor chip with wires W1, W2, and W3 connected between the pads P11 and P12, P21 and P22, and P31 and P32, respectively, so as to be electrically isolated... Agent: Koda & Androlia

20070182027 - Integrated circuit and operating method therefor: An integrated circuit is provided that includes at least one first circuit component and at least one second circuit component, the first circuit component being connected via a level converter to the second circuit component. The level converter can be optionally activated or deactivated by the first circuit component in... Agent: Mcgrath, Geissler, Olds & Richardson, PLLC

20070182028 - Electronic component package: The electronic component package includes a mounting board, an electronic component and a molding resin. An external electrode is disposed on a surface of the mounting board. The electronic component connected to the mounting board via the external electrode includes a component-substrate, a device, a component-cover and a resin-made protector.... Agent: Wenderoth, Lind & Ponack L.L.P.

20070182029 - Semiconductor component and method for producing semiconductor components: A semiconductor is disclosed. In one embodiment, the semiconductor includes a semiconductor substrate having an active area region, a covering configured to protect the active area region, and a carrier. An interspace is located between the carrier and the covering. The interspace is filled with an underfiller material is disclosed.... Agent: Dicke, Billig & Czaja

20070182030 - High-voltage silicon-on-insulator transistors and methods of manufacturing the same: In a first aspect, a first method of manufacturing a high-voltage transistor is provided. The first method includes the steps of (1) providing a substrate including a bulk silicon layer that is below an insulator layer that is below a silicon-on-insulator (SOI) layer; and (2) forming one or more portions... Agent: Ibm Corporation Intellectual Property Law Dept. 917

20070176162 - Nitride semiconductor light-emitting device and method for manufacturing the same: A semiconductor light emitting device is provided. The semiconductor light emitting device includes a first nitride layer, an active layer, and a second nitride layer. The first nitride layer includes an irregular, uneven surface, and the active layer is formed on the irregular, uneven surface. The second nitride layer is... Agent: Birch Stewart Kolasch & Birch

20070176174 - Conducting polymer composition and organic optoelectronic device employing the same: A conducting polymer, the conducting polymer composition further including an ionomer, and an organic optoelectronic device including the conducting polymer or the composition are provided. The conducting polymer according to the embodiments of the present invention is a self-doped conducting polymer in which conducting polymer chains are grafted in a... Agent: Robert E. Bushnell

20070176171 - Organic light emitting display device and a method of manufacturing thereof: Disclosed is an organic light emitting display device including a first substrate defining a pixel region and a non-pixel region. An organic light emitting element comprising a first electrode, an organic thin film layer and a second electrode are formed in the pixel region. A scan driver is formed in... Agent: Knobbe Martens Olson & Bear LLP

20070176172 - Organic memory devices and methods of fabricating such devices: Disclosed herein are organic memory devices and methods for fabricating such devices. The organic memory devices comprise a first electrode, a second electrode and an organic active layer extending between the first and second electrodes wherein the organic active layer is formed from one or more electrically conductive organic materials... Agent: Harness, Dickey & Pierce, P.L.C

20070176175 - Thin-film capacitor and method of manufacturing the same: A thin-film capacitor element having two conductive films and a dielectric film sandwiched therebetween is provided above a substrate. An inorganic protective film covering the thin-film capacitor element and having a second opening exposing at least a part of the conductive films is provided. An organic protective film covering the... Agent: Armstrong, Kratz, Quintos, Hanson & Brooks, LLP

20070176186 - Light emitting device for enhancing brightness: A light emitting device for enhancing brightness is provided, comprising a first contact and a second contact provided on a light emitting diode and respectively connected with a first conductive lead and a second conductive of a transparent submount such that can achieve the purpose of supplying power for the... Agent: Rosenberg, Klein & Lee

20070176187 - Light source unit and projector with light source apparatus: A light source unit includes a light emitting element, a substrate on which the light emitting surface is disposed, a sealing portion which transmits light from the light emitting surface and a collimator lens for forming light emitted from the sealing portion into a bundle of parallel rays of light,... Agent: Frishauf, Holtz, Goodman & Chick, PC

20070176185 - Organic light emitting display of mother substrate unit and method of fabricating the same: A mother substrate unit organic light emitting display in which grooves are formed on the internal surface where a scribing line is formed to scribe a mother substrate on which a plurality of display panels are formed into unit display panels so that a scribing process is easily performed and... Agent: Knobbe Martens Olson & Bear LLP

20070176189 - Organic memory device and fabrication method thereof: Disclosed herein are an organic memory device and a method for fabricating the device. The organic memory device may include a first electrode, a second electrode and an organic active layer wherein the organic active layer includes an upper organic material layer formed of an electrically conductive organic material containing... Agent: Harness, Dickey & Pierce, P.L.C

20070176191 - Light emitting diode and method of manufacturing the same: A light emitting diode having high light extraction efficiency and a method of manufacturing the same are provided. The LED includes a semiconductor multiple layer including an active layer; a transparent electrode layer formed on the semiconductor multiple layer; and refraction field unit embedded in the transparent electrode layer and... Agent: Buchanan, Ingersoll & Rooney PC

20070176195 - Surface light emitter, display apparatus and light control member: To improve the front brightness of the light emitted from a surface light emitter having a surface light emitting device. In the surface light emitter to which a light control sheet having depressions is provided, the surface of the light control sheet having the depressions is adhered to a light... Agent: Brinks Hofer Gilson & Lione

20070176196 - Light emitting diode module: A light emitting diode module having improved luminous efficiency is provided. The light emitting diode module includes: a light emitting chip; a phosphor layer formed of phosphor materials emitting light having a wavelength longer than the light emitted from the light emitting chip using light emitted from the light emitting... Agent: Buchanan, Ingersoll & Rooney PC

20070176197 - Semiconductor device and method of manufacturing semiconductor device: A semiconductor device 10 has such a structure that a plurality of through electrodes 30 is formed on a substrate 20 and each of terminals of light emitting devices (LEDs) 40 is electrically connected to each of the through electrodes 30 via a bump 50 on a lower surface side.... Agent: Drinker Biddle & Reath (dc)

20070176160 - Electron tube: A GaN-based semiconductor photocathode is applied to an electron tube. A GaN-based compound semiconductor layer is laterally grown on a substrate, and incorporated in the electron tube. The crystal defects of the compound semiconductor layer are reduced, whereby an electron tube which has inconceivably high sensitivity is realized.... Agent: Drinker Biddle & Reath (dc)

20070176161 - Light emitting device: It is an object of the invention to provide a light emitting device which can display a superior image in which luminescent color from each light emitting layer is beautifully displayed and power consumption is lowered in a light emitting element in which light emitting layers are stacked. One feature... Agent: Cook, Alex, Mcfarron, Manzo, Cummings & Mehler Ltd

20070176164 - -conjugated aromatic ring-containing compound and organic electroluminescent device: [In the formula, R1-R6 independently represent a hydrogen atom or the like; A and D independently represent a pyridine ring, pyrimidine ring, pyridazine ring, pyrazine ring, furan ring, pyrrole ring, pyrazole ring, imidazole ring, thiophene ring, benzothiadiazole ring, thieno[3,4-b]pyrazine ring, furo[3,4-b]pyrazine ring, 6H-pyrrolo[3,4-b]pyrazine ring or the like; a1, a2 and... Agent: Birch Stewart Kolasch & Birch

20070176163 - 2,7-carbazolenevinylene derivatives as novel materials in producing organic based electronic devices: n

20070176173 - Electronic device including an organic active layer and process for forming the electronic device: An electronic device can include an organic active layer and an electrode. In one aspect, the electrode can further include a first layer that is conductive, and a second layer that is conductive. The second layer can include a defect extending at least partly through a thickness of the second... Agent: E I Du Pont De Nemours And Company Legal Patent Records Center

20070176167 - Method of making organic light emitting devices: The invention includes embodiments that relate to a method of making an organic light-emitting device comprising at least one bilayer structure. The method comprises providing at least one first layer comprising at least one cross-linkable organic material and at least one photo acid generator; exposing the first layer to a... Agent: General Electric Company Global Research

20070176168 - Mixed-scale electronic interface: Embodiments of the present invention are directed to mixed-scale electronic interfaces, included in integrated circuits and other electronic devices, that provide for dense electrical interconnection between microscale features of a predominantly microscale or submicroscale layer and nanoscale features of a predominantly nanoscale layer. The predominantly nanoscale layer, in one embodiment... Agent: Hewlett Packard Company

20070176169 - Organic light emitting display including transparent cathode: A top emission type organic light emitting display includes an organic light emitting diode in which an anode, a light emitting layer and a transparent cathode are successively deposited. The cathode has a sandwiched structure in which a transparent oxide layer is inserted between the metal layers. Exemplary embodiments of... Agent: Cantor Colburn, LLP

20070176170 - Organic light-emitting device with integrated color filter and method for manufacturing the same: The present invention relates to an organic light-emitting device with an integrated color filter and a method for manufacturing the same. The organic light-emitting device is manufactured with a metal layer depositing process for raising the source/drain layer so that the sidewall area of a pixel electrode formed in a... Agent: Birch Stewart Kolasch & Birch

20070176165 - Thin film organic position sensitive detectors: The present invention is directed to organic photosensitive optoelectronic devices and methods of use for determining the position of a light source. Provided is an organic position sensitive detector (OPSD) comprising: a first electrode, which is resistive and may be either an anode or a cathode; a first contact in... Agent: Kenyon & Kenyon LLP

20070176166 - Vertical organic transistor and method of fabricating the same: A vertical organic transistor is disclosed, which includes at least: a collector contact layer disposed on a substrate; a first organic semiconductor layer disposed on the collector contact layer; a base contact layer disposed on the first organic semiconductor layer, wherein the base contact layer comprises no less than two... Agent: Jianq Chyun Intellectual Property Office

20070176177 - Organic electroluminescent display and method of fabricating the same: An organic electroluminescent display (“OELD”) includes an organic light-emitting diode (“OLED”), a circuit region, and an interlayer dielectric (“ILD”) layer. The OLED is disposed in each of a plurality of pixels arranged on a substrate. The circuit region includes two or more thin film transistors (“TFTs”) and a storage capacitor.... Agent: Cantor Colburn, LLP

20070176176 - Semiconductor device: Semiconductor elements deteriorate or are destroyed due to electrostatic discharge damage. The present invention provides a semiconductor device in which a protecting means is formed in each pixel. The protecting means is provided with one or a plurality of elements selected from the group consisting of resistor elements, capacitor elements,... Agent: Eric Robinson

20070176178 - Thin film transistor array panel for liquid crystal display and method for manufacturing the same: In a method of fabricating a liquid crystal display, an insulating layer for storage capacitors is reduced in thickness to increase the storage capacity while maintaining the aperture ratio in a stable manner. A thin film transistor array panel for the liquid crystal display includes an insulating substrate, and a... Agent: Frank Chau, Esq. F. Chau & Associates, LLP

20070176180 - Polysilicon structure, thin film transistor panel using the same, and manufacturing method of the same: A method for forming a polysilicon structure is provided. An amorphous silicon structure with a first amorphous silicon region and a second amorphous silicon region is formed in a first region and a second region of a substrate, respectively. The first amorphous silicon region is thinner than the second amorphous... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070176179 - Vertical external cavity surface emitting laser including second harmonic generation crystal having mirror surface: Provided is a VECSEL having an SHG crystal with a mirror surface. The VECSEL includes a laser chip, a folding mirror, and the SHG crystal. The laser chip emits rays having a first wavelength, and the folding mirror is disposed a predetermined distance from the laser chip and obliquely disposed... Agent: Buchanan, Ingersoll & Rooney PC

20070176181 - Compound semiconductor light-emitting device and production method thereof: An object of the present invention is to provide a compound semiconductor light-emitting device having side surfaces of large surface area to improve the efficiency for outwardly transmitting the emitted light. Another object of the present invention is to provide a technology capable of easily forming the side surfaces with... Agent: Sughrue Mion, PLLC

20070176184 - Organic light-emitting display: An organic light-emitting display (OLED) includes a first substrate, a first organic light-emitting pixel area, a first driver, a second substrate, a system circuitry, and a conductive member. The second substrate is opposite to the first substrate. The first organic light-emitting pixel area is defined on the first substrate and... Agent: Madson & Austin Gateway Tower West

20070176182 - Structure for integrating led circuit onto heat-dissipation substrate: A structure for integrating LED circuit onto a heat-dissipation substrate is disclosed. At least an electronic component and a LED chip are integrated on a heat-dissipation substrate. The electronic component can be a passive component, a drive chip, an electrostatic discharge protection device, or a sensing component. Therefore, both wire-bonding... Agent: Rosenberg, Klein & Lee

20070176183 - Voltage controlled light source and image presentation device using the same: A device (300) includes a driver circuit (200) having a field effect transistor (FET) (30), acting as a current sink, a current sense network (10), an operational amplifier (opamp) (20), and a light emitting diode (LED) (40). Current sense network (10) is connected to the source electrode (32) of FET... Agent: Price Heneveld Cooper Dewitt & Litton, LLP

20070176188 - Semiconductor light emitting device and its manufacture method: A semiconductor light emitting device includes a semiconductor layer having a recess extending downwardly from a top surface thereof along a pattern of a closed line so that said recess defines and encloses a region of the semiconductor layer that emits light, said semiconductor layer having a downward slope in... Agent: Masao Yoshimura Chen Yoshimura LLP

20070176192 - Arrays of light emitting articles and method of manufacturing same: Light-emitting articles and methods of manufacturing such articles are disclosed. In one aspect, a light emitting article includes an optical element having an input and an output aperture, each having a size. An LED die having a size is optically coupled to the optical element. The output aperture size of... Agent: 3m Innovative Properties Company

20070176190 - Optical semiconductor device and circuit: A surface mount optical semiconductor device and circuit can efficiently transfer and dissipate heat even when being mounted together with electronic circuit components. The optical semiconductor device can include a lead frame having a concave portion for mounting a light-emitting element therein and a pair of electrode terminals connected to... Agent: Cermak & Kenealy, LLP

20070176193 - Semiconductor light-emitting device, lighting module, lighting device and method for manufacturing semiconductor light-emitting device: A semiconductor light-emitting device includes: a semiconductor multilayer film, a substrate supporting the semiconductor multilayer film; and a phosphor layer formed on the substrate so as to cover the semiconductor multilayer film. The phosphor layer has an outer edge of a cross section taken in a direction parallel to the... Agent: Hamre, Schumann, Mueller & Larson P.C.

20070176194 - White light emitting diode and method of manufcturing the same: Employing a LED which emits light via excitation with UV light, particularly the foregoing high-power LED, disclosed are a white LED exhibiting high reliability and longer operating life, and a method of manufacturing the white LED. Also disclosed are a white light emitting diode possessing a phosphor layer which emits... Agent: Lucas & Mercanti, LLP

20070176198 - Chip on board package and manufacturing method thereof: A Chip on Board (COB) package which can reduce the manufacturing costs by using a general PCB as a substrate, increase a heat radiation effect from a light source, thereby realizing a high quality light source at low costs, and a manufacturing method thereof. The COB package includes a board-like... Agent: Mcdermott Will & Emery LLP

20070176199 - Nitride-based group iii-v semiconductor substrate and fabrication method therefor, and nitride-based group iii-v light-emitting device: A nitride-based group III-V semiconductor substrate has an as-grown surface on the surface thereof; and a flat surface on the back surface of the substrate. The c-axis of a nitride-based group III-V semiconductor crystal composing the substrate is substantially perpendicular to the surface of the substrate or inclined at a... Agent: Foley And Lardner LLP Suite 500

20070176200 - Wide range radiation detector and manufacturing method: There is disclosed a radiation detector comprising a II-VI compound semiconductor substrate that absorbs radiation having a first energy, a II-VI compound semiconductor layer of a first conductivity type provided on a main surface of the II-VI compound semiconductor substrate, a metal layer containing at least one of a group... Agent: Ostrolenk, Faber, Gerb & Soffen

20070176204 - Field effect transistor: A field effect transistor includes a first semiconductor layer made of a first group III-V nitride; a second semiconductor layer formed on the first semiconductor layer, made of a second group III-V nitride and having a gate recess portion for exposing the first semiconductor layer therein; and a gate electrode... Agent: Mcdermott Will & Emery LLP

20070176202 - Manufacturing method of organic thin-film transistors and equipment for manufacturing the same: To increase productivity of organic thin-film transistors, in an organic thin-film transistor manufacturing equipment, a liquid containing at least either one of a wiring material and a semiconductor material is coated on a substrate to form a number of organic thin-film transistors. Substrate carrying means carry the substrate. The substrate... Agent: Townsend And Townsend And Crew, LLP

20070176203 - Semiconductor light emitting device: A semiconductor light emitting device has a gallium nitride compound semiconductor, and a first cladding layer of a first conductivity type, an active layer, an electron barrier layer of a second conductivity type and made of InxAlyGa1-x-yN (0≦x≦1 and 0≦y≦1), and a second cladding layer of the second conductivity type,... Agent: Leydig Voit & Mayer, Ltd

20070176201 - Integrated iii-nitride devices: A III-nitride heterojunction semiconductor device that includes a power electrode that is electrically connected to a conductive substrate through a trench in the heterojunction thereof.... Agent: Ostrolenk, Faber, Gerb & Soffen, LLP Attorneys At Law

20070176205 - Semiconductor device: A semiconductor device including a horizontal unit semiconductor element, the horizontal unit semiconductor element including: a) a semiconductor substrate of a first conductivity type; b) a semiconductor region of a second conductivity type formed on the semiconductor substrate; c) a collector layer of the first conductivity type formed within the... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070176206 - Method of manufacturing field emission device: A method of manufacturing a field emission device (FED), which reduces the number of photomask patterning processes and improves the manufacturing yield of the FED, is provided. The method includes steps of sequentially forming a cathode layer, a first insulating layer, and a gate layer on a substrate, forming a... Agent: Robert E. Bushnell

20070176207 - Method for forming patterns on a semiconductor device using a lift off technique: Provided is a technique of improving the properties of a bipolar transistor. Described specifically, upon formation of a collector electrode around a base mesa by the lift-off method, a resist film is formed over connection portions between the outer periphery of a region OA1 and a region in which the... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070176208 - Hosting structure of nanometric elements and corresponding manufacturing method: A hosting structure of nanometric components is described comprising a substrate, a first multi-spacer level comprising a first plurality of spacers including first conductive spacers parallel to each other, and at least a second multi-spacer level realized above said first multi-spacer level and comprising a second plurality of spacers arranged... Agent: Seed Intellectual Property Law Group PLLC

20070176209 - Semiconductor device and method of manufacture thereof: A semiconductor device of complementary structure with increased carrier mobilities of both polarities by applying orientation-dependent mechanical stresses to their respective semiconductor channel regions, comprises a semiconductor region subjected to compressive stress in a first direction along a surface and tensile stress in a second direction different from the first... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070176210 - Semiconductor layer structure and method for fabricating a semiconductor layer structure: Semiconductor layer structure and a method for producing a structure are provided, including a substrate made of semiconductor material, on which a layer made of a second semiconductor material is situated, furthermore a region (3) enriched with impurity atoms, which region is situated either in layer (2) or at a... Agent: Kolisch Hartwell, P.C.

20070176211 - Sensor elements with cantilevered bar structures made of semiconductors based on group iii-nitride: The present invention relates to a sensor element which has a semiconductor structure based on a Group III-nitride. The semiconductor sensor element serves for determining the pressure, the temperature, a force, a deflection or an acceleration. It has a substrate base 1, disposed thereon, a homogeneous semiconductor layer based on... Agent: Indianapolis Office 27879 Brinks Hofer Gilson & Lione

20070176212 - Integrated circuit having resistance temperature sensor: An integrated circuit having a resistance temperature sensor composed of a first resistance structure formed within a trench, and a second resistance structure formed within a mesa region is disclosed. This embodiment makes it possible to suppress or reduce manufacturing-technological fluctuations of the width of the trenches to a resistance... Agent: Dicke, Billig & Czaja

20070176213 - Imaging device: An imaging device capable of multiplying carriers and miniaturizing the device is obtained. The imaging device includes a carrier storage portion for storing carriers generated by photoelectric conversion, having a photoelectric conversion function, a multiplier section including a multiplier electrode applying an electric field for multiplying carriers due to impact... Agent: Ditthavong Mori & Steiner, P.C.

20070176214 - Multilevel integrated circuit devices and methods of forming the same: Semiconductor devices including a plurality of semiconductor layers. A plurality of transistors are on each of the semiconductor layers. The transistors include gate lines and have source regions and drain regions formed between the gate lines in the respective semiconductor layer including the transistors. The semiconductor devices further include a... Agent: Myers Bigel Sibley & Sajovec

20070176215 - Transistor: A transistor includes a first semiconductor layer formed on a substrate, a second semiconductor layer formed on the first semiconductor layer and has a band gap larger than that of the first semiconductor layer, a control layer formed on the second semiconductor layer and contains p-type impurities, a gate electrode... Agent: Mcdermott Will & Emery LLP

20070176216 - Imaging apparatus, radiation imaging apparatus, and manufacturing methods therefor: An imaging apparatus is provided in which a plurality of pixels, each having a conversion element and a thin-film transistor, are arranged in a two-dimensional fashion on an insulating substrate; the photoelectric conversion element is arranged over the thin-film transistor, with an insulating film, which serves as an interlayer insulating... Agent: Fitzpatrick Cella Harper & Scinto

20070176218 - Dual-gate non-volatile ferroelectric memory: A dual-gate non-volatile memory cell includes a first dielectric layer extending over a first gate, a semiconductor region extending over the first dielectric layer, a second dielectric layer comprising tunnel oxide extending over the semiconductor region, a ferroelectric layer extending over the second dielectric layer, and a second gate extending... Agent: Townsend And Townsend And Crew, LLP

20070176217 - Ferroelectric varactors suitable for capacitive shunt switching: A ferroelectric varactor suitable for capacitive shunt switching is disclosed. High resistivity silicon with a SiO2 layer and a patterned metallic layer deposited on top is used as the substrate. A ferroelectric thin-film layer deposited on the substrate is used for the implementation of the varactor. A top metal electrode... Agent: Dinsmore & Shohl LLP

20070176219 - Semiconductor device: A plurality of floating gates are formed on a principal surface of a semiconductor substrate that constitutes a nonvolatile semiconductor memory device through a first gate dielectric film. An auxiliary gate formed on the principal surface of the semiconductor substrate through a third gate dielectric film is formed on one... Agent: Miles & Stockbridge PC

20070176220 - Semiconductor device: A semiconductor device, including: a semiconductor substrate of a first conductivity type; a semiconductor layer of a second conductivity type formed on the semiconductor substrate; a trench formed in the semiconductor region; a trench diffusion layer of the first conductivity type formed along wall surfaces of the trench; and a... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070176221 - Semiconductor memory device and method for fabricating the same: A semiconductor memory device comprises a silicon layer having a first diffused region and a second diffused region formed therein, a gate electrode formed through an insulating film on one side of the silicon layer between the first and the second diffused regions, a capacitor formed on said one side... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070176222 - Highly integrated and reliable dram and its manufacture: A semiconductor device and its manufacture method wherein the semiconductor substrate has first and second insulating films, the first insulating film being an insulating film other than a silicon nitride film formed at least on a side wall of a conductive pattern including at least one layer of metal or... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070176223 - Split gate memory cell in a finfet: A memory cell is implemented using a semiconductor fin in which the channel region is along a sidewall of the fin between source and drains regions. One portion of the channel region has a select gate adjacent to it and another other portion has the control gate adjacent to it... Agent: Freescale Semiconductor, Inc. Law Department

20070176224 - Nonvolatile semiconductor memory device in which decrease in coupling ratio of memory cells is suppressed: A first insulation film is formed on a semiconductor substrate. A first gate electrode is formed on the first insulation film. A second insulation film is formed on an upper surface and a side surface of the first gate electrode. A second gate electrode is formed on the second insulation... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070176225 - Semiconductor device and method of manufacturing the same: A semiconductor device having reduced pitting may be formed from isolation layer patterns on a semiconductor substrate defining an active region, a tunnel oxide layer on the active region, the tunnel oxide layer having a nitrified surface, a floating gate on the tunnel oxide layer, a dielectric layer on the... Agent: Lee & Morse, P.C.

20070176226 - Memory cell using a dielectric having non-uniform thickness: A memory cell is programmed by injecting charge into a charge storage layer of the memory cell. A desired programmed charge results in the charge storage layer over an edge portion of a channel region of the memory cell. An undesired programmed charge results in the charge storage layer over... Agent: Freescale Semiconductor, Inc. Law Department

20070176227 - Mos device with nano-crystal gate structure: Methods and apparatus are provided for non-volatile semiconductor devices. The apparatus comprises a substrate having therein a source region and a drain region separated by a channel region extending to a first surface of the substrate, and a multilayered gate structure containing nano-crystals located above the channel region. The gate... Agent: Ingrassia, Fisher & Lorenz, P.C.

20070176228 - Non-volatile semiconductor memory device and method of manufacturing the same: A non-volatile semiconductor memory device includes a semiconductor substrate, a memory cell array formed on the semiconductor substrate, and including a first gate insulator having a first thickness. The device further includes a high-voltage transistor circuit formed on the semiconductor substrate, and including a second gate insulator having a second... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070176230 - High-breakdown-voltage insulated gate semiconductor device: In a semiconductor device of the present invention, the top surface of an n-type silicon carbide layer formed on a silicon carbide substrate is miscut from the (0001) plane in the <11-20> direction. A gate electrode, a source electrode and other elements are arranged such that in a channel region,... Agent: Mcdermott Will & Emery LLP

20070176229 - Integrated circuit having compensation component: An integrated circuit and component is disclosed. In one embodiment, the component is a compensation component, configuring the compensation regions in the drift zone in V-shaped fashion in order to achieve a convergence of the space charge zones from the upper to the lower end of the compensation regions is... Agent: Dicke, Billig & Czaja

20070176232 - Dram access transistor and method of formation: Self-aligned recessed gate structures and method of formation are disclosed. Field oxide areas for isolation are first formed in a semiconductor substrate. A plurality of columns are defined in an insulating layer formed over the semiconductor substrate subsequent to which a thin sacrificial oxide layer is formed over exposed regions... Agent: Dickstein Shapiro LLP

20070176231 - Varying mesa dimensions in high cell density trench mosfet: Circuits, methods, and apparatus for power MOSFETs having a high cell density for a high current carrying capability while maintaining a low pinched-base resistance. One device employs a number of transistor cells having varying mesa (regions between trench gates) sizes. A heavy body etch is utilized in larger cells to... Agent: Townsend And Townsend And Crew, LLP

20070176233 - Semiconductor integrated circuit: A plurality of MOS transistors each having an SOI structure includes, in mixed form, those brought into body floating and whose body voltages are fixed and variably set. When a high-speed operation is expected in a logic circuit in which operating power is relatively a low voltage and a switching... Agent: Miles & Stockbridge PC

20070176235 - Semiconductor device and manufacturing method for the same: In a semiconductor device, a body thick film transistor and a body thin film transistor having a different body film thickness are formed on the same SOI substrate (silicon support substrate, buried oxide film and silicon layer). The body film is formed to be relatively thick in the body thick... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070176236 - Semiconductor device and manufacturing method thereof: A semiconductor device includes a semiconductor layer formed by epitaxial growth in a first region which is obtained by etching a semiconductor substrate to a predetermined depth, a surface of the semiconductor layer having a same height from the bottom of the semiconductor substrate as a height of a surface... Agent: Advantedge Law Group, LLC

20070176234 - Semiconductor device: The present invention is to provide a semiconductor device that achieves high mechanical strength without reducing the circuit scale and that can prevent the data from being forged and altered illegally while suppressing the cost. The present invention discloses a semiconductor device typified by an ID chip that is formed... Agent: Eric Robinson

20070176237 - Semiconductor device and manufacturing method thereof: A semiconductor device comprises a support layer made of semiconductor, a diffusion layer formed by implanting impurities in a surface layer of the support layer, a buried insulating layer provided on the diffusion layer, an island-like active layer provided on the buried insulating layer, a channel region formed in the... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070176238 - Semiconductor wafer with high thermal conductivity: This invention generally relates to an epitaxial silicon semiconductor wafer with increased thermal conductivity to transfer heat away from a device layer, while also having resistance to common failure mechanisms, such as latch-up failures and radiation event failures. The semiconductor wafer comprises a lightly-doped device layer, a highly-doped protective layer,... Agent: Senniger Powers

20070176241 - Semiconductor chips having improved electrostatic discharge protection circuit arrangement: A semiconductor chip may include a plurality of pads arranged in at least a first and a second row, and a plurality of protection circuits connected to the plurality of pads. The plurality of protection circuits may include at least one diode. A first protection circuit may be connected to... Agent: Harness, Dickey & Pierce, P.L.C

20070176240 - Wafer level package having floated metal line and method thereof: A method of forming a wire structure connecting to a bonding pad of a semiconductor chip includes depositing a passivation layer on an active surface of the semiconductor chip, depositing a seed metal layer on the bonding pad and the passivation layer, depositing a metal layer on the seed metal... Agent: F. Chau & Associates, LLC

20070176239 - Trenched mosfets with improved esd protection capability: A semiconductor power device includes Zener diodes for providing an electrostatic discharge (ESD) protection. The semiconductor power device further includes a thick insulation layer for substantially insulating the Zener diodes from a doped region doped with the body dopant ions of the semiconductor power device whereby the Zener diode is... Agent: Bo-in Lin

20070176242 - Semiconductor devices having different gate dielectrics and methods for manufacturing the same: A semiconductor device includes first and second transistor devices. The first device includes a first substrate region, a first gate electrode, and a first gate dielectric. The first gate dielectric is located between the first substrate region and the first gate electrode. The second device includes a second substrate region,... Agent: Volentine & Whitt PLLC

20070176243 - Semiconductor device having capacitor capable of reducing additional processes and its manufacture method: A first capacitor recess and a wiring trench are formed through an interlayer insulating film. A lower electrode fills the first capacitor recess, and a first wiring fills the wiring trench. An etching stopper film and a via layer insulating film are disposed over the interlayer insulating film. A first... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070176244 - Semiconductor device and method of forming the same: A semiconductor device and a method of forming thereof have a semiconductor substrate, an active region, and an inclined trench formed around the outer periphery of the active region. The semiconductor substrate at least includes an n-type high impurity concentration layer inhibiting a depletion layer from spreading, an n-type low... Agent: Rossi, Kimms & Mcdowell LLP.

20070176245 - Fin fet and method of fabricating same: A fin field effect transistor (fin FET) is formed using a bulk silicon substrate and sufficiently guarantees a top channel length formed under a gate, by forming a recess having a predetermined depth in a fin active region and then by forming the gate in an upper part of the... Agent: Marger Johnson & Mccollom, P.C.

20070176246 - Sram cells including self-stabilizing transistor structures: By providing a self-biasing semiconductor switch, an SRAM cell having a reduced number of individual active components may be realized. In particular embodiments, the self-biasing semiconductor device may be provided in the form of a double channel field effect transistor that allows the formation of an SRAM cell with less... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel (amd)

20070176248 - High dielectric constant insulators and associated fabrication methods: High-dielectric-constant (k) materials and electrical devices implementing the high-k materials are provided herein. According to some embodiments, an electrical device includes a substrate and a crystalline-oxide-containing composition. The crystalline-oxide-containing composition can be disposed on a surface of the substrate. Within the crystalline-oxide-containing composition, oxide anions can form at least one... Agent: Troutman Sanders LLP

20070176247 - Mos device with multi-layer gate stack: Methods and apparatus are provided for semiconductor devices. The apparatus comprises a substrate having therein a source region and a drain region separated by a channel region extending to a first surface of the substrate, and a multilayered gate structure located above the channel region. The gate structure comprises, a... Agent: Ingrassia, Fisher & Lorenz, P.C.

20070176249 - Semiconductor physical quantity sensor of electrostatic capacitance type and method for manufacturing the same: In a semiconductor physical quantity sensor of electrostatic capacitance type, mutually facing peripheral areas (bonding areas) of a glass substrate and a silicon substrate are contacted for anodic bonding, while at the same time, both substrates have an anodic bonding voltage applied therebetween so as to be integrated. A fixed... Agent: Greenblum & Bernstein, P.L.C

20070176250 - Wafer level package for surface acoustic wave device and fabrication method thereof: A wafer level package for a surface acoustic wave (SAW) device and a fabrication method thereof. The SAW device wafer level package includes a SAW device in which a SAW element is formed on a top surface of a device wafer, a cap wafer which is bonded with a top... Agent: Sughrue Mion, PLLC

20070176251 - Magnetic memory device and method of fabricating the same: A magnetic memory device includes a pinning layer, a pinned layer, an insulation layer, which are sequentially stacked on a semiconductor substrate. The magnetic memory device further includes a free layer disposed on the insulation layer, a capping layer disposed on the free layer and an MR (magnetoresistance) enhancing layer... Agent: F. Chau & Associates, LLC

20070176252 - Lateral silicided diodes: A structure and method of fabricating lateral diodes. The diodes include Schottky diodes and PIN diodes. The method of fabrication includes forming one or more doped regions and more trenches in a silicon substrate and forming metal silicides on the sidewalls of the trenches. The fabrication of lateral diodes may... Agent: Schmeiser, Olsen & Watts

20070176253 - Transistor, memory cell and method of manufacturing a transistor: A transistor which can in particular be used in memory cells of a Dynamic Random Access Memory a memory cell and a method of manufacturing a transistor is disclosed. In one embodiment the transistor is a dual-fin field effect transistor. The transistor includes a first and a second source/drain regions,... Agent: Dicke, Billig & Czaja

20070176254 - Poly emitter bipolar device configuration and fabrication method with an inter-level dielectric deposited by plasma enhanced chemical vapor deposition: The present invention discloses a high voltage and high frequency poly emitter bipolar structure with improved breakdown voltage performance. The advantage of the poly emitter bipolar structures is that the SOD coating layer can improve the breakdown voltage of a capacitor structure higher to be 6-8 volts. In addition, the... Agent: Birch Stewart Kolasch & Birch

20070176256 - Semiconductor device having fuse element and method of cutting fuse element: A semiconductor device includes a lower electrode, an upper electrode, and a fuse element that connects the lower electrode and the upper electrode. The height of the fuse element is greater than the depth of focus of a laser beam to be irradiated. The diameter of the fuse element is... Agent: Young & Thompson

20070176255 - Integrated circuit arrangement: An integrated circuit arrangement comprises at least one one-time programmable storage element, which can be electrically deactivated, having at least one electrically conductive or semi-conductive nanotube or at least one electrically conductive or semi-conductive nanowire.... Agent: Slater & Matsil LLP

20070176258 - Method of manufacturing semiconductor device including bonding pad and fuse elements: A method of manufacturing a semiconductor device includes forming a first insulating film supported by a semiconductor substrate, forming an aluminum layer supported by the first insulating film, etching the aluminum layer to form a bonding pad and fuse elements, depositing by plasma chemical vapor deposition a second insulating film... Agent: Leydig Voit & Mayer, Ltd

20070176257 - Semiconductor device including fuse elements and bonding pad: A semiconductor device includes a lower-layer substrate, a fuse above the lower-layer substrate and blown by radiation with light, a silicon oxide film on the fuse and on an exposed portion of the surface of the lower-layer substrate, and a silicon nitride film on the silicon oxide film. The portion... Agent: Leydig Voit & Mayer, Ltd

20070176259 - Semiconductor device: A problem of an increased manufacturing cost is caused in conventional semiconductor devices. A semiconductor device 1 includes: a lower electrode 102 provided on a semiconductor substrate 101; an insulating film 105, provided on the lower electrode 102 so as to be in contact with the lower electrode 102; an... Agent: Young & Thompson

20070176260 - Active area resistors and methods for making the same: Resistors used with a semiconductor device may include resistors defined by patterned layers of polysilicon or metal defining diffusion regions within patterns of the patterned layers such that the number of squares of resistance of the resistors may be increased and dishing of glass or other material layers over the... Agent: Trask Britt, P.C./ Micron Technology

20070176261 - Vertical side wall active pin structures in a phase change memory and manufacturing methods: A programmable resistor memory, such as a phase change memory, with a memory element comprising narrow vertical side wall active pins is described. The side wall active pins comprise a programmable resistive material, such as a phase change material. In a first aspect of the invention, a method of forming... Agent: Macronix C/o Haynes Beffel & Wo