Active solid-state devices (e.g., transistors, solid-state diodes) inventions 08/07

20070200108 - Storage node, phase change random access memory and methods of fabricating the same: A storage node, a phase change random access memory having an improved structure to improve adhesion of a phase change material layer and methods of fabricating the same are provided. The storage node may include a bottom electrode, a top electrode, a phase change material layer inserted between the bottom... Agent: Harness, Dickey & Pierce, P.L.C

20070200126 - Method of manufacturing nitride semiconductor light emitting device: An object is to provide a method of manufacturing a nitride semiconductor light emitting device having high light emission output and allowing decrease in forward voltage (Vf). The invention is directed to a method of manufacturing a nitride semiconductor light emitting device including at least an n-type nitride semiconductor, a... Agent: Morrison & Foerster LLP

20070200109 - Method for the manufacture of a piezoelectric component: A method for the determination of the arrangement of electrodes in the manufacture of a piezoelectric component, in particular of a piezoactuator, comprises the steps of making available of a base body consisting of a multilayer structure of at least one piezoelectric ceramic layer and at least two electrodes, wherein... Agent: Delphi Technologies, Inc.

20070200110 - Methods of making semiconductor-based electronic devices on a wire and articles that can be made thereby: Strands of active electronic devices (AEDs), such as field-effect transistors, are made by processing a semiconductor substrate so that it yields a number of elongate semiconductor members liberated from the starting substrate. The elongate semiconductor members are secured to wires or wire-like structures so as to form semiconductor-member-on-a-wire composites upon... Agent: Downs Rachlin Martin PLLC

20070200111 - Image display device: An additional circuit is formed on a glass substrate, and a passivation film is deposited thereon. After an insulation film is deposited on the passivation film, a contact hole is formed, and a signal line is deposited and connected to the additional circuit. After the signal line and the insulation... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070200112 - Light-emitting device: It is an object of the present invention to provide a light-emitting device with high current efficiency and high display quality, in which a change in luminance with time is suppressed. The light-emitting device is provided with a plurality of light-emitting elements in each of which a plurality of light-emitting... Agent: Cook, Alex, Mcfarron, Manzo, Cummings & Mehler Ltd

20070200113 - Semiconductor device and fabrication method thereof: This invention provides a semiconductor device having high operation performance and high reliability. An LDD region 707 overlapping with a gate wiring is arranged in an n-channel TFT 802 forming a driving circuit, and a TFT structure highly resistant to hot carrier injection is achieved. LDD regions 717, 718, 719... Agent: Eric Robinson

20070200114 - Compound semiconductor device, production method of compound semiconductor device and diode: A compound semiconductor device includes hexagonal silicon carbide crystal substrate and a boron-phosphide-based semiconductor layer formed on the silicon carbide crystal substrate, wherein the silicon carbide crystal substrate has a surface assuming a {0001} crystal plane, and the boron-phosphide-based semiconductor layer is composed of a {111} crystal stacked on and... Agent: Sughrue Mion, PLLC

20070200115 - High power silicon carbide (sic) pin diodes having low forward voltage drops: Silicon Carbide (SiC) PiN Diodes are provided having a reverse blocking voltage (VR) from about 3.0 kV to about 10.0 kV and a forward voltage (VF) of less than about 4.3 V.... Agent: Elizabeth A. Stanek Myers Bigel Sibley & Sajovec, P.A.

20070200116 - Silicon carbide dimpled substrate: A dimpled substrate and method of making including a substrate of high thermal conductivity having a first main surface and a second main surface opposite the first main surface. Active epitaxial layers are formed on the first main surface of the substrate. Dimples are formed as extending from the second... Agent: Volentine & Whitt PLLC

20070200117 - Silicon carbide semiconductor device having junction field effect transistor and method for manufacturing the same: A silicon carbide semiconductor device includes a substrate and a junction field effect transistor. The transistor includes: a first semiconductor layer disposed on the substrate; a first gate layer disposed on a surface of the first semiconductor layer; a first channel layer adjacent to the first gate layer on the... Agent: Posz Law Group, PLC

20070200119 - Flip-chip led package and led chip: A light emitting diode (LED) chip mainly includes a substrate, a first type doped semiconductor layer, light-emitting layers, second type doped semiconductor layers, a first electrode and second electrodes. The first type doped semiconductor layer is disposed on the substrate and includes protrusions which is upward extended; the light-emitting layers... Agent: Jianq Chyun Intellectual Property Office

20070200118 - Led light confinement element: An optical assembly includes a reflective layer, an optical element covering at least a portion of the reflective layer, and an LED having a light-emitting axis and disposed to emit light between the optical element and the reflective layer. The optical element has a rotationally symmetric funnel-shaped recess in substantial... Agent: 3m Innovative Properties Company

20070200122 - Light emitting device and method of manufacturing the same: A light emitting device having improved light extraction efficiency is disclosed. The light emitting device includes a nitride semiconductor layer including a first semiconductor layer, an active layer, and a second semiconductor layer, which are sequentially stacked, a portion of the first semiconductor layer being exposed to the outside by... Agent: Birch Stewart Kolasch & Birch

20070200120 - Light emitting diode chip with double close-loop electrode design: An LED chip with double close-loop electrode design includes a substrate, a first-type doped semiconductor layer, a light emitting layer, a second-type doped semiconductor layer, a first electrode and a second electrode. The first-type doped semiconductor layer is disposed on the substrate, the light emitting layer is disposed on the... Agent: Jianq Chyun Intellectual Property Office

20070200121 - Multi-colored led array with improved color uniformity: A backlight uses an array of red, green, and blue LEDs in a mixing chamber. The mixing chamber has reflecting surfaces and a top opening for illuminating LCD layers. The LEDs are arranged in clusters of red, green, and blue LEDs, where there are at least two types of clusters... Agent: Patent Law Group LLP

20070200123 - Organic electroluminescence display device: An organic electroluminescent display (1) including: a substrate (11); and a first organic electroluminescent device part (10) and a second organic electroluminescent device part (20) placed side by side on a surface of the substrate; the first organic electroluminescent device part (10) including at least a light reflective conductive layer... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070200124 - Organic electroluminescent element, display and illuminator: An organic electroluminescent element comprising an anode; a cathode; at least two light emission layers provided between the anode and the cathode; and at least one intermediate layer provided between the two light emission layers, wherein the two light emission layers each comprise the same host compound A; one of... Agent: Cantor Colburn, LLP

20070200125 - Light-emitting device and method for manufacturing the same: A light-emitting element is disclosed that can drive at a low driving voltage and that has a longer lifetime than the conventional light-emitting element, and a method is disclosed for manufacturing the light-emitting element. The disclosed light-emitting element includes a plurality of layers between a pair of electrodes; and at... Agent: Eric Robinson

20070200127 - Power surface mount light emitting die package: A light emitting die package is provided which includes a metal substrate having a first surface and a first conductive lead on the first surface. The first conductive lead is insulated from the substrate by an insulating film. The first conductive lead forms a mounting pad for mounting a light... Agent: D. James Chung Silicon Edge Law Group LLP

20070200132 - Electrical connection for optoelectronic devices: A structure having an optical element thereon has a portion of the structure extending beyond a region having the optical element in at least one direction. The structure may include an active optical element, with the different dimensions of the substrates forming the structure allowing access for the electrical interconnections... Agent: Digital Optics Corporation

20070200130 - Electronic device: An electronic device according to the invention includes a housing, a recess containing an optoelectronic component, and a film including a polyimide, which is over the recess covering the optoelectronic component.... Agent: Fish & Richardson P.C.

20070200128 - Light emitting device: A light emitting apparatus 10 includes an aluminum nitride co-fired substrate 11 and a light emitting device 12 arranged on a front surface of the co-fired substrate, in which the front surface of the aluminum nitride substrate 11 bearing the light emitting device 12 is mirror-polished so as to have... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070200131 - Light emitting device package and method of manufacturing the same: A light emitting device package and a method of manufacturing the same are disclosed. The light emitting device package includes a package structure, two diffusion layers formed on the package structure such that the two diffusion layers are electrically separated from each other, and first and second electrodes insulated from... Agent: Birch Stewart Kolasch & Birch

20070200129 - Transparent positive electrode: An object of the present invention is to provide a positive electrode having high transparency, low contact resistance and excellent current diffusibility and not requiring electron beam irradiation, high-temperature annealing or heat treatment, for alloying, in an oxygen atmosphere. The inventive transparent positive electrode for gallium nitride-based compound semiconductor light-emitting... Agent: Sughrue Mion, PLLC

20070200133 - Led assembly and manufacturing method: An LED assembly including a wiring substrate with an opening at its center; a heat sink housed inside the opening; an LED chip mounted on the heat sink; a connecting section for electrically coupling the LED chip and wiring substrate; and a transparent resin covering the LED chip and connecting... Agent: Mcdermott Will & Emery LLP

20070200134 - Gallium nitride material devices including conductive regions and methods associated with the same: Semiconductor structures comprising a III-nitride (e.g., gallium nitride) material region and methods associated with such structures are provided. In some embodiments, the structures include an electrically conductive material (e.g., gold) separated from certain other region(s) of the structure (e.g., a silicon substrate) by a barrier material in order to limit,... Agent: Wolf Greenfield & Sacks, P.C.

20070200135 - Iii-v group compound semiconductor light-emitting diode: A III-V group compound semiconductor light-emitting diode, containing a substrate 1 having plural crystal planes, and a grown layer formed on the substrate by epitaxial growth, the grown layer at least including a barrier layer 2 and 3 and an active layer 8, wherein at least the active layer of... Agent: Birch Stewart Kolasch & Birch

20070200136 - Isolated zener diodes: The present disclosure relates to isolated Zener diodes (100) that are substantially free of substrate current injection when forward biased. In particular, the Zener diodes (100) include an “isolation tub” structure that includes surrounding walls (150, 195) and a base (130) formed of semiconductor regions. In addition, the diodes (100)... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20070200137 - Dilithium crystal trigger module - solid state: The acquisition of seismic data is increasingly more important in today's modern world. There are many forms of seismic data. Seismic data records are acquired and analyzed for applications ranging from subsurface engineering, environmental and/or water exploration, to deep oil-gas applications. It is very important to understand that for the... Agent: Bret W. Smith

20070200138 - Semiconductor device having igbt and diode: A semiconductor device includes: a semiconductor substrate; a IGBT region including a first region on a first surface of the substrate and providing a channel-forming region and a second region on a second surface of the substrate and providing a collector; a diode region including a third region on the... Agent: Posz Law Group, PLC

20070200139 - Semiconductor device, manufacturing method thereof, and display device: A multi-gate structure is used and a width (d1) of a high concentration impurity region sandwiched by two channel forming regions in a channel length direction is set to be shorter than a width (d2) of low concentration impurity regions in the channel length direction. Thus, a resistance of the... Agent: Nixon Peabody, LLP

20070200140 - Electrostatic protection device for semiconductor circuit for decreasing input capacitance: An electrostatic protection device for a semiconductor circuit for protecting an internal circuit from static electricity applied to the pad includes a first conductivity type semiconductor substrate; second conductivity type diffusion regions formed on the surface of the semiconductor substrate at regular intervals into a dot type; isolation structures formed... Agent: Ladas & Parry LLP

20070200141 - Avalanche photodiode: An ultra high speed APD capable of realizing reduction in an operating voltage and quantum efficiency enhancement at the same time is provided. Under operating conditions APD, a doping concentration distribution of each light absorbing layer is determined so that a p-type light absorbing layer (16) maintains a p-type neutrality... Agent: Workman Nydegger (f/k/a Workman Nydegger & Seeley)

20070200142 - High linear enhancement-mode heterostructure field-effect transistor: The present invention relates to a high linear enhancement-mode heterostructure field-effect transistor. More, the present invention uses an InGaAs channel structure with a linear change, and integrates an adjusting effect of working region corresponding to the threshold voltage of the element. It not only directly provides a complementary structure for... Agent: Rosenberg, Klein & Lee

20070200143 - Nitride semiconductor device: A nitride semiconductor device comprises: a laminated body; a first and second main electrode provided in a second and third region, respectively, adjacent to either end of the first region on the major surface of the laminated body; and a third main electrode. The laminated body includes a first semiconductor... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070200144 - Method for producing partial soi structures comprising zones connecting a superficial layer and a substrate: n

20070200145 - Non-volatile memory device with conductive sidewall spacer and method for fabricating the same: The present invention relates to a non-volatile memory device having conductive sidewall spacers and a method for fabricating the same. The non-volatile memory device includes: a substrate; a gate insulation layer formed on the substrate; a gate structure formed on the gate insulation layer; a pair of sidewall spacers formed... Agent: Mcdermott Will & Emery LLP

20070200146 - Electronic device, method for producing the same, and communication apparatus including the same: An electronic device according to the present invention includes a functional element acting as a predetermined circuit packaged using a resin member. The electronic device comprises a wiring substrate having a wiring member for electric connection with an external circuit; the functional element mounted on one main surface of the... Agent: Wenderoth, Lind & Ponack L.L.P.

20070200147 - Method for manufacturing an optical film, apparatus for manufacturing the same optical film, polarizing plate and image display device: A method for manufacturing an optical film comprising a transparent substrate and at least one functional layer on or above the transparent substrate, wherein said at least one functional layer to be laminated on the transparent substrate is formed by a layer-forming method comprising the following steps (1) and (2):... Agent: Buchanan, Ingersoll & Rooney PC

20070200148 - Element for solid-state imaging device: In an element for a MOS type solid-state imaging device, a leakage current caused by a stress generated in a vicinity of an element isolation region having an STI structure is reduced. The element for the MOS type solid-state imaging device comprises: a signal accumulation region 102, of a second... Agent: Mcdermott Will & Emery LLP

20070200149 - Semiconductor device and method of production: A layer sequence with lateral boundaries, especially a gate electrode stack, comprises a cover layer between a metal layer and a top layer that is provided as a hardmask. The cover layer, which is preferably polysilicon, enables the application of a cleaning agent to remove a resist layer, clean the... Agent: Slater & Matsil LLP

20070200150 - Voltage-controlled semiconductor device: SiC-IGBTs, which have an inversion-type channel with high channel resistance and have high on-voltage due to an influence from the surface state of the interface between a gate insulating film and a base layer, are required to decrease the on-voltage. An embedded collector region is partially formed in a base... Agent: Nixon & Vanderhye, PC

20070200151 - Semiconductor device and method of fabricating the same: A semiconductor device capable of suppressing reduction of the electric characteristics and fluctuation of the threshold voltage resulting from ion implantation is obtained. This semiconductor device comprises a pair of source/drain regions formed on the main surface of a semiconductor region to hold a channel region therebetween and a gate... Agent: Mcdermott Will & Emery LLP

20070200152 - Image sensor with inter-pixel isolation: An image sensor with a plurality of photodiodes that each have a first region constructed from a first type of material and a second region constructed from a second type of material. Located adjacent to the first region and between second regions of adjacent photodiodes is a barrier region. The... Agent: Irell & Manella LLP

20070200153 - Electronic device: According to one embodiment, an electronic device includes a housing including an opening, a button disposed in the opening, a switch contained in the housing and operated by using the button, a wall extending in the housing from that part of the housing which surrounds the opening, a sealing member... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20070200154 - Semiconductor memory device and method for manufacturing semiconductor memory device: A semiconductor memory device includes: a semiconductor substrate; a field effect transistor formed on the semiconductor substrate; a first interlayer dielectric layer formed on the field effect transistor; a first contact plug connected to the field effect transistor through the first interlayer dielectric layer; a ferroelectric capacitor disposed on the... Agent: Harness, Dickey & Pierce, P.L.C

20070200156 - Single-charge tunnelling device: A single-electron transistor (1) has an elongate conductive channel (2) and a side gate (3) formed in a 5 nm-thick layer (4) of Ga0.98Mn0.02As. The single-electron transistor (1) is operable, in a first mode, as a transistor and, in a second mode, as non-volatile memory.... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070200155 - Method of fabricating an integrated electronic circuit with programmable resistance cells: Method of fabricating an integrated electronic circuit with programmable resistance cells, which comprises providing a substrate; forming an inert electrode; forming a solid electrolyte on the inert electrode; forming an interlayer on the solid electrolyte, the interlayer comprising an active electrode material and nitrogen; and forming an active electrode on... Agent: Morrison & Foerster LLP

20070200157 - Semiconductor memory device and manufacturing method thereof: This disclosure concerns a semiconductor memory device comprising a supporting substrate including semiconductor materials; an insulation film provided above the supporting substrate; a first diffusion layer provided on the insulation film; a second diffusion layer provided on the insulation film; a body region provided between the first diffusion layer and... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070200159 - Capacitor having high electrostatic capacity, integrated circuit device including the capacitor and method of fabricating the same: A capacitor may include a first electrode, a second electrode, a low dielectric layer, and/or a high dielectric layer. The first electrode may include at least one first electrode branch. The second electrode may face the first electrode and include at least one second electrode branch. The low dielectric layer... Agent: Harness, Dickey & Pierce, P.L.C

20070200158 - Electrode structure having at least two oxide layers and non-volatile memory device having the same: An electrode structure having at least two oxide layers that more reliably switch and operate without the use of additional devices and a non-volatile memory device having the same are provided. The electrode structure may include a lower electrode, a first oxide layer formed on the lower electrode, a second... Agent: Harness, Dickey & Pierce, P.L.C

20070200160 - Semiconductor device and method of fabricating the same: A semiconductor device includes a semiconductor substrate comprising an active area where a first conductive channel is formed, a gate electrode formed on the active area formed on the semiconductor substrate and a gate dielectric layer interposed between the active area and the gate electrode. The semiconductor device further includes... Agent: F. Chau & Associates, LLC

20070200161 - High performance tapered varactor: Disclosed is a semiconductor structure, which includes a non-planar varactor having a geometrically designed depletion zone with a taper, as to provide improved Cmax/Cmin with low series resistance. Because of the taper, the narrowest portion of the depletion zone can be designed to be fully depleted, while the remainder of... Agent: Scully, Scott, Murphy & Presser, P.C.

20070200163 - Non-volatile electrically alterable memory cell for storing multiple data and manufacturing thereof: A memory cell that includes two control gates disposed laterally between two floating gates where each floating gate is capable of holding data. The memory cell is formed by placing a first polysilicon on a substrate of semiconductor material, on which a well is placed. The control gates are preferably... Agent: Macpherson Kwok Chen & Heid LLP

20070200162 - Reducing dielectric constant for mim capacitor: A memory device having improved sensing speed and reliability and a method of forming the same are provided. The memory device includes a first dielectric layer having a low k value over a semiconductor substrate, a second dielectric layer having a second k value over the first dielectric layer, and... Agent: Slater & Matsil, L.L.P.

20070200165 - Floating gate, a nonvolatile memory device including the floating gate and method of fabricating the same: Example embodiments may provide a nonvolatile memory device. The example embodiment nonvolatile memory device may include a floating gate structure formed on a semiconductor substrate with a gate insulating layer between them and/or a control gate formed adjacent to the floating gate with a tunneling insulation layer between them. The... Agent: Harness, Dickey & Pierce, P.L.C

20070200164 - Single poly embedded memory structure and methods for operating the same: A single poly embedded memory structure comprises an access transistor and a storage device formed on a silicon substrate. The access transistor comprises source and drain diffusion regions implanted in the silicon substrate and a polysilicon control gate formed over the silicon substrate between the source and drain diffusion regions.... Agent: Baker & Mckenzie LLP Patent Department

20070200166 - Semiconductor device and manufacturing method of the same: Disclosed is a method of manufacturing a semiconductor device, including the steps of: forming on a second insulating film a first resist pattern having a first window; employing the first resist pattern as an etching mask to form first openings exposed from contact regions CR; forming, on a second conductive... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070200168 - Monos type nonvolatile memory cell, nonvolatile memory, and manufacturing method thereof: A MONOS type nonvolatile memory cell is structured such that a laminated insulating film which is formed by sequentially laminating a tunnel insulating layer, a charge storage insulating layer, and a charge block insulating layer is provided on a convex curved surface portion of a semiconductor substrate, and a control... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070200167 - Nonvolatile semiconductor storage device and manufacturing method thereof: An object of the present invention is to provide a nonvolatile semiconductor storage device with a superior charge holding characteristic in which highly-efficient writing is possible at low voltage, and to provide a manufacturing method thereof. The nonvolatile semiconductor storage device includes a semiconductor film having a pair of impurity... Agent: Eric Robinson

20070200169 - Gate electrode of semiconductor device and method for fabricating the same: A gate electrode of a semiconductor device according to the present invention includes a substrate, a bulb type recess with an upper recess and a bottom recess, the bottom recess formed in a round shape and having a larger width than the upper recess, a gate insulation layer formed over... Agent: Lowe Hauptman Berner, LLP

20070200170 - Semiconductor device and method of manufacturing the same: A semiconductor device includes an isolation region, a semiconductor element region defined by the isolation region, and having a channel forming portion and a recessed portion, the recessed portion being formed between the isolation region and the channel forming portion, and an epitaxial semiconductor portion formed in the recessed portion,... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070200171 - Seminconductor device and method of manufacturing the same: The invention provides a high voltage MOS transistor having a high gate breakdown voltage and a high source/drain breakdown voltage and having a low on-resistance. A gate electrode is formed on an epitaxial silicon layer with a LOCOS film being interposed therebetween. A P-type first drift layer is formed on... Agent: Morrison & Foerster LLP

20070200176 - Formation of silicided surfaces for silicon/carbon source/drain regions: Formation of a silicide layer on the source/drain regions of a field effect transistor with a channel under tensile strain is disclosed. The strain is originated by the silicon/carbon source/drain regions which are grown by CVD deposition. In order to form the silicide layer, a silicon cap layer is deposited... Agent: Williams, Morgan & Amerson

20070200173 - Embedded substrate interconnect for underside contact to source and drain regions: A semiconductor topography (10) is provided which includes a semiconductor-on-insulator (SOI) substrate having a conductive line (16) arranged within an insulating layer (22) of the SOI substrate. A method for forming an SOI substrate with such a configuration includes forming a first conductive line (16) within an insulating layer (22)... Agent: Larson Newman Abel Polansky & White, LLP

20070200175 - Functional device and method of manufacturing it: A functional device which is composed of a nanometer-sized functional structure, which can reduce connection resistance in connecting the functional structure to an external electrode, and which includes a wiring section capable of minimizing constraints given to structural designs of various functional structures, and a method of manufacturing it are... Agent: Bell, Boyd & Lloyd, LLP

20070200177 - Semiconductor laser device and semiconductor laser device manufacturing method: A semiconductor laser device comprising: an active layer, a semiconductor layer formed on the active layer and having a wurtzite structure, wherein a principal surface of the active layer is substantially perpendicular to a (0001) surface of the semiconductor layer, a current path portion in the semiconductor layer extends along... Agent: Ndq&m Watchstone LLP

20070200174 - Soi substrate, mask blank for charged particle beam exposure, and mask for charged particle beam exposure: The invention provides an SOI substrate 10 comprising on one major surface of a silicon single crystal 13 a silicon thin-film layer 11 via a buried silicon oxide film 12, characterized in that a substrate warp preventive layer 14 is provided on another major surface of the silicon single crystal... Agent: Sughrue Mion, PLLC

20070200172 - Thin film power mos transistor, apparatus, and method: A thin film power transistor includes a plurality of first doped regions over a substrate and a second doped region forming a body. At least a portion of the body is disposed between the plurality of first doped regions. The thin film power transistor also includes a gate over the... Agent: Stmicroelectronics, Inc.

20070200178 - Gate-all-around type of semiconductor device and method of fabricating the same: A gate-all-around (GAA) transistor device has a pair of pillars that include the source/drain regions, a channel region bridging the source/drain regions, and a gate electrode and gate oxide which surround the channel region. The pillars are formed by providing a mono-crystalline silicon substrate, etching the substrate to form a... Agent: Volentine & Whitt PLLC

20070200179 - Strain enhanced cmos architecture with amorphous carbon film and fabrication method of forming the same: A strain enhanced CMOS device using amorphous carbon films and fabrication methods of forming the same. The amorphous carbon (a-C) film, such as fluorinated amorphous carbon (a-C:F), is formed of a tensile film or a compressive film to act a stress capping film on the pMOS device region or the... Agent: Birch, Stewart, Kolasch & Birch, LLP

20070200180 - Double density nrom with nitride strips (ddns): An NVM cell such as an NROM cell is formed using a portion of one ONO stack and an adjacent portion of a neighboring NROM stack. A gate structure is formed between (and atop) the two ONO portions, or “strips” (or “stripes”). This provides having two physically separated charge storage... Agent: Empk & Shiloh, LLP

20070200181 - Buried conductor for imagers: A pixel cell having a photo-conversion device at a surface of a substrate and at least one contact area from which charge or a signal is output or received. A first insulating layer is located over the photo-conversion device and the at least one contact area. The pixel cell further... Agent: Dickstein Shapiro LLP

20070200182 - Memory array structure with strapping cells: A memory array with a row of strapping cells is provided. In accordance with embodiments of the present invention, strapping cells are positioned between two rows of a memory array. The strapping cells provide a P+strap between N+active areas of two memory cells in a column and provide an N+strap... Agent: Slater & Matsil, L.L.P.

20070200183 - Power semiconductor component with a drift zone and a high-dielectric compensation zone and method for producing a compensation zone: A power semiconductor component includes a drift zone in a semiconductor body, a component junction and a compensation zone. The component junction is disposed between the drift zone and a further component zone, which is configured such that when a blocking voltage is applied to the component junction, a space... Agent: Maginot, Moore & Beck Chase Tower

20070200184 - Methods and apparatus for a stepped-drift mosfet: A power metal-oxide-semiconductor field effect transistor (MOSFET) (100) incorporates a stepped drift region including a shallow trench insulator (STI) (112) partially overlapped by the gate (114) and which extends a portion of the distance to a drain region (122). A silicide block extends from and partially overlaps STI (112) and... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20070200185 - Semiconductor device and method for fabricating the same: A high dielectric constant gate insulating film is formed on an active region of a substrate, and a gate electrode is formed on the high dielectric constant gate insulating film. A high dielectric constant insulating sidewall is formed on a side face of the gate electrode.... Agent: Mcdermott Will & Emery LLP

20070200186 - Semiconductor device: A semiconductor device capable of reducing a threshold voltage is obtained. The semiconductor device includes a pair of source/drain regions formed on the main surface of a semiconductor region to hold a channel region therebetween, and a gate electrode formed on the channel region through a gate insulating film and... Agent: Mcdermott Will & Emery LLP

20070200187 - Nanowire device and method of making: A method (40) for fabricating a nanoscale device, includes nano-imprinting (44) a one dimensional nanostructure (20) on a material (12), forming (46) a patterning layer (22, 26) over the one dimensional nanostructure (20) and the material (12), patterning (48) the patterning layer (22, 26) to differentiate an area over the... Agent: Ingrassia Fisher & Lorenz, P.C.

20070200188 - Magnetic random access memory with reference magnetic resistance and reading method thereof: A magnetic random access memory having reference magnetic resistance is provided. The memory includes at least one magnetic memory cell having an antiferromagnet layer, a pinned layer formed thereon, a tunnel barrier layer formed thereon, and a free layer formed thereon. The pinned layer and free layer are arranged orthogonally... Agent: Rabin & Berdo, PC

20070200189 - Semiconductor device and method of manufacturing semiconductor device: Provided is a semiconductor device for performing photoelectric conversion of incident light, including: a p-type substrate (1), an n-type well (2) having a predetermined depth and formed in a predetermined region of the p-type substrate (1), and a depletion layer generated at a junction interface between the p-type substrate (1)... Agent: Bruce L. Adams, Esq.

20070200190 - Substrate unit, cooling device, and electronic device: According to one embodiment, a substrate unit of the present invention comprises a first substrate, a second substrate and a coupling member. The first substrate has a first substrate main body and a circuit component. The second substrate has a second substrate main body, an opening portion provided at the... Agent: Knobbe Martens Olson & Bear LLP

20070200191 - Semiconductor device and method of manufacturing the same: Provided are a semiconductor device having a multilayer wiring structure and a method of manufacturing the semiconductor device having the multilayer wiring structure, including a method of forming an antireflection film. According to the method, no crown is produced in a contact hole, long-term reliability is high, productivity and cost... Agent: Bruce L. Adams, Esq.

20070200192 - Photovoltaic apparatus: A photovoltaic apparatus includes a first photoelectric conversion portion so formed on an insulating surface of a substrate as to cover a first substrate electrode and a second substrate electrode isolated from each other by a first groove, a second photoelectric conversion portion formed on the surface of the first... Agent: Ndq&m Watchstone LLP

20070200194 - Apparatus and method for temperature-interrupting protection of an electric device: A current load of an electric device having a current inlet or current outlet can be protected cost-effectively and efficiently via a contact pad in the current inlet or current outlet when a first conductive material and the second conductive material are connected conductively in the contact pad such that... Agent: Baker Botts, L.L.P.

20070200193 - Component arrangement and method for determining the temperature in a semiconductor component: c

20070200195 - Semiconductor device and method of manufacturing the same: The invention provides a high voltage MOS transistor having a high source/drain breakdown voltage of about 300V and a low on-resistance. An N-type body layer is formed extending from a source layer side to under a gate electrode. A P-type second drift layer is formed in an epitaxial semiconductor layer... Agent: Morrison & Foerster LLP

20070200196 - Shallow trench isolation (sti) devices and processes: Improved shallow trench isolation (STI) techniques are provided for semiconductor devices. For example, in accordance with an embodiment of the present invention, an integrated circuit includes a substrate, a first trench in the substrate, and a second trench in the substrate. A first transistor region in the substrate is adjacent... Agent: Macpherson Kwok Chen & Heid LLP

20070200197 - Mim capacitor: A capacitor formed in an insulating porous material.... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20070200198 - Transistor or triode structure with tunneling effect and insulating nanochannel: A microelectronic device is provided with at least one transistor or triode with Fowler-Nordheim tunneling current modulation, and supported on a substrate. The triode or the transistor includes at least one first block forming a cathode and at least one second block that forming an anode. The first block and... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist P.A.

20070200199 - Semiconductor bulk resistance element: Providing a technology capable of obtaining a desired resistance value through preferable controllability, and improving linearity between voltage and current. A semiconductor bulk resistance element of the present invention comprise a semiconductor chip having a main surface (first main surface), and on the first main surface of a semiconductor resistor... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070200200 - Semiconductor device and method of manufacturing the same: Provided are a semiconductor device including a highly precise resistor formed of a polycrystalline silicon film and a method of manufacturing the same, in which: a portion of a base insulating film below a portion of the polycrystalline silicon film which becomes a resistance region into a convex shape; and... Agent: Bruce L. Adams, Esq.

20070200201 - Structure and method for performance improvement in vertical bipolar transistors: A method of forming a semiconductor device having two different strains therein is provided. The method includes forming a strain in a first region with a first straining film, and forming a second strain in a second region with a second straining film. Either of the first or second strains... Agent: Greenblum & Bernstein, P.L.C

20070200202 - Phase change memory structure having an electrically formed constriction: A PCM structure configurable for use as a nonvolatile storage element includes a first electrode, a first phase change material layer formed on at least a portion of an upper surface of the first electrode, at least one insulating layer formed on an upper surface of the first phase change... Agent: Ryan, Mason & Lewis, LLP

20070200203 - Semiconductor device and method for fabricating the same: A semiconductor device in which selectivity in epitaxial growth is improved. There is provided a semiconductor device comprising a gate electrode formed over an Si substrate, which is a semiconductor substrate, with a gate insulating film therebetween and an insulating layer formed over sides of the gate electrode and containing... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070200204 - Transmission line substrate and semiconductor package: A transmission line substrate includes a spurious-wave suppression circuit in which a divider divides a signal line of a driving control signal connected to a semiconductor device into two signal lines of the same phase. A delay unit is connected to one of the two signal lines, and includes a... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070200205 - Integrated circuit package system including die stacking: An integrated circuit package system including a leadframe with an aperture formed therein. An integrated circuit package is mounted on the leadframe over or under the aperture and a die is mounted within the aperture to the integrated circuit package.... Agent: Ishimaru & Zahrt LLP

20070200206 - Multi-row lead frame: A lead frame (10) for a semiconductor device includes a first row of terminals (12) surrounding a die receiving area (14) and a second row of terminals (16) spaced from and surrounding the first row of terminals (12). The first and second rows of terminals (12, 16) have a first... Agent: Freescale Semiconductor, Inc. Law Department

20070200207 - No lead package with heat spreader: A no-lead electronic package including a heat spreader and method of manufacturing the same. This method includes the steps of selecting a matrix or mapped no-lead lead frame with die receiving area and leads for interconnect; positioning an integrated circuit device within the central aperture and electrically interconnecting the integrated... Agent: Wiggin And Dana LLP Attention: Patent Docketing

20070200208 - Variable-tooth gear with sliding-sheet deforming teeth: A variable-tooth gear with sliding-sheet deforming teeth pertains to the technical fields of gearing, and continuously variable mechanical transmissions. The variable-tooth gear is designed in accordance with “the principle of configuring variable-teeth through infinitely deforming sliding-sheets”. The working surface is composed of a large number of thin sliding-sheets (sliding-needles) superposed... Agent: Hanley, Flight & Zimmerman, LLC

20070200209 - Semiconductor device and heat radiation member: A semiconductor device includes a semiconductor element mounted on a substrate; at least one electronic part arranged around the semiconductor element; and a heat radiation member bonded to a backside of the semiconductor element by a bonding material. The heat radiation member has an isolation part extending between an outer... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070200210 - Methods and apparatus for improved thermal performance and electromagnetic interference (emi) shielding in integrated circuit (ic) packages: Methods and apparatus for improved thermal performance and electromagnetic interference (EMT) shielding in integrated circuit (IC) packages is described. A die-up or die-down package includes a heat spreader cap defining a cavity, an IC die, and a leadframe. The leadframe includes a centrally located die attach pad, a plurality of... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20070200211 - Multilayer wiring substrate and method of connecting the same: In the case in which an electrical connection between upper and lower layers is to be carried out through a via opening portion 16 provided on an insulating layer 14 of a wiring substrate constituting a multilayer wiring substrate, the electrical connection between the upper and lower layers is performed... Agent: Drinker Biddle & Reath (dc)

20070200214 - Board strip and method of manufacturing semiconductor package using the same: Provided is a board strip that includes a base substrate that has at least one hole and a plurality of functional portions in which at least one semiconductor chip is packaged; a circuit layer having a circuit pattern formed on the functional portions and dummy patterns formed on non-functional portions... Agent: Drinker Biddle & Reath LLP Attn: Patent Docket Dept.

20070200212 - Image sensor package: An image sensor package includes a substrate, a lens module and a bottom cover. Herein the substrate has an upper surface and a lower surface, a plurality of passive components is fabricated on the lower surface and a chip is disposed on the upper surface. The lens module is mounted... Agent: Jianq Chyun Intellectual Property Office

20070200213 - Integrated circuit chip and package: An integrated circuit chip and a package supported by a device or a semiconductor chip are provided. The integrated circuit chip comprises a substrate, a device part, and a first integrated circuit chip. The device part is formed over the substrate, and the first integrated circuit chip is formed over... Agent: Foley And Lardner LLP Suite 500

20070200215 - Smart card module and substrate for a smart card module: A chip card module including a substrate with a first side and an opposite second side. Contact areas are arranged on the first side, and a first conductor structure is arranged on the second side, the first conductor structure runs from one contact region to one of a another contact... Agent: Dickstein Shapiro LLP

20070200216 - Chip stack package: Provided is a chip stack package that may include a lower semiconductor chip, an upper semiconductor chip stacked on the lower semiconductor chip, and at least one adhesive formed in space between the lower semiconductor chip and the upper semiconductor chip. The at least one adhesive may include a first... Agent: Harness, Dickey & Pierce, P.L.C

20070200217 - Method and apparatus for manufacturing electronic component-mounted component, and electronic component-mounted component: After a first electronic component is inserted into a base substrate, first circuit patterns are formed on the inserted first electronic component, and then a second electronic component is mounted on the first circuit patterns to complete an electronic component-mounted component. According to the above method, a thickness of a... Agent: Wenderoth, Lind & Ponack, L.L.P.

20070200218 - Printed board and semiconductor integrated circuit: An IC which includes a first circuit and a plurality of first paired terminals each including a first power supply terminal and a first GND terminal which are connected to the first circuit, and a second circuit and a plurality of second paired terminals each including a second power supply... Agent: Fitzpatrick Cella Harper & Scinto

20070200219 - Power semiconductor device and method for producing it: A power semiconductor device (1; 37) has a leadframe (4), at least one vertical power semiconductor component (2) and at least one further electronic device (3) which is arranged on the power semiconductor component (2). The chip carrier (5) of the leadframe (4) has at least two separate parts (7,... Agent: Baker Botts, L.L.P.

20070200221 - Electronic component module: An electronic component module is provided with a ceramic substrate and a plurality of bonding material applying lands. The ceramic substrate has a rear surface that is substantially rectangular. The plurality of bonding material applying lands are arranged on the rear surface. The plurality of bonding material applying lands includes... Agent: Murata Manufacturing Company, Ltd. C/o Keating & Bennett, LLP

20070200220 - Flexible substrate: A flexible substrate is provided which contains not only flexibility but also rigidity and hear resistance. A flexible substrate includes a first wiring layer, an insulating resin layer, a glass cloth and a second wiring layer. The insulating layer is formed by an insulating material, such as a BT resin,... Agent: Fish & Richardson P.C.

20070200222 - Semiconductor device and method of fabrication: A MEMS (micro electro-mechanical system) semiconductor device and a method for producing such a device. A preferred embodiment of the present invention comprises the a wafer having a continuous BCS (bondline control structure) surrounding a MEMS active area that is affixed to an interposer layer, which is in turn affixed... Agent: Texas Instruments Incorporated

20070200223 - Semiconductor device and semiconductor module therewith: A semiconductor device capable of dissipating heat with a high degree of efficiency without impairing the strength thereof is provided. The semiconductor device includes a semiconductor chip 2, a heatsink plate 1 overlapping a rear face of the semiconductor chip 2, and an adhesive 4 for adhesively fixing the semiconductor... Agent: Nixon & Vanderhye, PC

20070200224 - Thermally-enhanced ball grid array package structure and method: A thermally-enhanced ball grid array package structure is provided that includes an integrated circuit chip, a heat spreader and a substrate. The integrated circuit chip has a specified surface area. The heat spreader is coupled to the integrated circuit chip. The substrate is coupled to the heat spreader. The substrate... Agent: Stmicroelectronics, Inc.

20070200225 - Heat sink for semiconductor package: A heat sink (10) for a semiconductor package (38) includes a top surface (12) having a recessed hole (16) at its center. A sidewall (14) formed around the top surface (12) of the heat sink (10) has gaps (18) formed in the sidewall (14). An air vent (22) is formed... Agent: Freescale Semiconductor, Inc. Law Department

20070200226 - Cooling micro-channels: The present disclosure relates generally to microelectronic technology, and more specifically, to an apparatus used for the cooling of active electronic devices utilizing micro-channels or micro-trenches, and a technique for fabricating the same.... Agent: Trop Pruner & Hu, PC

20070200228 - Semiconductor package having heat dissipating device and fabrication method of the semiconductor package: A semiconductor package with a heat dissipating device and a fabrication method of the semiconductor package are provided. A chip is mounted on a substrate. The heat dissipating device is mounted on the chip, and includes an accommodating room, and a first opening and a second opening that communicate with... Agent: Edwards Angell Palmer & Dodge LLP

20070200227 - Power semiconductor arrangement: A power semiconductor arrangement has a heat-removing base with at least one planar exterior. The base consists of a metal material or is provided with a metal coat. The exterior is at least partially provided with an electrically insulating oxide layer on top of the metal material. The power semiconductor... Agent: Baker Botts, L.L.P.

20070200229 - Chip underfill in flip-chip technologies: A semiconductor structure and method for forming the same. The semiconductor structure includes (a) a substrate and (b) a chip which includes N chip solder balls, N is a positive integer, and the N chip solder balls are in electrical contact with the substrate. The semiconductor structure further includes (c)... Agent: Schmeiser, Olsen & Watts

20070200230 - Stackable integrated circuit package system: A stackable integrated circuit package system is provided placing a first integrated circuit die having an interconnect provided thereon in a substrate having a cavity, encapsulating the first integrated circuit die, having the interconnect exposed, in the cavity and along a first side of the substrate, mounting a second integrated... Agent: Ishimaru & Zahrt LLP

20070200232 - Printed-wiring board with built-in component, manufacturing method of printed-wiring board with built-in component, and electronic device: According to one embodiment, there is provided a printed-wiring board with a built-in component including a first base material including a pattern forming surface on which a plurality of conductive patterns are formed. A circuit component is mounted on the pattern forming surface of the first base material, and is... Agent: Knobbe Martens Olson & Bear LLP

20070200236 - Base semiconductor chip, semiconductor integrated circuit device, and semiconductor integrated circuit device manufacturing method: A semiconductor integrated circuit device includes: a semiconductor substrate; a semiconductor chip including a plurality of functional blocks formed independently from each other in predetermined regions of the semiconductor substrate and each including a pad for transmitting a signal; and a plurality of inter-pad interconnects being connected to the pads... Agent: Mcdermott Will & Emery LLP

20070200235 - Semiconductor device having reinforced low-k insulating film and its manufacture method: (a) coating a low dielectric constant low-level insulating film above a semiconductor substrate formed with a plurality of semiconductor elements; (b) processing the low-level insulating film to increase a mechanical strength of the low-level insulating film; (c) coating a low dielectric constant high-level insulating film above the low-level insulating film;... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070200238 - Semiconductor integrated circuit apparatus and method of designing the same: In a semiconductor integrated circuit apparatus formed by a core cell constituting a circuit function and a power wiring cell including a power wiring, a metal of a power wiring unit cell constituting the power wiring cell is formed to take a shape of T, and the power wiring unit... Agent: Mcdermott Will & Emery LLP

20070200233 - Bond pad structures with reduced coupling noise: A bond pad structure with reduced coupling noise is provided. An exemplary embodiment of the bond pad structure comprises a first dielectric layer with a first conductive layer therein, wherein the first conductive layer is grounded. A second dielectric layer with a second conductive layer, a plurality of conductive contacts... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070200234 - Flip-chip device having underfill in controlled gap: A flip-chip and underfilled device, which includes a semiconductor chip (101) with contact pads and a workpiece (102) with contact pads in matching locations; the workpiece may be an insulating substrate or another semiconductor chip. The workpiece and the chip are spaced by a gap (103) of substantially uniform average... Agent: Texas Instruments Incorporated

20070200237 - Semiconductor device and method of manufacturing the same: An interlayer insulator includes a first interlayer insulator and a second interlayer insulator formed on the first interlayer insulator and having a property of preventing diffusion of copper. A barrier metal film is formed on an inner wall in the wiring trench except an upper end and operative to prevent... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070200239 - Redistribution connecting structure of solder balls: A redistribution connecting structure for solder balls is disclosed. A substrate includes a plurality of bonding pads. A plurality of dielectric layers, a redistribution conductive layer between the dielectric layer, and a plurality of solder balls are formed on the substrate. The redistribution layer has a redistribution pad disposed adjacent... Agent: North America Intellectual Property Corporation

20070200240 - Semiconductor device, electronic device and fabrication method of the same: A semiconductor device includes a lower pad layer, an insulating layer and an upper pad layer. The lower pad layer is provided on a semiconductor substrate. The insulating layer is away from a surrounding of the lower pad layer so that a space having a recess on a surface between... Agent: Armstrong, Kratz, Quintos, Hanson & Brooks, LLP Kratz, Quintos & Hanson, LLP

20070200241 - Dual damascene process without an etch stop layer: A non-ESL semiconductor interconnection structure and a method of forming the same are provided. The non-ESL semiconductor interconnection structure includes a first low-k dielectric layer comprising a first region and a second region overlying the substrate, a plurality of conductive features in the first low-k dielectric layer, a cap layer... Agent: Slater & Matsil, L.L.P.

20070200242 - Semiconductor apparatus: In a semiconductor apparatus having a plurality of wiring layers, the semiconductor apparatus includes a bonding pad formed by an uppermost wiring layer, a first-layer plug wire formed by a first lower wiring layer in a region under the bonding pad, and a first conductive plug connecting the bonding pad... Agent: Young & Thompson

20070200243 - Ald formed titanium nitride films: The use of atomic layer deposition (ALD) to form a conductive titanium nitride layer produces a reliable structure for use in a variety of electronic devices. The structure is formed by depositing titanium nitride by atomic layer deposition onto a substrate surface using a titanium-containing precursor chemical such as TDEAT,... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070200244 - Post passivation interconnection schemes on top of the ic chips: A new method is provided for the creation of interconnect lines. Fine line interconnects are provided in a first layer of dielectric overlying semiconductor circuits that have been created in or on the surface of a substrate. A layer of passivation is deposited over the layer of dielectric, a thick... Agent: Saile Ackerman LLC

20070200245 - Semiconductor device and pattern generating method: Capacitance generated by a dummy pattern can be reduced without lowering wiring density by arranging the dummy pattern on one wiring layer in a manner responding to an actual pattern or the dummy pattern on the other wiring layer, whereby at least one of the following can be improved: distances... Agent: Staas & Halsey LLP

20070200246 - Chip package: A chip package including a flexible substrate, a plurality of conductive plugs, a wiring layer, and a chip is provided. The flexible substrate has a first surface and a second surface opposite to the first surface. The conductive plugs pass through the flexible substrate. The wiring layer is located on... Agent: J.c. Patents, Inc.

20070200247 - Interconnect structure to reduce stress induced voiding effect: An interconnect structure that may reduce or eliminate stress induced voids is provided. In an embodiment, a via is formed below a conductive line to provide an electrical connection to an underlying conductive region. The conductive line includes a widened region above the via. The widened region serves to reduce... Agent: Slater & Matsil, L.L.P.

20070200248 - Stacked integrated circuit package system: A stacked integrated circuit package system is provided forming a lead and a die paddle from a lead frame, forming a first integrated circuit die having an interconnect provided thereon, placing a second integrated circuit die over the first integrated circuit die and the die paddle, connecting the second integrated... Agent: Ishimaru & Zahrt LLP

20070200252 - Circuit board apparatus, circuit component reinforcing method and electronic device: According to one embodiment, a circuit board apparatus includes a substrate mounting a semiconductor component. A circuit board mounts the substrate. A solder bonding portion is provided in a side surface of the substrate. A pad is provided on the circuit board and solder bonded to the solder bonding portion.... Agent: Knobbe Martens Olson & Bear LLP

20070200251 - Method of fabricating ultra thin flip-chip package: Provided is a method of fabricating an ultra thin flip-chip package. In the above method, an under barrier metal film is formed on a bond pad of a semiconductor chip. Three-dimensional structured solder bumps are formed on the under barrier metal film. each of the solder bumps including a bar... Agent: Marger Johnson & Mccollom, P.C.

20070200250 - Semiconductor device with a semiconductor chip using lead technology and method of manufacturing the same: A semiconductor device using lead technology includes a semiconductor chip with external side electrodes of semiconductor components disposed on its top side. On its rear side, the semiconductor chip is connected to a rear side internal lead adapted to the rear side of semiconductor chip. On its top side, the... Agent: Edell, Shapiro & Finnan, LLC

20070200249 - Wiring board and semiconductor device: The invention provides a wiring board (2,15) to which a semiconductor chip (3) is to be bonded while directing a surface of the semiconductor chip toward the wiring board. The wiring board includes a connection electrode (14) that is formed on a bonding surface (2a, 15a) to which the semiconductor... Agent: Rabin & Berdo, PC

20070200254 - Method and apparatus for using flex circuit technology to create an electrode: A method of creating an active electrode that may include providing a flex circuit having an electrode made of a first material and providing a first mask over the flex circuit, the first mask having an offset region and an opening that exposes the electrode. The method may also include... Agent: Edwards Lifesciences Corporation

20070200253 - Electronic assembly and method for forming the same: Methods are provided for forming an electronic assembly (54). At least one depression (38) is formed in a surface of a substrate (20). A contact formation (44) is placed in the depression. A microelectronic die (46) is attached to the substrate using the contact formation. An electronic assembly is also... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20070200255 - System for fabricating semiconductor components with through wire interconnects: A method for fabricating a semiconductor component with a through wire interconnect includes the step of providing a substrate having a circuit side, a back side, and a through via. The method also includes the steps of: threading a wire through the via, forming a contact on the wire on... Agent: Stephen A. Gratton

20070200256 - Wiring configuration for semiconductor component: In a wiring configuration for a semiconductor component, an unused terminal is insulated from a third land via an insulating film, and thus no connecting member (solder) is required for the unused terminal. With this, the third land is not accidentally removed from a circuit board during exchange of the... Agent: Beyer Weaver LLP

20070200258 - Semiconductor device with semiconductor device components embedded in plastic package compound: A semiconductor device includes semiconductor device components embedded in plastic package compound, with a buffer layer being arranged on surfaces of the semiconductor device components of the semiconductor device. The buffer layer includes a thermoplastic material.... Agent: Edell, Shapiro & Finnan, LLC

20070200257 - Stackable integrated circuit package system with multiple interconnect interface: A stackable integrated circuit package system is provided forming a first integrated circuit die having an interconnect provided thereon, forming an external interconnect, having an upper tip and a lower tip, from a lead frame, mounting the first integrated circuit die on the external interconnect with the interconnect on the... Agent: Ishimaru & Zahrt LLP

20070200259 - Touch panel: The touch panel of the invention includes an optically transparent upper substrate having an upper conductive layer formed on an undersurface thereof, an optically transparent lower substrate having a lower conductive layer formed on an upper surface thereof and facing the upper conductive layer with a predetermined space, a spacer... Agent: Wenderoth, Lind & Ponack L.L.P.

20070194294 - Phase change memory devices and methods for fabricating the same: In a phase change memory, an interlayer insulating layer is disposed on a substrate. A heater plug includes a lower portion disposed in a contact hole penetrating the interlayer insulating layer and an upper portion protruding upward over the top surface of the interlayer insulating layer. A phase change pattern... Agent: Harness, Dickey & Pierce, P.L.C

20070194296 - Light emitting diode and manufacturing method therefor: A light emitting diode is composed of a p-type GaP substrate 12 and layers laminated on the p-type GaP substrate 12, including a p-type GaP contact layer 13, a p-type AlInP second cladding layer 14, a p-type AlGaInP active layer 15, an n-type AlInP first cladding layer 16 and an... Agent: Morrison & Foerster LLP

20070194297 - Quantum dot switching device: A multifunctional, programmable quantum confinement switching device uses the quantum confinement of charge carriers to operate on an input signal or energy and to release an output signal or energy. Energy enters the device through an input path and leaves through an output path, after being selectively blocked or modified... Agent: Hensley Kim & Edgington, LLC

20070194306 - Light emitting element, light emitting device, and electronic appliance: It is an object to provide a light emitting element capable of low-voltage driving; with high luminous efficiency; with high emission luminance; and with long emission lifetime. It is another object to provide a light emitting device and an electronic appliance in which power consumption is reduced; and which can... Agent: Fish & Richardson P.C.

20070194307 - Organic light emitting device: Provided is an organic light emitting device comprising: a substrate; and a plurality of sub-pixels, each sub-pixel comprising a thin film transistor formed on the substrate; a planarization layer formed on the thin film transistor, and having a contact hole exposing a portion of a source electrode or a drain... Agent: Ked & Associates, LLP

20070194304 - Organic light emitting display and method of fabricating the same: An organic light emitting display in which differential pressure is controlled to prevent Newton's rings from being generated and a method of fabricating the same are provided. The organic light emitting display includes a first substrate including a pixel region in which at least one organic light emitting diode (OLED)... Agent: Knobbe Martens Olson & Bear LLP

20070194305 - Organic thin film transistor comprising fluorine-based polymer thin film and method for fabricating the same: Disclosed is an organic thin film transistor, including a substrate, a gate electrode, a gate insulating layer, an organic semiconductor layer, and source/drain electrodes, in which a fluorine-based polymer thin film is provided between the source/drain electrodes and the organic semiconductor layer. A method of fabricating such an organic thin... Agent: Harness, Dickey & Pierce, P.L.C

20070194310 - Non-contact electrical connections test device: The invention relates to the non-contact testing of electrical characteristics of substrates carrying dense electrical connections (“chip-carriers” and others). The testing is non-contact in the sense that an injection or an extraction of electrons in the conductors to be tested is obtained by an electron tearing effect under the effect... Agent: Lowe Hauptman & Berner, LLP

20070194313 - Array substrate for liquid crystal display panel: An array substrate includes a substrate including a display area and a peripheral area, a thin film transistor formed in the display area and a capacitor formed in the peripheral area. The capacitor includes a first sub-capacitor and a second sub-capacitor. The first sub-capacitor includes a lower electrode layer, a... Agent: Cantor Colburn, LLP

20070194316 - Display apparatus: A display apparatus includes; a switching transistor, a driving transistor, a control terminal of which is connected to an output terminal of the switching transistor, a storage capacitor provided between the output terminal of the switching transistor and an output terminal of the driving transistor, and a complementary metal oxide... Agent: Cantor Colburn, LLP

20070194317 - Array substrate, display device having the same, and method thereof: An array substrate includes a base substrate, a dummy circuit section, a dummy pixel portion, an extended line, a common voltage line, and an overlap portion. Pixel portions are formed in a display area. The dummy circuit section is formed in a peripheral area to protect the pixel portions from... Agent: Cantor Colburn, LLP

20070194322 - Display apparatus and manufacturing method thereof: A display apparatus includes; a substrate, a transistor formed on the substrate, a pixel electrode connected to the transistor, a wall surrounding the pixel electrode, the wall including a main wall and a sub wall, the main wall having a first height and the sub wall having a second height... Agent: Cantor Colburn, LLP

20070194319 - Display device and method of driving the same: A display device includes a first display panel, a first gate driver, a second display panel and a second gate driver. The first display panel includes a first display region, in which first gate lines are formed, and a first peripheral region surrounding the first display region. The first gate... Agent: Frank Chau, Esq. F. Chau & Associates, LLC

20070194318 - Organic light emitting diode display: The present invention relates to an organic light emitting diode display having an optical film adhered to an outer surface of substrate and an external case covering a portion of the optical film so as to prevent display quality of the organic light emitting diode display from being degraded. The... Agent: Cantor Colburn, LLP

20070194323 - Semiconductor device and manufacturing method thereof: The invention provides a novel memory for which process technology is relatively simple and which can store multivalued information by a small number of elements. A part of a shape of the first electrode in the first storage element is made different from a shape of the first electrode in... Agent: Eric Robinson

20070194320 - Thin film transistor array panel and display device: A display device includes a first display panel including a common electrode disposed thereon, and a second display panel including; thin film transistors (“TFTs”) each including a gate electrode, a source electrode, and a drain electrode, a first passivation layer disposed on the source and drain electrodes, a second passivation... Agent: Cantor Colburn, LLP

20070194325 - Light emitting diode by use of metal diffusion bonding technology and method of producing light emitting diode: The main objective of present invention is to provide a manufacturing method of light emitting diode that utilizes metal diffusion bonding technology. AlInGaP light emitting diode epitaxial structure on a temporary substrate is bonded to a permanent substrate having a thermal expansion coefficient similar to that of the epitaxial structure,... Agent: Rosenberg, Klein & Lee

20070194328 - Nitride semiconductor light emitting device and manufacturing method thereof: An object is to provide a nitride semiconductor light emitting device capable of attaining high light emission output while lowering Vf, as well as to provide a manufacturing method thereof. The invention relates to a nitride semiconductor light emitting device, including at least an n-type nitride semiconductor, a p-type nitride... Agent: Morrison & Foerster LLP

20070194329 - Nitride semiconductor light-emitting device and method of manufacturing the same: There is provided a nitride semiconductor light emitting device. The nitride semiconductor light emitting device comprises a first nitride semiconductor layer including amorphous powder, an active layer on the first nitride semiconductor layer, and a second nitride semiconductor layer on the active layer.... Agent: Birch Stewart Kolasch & Birch

20070194326 - Organic light emitting diode display and method of manufacturing the same: An organic light emitting diode (“OLED”) display includes; a substrate, first and second signal lines which intersect each other and are disposed on the substrate, a switching control electrode connected to the first signal line, a switching input electrode connected to the second signal line, a switching output electrode disposed... Agent: Cantor Colburn, LLP

20070194327 - Semiconductor light-emitting device and method for fabricating the same: A semiconductor light-emitting device includes: a substrate; a plurality of semiconductor layers grown on the substrate and including an active layer; and an electrode formed on the semiconductor layers. An opening in which at least a portion of the semiconductor layers is exposed is formed in the substrate. The electrode... Agent: Mcdermott Will & Emery LLP

20070194333 - Light emitting diode package and method of manufacturing the same: Provided is a light emitting diode package and a method of manufacturing the same. The light emitting diode package includes a package main body with a cavity, a plurality of light emitting diode chips, a wire, and a plurality of lead frames. The plurality of light emitting diode chips are... Agent: Birch Stewart Kolasch & Birch

20070194334 - Light emitting device: An object is to provide a light emitting element using an inorganic compound as a light emitting material, which has ever-higher luminous efficiency and can be driven with low voltage. The chance of excitation of light emitting centers (atoms) in a light emitting layer is increased to enhance luminous efficiency... Agent: Fish & Richardson P.C.

20070194336 - Light emitting device package and method of manufacturing the same: A light emitting device package including: a heat dissipating substrate including a cavity; a first conductive pattern formed on the cavity; a light emitting device installed on the first conductive pattern; and a second conductive pattern formed on the heat dissipating substrate at a periphery of the first conductive pattern.... Agent: Sughrue Mion, PLLC

20070194338 - Light emitting diode package: A light emitting diode package with reduced light loss includes a package substrate, a light emitting diode chip mounted on the package substrate and an encapsulant formed on the package substrate to encapsulate the light emitting diode chip. The encapsulant has a refractive index gradient with refractive indices continuously increasing... Agent: Mcdermott Will & Emery LLP

20070194337 - Optoelectric composite substrate and electronic apparatus: An optoelectric composite substrate includes a substrate, a light emitting element positioned on the substrate, and a lens mold positioned on the light emitting element and contacting at least a part of the substrate, wherein the lens mold includes a lens element, the lens element positions so as to overlap... Agent: Oliff & Berridge, PLC

20070194341 - Light emitting diode package: A light emitting diode package. A package substrate has first and second electrode structures and a light emitting diode is mounted on the package substrate and electrically connected to the first and second electrode structures. A resin encapsulant is made of a transparent resin to seal the light emitting diode.... Agent: Mcdermott Will & Emery LLP

20070194340 - Light source and liquid crystal display device using the same: A widely applicable and low cost module substrate with a high accuracy, reliability and heat-radiation structure. A light source includes: a heat radiation substrate; an insulating layer formed in some regions in an upper surface of the substrate; a wiring layer having wiring patterns, the wiring layer being arranged on... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070194295 - Semiconductor device of group iii nitride semiconductor having oxide protective insulating film formed on part of the active region: An active region formed of a Group III nitride semiconductor is formed on a substrate. Then, an electrode is formed on the active region and a protective insulating film is formed on a part of the active region located in the peripheral portion of the electrode by oxidizing the Group... Agent: Mcdermott Will & Emery LLP

20070194298 - Semiconductor device comprising a lattice matching layer: A semiconductor device may include a first monocrystalline layer comprising a first material having a first lattice constant. A second monocrystalline layer may include a second material having a second lattice constant different than the first lattice constant. The device may also include a lattice matching layer between the first... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist P.A.

20070194299 - Optical semiconductor device and manufacturing method of the same: A side barrier is provided between columnar dots each constituted by directly stacking respective quantum dots in seven or more layers. Out of respective side barrier layers composing the side barrier, each of the lower side barrier layers (four layers of the undermost layer to the fourth layer from the... Agent: Armstrong, Kratz, Quintos, Hanson & Brooks, LLP

20070194300 - Low resistance tunnel junctions in wide band gap materials and method of making same: A low resistance tunnel junction that uses a natural polarization dipole associated with dissimilar materials to align a conduction band to a valence band is disclosed. Aligning the conduction band to the valence band of the junction encourages tunneling across the junction. The tunneling is encouraged, because the dipole space... Agent: Koppel, Patrick & Heybl

20070194303 - Method for manufacturing organic light-emitting element, organic light-emitting device and organic el panel: In a method for manufacturing an organic light-emitting element, comprising holding an organic light-emitting element substrate with the use of an electrostatic chuck an