Active solid-state devices (e.g., transistors, solid-state diodes) inventions 07/07

20070170416 - Semiconductor light emitting unit, method for manufacturing same and linear light source: A semiconductor light emitting unit is provided which comprises: a support 1 formed with longitudinal side walls 15 disposed opposite to each other for forming a pair of light reflective surfaces 9, and a bottom wall 16 connected to longitudinal side walls 15 for forming a mount surface 3a between... Agent: Bachman & Lapointe, P.C.

20070170417 - Iii-v photonic integration on silicon: Photonic integrated circuits on silicon are disclosed. By bonding a wafer of III-V material as an active region to silicon and removing the substrate, the lasers, amplifiers, modulators, and other devices can be processed using standard photolithographic techniques on the silicon substrate. The coupling between the silicon waveguide and the... Agent: Gates & Cooper LLP Howard Hughes Center

20070170422 - Devices containing chiroptical switching materials and methods of making and using the same: A polycarbodiimide polymer that is reversibly switchable between two distinct optical orientations is described. The polymer is useful in forming devices such as filters, storage media, actuators, and displays. Methods of making and using such polymers are also described.... Agent: Myers Bigel Sibley & Sajovec

20070170424 - Organic electroluminescence device: An organic electroluminescence device having, between a pair of electrodes, at least a light-emitting layer, a first hole transport layer between the light-emitting layer and an anode, and a first electron transport layer between the light-emitting layer and a cathode, wherein the organic electroluminescence device has at least one of... Agent: Birch Stewart Kolasch & Birch

20070170420 - Organic memory device and method of fabricating the same: An organic memory device includes a top electrode, a bottom electrode, and a bistable organic polymer layer between the top and bottom electrodes. Moreover, the organic memory device further includes a surface treatment layer between the organic polymer layer and the bottom electrode. Because the surface treatment layer can stabilize... Agent: Jianq Chyun Intellectual Property Office

20070170426 - Silicon crystallizing mask, apparatus for crystallizing silicon having the mask and method for crystallizing silicon using the apparatus: In a silicon crystallization mask that may be used to enhance electrical characteristics of silicon, an apparatus for crystallizing silicon having the mask and a method for crystallizing silicon using the apparatus, the mask includes first slits and second slits. The first slits are configured to transmit light and are... Agent: Macpherson Kwok Chen & Heid LLP

20070170427 - Semiconductor device: A semiconductor device comprises a semiconductor substrate, a MOS transistor and an antifuse element. The MOS transistor is formed on the semiconductor substrate and comprises a channel region and a gate electrode. The channel region has a predetermined conductive type. The antifuse element is formed on the semiconductor substrate and... Agent: Mcdermott Will & Emery LLP

20070170431 - Display device and manufacturing method therefor: A display device, comprising an insulating substrate; a data conductor formed on the insulating substrate and comprising a conductive film; a thin film transistor having at least one source electrode electrically connected with the conductive film, and a drain electrode formed along a circumference of the source electrode and spaced... Agent: Macpherson Kwok Chen & Heid LLP

20070170430 - Electro-optical device, method for manufacturing electro-optical device, and electronic apparatus: An electro-optical device includes an anti-reflective layer arranged on the face of a first metal layer that is closer to a semiconductor layer than a second metal layer. The anti-reflective layer covers the channel region as viewed in plan view.... Agent: Advantedge Law Group, LLC

20070170438 - Wafer encapsulated microelectromechanical structure and method of manufacturing same: There are many inventions described and illustrated herein. In one aspect, the present inventions relate to devices, systems and/or methods of encapsulating and fabricating electromechanical structures or elements, for example, accelerometer, gyroscope or other transducer (for example, pressure sensor, strain sensor, tactile sensor, magnetic sensor and/or temperature sensor), filter or... Agent: Neil A. Steinberg

20070170439 - Wafer encapsulated microelectromechanical structure and method of manufacturing same: There are many inventions described and illustrated herein. In one aspect, the present inventions relate to devices, systems and/or methods of encapsulating and fabricating electromechanical structures or elements, for example, accelerometer, gyroscope or other transducer (for example, pressure sensor, strain sensor, tactile sensor, magnetic sensor and/or temperature sensor), filter or... Agent: Neil A. Steinberg

20070170440 - Wafer encapsulated microelectromechanical structure and method of manufacturing same: There are many inventions described and illustrated herein. In one aspect, the present inventions relate to devices, systems and/or methods of encapsulating and fabricating electromechanical structures or elements, for example, accelerometer, gyroscope or other transducer (for example, pressure sensor, strain sensor, tactile sensor, magnetic sensor and/or temperature sensor), filter or... Agent: Neil A. Steinberg

20070170441 - Nitride semiconductor device and method for manufacturing the same: A nitride semiconductor device includes: a substrate having a principal surface; a first nitride semiconductor layer formed on the principal surface of the substrate and includes one or more convex portions whose side surfaces are vertical to the principal surface; and a second nitride semiconductor layer selectively grown on the... Agent: Mcdermott Will & Emery LLP

20070170443 - Light generating module, liquid crystal display device having the same, and method of improving color reproducibility thereof: A light generating module includes a light emitting part and a power supplying part. The light emitting part includes a first region and a second region. First and second lights having different wavelengths from each other are generated in each of the first and second regions. The first region is... Agent: Cantor Colburn, LLP

20070170449 - Color sensor integrated light emitting diode for led backlight: A color sensor integrated light emitting diode (LED) is packaged with LED and color sensor mounted side by side inside LED package comprising a heat sink for mounting LED and the color sensor, both the color sensor and LED being buried by a high refractive index polymer followed by a... Agent: Dr. M. Anandan

20070170446 - Inorganic electroluminescent diode and method of fabricating the same: Disclosed are an inorganic electroluminescent diode and a method of fabricating the same. Specifically, this invention provides an inorganic electroluminescent diode, which includes a semiconductor nanocrystal layer formed of inorganic material, an electron transport layer or a hole transport layer formed on the semiconductor nanocrystal layer using amorphous inorganic material,... Agent: Cantor Colburn, LLP

20070170447 - Shifting spectral content in solid state light emitters by spatially separating lumiphor films: A lighting device, comprising at least one solid state light emitter, at least one first lumiphor and at least one second lumiphor which is spaced from the first lumiphor. The solid state light emitter can be a light emitting diode. A method of making a lighting device, comprising positioning at... Agent: Burr & Brown

20070170452 - Lighting device and light emitting module for the same: A light emitting module of a lighting device has a casing, a heat radiating member and terminals. The terminals extend from the casing and connects to a circuit board disposed along a light diffusing member. The heat radiating member extends in a direction perpendicular to the terminals. Alternatively, the terminals... Agent: Nixon & Vanderhye, PC

20070170413 - Semiconductor memory: Manufacturing processes for phase change memory have suffered from the problem of chalcogenide material being susceptible to delamination, since this material exhibits low adhesion to high melting point metals and silicon oxide films. Furthermore, chalcogenide material has low thermal stability and hence tends to sublime during the manufacturing process of... Agent: Miles & Stockbridge PC

20070170414 - Field emission devices using modified carbon nanotubes: The present invention relates to a field emission device comprising an anode and a cathode, wherein said cathode includes carbon nanotubes nanotubes which have been subjected to energy, plasma, chemical, or mechanical treatment. The present invention also relates to a field emission cathode comprising carbon nanotubes which have been subject... Agent: Kramer Levin Naftalis & Frankel LLP Intellectual Property Department

20070170415 - Semiconductor light emitting device: The refractive index of the material for forming a light emitting element, example of the material including a group III Nitride Compound Semiconductor, is relatively higher than that of air; therefore, in order to emit, into air, light generated in an active layer in conventional semiconductor light emitting devices, it... Agent: Hogan & Hartson L.L.P.

20070170418 - Broad-emission nanocrystals and methods of making and using same: In one aspect, the invention relates to an inorganic nanoparticle or nanocrystal, also referred to as a quantum dot, capable of emitting white light. In a further aspect, the invention relates to an inorganic nanoparticle capable of absorbing energy from a first electromagnetic region and capable of emitting light in... Agent: Needle & Rosenberg, P.C.

20070170421 - Fluorocarbon electrode modification layer: An organic device including at least two electrodes; at least one organic active layer, wherein the organic active layer is disposed in between two electrodes; and an electrode modification layer, wherein the electrode modification layer is disposed in between two electrodes and in contact with one of the electrodes; and... Agent: Pamela R. Crocker Patent Legal Staff

20070170419 - Organic electronic devices: The present invention relates to the improvement of organic electronic devices, in particular fluorescent electroluminescent devices, by using electron-transport materials of the formula (1) to (4) as shown in scheme 1... Agent: Connolly Bove Lodge & Hutz, LLP

20070170423 - Organic light-emitting display and method of making the same: Disclosed is an organic light-emitting display device in which a substrate and an encapsulation substrate are completely sealed using a frit; and the preparing method of the same. The organic light-emitting display device of the present invention includes a first substrate comprising a pixel region including an organic light-emitting diode... Agent: Knobbe Martens Olson & Bear LLP

20070170425 - Semiconductor integrated circuit device and test method thereof: The present invention provides a high-quality semiconductor integrated circuit device, where the semiconductor integrated circuit device, a SiP or especially PoP semiconductor integrated circuit device, enables a simultaneous testing of the reliability of multiple upper and lower semiconductor integrated circuit elements; it also enables a testing of only the non-defective... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070170428 - Thin film material and method of manufacturing the same: A thin film material and a method of manufacturing the thin film material are obtained with which properties of films formed on a substrate can be improved. A superconducting wire 1 includes a substrate 2, an intermediate thin film layer (intermediate layer 3) formed on the substrate and comprised of... Agent: Foley And Lardner LLP Suite 500

20070170429 - Apparatus and method for manufacturing electro-optical devices: The present invention provides an electro-optical device capable of achieving an increased light emission efficiency and an enhanced visibility. An organic electroluminescents (EL) display device has a plurality of material layers including a luminescent layer. In a plurality of material layers layered in the direction of light emission from the... Agent: Oliff & Berridge, PLC

20070170432 - Thin film transistor array substrate and method of fabricating the same: A thin film transistor array substrate includes a gate line formed on a substrate, a data line formed on the substrate intersecting with the gate line to define a pixel region, a thin film transistor formed at the intersection of the gate line and the data line, the thin film... Agent: Morgan Lewis & Bockius LLP

20070170433 - Multilevel semiconductor device and method of manufacturing the same: A method of fabricating a multilevel semiconductor integrated circuit is provided, comprising: forming on a first active semiconductor structure a first plurality of transistors with respective gate structures disposed on a first substrate and source or drain regions disposed within the first substrate; depositing a first insulation layer on the... Agent: F. Chau & Associates, LLC

20070170435 - Liquid crystal display panel and fabricating method thereof: A liquid crystal display (LCD) panel is fabricated in a simplified process. The LCD panel includes a thin film transistor (TFT) array substrate with a gate and data lines crossing each other to define a pixel area, a TFT at the crossings of the gate and data lines, a protective... Agent: Mckenna Long & Aldridge LLP Song K. Jung

20070170434 - Thin film transistor, thin film transistor substrate, processes for producing the same, liquid crystal display using the same, and related devices and processes; and sputtering target, transparent electroconductive film formed by use of this,transparent e: Provided are a thin film transistor substrate having a transparent electroconductive film in which residues and so on resulting etching are hardly generated; a process for producing the same; and a liquid crystal display using this thin film transistor substrate. A thin film transistor substrate, comprising a transparent substrate, a... Agent: Millen, White, Zelano & Branigan, P.C.

20070170437 - Hierarchical assembly of interconnects for molecular electronics: A hierarchical assembly methodology can interconnect individual two- and/or three-terminal molecules with other nanoelements (nanoparticles, nanowires, etc.) to form solution-based suspensions of nanoscale assemblies. The nanoassemblies can then undergo chemical-selective alignment and attachment to nanopatterned silicon and/or other surfaces for interconnection and/or measurement.... Agent: Myers Bigel Sibley & Sajovec

20070170436 - High-withstand voltage wide-gap semiconductor device and power device: A semiconductor device with high withstand voltage, reduced forward-direction voltage degradation, long lifetime and high reliability, is provided. A junction between the drift layer and anode layer of a bipolar semiconductor device and an electric field relaxation layer are formed at a distance from each other, and an edge portion... Agent: Nixon & Vanderhye, PC

20070170442 - Nitride-based semiconductor light-emitting device and method of fabricating the same: A nitride-based semiconductor light-emitting device capable of stabilizing transverse light confinement is obtained. This nitride-based semiconductor light-emitting device comprises an emission layer, a cladding layer, formed on the emission layer, including a first nitride-based semiconductor layer and having a current path portion and a current blocking layer, formed to cover... Agent: Mcdermott Will & Emery LLP

20070170444 - Integrated led chip to emit multiple colors and method of manufacturing the same: The present invention is a monolithic, multi-colored LED chip and a method for making the same. The LED chip is comprised of a substrate and a plurality of light emitting structures, each light emitting structure capable of emitting a wavelength of light unique compared to others and each structure layered... Agent: Geoffrey E. Dobbin, Patent Attorney

20070170445 - Semiconductor light-emitting device: A semiconductor light-emitting device including a light-emitting layer forming portion, a semiconductor substrate of a first conductivity type, a first electrode which is disposed on a surface of the semiconductor substrate of the first conductivity type, a semiconductor substrate of a second conductivity type, and a second electrode which is... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070170448 - Semiconductor light emitting device and semiconductor light emitting device assembly: A semiconductor light emitting device capable of improving the light extraction efficiency while preventing deterioration of the light emission characteristic with time and a semiconductor light emitting device assembly including the semiconductor light emitting device are provided. The semiconductor light emitting device includes a semiconductor light emitting element containing a... Agent: Wolf Greenfield & Sacks, P.C.

20070170451 - Integrated circuit capable of operating at different supply voltages: A chip configuration for dual board voltage compatibility comprising ballast I/O pads, regulator control block and VDDCO pad. If 1.8V is available on board, all 1.8V pads are connected to the package pins and the VDDCO pad is double bonded with one 1.8V package pin. This ensures that the regulator... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20070170450 - Package for a light emitting element with integrated electrostatic discharge protection: A package includes a substrate with a recess in which a light emitting element is mounted. A surface of the substrate forms an exterior surface of the package. A lid may be attached to the substrate to define a sealed region in which the light emitting element is mounted. The... Agent: Fish & Richardson P.C.

20070170453 - Package for mounting an optical element and a method of manufacturing the same: The optical mounting package of the present invention is featured by mounting a silicon frame on an insulating substrate for mounting the optical element. The package of the present invention is also featured by that the frame mounted on the insulating substrate for mounting the optical element is made of... Agent: Dickstein Shapiro LLP

20070170455 - Organic light emitting display device and method of fabricating the same: An organic light emitting device according to one embodiment of the present invention comprises a first substrate defining a pixel region and a non-pixel region; an array of organic light emitting pixels formed in the pixel region of the first substrate; a second substrate placed over the first substrate, the... Agent: Knobbe Martens Olson & Bear LLP

20070170456 - Light emitting diode package with coaxial leads: The leads of a light emitting diode are made coaxial. The inner lead protrudes lower than the outer lead. The package is inserted into a spongy display panel for power supply. The display panel has three layers: a lower conducting layer for contacting said inner lead and a top conducting... Agent: Hungchang Lin

20070170454 - Packages for semiconductor light emitting devices utilizing dispensed reflectors and methods of forming the same: A packaged LED includes a substrate, an LED chip on the upper surface of the substrate, a first encapsulant material, including a reflective material, on the substrate and spaced apart from the LED chip, and a second encapsulant material on the LED chip. A method of forming a packaged LED... Agent: Myers Bigel Sibley & Sajovec

20070170459 - Nitride semiconductor light generating device: A nitride semiconductor light generating device comprises an n-type gallium nitride based semiconductor layer, a quantum well active layer including an InX1AlY1Ga1-X1-Y1N (1>X1>0, 1>Y1>0) well layer and an InX2AlY2Ga1-X2-Y2N (1>X2>0, 1>Y2>0) barrier layer, an InX3AlY3Ga1-X3-Y3N (1>X3>0, 1>Y3>0) layer provided between the quantum well active layer and the n-type gallium nitride... Agent: Mcdermott Will & Emery LLP

20070170457 - Gallium nitride-based compound semiconductor multilayer structure and production method thereof: An object of the present invention is to provide a gallium nitride compound semiconductor multilayer structure useful for producing a gallium nitride compound semiconductor light-emitting device which operates at low voltage while maintaining satisfactory light emission output. The inventive gallium nitride compound semiconductor multilayer structure comprises a substrate, and an... Agent: Sughrue Mion, PLLC

20070170458 - Group iii nitride semiconductor light-emitting device, forming method thereof, lamp and light source using same: A Group III nitride semiconductor light-emitting device having a stacked structure includes a transparent crystal substrate having a front surface and a back surface, a first Group III nitride semiconductor layer of first conductive type formed on the front surface of the transparent crystal substrate, a second Group III nitride... Agent: Sughrue Mion, PLLC

20070170460 - Micro-electro mechanical systems switch and method of fabricating the same: A MEMS switch and a method of manufacturing the same are disclosed. The MEMS switch includes: a substrate including a trench, a ground line and a signal line having an opened portion; a moving plate separated from the substrate at a predetermined space and including a contact member for connecting... Agent: Blakely Sokoloff Taylor & Zafman

20070170461 - Gallium nitride-based compound semiconductor light-emitting device: An object of the present invention is to provide a gallium nitride compound semiconductor light-emitting device having a positive electrode that exhibits low contact resistance with a p-type gallium nitride compound semiconductor layer and that can be fabricated with high productivity. The inventive gallium nitride compound semiconductor light-emitting device includes... Agent: Sughrue Mion, PLLC

20070170462 - Photo sensor and preparation method thereof: A novel structure of photo sensor is disclosed. The equivalent circuit of the invented photo sensor comprises a photo transistor integrated with a surface photo sensor. The structure of the surface photo sensor is substantially identical to the base-emitter junction of the photo transistor and may be prepared in the... Agent: Bacon & Thomas, PLLC

20070170463 - Nitride semiconductor device: A nitride semiconductor device includes: a first semiconductor layer made of first nitride semiconductor; a second semiconductor layer formed on a principal surface of the first semiconductor layer and made of second nitride semiconductor having a bandgap wider than that of the first nitride semiconductor; a control layer selectively formed... Agent: Mcdermott Will & Emery LLP

20070170464 - Transistor gate electrode having conductor material layer: Various embodiments of the invention relate to a PMOS device having a transistor channel of silicon germanium material on a substrate, a gate dielectric having a dielectric constant greater than that of silicon dioxide on the channel, a gate electrode conductor material having a work function in a range between... Agent: Intel/blakely

20070170465 - Level shifter for flat panel display device: A level shifter for a flat panel display device is provided. A first transistor has a first transistor source, a first transistor gate, and a first transistor drain. The first transistor source is connected to a first power supply and the first transistor gate and the first transistor drain are... Agent: Christie, Parker & Hale, LLP

20070170466 - Method for producing compound semiconductor wafer and compound semiconductor device: A method for producing a compound semiconductor wafer used for production of HBT by vapor growth of a sub-collector layer, a collector layer, a base layer and an emitter layer in this turn on a compound semiconductor substrate using MOCVD method wherein the base layer is grown as a p-type... Agent: Birch Stewart Kolasch & Birch

20070170467 - Semiconductor device: A semiconductor device includes a first transistor having a first gate oxide layer with a first thickness; a second transistor having a second gate oxide layer with a second thickness different from the first thickness; and at least one of a capacitor and a variable capacitance diode. The one of... Agent: Takeuchi & Kubotera, LLP

20070170468 - Method for manufacturing a semiconductor substrate and a method for manufacturing a semiconductor device and the semiconductor device manufactured thereby: A method for manufacturing a semiconductor substrate includes: forming an element isolation layer on a semiconductor base material for separating an element region from the other regions; forming a first semiconductor layer on the semiconductor base material; forming a second semiconductor layer on the first semiconductor layer, the second semiconductor... Agent: Advantedge Law Group, LLC

20070170469 - Ldmos device with improved esd performance: A semiconductor device includes a first doped region disposed on a first well in a semiconductor substrate; a second doped region disposed on a second well adjacent to the first well in the semiconductor substrate, the second doped region having a dopant density higher than that of the second well;... Agent: Howard Chen, Esq. Preston Gates & Ellis LLP

20070170470 - Solid-state imaging device, signal charge detection device, and camera: The solid-state imaging device of the present invention includes: a floating diffusion capacity unit which is formed on a semiconductor substrate, and is operable to hold signal charges derived from incident light; an amplifier which is operable to convert the signal charges held in the floating diffusion capacity unit into... Agent: Greenblum & Bernstein, P.L.C

20070170471 - Three-dimensional integrated c-mos circuit and method for producing same: The three-dimensional integrated CMOS circuit is formed in a hybrid substrate. n-MOS type transistors are formed, at a bottom level, in a first semi-conducting layer of silicon having a (100) orientation, which layer may be tension strained. p-MOS transistors are formed, at a top level, in a preferably monocrystalline and... Agent: Oliff & Berridge, PLC

20070170472 - Structure and method for making high density mosfet circuits with different height contact lines: Embodiments herein present a structure, method, etc. for making high density MOSFET circuits with different height contact lines. The MOSFET circuits comprise a contact line, a first gate layer situated proximate the contact line, and at least one subsequent gate layer situated over the first gate layer. The contact line... Agent: Frederick W. Gibb, Iii Gibb & Rahman, LLC

20070170473 - Apparatus using manhattan geometry having non-manhattan current flow: A device is described, including a first diffusion region having a first terminal, a second diffusion region having a second terminal, and a channel region disposed between the first diffusion region and the second diffusion region. Further, the first terminal and the second terminal are offset to enable a non-Manhattan... Agent: Osha Liang L.L.P./sun

20070170474 - Semiconductor device and method of fabricating the same: A semiconductor device according to one embodiment of the present invention includes: a semiconductor substrate; a non-planar type transistor region having at least one of a fin type transistor region including a fin type transistor in which a current is induced to flow through side faces of a fin formed... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070170475 - Mounting structure of image pickup device: In a mounting structure of an image pickup device, an optical member allowing light to pass through is bonded to one side of an electric substrate with an adhesive with the image pickup device bonded to the other side of the electric substrate. In this structure, the hardness of an... Agent: Ostrolenk Faber Gerb & Soffen

20070170477 - Solid state imaging device and method for manufacturing the same: A plurality of light receiving elements are arranged in a matrix with uniform space therebetween in a light receiving region defined on a semiconductor substrate. A plurality of read-out electrodes are formed on the semiconductor substrate in an arrangement corresponding to the light receiving elements to read charges generated by... Agent: Mcdermott Will & Emery LLP

20070170478 - Solid-state imaging device: A solid-state imaging device comprising a plurality of pixels arrayed on a plane, wherein each of the pixels includes a semiconductor substrate and a plurality of photoelectric conversion devices, the plurality of photoelectric conversion devices include at least one on-substrate photoelectric conversion device stacked in an upper portion of the... Agent: Sughrue-265550

20070170476 - Lateral photodetectors with transparent electrodes: A photodetector includes a substrate and a layer of Ge formed on the substrate. A plurality of n-type doped regions and a plurality of p-type doped regions are formed in Ge region. These doped regions formed an alternating pattern. Electrodes are formed on n-type doped regions and on the p-type... Agent: Gauthier & Connors, LLP

20070170479 - Polarization transfer device and control method therefor: A polarization transfer device includes a ferroelectric thin film formed continuously as one piece; a plurality of polarization switches formed by placing the ferroelectric thin film between a first gate electrode and a second gate electrode; and a plurality of polarization accumulators formed by placing the ferroelectric thin film between... Agent: Oliff & Berridge, PLC

20070170480 - Nonvolatile ferroelectric memory device: A nonvolatile ferroelectric memory device is provided so as to control read/write operations of a nonvolatile memory cell using a channel resistance of the memory cell which is differentiated by polarity states of a ferroelectric material. In the memory device, an insulating layer is formed on a bottom word line,... Agent: Heller Ehrman LLP

20070170481 - Nonvolatile ferroelectric memory device: A nonvolatile ferroelectric memory device is provided so as to control read/write operations of a nonvolatile memory cell using a channel resistance of the memory cell which is differentiated by polarity states of a ferroelectric material. In the memory device, an insulating layer is formed on a bottom word line,... Agent: Heller Ehrman LLP

20070170484 - Semiconductor device and its manufacturing method: To realize miniaturization/high integration and increase in the amount of accumulated charges, and to give a memory structure having a high reliability. A 1 transistor 1 capacitor (1T1C) structure having 1 ferroelectric capacitor structure and 1 selection transistor every memory cell is adopted, and respective capacitor structures are disposed respectively... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070170483 - Capacitor of dynamic random access memory and method of manufacturing the capacitor: A transistor formed on a semiconductor substrate has a gate electrode formed via a gate insulating film and first and second diffusion layers formed in the semiconductor substrate, the first and second diffusion layers being positioned at both sides of the gate electrode. A first electrode is connected to the... Agent: Foley And Lardner LLP Suite 500

20070170485 - Semiconductor memory device and method for fabricating the same: A semiconductor memory device includes a plurality of memory cells. Each memory cell includes a capacitor which is composed of a first electrode, at least one particle made of ferroelectric or high dielectric constant material and selectively arranged on the first electrode, and a second electrode formed on the particle.... Agent: Mcdermott Will & Emery LLP

20070170482 - Semiconductor storage device and manufacturing method thereof: A semiconductor storage device including a capacitor whose stored signal quantity is large with respect to its area share ratio, and a manufacturing method thereof are disclosed. According to one aspect of the present invention, it is provided a semiconductor storage device comprising a transistor formed on a semiconductor substrate,... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070170486 - Semiconductor device having self-aligned contact and method of fabricating the same: A semiconductor device includes a conductive pattern disposed on a substrate, a first interlayer dielectric layer disposed on the substrate and the conductive pattern, a first dummy pattern disposed on the first interlayer dielectric layer and partially overlapping the conductive pattern, a second interlayer dielectric layer disposed on the first... Agent: Marger Johnson & Mccollom, P.C.

20070170488 - Capacitor of semiconductor device and method for fabricating the same: A capacitor of a semiconductor device and a method for fabricating the same may be provided. The method may include forming an interlayer insulation layer, an etch stop layer, and/or a sacrificial insulation layer on a semiconductor substrate, patterning the interlayer insulation layer, the etch stop layer, and/or the sacrificial... Agent: Harness, Dickey & Pierce, P.L.C

20070170487 - Storage capacitor for semiconductor memory cells and method of manufacturing a storage capacitor: A capacitor for a dynamic semiconductor memory cell, a memory and method of making a memory is disclosed. In one embodiment, a storage electrode of the capacitor has a pad-shaped lower section and a cup-shaped upper section, which is placed on top of the lower section. A lower section of... Agent: Dicke, Billig & Czaja

20070170489 - Method to increase charge retention of non-volatile memory manufactured in a single-gate logic process: A non-volatile memory cell with increased charge retention is fabricated on the same substrate as logic devices using a single-gate conventional logic process. A silicide-blocking dielectric structure is formed over a floating gate of the NVM cell, thereby preventing silicide formation over the floating gate, while allowing silicide formation over... Agent: Bever Hoffman & Harms, LLP Tri-valley Office

20070170490 - Nonvolatile memory device and method of fabricating the same: A nonvolatile memory device includes a semiconductor substrate; a source region that is formed in the semiconductor substrate; a gate insulating film that is formed so as to partially overlap the source region on hte semiconductor substrate; a floating gate that is formed on the gate insulating film so as... Agent: Frank Chau, Esq. F. Chau & Associates, LLC

20070170491 - Nonvolatile memory device and method of fabricating the same: a nonvolatile memory device Includes an active region defined in a semiconductor substrate and a control gate electrode crossing over the active region. A gate insulating layer is interposed between the control gate electrode and the active reigon. A floating gate is formed in the active region to penetrate the... Agent: Mills & Onello LLP

20070170492 - Germanium-silicon-carbide floating gates in memories: The use of a germanium carbide (GeC), or a germanium silicon carbide (GeSiC) layer as a floating gate material to replace heavily doped polysilicon (poly) in fabricating floating gates in EEPROM and flash memory results in increased tunneling currents and faster erase operations. Forming the floating gate includes depositing germanium-silicon-carbide... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070170493 - Non-volatile memory and manufacturing method thereof: A non-volatile memory is described, including a substrate, a floating gate, a control gate, a source region, and a drain region. A trench is disposed in the substrate, and a step-like recess is located in the substrate beside the trench. The floating gate is disposed on the sidewall of the... Agent: Jianq Chyun Intellectual Property Office

20070170494 - Nonvolatile memory device and method for fabricating the same: In a nonvolatile memory device, and a method for fabricating the nonvolatile memory device, two floating gates are formed so as to be isolated from each other in a single memory cell field. The method is comprised of forming a first conductive layer pattern to have pattern portions that are... Agent: Mills & Onello LLP

20070170495 - Non-volatile semiconductor storage device and manufacturing method of the same: Performance of a non-volatile semiconductor storage device which performs electron writing by hot electrons and hole erasure by hot holes is improved. A non-volatile memory cell which performs a writing operation by electrons and an erasure operation by holes has a p-type well region, isolation regions, a source region, and... Agent: Miles & Stockbridge PC

20070170496 - Nrom flash memory devices on ultrathin silicon: An NROM flash memory cell is implemented in an ultra-thin silicon-on-insulator structure. In a planar device, the channel between the source/drain areas is normally fully depleted. An oxide layer provides an insulation layer between the source/drain areas and the gate insulator layer on top. A control gate is formed on... Agent: Leffert Jay & Polglaze, P.A. Attn: Thomas W. Leffert

20070170497 - Semiconductor device and method for manufacturing the same: A semiconductor device comprises an active region formed in a semiconductor substrate; a recess region being formed within the active region and defining a protruding portion; and a gate structure formed within the recess region.... Agent: Townsend And Townsend And Crew, LLP

20070170499 - Semiconductor device and manufacturing method thereof: A semiconductor device has elements formed on a substrate separately from each other. Each of the elements includes first and second regions as a source and a drain; a gate electrode formed to have a buried gate structure, and a portion of the gate electrode is put between the first... Agent: Foley And Lardner LLP Suite 500

20070170498 - Configuration and method to form mosfet devices with low resistance silicide gate and mesa contact regions: A novel integration scheme for forming power MOSFET, particularly forming salicides for both gate and mesa contact regions, as well as using multiple energy contact implants through the salicided layer to form conductive body contacts which short to the source region by the salicides.... Agent: Bo-in Lin

20070170500 - Semiconductor structure and method for forming thereof: A semiconductor structure and a method for forming the semiconductor structure are provided. The method for forming a semiconductor structure of the present invention may include the following steps. First, a substrate is provided, wherein a gate is formed over the substrate, and a plurality of offspacers are formed over... Agent: J C Patents, Inc.

20070170501 - Mos transistors including silicide layers on source/drain regions: A MOS transistor can include a substrate and a field region formed at the semiconductor substrate to define an active region. An I-shaped spacer is on sidewalls of the gate electrode. A lightly doped region and a heavily doped region are on the semiconductor substrate on sides of the gate... Agent: Myers Bigel Sibley & Sajovec

20070170503 - Composite substrate and method of fabricating the same: The invention specifically relates to methods of fabricating a composite substrate by providing a first insulating layer on a support substrate at a thickness of e1 and providing a second insulating layer on a source substrate at a thickness of e2, with each layer having an exposed face for bonding;... Agent: Winston & Strawn LLP Patent Department

20070170506 - Semiconductor device: The invention prevents the reduction of a display quality caused by a light leak current of a thin film transistor used in a display device. A lower metal layer is formed on a substrate, and a buffer film, a semiconductor layer, a gate insulation film, and a gate wiring are... Agent: Morrison & Foerster LLP

20070170504 - Thin film transistor substrate and method of fabricating the same and liquid crystal display having the thin film transistor substrate: The present invention provides a thin film transistor substrate with a structure for reducing coupling capacitance between a data line and a pixel electrode, a method of fabricating the thin film transistor substrate, and a liquid crystal display having the thin film transistor substrate. The present invention provides a thin... Agent: Cantor Colburn, LLP

20070170505 - Semiconductor device and manufacturing method thereof: To provide a wireless identification semiconductor device provided with a display function, which is capable of effectively utilizing electric power supplied by an electromagnetic wave. The following are included: an antenna; a power source generating circuit electrically connected to the antenna; an IC chip circuit and a display element electrically... Agent: Eric Robinson

20070170502 - Semiconductor device and method for manufacturing the same: The present invention provides a high-quality semiconductor device in which deterioration in transistor characteristics and an increase in interface layer due to a gate insulating film are suppressed, and a method for manufacturing the same. In the present invention, an interface layer, a diffusion suppressing layer and a high dielectric... Agent: Cantor Colburn, LLP

20070170507 - Structure and method for manufacturing planar strained si/sige substrate with multiple orientations and different stress levels: The present invention provides a method of forming a semiconducting substrate including the steps of providing an initial structure having first device region comprising a first orientation material and a second device region having a second orientation material; forming a first concentration of lattice modifying material atop the first orientation... Agent: Scully, Scott, Murphy & Presser, P.C.

20070170508 - Semiconductor device and method of manufacturing the semiconductor device: In a method of manufacturing a semiconductor device to improve structural stability of a semiconductor device in a silicidation process, a substrate is provided to have an active region defined by an isolation layer. An etching mask is formed on the active region and the isolation layer to have a... Agent: Mills & Onello LLP

20070170509 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a Fin, a source region and a drain region, a first extension region, a second extension region and a channel region. The Fin is formed on a major surface of a semiconductor substrate. The source region and drain region are formed at both end portions of... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070170510 - Electrostatic discharge protection circuit and diode thereof: A diode disposed on a substrate is provided. The diode includes a semiconductor pattern, a first conductor pattern, a second conductor pattern, an insulating layer, and a top conductor pattern. The first conductor pattern and the second conductor pattern are respectively disposed on a portion of the semiconductor pattern. The... Agent: Jianq Chyun Intellectual Property Office

20070170511 - Method for fabricating a recessed-gate mos transistor device: A method of fabricating a recess-gate transistor is provided. A first liner and a dielectric layer are formed on a substrate. An opening is formed in the first liner and dielectric layer. A second liner is formed on the dielectric layer and in the opening. The second liner is dry-etched... Agent: North America Intellectual Property Corporation

20070170512 - Electrostatic discharge protection device and method of fabricating same: Disclosed are a silicon control rectifier, a method of making the silicon control rectifier and the use of the silicon control rectifier as an electrostatic discharge protection device of an integrated circuit. The silicon control rectifier includes a silicon body formed in a silicon layer in direct physical contact with... Agent: Schmeiser, Olsen & Watts

20070170513 - Semiconductor device and manufacturing method thereof: A semiconductor device of which manufacturing steps can be simplified by doping impurities at a time, and a manufacturing method thereof. The manufacturing method of the semiconductor device comprises the steps of: forming first and second semiconductor layers over a substrate, forming a first insulating film over the first and... Agent: Fish & Richardson P.C.

20070170514 - Igbt device and related device having robustness under extreme conditions: A semiconductor device in the form of an IGBT has a front side contact, a rear side contact, and a semiconductor volume disposed between the front side contact and the rear side contact. The semiconductor volume includes a field stop layer for spatially delimiting an electric field that can be... Agent: Maginot, Moore & Beck Chase Tower

20070170515 - Structure and method for enhanced triple well latchup robustness: Disclosed is a triple well CMOS device structure that addresses the issue of latchup by adding an n+ buried layer not only beneath the p-well to isolate the p-well from the p− substrate but also beneath the n-well. The structure eliminates the spacing issues between the n-well and n+ buried... Agent: Frederick W. Gibb, Iii Gibb & Rahman, LLC

20070170516 - Triple-well cmos devices with increased latch-up immunity and methods of fabricating same: A triple-well CMOS structure having reduced latch-up susceptibility and a method of fabricating the structure. The method includes forming a buried P-type doped layer having low resistance under the P-wells and N-wells in which CMOS transistors are formed and forming a gap in a buried N-type doped layer formed in... Agent: Schmeiser, Olsen & Watts

20070170517 - Cmos devices adapted to reduce latchup and methods of manufacturing the same: In a first aspect, a first apparatus is provided. The first apparatus is semiconductor device that includes (1) a shallow trench isolation (STI) oxide region; (2) a first metal-oxide-semiconductor field-effect transistor (MOSFET) coupled to a first side of the STI oxide region; (3) a second MOSFET coupled to a second... Agent: Ibm Corporation Intellectual Property Law Dept. 917

20070170518 - Semiconductor structures for latch-up suppression and methods of forming such semiconductor structures: Semiconductor structures and methods for suppressing latch-up in bulk CMOS devices. The semiconductor structure comprises a shaped-modified isolation region that is formed in a trench generally between two doped wells of the substrate in which the bulk CMOS devices are fabricated. The shaped-modified isolation region may comprise a widened dielectric-filled... Agent: Wood, Herron & Evans, L.L.P. (ibm)

20070170519 - Driver for driving a load using a charge pump circuit: A charge pump circuit includes MOSFETs and MOS capacitors formed on the same substrate. Each of the MOS capacitors has a multiplicity of first electrodes formed in one region of the substrate, insulating layers formed on/above respective substrate regions between neighboring first electrodes, each layer covering at least the respective... Agent: Hogan & Hartson L.L.P.

20070170520 - Three-dimensional memory cells: The present invention discloses a three-dimensional memory (3D-M) with polarized 3D-ROM (three-dimensional read-only memory) cells. Polarized 3D-ROM can ensure a larger unit array and therefore, a better integratibility. The present invention further discloses a 3D-M with seamless 3D-ROM cells. Seamless 3D-ROM can ensure a better manufacturing yield.... Agent: Guobiao Zhang

20070170523 - Circuit substrate and packaging thereof and the method for fabricating the packaging: A circuit substrate and its packaging and the method for fabricating the packaging are provided. A plurality of electrodes are formed on the surface of the circuit substrate, the electrodes are formed with fork structures, so that when the circuit substrate expands/contracts due to thermal processes, such that the probability... Agent: Ishimaru & Zahrt LLP

20070170524 - Esd protection device for high performance ic: The present invention includes a circuit structure for ESD protection and methods of making the circuit structure. The circuit structure can be used in an ESD protection circuitry to protect certain devices in an integrated circuit, and can be fabricated without extra processing steps in addition to the processing steps... Agent: Morgan, Lewis & Bockius LLP

20070170521 - Method and structure to process thick and thin fins and variable fin to fin spacing: Disclosed is an integrated circuit with multiple semiconductor fins having different widths and variable spacing on the same substrate. The method of forming the circuit incorporates a sidewall image transfer process using different types of mandrels. Fin thickness and fin-to-fin spacing are controlled by an oxidation process used to form... Agent: Frederick W. Gibb, Iii Gibb & Rahman, LLC

20070170522 - Semiconductor device and method for fabricating the same: The semiconductor device includes an active region, a recess, a Fin-type channel region, a gate insulating film, and a gate electrode. The active region is defined by a device isolation structure formed in a semiconductor substrate. The recess is formed by etching the active region and its neighboring device isolation... Agent: Heller Ehrman LLP

20070170525 - Discrete stress isolator: A discrete stress isolation apparatus for a Micro Electro-Mechanical System (MEMS) inertial sensor device having a mechanism die and a package. A capacitive device mechanism is formed in a substrate layer positioned between the mechanism die and package substrate. A discrete stress isolation structure is formed in the same substrate... Agent: Honeywell International Inc.

20070170526 - Thin-film transistor and manufacturing method thereof: A method for forming a thin-film transistor on an insulating substrate includes the steps of: forming a non-single-crystal semiconductor thin film on the insulating substrate; forming a gate insulating film on the non-single-crystal semiconductor thin film; forming a gate electrode including a lower gate electrode and an upper gate electrode... Agent: Norman P. Soloway Hayes Soloway P.C.

20070170527 - Structure for reducing overlap capacitance in field effect transistors: A field effect transistor (FET) device includes a gate conductor formed over a semiconductor substrate, a source region having a source extension that overlaps and extends under the gate conductor, and a drain region having a drain extension that overlaps and extends under the gate conductor only at selected locations... Agent: Cantor Colburn LLP - IBM Fishkill

20070170529 - Wafer encapsulated microelectromechanical structure and method of manufacturing same: There are many inventions described and illustrated herein. In one aspect, the present inventions relate to devices, systems and/or methods of encapsulating and fabricating electromechanical structures or elements, for example, accelerometer, gyroscope or other transducer (for example, pressure sensor, strain sensor, tactile sensor, magnetic sensor and/or temperature sensor), filter or... Agent: Neil A. Steinberg

20070170530 - Wafer encapsulated microelectromechanical structure and method of manufacturing same: There are many inventions described and illustrated herein. In one aspect, the present inventions relate to devices, systems and/or methods of encapsulating and fabricating electromechanical structures or elements, for example, accelerometer, gyroscope or other transducer (for example, pressure sensor, strain sensor, tactile sensor, magnetic sensor and/or temperature sensor), filter or... Agent: Neil A. Steinberg

20070170531 - Wafer encapsulated microelectromechanical structure and method of manufacturing same: There are many inventions described and illustrated herein. In one aspect, the present inventions relate to devices, systems and/or methods of encapsulating and fabricating electromechanical structures or elements, for example, accelerometer, gyroscope or other transducer (for example, pressure sensor, strain sensor, tactile sensor, magnetic sensor and/or temperature sensor), filter or... Agent: Neil A. Steinberg

20070170532 - Wafer encapsulated microelectromechanical structure and method of manufacturing same: There are many inventions described and illustrated herein. In one aspect, the present inventions relate to devices, systems and/or methods of encapsulating and fabricating electromechanical structures or elements, for example, accelerometer, gyroscope or other transducer (for example, pressure sensor, strain sensor, tactile sensor, magnetic sensor and/or temperature sensor), filter or... Agent: Neil A. Steinberg

20070170528 - Wafer encapsulated microelectromechanical structure and method of manufacturing same: There are many inventions described and illustrated herein. In one aspect, the present inventions relate to devices, systems and/or methods of encapsulating and fabricating electromechanical structures or elements, for example, accelerometer, gyroscope or other transducer (for example, pressure sensor, strain sensor, tactile sensor, magnetic sensor and/or temperature sensor), filter or... Agent: Neil A. Steinberg

20070170533 - Arrangements for an intergrated sensor: An integrated circuit can have a first substrate supporting a magnetic field sensing element and a second substrate supporting another magnetic field sensing element. The first and second substrates can be arranged in a variety of configurations. Another integrated circuit can have a first magnetic field sensing element and second... Agent: Daly, Crowley, Mofford & Durkee, LLP

20070170534 - Optical sensing apparatus with a noise interference rejection function: An optical sensing apparatus with a signal interference rejection function is fabricated in a semiconductor chip by using a CMOS process. The optical sensing apparatus comprises an optical sensing element having a light-receiving side for receiving an optical signal from the light-receiving side and converting the optical signal into an... Agent: Birch Stewart Kolasch & Birch

20070170535 - Photovoltaic devices with silicon dioxide encapsulation layer and method to make same: A photovoltaic device and method of manufacture provides a P-N junction formed between doped semiconductor materials and adapted to produce photovoltaic current in response to radiant energy reaching the P-N junction, and a silicon dioxide protective window layer located in proximity to doped semiconductor material and adapted to allow radiant... Agent: Burns & Levinson, LLP

20070170536 - Liquid phase epitaxial goi photodiode with buried high resistivity germanium layer: A device and associated method are provided for fabricating a liquid phase epitaxial (LPE) Germanium-on-Insulator (GOI) photodiode with buried high resistivity Germanium (Ge) layer. The method provides a silicon (Si) substrate, and forms a bottom insulator overlying the Si substrate with a Si seed access area. Then, a Ge P-I-N... Agent: Sharp Laboratories Of America, Inc. C/o Law Office Of Gerald Maliszewski

20070170537 - Method and device for wavelength-sensitive photo-sensing: A semiconductor device includes a conducting channel (130) formed beneath a substrate surface with a pre-determined photo-conductivity spectral response. The channel is formed between two pn-junctions (126, 128) defining first and third photo-electric depletion regions at respective depths relative to the surface corresponding to penetration depths of light of different... Agent: Blakely Sokoloff Taylor & Zafman

20070170538 - Process for the fabricating an electronic integrated circuit and electronic integrated circuit thus obtained: An electronic integrated circuit is fabricated by forming on a substrate, of which a part is composed of absorbing material, a portion made of a sacrificial material. The sacrificial material includes cobalt, nickel, titanium, tantalum, tungsten, molybdenum, gallium, indium, silver, gold, iron and/or chromium. A rigid portion is then formed... Agent: Jenkens & Gilchrist, PC

20070170539 - Semiconductor device and method for manufacturing the same: The invention is directed to a method for manufacturing a field plate of a high voltage device. The field plate is located on a drift region of a substrate, wherein an isolation structure is located on the drift region. The method comprises steps of forming a first dielectric layer over... Agent: Jianq Chyun Intellectual Property Office

20070170540 - Silicon-rich silicon nitrides as etch stops in mems manufature: The fabrication of a MEMS device such as an interferometric modulator is improved by employing an etch stop layer between a sacrificial layer and a an electrode. The etch stop may reduce undesirable over-etching of the sacrificial layer and the electrode. The etch stop layer may also serve as a... Agent: Knobbe Martens Olson & Bear LLP

20070170541 - High-k dielectric for thermodynamically-stable substrate-type materials: Excellent capacitor-voltage characteristics with near-ideal hysteresis are realized in a capacitive-like structure that uses an electrode substrate-type material with a high-k dielectric layer having a thickness of a few-to-several Angstroms capacitance-based SiO2 equivalent (“TOx,Eq”). According to one particular example embodiment, a semiconductor device structure has an electrode substrate-type material having... Agent: Crawford Maunu PLLC

20070170542 - Method of filling a high aspect ratio trench isolation region and resulting structure: A method of filling a high aspect ratio trench isolation region, which allows for better gap-fill characteristics and avoids voids and seams in the isolation region. The method includes the steps of forming a trench, forming an oxide layer on the bottom and sidewalls of the trench, etching the oxide... Agent: Dickstein Shapiro LLP

20070170543 - Methods and semiconductor structures for latch-up suppression using a conductive region: Semiconductor structures and methods for suppressing latch-up in bulk CMOS devices. The semiconductor structure comprises first and second adjacent doped wells formed in the semiconductor material of a substrate. A trench, which includes a base and first sidewalls between the base and the top surface, is defined in the substrate... Agent: Wood, Herron & Evans, L.L.P. (ibm)

20070170544 - Semiconductor device with metal fuses: A trench dummy element isolating region is formed in the fuse region of a semiconductor substrate. In the semiconductor substrate, a plurality of dummy element regions is formed so as to be enclosed by the trench dummy element isolating region. The occupancy rate of the plurality of dummy element regions... Agent: Amin, Turocy & Calvin, LLP

20070170545 - Fuse region and method of fabricating the same: In one embodiment a fuse region includes an insulating layer disposed on a substrate, a fuse disposed on the insulating layer and including a fuse barrier pattern and a fuse conductive pattern, which are stacked, and a supporting plug disposed beneath the fuse, and penetrating the insulating layer and the... Agent: Marger Johnson & Mccollom, P.C.

20070170547 - Semiconductor device and method for fabricating the same: The semiconductor device includes a semiconductor substrate, a plate electrode, and a metal layer. The semiconductor substrate includes a capacitor region and a dummy region. The plate electrode is formed over the semiconductor substrate, wherein a dummy plug of the plate electrode is formed in the dummy region. The metal... Agent: Heller Ehrman LLP

20070170548 - Semiconductor device and method for fabricating the same: After a capacitor forming portion is formed on a semiconductor substrate by patterning an insulating film and a silicon film, a sidewall insulating film is formed on each of the side surfaces of the capacitor forming portion. Then, the insulating film is selectively removed such that the silicon film is... Agent: Mcdermott Will & Emery LLP

20070170546 - Back end thin film capacitor having both plates of thin film resistor material at single metallization layer: An integrated circuit back end capacitor structure includes a first dielectric layer on a substrate, a thin film bottom plate on the first dielectric layer, and a second dielectric layer on the first dielectric layer and the bottom plate, and a thin film top plate disposed on the second dielectric... Agent: Texas Instruments Incorporated

20070170549 - Semiconductor device having igbt and diode: A semiconductor device includes: a substrate having a first side and a second side; an IGBT; and a diode. The substrate includes a first layer, a second layer on the first layer, a first side N region on the second layer, second side N and P regions on the second... Agent: Posz Law Group, PLC

20070170550 - Semiconductor device and method for fabricating the same: A semiconductor device includes a substrate and a semiconductor layer formed on the substrate. The substrate has: a flat region provided in a main surface thereof; a first indentation region provided in a portion of the main surface different from the flat region and formed with first recesses; and a... Agent: Mcdermott Will & Emery LLP

20070170551 - Semiconductor devices with oxide coatings selectively positioned over exposed features including semiconductor material and solutions for forming the coatings: A semiconductor device structure includes a passivation layer through which only non-semiconductor material-comprising structures are exposed. The semiconductor device structure is formed by selectively forming the passivation layer on an exposed semiconductor material-comprising surface by exposing surfaces of the semiconductor device to a liquid phase solution supersaturated in an oxide... Agent: Trask Britt, P.C./ Micron Technology

20070170552 - Ultra thin tcs (sicl4) cell nitride for dram capacitor with dcs (sih2cl2) interface seeding layer: A method for forming silicon nitride films on semiconductor devices is provided. In one embodiment of the method, a silicon-comprising substrate is first exposed to a mixture of dichlorosilane (DCS) and a nitrogen-comprising gas to deposit a thin silicon nitride seeding layer on the surface, and then exposed to a... Agent: Whyte Hirschboeck Dudek S.c.

20070170553 - Methods and apparatuses for creating integrated circuit capacitance from gate array structures: Methods and apparatuses for using gate arrays to create capacitive structures within an integrated circuit are disclosed. Embodiments comprise a method of placing a gate array of P-type field effect transistors (P-fets) and N-type field effect transistors (N-fets) in an integrated circuit design, coupling drains and sources for one or... Agent: Ibm Coporation (rtp) C/o Schubert Osterrieder & Nickelson PLLC

20070170556 - Semiconductor device having flange structure: A semiconductor device may include a semiconductor element. A layer of material may be provided on the semiconductor element which may have an opening through which a bond pad may be exposed. At least one flange structure may be provided on the first bond pad, the at least one flange... Agent: Harness, Dickey & Pierce, P.L.C

20070170554 - Integrated circuit package system with multiple molding: An integrated circuit package system is provided forming a lead from a padless lead frame, and encapsulating the lead for supporting an integrated circuit die with a first molding compound for encapsulation with a second molding compound.... Agent: Ishimaru & Zahrt LLP

20070170555 - Padless die support integrated circuit package system: An integrated circuit package system is provided forming a die support system from a padless lead frame having die supports with each substantially equally spaced from another, and attaching an integrated circuit die having a peripheral area on the die supports.... Agent: Ishimaru & Zahrt LLP

20070170557 - Mold forming method and apparatus, and plastic lens manufacturing method and apparatus: A method of forming a mold, concludes: winding a tape around peripheral surfaces of a first molding die and a second molding die to assemble a mold; forming on the tape an injection port for injecting a resin material for forming a plastic lens into the mold; and forming a... Agent: Sughrue Mion, PLLC

20070170559 - Integrated circuit package system: An integrated circuit package system is provided forming a lead finger from a padless lead frame, forming a lead tip hole in the lead finger, mounting an integrated circuit die having a solder bump on the lead finger, and reflowing the solder bump on the lead tip hole of the... Agent: Ishimaru & Zahrt LLP

20070170560 - Apparatus and methods for packaging integrated circuit chips with antennas formed from package lead wires: Apparatus and methods are provided for integrally packaging semiconductor IC (integrated circuit) chips with antennas having one or more radiating elements and tuning elements that are formed from package lead wires that are appropriated shaped and arranged to form antenna structures for millimeter wave applications.... Agent: F. Chau & Associates, LLC

20070170558 - Stacked integrated circuit package system: A stacked integrated circuit package system is provided providing a lead frame having a die paddle, attaching a first integrated circuit on the die paddle of the lead frame, connecting first electrical interconnects between the first integrated circuit and the lead frame, encapsulating the first integrated circuit and the first... Agent: Ishimaru & Zahrt LLP

20070170563 - Light emitting module and process thereof: A light emitting module includes a metal substrate, a bearing base, at least one LED, a printed circuit board, and at least one conductive wire. A first perforation is formed on the metal substrate and the bearing base is embedded into the first perforation of the metal substrate. According to... Agent: Rabin & Berdo, PC

20070170565 - Rf module, multi rf module including the rf module, and method of manufacturing the rf module: A radio frequency (RF) module and a multi RF module including the same include a base substrate, a first element capable of processing RF signals formed on the base substrate, a second element capable of processing RF signals separated from and disposed over the first element, a cap substrate coupled... Agent: Sughrue Mion, PLLC

20070170562 - Semiconductor photodetector: A semiconductor photodetector which can obtain spectral sensitivity characteristics close to relative luminous characteristics compared to a conventional semiconductor photodetector is obtained at low cost. The semiconductor photodetector includes a semiconductor light receiving element having high spectral sensitivity in wavelengths in a range from approximately 400 nm to 1,100 nm... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070170564 - Chip card module: A smart card module including a substrate having an upper face and a lower face, contact arrays arranged on the substrate lower face, conductor structures, which have vias arranged in cutouts in the substrate, arranged on the substrate upper face and connected to the contact arrays, a chip having connecting... Agent: Dickstein Shapiro LLP

20070170561 - Leaded package integrated circuit stacking: The present invention provides an improvement on the use of flexible circuit connectors for electrically coupling IC devices to one another in a stacked configuration by use of the flexible circuit to provide the connection of the stacked IC module to other circuits. Use of the flexible circuit as the... Agent: Fish & Richardson P.C.

20070170566 - Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument: A semiconductor device includes: a semiconductor substrate in which an integrated circuit is formed; an interconnect layer which includes a linear section and a land section connected with the linear section; and an underlayer disposed under the interconnect layer, and the land section includes a first section which is in... Agent: Hogan & Hartson L.L.P.

20070170567 - Semiconductor memory card: A semiconductor memory card which inputs/outputs signals by connecting to an external device, has a circuit board on an upper surface of which board terminals connected to board wiring are formed, and on a lower surface of which input/output card terminals for inputting/outputting signals to/from the external device, a power... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070170568 - Packaging for an interferometric modulator: A package is made of a transparent substrate having an interferometric modulator and a back plate. A non-hermetic seal joins the back plate to the substrate to form a package, and a desiccant resides inside the package. A method of packaging an interferometric modulator includes providing a transparent substrate and... Agent: Knobbe Martens Olson & Bear LLP

20070170569 - In-line apparatus and method for manufacturing double-sided stacked multi-chip packages: Provided are in-line semiconductor chip packaging apparatuses that include a buffer assembly in which a reversing unit rotates a lead frame 180° between die attaching and/or wire bonding operations and methods of manufacturing an integrated circuit chip package using such an in-line integrated circuit chip packaging apparatus. Between packaging process... Agent: Harness, Dickey & Pierce, P.L.C

20070170574 - Buried via technology for three dimensional integrated circuits: A three dimensional integrated circuit and method for making the same. The three dimensional integrated circuit has a first and a second active circuit layers with a first metal layer and a second metal layer, respectively. The metal layers are connected by metal inside a buried via. The fabrication method... Agent: Snell & Wilmer LLP (oc)

20070170572 - Multichip stack structure: A multi-chip stack structure includes a chip carrier, a plurality of chips stacked stepwise on the chip carrier, and a passive component disposed on the chip carrier. The passive component is located under the stepwise chips that are cantilevered over it. Therefore, the passive component serves as a block element... Agent: Edwards Angell Palmer & Dodge LLP

20070170573 - Semiconductor device, interposer chip and manufacturing method of semiconductor device: In this semiconductor device, memory chips are stacked on the surface of a wiring substrate, a microcomputer chip and an interposer chip are arranged on the surface of the memory chip, and the pad of a microcomputer chip and the pad of an interposer chip arranged almost circularly are connected... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070170575 - Stack chip and stack chip package having the same: Provided are a stack chip and a stack chip package having the stack chip. Internal circuits of two semiconductor chips are electrically connected to each other through an input/output buffer connected to an external connection terminal. The semiconductor chip has chip pads, input/output buffers and internal circuits connected through circuit... Agent: Marger Johnson & Mccollom, P.C.

20070170570 - Integrated circuit package system including wide flange leadframe: An integrated circuit package system provides a known good die module by providing a leadframe, providing a first die, attaching the first die to the leadframe, and encapsulating at least the first die. A second die is attached to the known good die module such that the known good die... Agent: Ishimaru & Zahrt LLP

20070170571 - Low profile semiconductor system having a partial-cavity substrate: A system (100), which has an electrically insulating substrate (101) with a thickness, a first and a second surface. Electrically conductive paths (110) extend through the insulating body from the first to the second surface and have exit ports (120) at the end of the conductive paths on the first... Agent: Texas Instruments Incorporated

20070170576 - Wafer level stack structure for system-in-package and method thereof: A wafer level stack structure, including a first wafer including at least one first device chip of a first chip size, wherein each first device chip contains a first plurality of input/output (I/O) pads, a second wafer including at least one second device chip of a second chip size smaller... Agent: Harness, Dickey & Pierce, P.L.C

20070170577 - Semiconductor device with surface-mountable external contacts and method for manufacturing the same: A semiconductor device includes surface-mountable external contacts on an underside of the semiconductor device, wherein the external contacts are arranged on external contact pads and surrounded by a solder-resist layer. The external contacts of the outer edge regions include external contact pads that merge into inspection tags, wherein the inspection... Agent: Edell, Shapiro & Finnan, LLC

20070170578 - Semiconductor device, electronic apparatus comprising the same, and method for fabrication of substrate for semiconductor device used therein: A semiconductor device has upper electrodes and external terminals which are protruding above the both surfaces of a substrate for semiconductor device and connected to each other by penetrating electrodes, a first insulating film covering at least a metal pattern except for the portions of the first insulating film corresponding... Agent: Mcdermott Will & Emery LLP

20070170579 - Method of manufacturing semiconductor substrate, method of manufacturing semiconductor device, and semiconductor device: A method of manufacturing a semiconductor substrate includes: forming on a semiconductor base a first isolation layer for isolating an element region from another region; forming a first semiconductor layer on the semiconductor base; forming a second semiconductor layer on the first semiconductor layer, the second semiconductor layer having an... Agent: Advantedge Law Group, LLC

20070170580 - Cooling apparatus for memory module: A cooling apparatus for a circuit module having a substrate extending axially with an IC chip of a first type and IC chips of a second type mounted thereon, comprising: a first heat spreading element disposed to form a heat conduction path with the IC chip of the first type;... Agent: F. Chau & Associates, LLC

20070170581 - Silicon-diamond composite heat spreader and associated methods: Diamond heat spreaders are produced having thermal properties approaching that of pure diamond. Diamond particles of relatively large grain size are tightly packed to maximize diamond-to-diamond contact. Subsequently, smaller diamond particles can optionally be introduced into the interstitial voids to further increase the diamond content per volume. An interstitial material... Agent: Thorpe North & Western, LLP.

20070170582 - Component-containing module and method for producing the same: A component-containing module includes a module substrate having first wiring lines provided on the top surface of the module substrate, a first circuit component mounted on the first wiring lines of the module substrate, a submodule substrate having an area smaller than the area of the module substrate and mounted... Agent: Murata Manufacturing Company, Ltd. C/o Keating & Bennett, LLP

20070170583 - Multilayer integrated circuit for rf communication and method for assembly thereof: A low profile radio frequency (RF) module and package with efficient heat dissipation characteristics, and a method of assembly thereof, are provided. In some embodiments, the RF module package comprises a radio frequency integrated circuit (RFIC) attached to a recessed area of a lead frame. The RFIC has an active... Agent: Avago Technologies, Ltd. C/o Klaas, Law, O'meara & Malkin, P.C.

20070170585 - Composite integrated device and methods for forming thereof: A method for making a composite integrated device includes providing a first integrated device having a substrate, an overlying interconnect region, and a contact, wherein the contact electrically contacts the interconnect region and is at a surface of the first integrated device. The method further includes forming a sidewall spacer... Agent: Freescale Semiconductor, Inc. Law Department

20070170584 - Semiconductor interconnect having adjacent reservoir for bonding and method for formation: A semiconductor device and method has interconnects with adjoining reservoir openings. A dielectric layer is formed as part of an uppermost of the one or more interconnect layers. Openings formed in the dielectric layer result in modified portions of the dielectric layer along portions of sidewalls of the openings. The... Agent: Freescale Semiconductor, Inc. Law Department

20070170587 - Ball grid array: A ball grid array includes: a semiconductor chip having multiple pads; and an interposer for mounting the semiconductor chip on a first surface. The interposer includes multiple wirings on the first surface and multiple ball terminals on a second surface opposite to the first surface. Each wiring is connected to... Agent: Nixon & Vanderhye, PC

20070170586 - Printed circuit board for semiconductor package and method of manufacturing the same: Disclosed are a printed circuit board for a semiconductor package and a method of manufacturing the same. Specifically, a printed circuit board for a semiconductor package includes predetermined circuit patterns, having a wire bonding portion and a bump portion for mounting a semiconductor and a soldering portion for connection to... Agent: Staas & Halsey LLP

20070170588 - Connection structure and fabrication method for the same: A conductive layer is formed in or on a substrate. A first metal film is then formed on the substrate including the conductive layer. The substrate is then subjected to heat treatment to allow the first metal film to react with the conductive layer to thereby form a silicide film... Agent: Mcdermott Will & Emery LLP

20070170590 - Method of fabricating semiconductor device: A semiconductor device and a method of fabricating a semiconductor device that includes forming an interlayer insulating film on a semiconductor substrate; depositing a first soft magnetic thin film on the interlayer insulating film through sputtering using a target containing at least one of Fe, Co, Ni, or alloys thereof,... Agent: Lee & Morse, P.C.

20070170589 - Semiconductor integrated circuit: A semiconductor integrated circuit according to the present invention includes a cell array composed of elements, conductive lines with a pattern of a line & space arranged on the cell array, connecting lines formed upper than the conductive lines, and contact holes which connect the conductive lines to the connecting... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.</