Active solid-state devices (e.g., transistors, solid-state diodes) inventions 05/07

20070120103 - Switch circuit and method of switching radio frequency signals: An RF switch circuit and method for switching RF signals that may be fabricated using common integrated circuit materials such as silicon, particularly using insulating substrate technologies. The RF switch includes switching and shunting transistor groupings to alternatively couple RF input signals to a common RF node, each controlled by... Agent: Jaquez & Associates

20070120104 - Phase change material and non-volatile memory device using the same: The present invention provides a phase change memory cell comprising (GeASbBTeC)1−x(RaSbTeC)x solid solution, the solid solution being formed from a Ge—Sb—Te based alloy and a ternary metal alloy R—S—Te sharing same crystal structure as the Ge—Sb—Te based alloy. A nonvolatile phase change memory cell in accordance with the present invention... Agent: David A. Einhorn, Esq. Anderson Kill Olick, P.C.

20070120105 - Lateral phase change memory with spacer electrodes and method of manufacturing the same: A lateral phase change memory with spacer electrodes and method of manufacturing the same are provided. The memory is formed by connecting the conductive electrodes with lower resistivity and the spacer electrodes with higher resistivity, and filling the phase change material between the spacer electrodes. Therefore, the area that the... Agent: Rabin & Berdo, PC

20070120106 - Phase-change memory device and method of manufacturing same: A phase-change memory device has a phase-change layer, a heater electrode having an end held in contact with the phase-change layer, a contact plug of different kinds of material having a first electrically conductive material plug made of a first electrically conductive material and held in contact with the other... Agent: Sughrue Mion, PLLC

20070120107 - Phase-change memory device and method of manufacturing same: A phase-change memory device has a phase-change layer, a heater electrode having an end held in contact with the phase-change layer, a contact plug of different kinds of material having a first electrically conductive material plug made of a first electrically conductive material and held in contact with the other... Agent: Sughrue Mion, PLLC

20070120108 - Light emitting device: A light emitting device includes a laminate of a lower electrode layer, an organic light-emitting layer, and an upper transparent electrode layer. In the light emitting device, an auxiliary electrode layer is formed of colloidal nano-sized particles of a conductive metal between the lower electrode layer and the organic light-emitting... Agent: Brinks Hofer Gilson & Lione

20070120109 - Surface light-source device using light-emitting elements: A surface light-source device is composed of a light guide plate, luminescent panels and reflector sheets. The light guide plate is composed of three light guide units respectively formed in a rectangular plate-like shape having a rectangular light emission surface, a thick portion, a thin side portion, an incline rear... Agent: Sughrue Mion, PLLC

20070120110 - Thin-film transistors based on tunneling structures and applications: A hot electron transistor includes an emitter electrode, a base electrode, a collector electrode, and a first tunneling structure disposed and serving as a transport of electrons between the emitter and base electrodes. The first tunneling structure includes at least a first amorphous insulating layer and a different, second insulating... Agent: Pritzkau Patent Group

20070120120 - Aromatic enediyne derivatives, organic semiconductor thin films using the same and manufacturing methods thereof, and electronic devices incorporating such films: Disclosed are aromatic enediyne derivatives, methods of manufacturing organic semiconductor thin films from such aromatic enediyne derivatives, and methods of fabricating electronic devices incorporating such organic semiconductor thin films. Aromatic enediyne derivatives according to example embodiments provide improved chemical and/or electrical stability which may improve the reliability of the resulting... Agent: Harness, Dickey & Pierce, P.L.C

20070120114 - Composite material with conductive structures of random size, shape, orientation, or location: A composite material with at least one of a negative effective permittivity and a negative effective permeability for incident radiation of at least one wavelength is described. The composite material comprises conductive structures that are substantially random with respect to at least one of size, shape, orientation, and location.... Agent: Hewlett Packard Company

20070120121 - Compound for molecular electronic device having thiol anchoring group, method of synthesizing the compound, and molecular electronic device having molecular active layer obtained from the compound: In the formula, R1 and R2 are each a thioacetyl group or a hydrogen atom, at least one of R1 and R2 is a thioacetyl group, and m and n are each integers from 0 to 20. The molecular active layer, which is formed by self-assembling the compound on an... Agent: Mayer, Brown, Rowe & Maw LLP

20070120112 - Electrode for energy storage device and process for producing the same: R1 and R2 independently represent a hydrogen atom, a hydroxyl group, a C1-C10 alkyl group, a C1-C10 alkoxy group or the like, R3 and R4 independently represent a hydrogen atom, a halogen atom, a cyano group, a nitro group, an amino group, a C1-C10 alkyl group, a C1-C10 alkoxy group... Agent: Birch Stewart Kolasch & Birch

20070120119 - Light emitting device: A light emitting device includes a laminate of a lower electrode layer, an organic light-emitting layer, and an upper transparent electrode layer. In the light emitting device, an auxiliary electrode layer is formed of colloidal nano-sized particles of a conductive metal between the lower electrode layer and the organic light-emitting... Agent: Brinks Hofer Gilson & Lione

20070120118 - Light-emitting device and electronic apparatus: A light-emitting device includes a drive transistor for controlling the quantity of current supplied to a light-emitting element, a capacitor element electrically connected to a gate electrode of the drive transistor, and an electrical continuity portion for electrically connecting the drive transistor and the light-emitting element, these elements being disposed... Agent: Oliff & Berridge, PLC

20070120122 - Optical device: An optical device comprising an anode, a cathode, an organic semiconducting material between the anode and the cathode, and an electron transport layer between the cathode and the organic semiconducting material wherein the organic semiconducting material comprises sulfur and the electron transport layer containing barium.... Agent: Marshall, Gerstein & Borun LLP

20070120115 - Organic light-emitting element, method of manufacturing organic light-emitting element, light-emitting device, and electronic apparatus: An organic light-emitting element comprises: an anode;an organic light-emitting layer formed on one surface of the anode, an electron transportation layer formed on the organic light-emitting layer; and a cathode formed on a side being opposite to the organic light-emitting layer with respect to the electron transportation layer. A main... Agent: Oliff & Berridge, PLC

20070120116 - Organic semiconductor thin film transistor and method of fabricating the same: A substrate having a thin film transistor includes a buffer layer on a substrate, source and drain electrodes on the buffer layer, a portion of the buffer layer exposed between the source and drain electrodes, a small organic semiconductor layer on the source electrode and the drain electrode, the organic... Agent: Seyfarth Shaw, LLP

20070120111 - Organic thin film transistor: A thin film transistor comprising at least three terminals consisting of a gate electrode, a source electrode and a drain electrode; an insulating layer and an organic semiconductor layer on a substrate, which controls its electric current flowing between the source and the drain by applying a electric voltage across... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070120123 - Photodetector using nanoparticles: The present invention relates to a photodetector using nanoparticles, and more particularly, to a novel photodetector wherein surfaces of nanoparticles synthesized by a wet colloidal process are capped with organic materials which then serve as channels for electron migration, or nanoparticles, from which organic materials capped on the surfaces of... Agent: Buchanan, Ingersoll & Rooney PC

20070120117 - Semiconductor element and method of manufacturing the same: The present invention provides a semiconductor element having a semiconductor layer that has high carrier mobility and is easy to form. This semiconductor element includes a semiconductor layer made of TeI4, which has a clustering structure.... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070120113 - Supramolecular structures and method for forming the same: A primary supramolecular structure is described. The primary supramolecular structure has a shape of ring-like disk. The shape of ring-like disk has a diameter of about 10 nanometers to about 60 nanometers. The mentioned primary supramolecular structure is formed by self-assembly of amphiphilic conjugate molecules. Moreover, a secondary supramolecular structure... Agent: Rosenberg, Klein & Lee

20070120124 - Resistance-switching oxide thin film devices: Resistance-switching oxide films, and devices therewith, are disclosed. Resistance-switching oxide films, according to certain preferred aspects of the present invention, include at least about 75 atomic percent of an insulator oxide matrix having a conducting material dopant in an amount up to about 25 atomic percent. The matrix and dopant... Agent: Woodcock Washburn LLP

20070120125 - Semiconductor integrated circuit device and method of testing the same: Functional circuits such as a processor, an SRAM, a DRAM and a flash-EEPROM are mounted on a semiconductor chip. Of these functional circuits, for example, the flash-EEPROM which fluctuates a potential of the semiconductor chip is separated from the other circuits by means of a separating region provided in the... Agent: Hogan & Hartson L.L.P.

20070120126 - Organic light emitting display device and method for manufacturing the same: An organic light emitting display device and method for manufacturing the same is disclosed. The organic light emitting display device includes a driving circuit unit, a light emitting unit, and a common electric line. The driving circuit unit includes first and second thin film transistors arranged in a subpixel area... Agent: Knobbe Martens Olson & Bear LLP

20070120127 - Semiconductor device and semiconductor device production system: It is a problem to provide a semiconductor device production system using a laser crystallization method capable of preventing grain boundaries from forming in a TFT channel region and further preventing conspicuous lowering in TFT mobility due to grain boundaries, on-current decrease or off-current increase. An insulation film is formed... Agent: Eric Robinson

20070120128 - Semiconductor memory device: A semiconductor memory device includes a plurality of active regions, and a gate electrode in a fish bone shape arranged on each active region. In each active region, a plurality of source regions and a plurality of drain regions are arranged in a matrix manner. The source regions are commonly... Agent: Mcdermott Will & Emery LLP

20070120132 - Manufacturing method of light emitting device and manufacturing device thereof: The present invention provides a structure in which a pixel region 13 is surrounded by a first sealing material (having higher viscosity than a second sealing material) 16 including a spacer (filler, minute particles and/or the like) which maintains a gap between the two substrates, filled with a few drops... Agent: Eric Robinson

20070120129 - Rare earth doped layer or substrate for light conversion: A solid state light emitting device comprising an emitter structure having an active region of semiconductor material and a pair of oppositely doped layers of semiconductor material on opposite sides of the active region. The active region emits light at a predetermined wavelength in response to an electrical bias across... Agent: Koppel, Patrick & Heybl

20070120131 - Semiconductor device: In a photodetector where a circuit section, in which an interconnection is formed, is formed adjacent to a light receiving section, photo sensitivity within a light receiving surface is prevented from being nonuniform due to an interlayer insulating film at a periphery of the light receiving section being increased in... Agent: Oliff & Berridge, PLC

20070120130 - Thin-film device and method of manufacturing same: A thin-film device comprises: a substrate; a flattening film made of an insulating material and disposed on the substrate; and a capacitor provided on the flattening film. The capacitor incorporates: a lower conductor layer disposed on the flattening film; a dielectric film disposed on the lower conductor layer; and an... Agent: Oliff & Berridge, PLC

20070120133 - Semiconductor light emitting apparatus: Disclosed herein is a semiconductor light emitting apparatus that includes: a semiconductor light emitting device having a first semiconductor laminate structure including a light emitting region, and a light outgoing window permitting the light emitted from the light emitting region to go out therethrough in the lamination direction; a light... Agent: Robert J. Depke Lewis T. Steadman

20070120134 - Stem for optical element and optical semiconductor device using the same: A stem for an optical element includes a base-like portion located on a portion of a package side surface of an eyelet, higher than the package side surface. A block is located on a surface of the base-like portion of the eyelet. An optical element mounting surface of the block... Agent: Leydig Voit & Mayer, Ltd

20070120135 - Coated led with improved efficiency: An LED device including an LED chip and a lens positioned apart from the chip and coated with a uniform thickness layer of fluorescent phosphor for converting at least some of the radiation emitted by the chip into visible light. Positioning the phosphor layer away from the LED improves the... Agent: Fay Sharpe LLP

20070120136 - Light-emitting device and organic electroluminescence light-emitting device: In conventional organic EL light-emitting devices, the ITO used for a transparent electrode has a refractive index of about 2.0 larger than the refractive index of 1.5 of a transparent glass substrate. As a result, the mode of most of light traveling from the transparent electrode toward the glass substrate... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070120137 - Semiconductor-based lighting systems and lighting system components for automotive use: A modular semiconductor light source assembly includes a semiconductor light source, such as a light emitting diode, which is mounted on a substrate which supplies electricity to the light source and which assists in removing waste heat therefrom. Substantially all of the light emitted by the LED is transferred to... Agent: Warn, Hoffmann, Miller & Lalone, .p.c

20070120138 - Multi-layer light emitting device with integrated thermoelectric chip: A LED package having an LED chip and a thermoelectric device. The thermoelectric device a has a first side in thermal communication with the LED chip and a second side in thermal communication with a heat sink to create a thermal gradient between the LED chip and the heat sink.... Agent: Visteon

20070120140 - Semiconductor apparatus with thin semiconductor film: A semiconductor apparatus includes a substrate having at least one terminal, a thin semiconductor film including at least one semiconductor device, the thin semiconductor film being disposed and bonded on the substrate; and an individual interconnecting line formed as a thin conductive film extending from the semiconductor device in the... Agent: Rabin & Berdo, PC

20070120139 - Semiconductor light emitting device: A semiconductor light emitting device includes a mold resin having a cup shape portion on an upper surface of the mold resin. One or more holes penetrate through the cup shape portion to outside of the mold resin and/or one or more trenches extend from the cup-shaped portion to outside... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070120142 - Nitride semiconductor light-emitting device and method for manufacturing the same: There are provided a nitride semiconductor light-emitting device and a method for manufacturing the same. The nitride semiconductor light-emitting device includes a buffer layer on a sapphire substrate, wherein the buffer layer includes a plurality of layers having different lattice constants, a first n-type nitride semiconductor layer on the buffer... Agent: Birch Stewart Kolasch & Birch

20070120141 - Optical devices featuring textured semiconductor layers: A semiconductor sensor, solar cell or emitter, or a precursor therefor, has a substrate and one or more textured semiconductor layers deposited onto the substrate. The textured layers enhance light extraction or absorption. Texturing in the region of multiple quantum wells greatly enhances internal quantum efficiency if the semiconductor is... Agent: Weingarten, Schurgin, Gagnebin & Lebovici LLP

20070120143 - Organic light emitting diode display and method for manufacturing the same: In one embodiment, an organic light emitting diode (OLED) display is provided. The OLED display includes a substrate, a first signal line formed on the substrate, a second signal line intersecting the first signal line, a first thin film transistor connected to the first and second signal lines, a second... Agent: Macpherson Kwok Chen & Heid LLP

20070120144 - Semiconductor device having group iii nitride buffer layer and growth layers: An epitaxial growth system comprises a housing around an epitaxial growth chamber. A substrate support is located within the growth chamber. A gallium source introduces gallium into the growth chamber and directs the gallium towards the substrate. An activated nitrogen source introduces activated nitrogen into the growth chamber and directs... Agent: Weingarten, Schurgin, Gagnebin & Lebovici LLP

20070120145 - Gate turn-off thyristor: A mesa-type wide-gap semiconductor gate turn-off thyristor has a low gate withstand voltage and a large leakage current. Since the ionization rate of P-type impurities greatly increases at high temperatures when compared with that at room temperature, the hole implantation amount increases and the minority carrier lifetime becomes longer. Consequently,... Agent: Nixon & Vanderhye, PC

20070120146 - Differential input/output device including electro static discharge (esd) protection circuit: A differential input/output device including an electro static discharge protection circuit is provided. The differential input/output device includes a P-type differential pair. The P-type differential pair includes two P-type transistors. The gate of each P-type transistor is coupled to an N-type transistor to protect the P-type transistor when CDM ESD... Agent: Jianq Chyun Intellectual Property Office

20070120147 - Gallium nitride material transistors and methods associated with the same: Gallium nitride material transistors and methods associated with the same are provided. The transistors may be used in power applications by amplifying an input signal to produce an output signal having increased power. The transistors may be designed to transmit the majority of the output signal within a specific transmission... Agent: Wolf Greenfield & Sacks, P.C.

20070120148 - Hetero-junction bipolar transistor: A hetero-junction bipolar transistor includes a sub-collector layer formed on a substrate and having conductivity, a first collector layer formed on the sub-collector layer and a second collector layer formed on the first collector layer and having the same conductive type as a conductive type of the sub-collector layer. In... Agent: Mcdermott Will & Emery LLP

20070120149 - Package stiffener: Arrangements are used to supply power to a semiconductor package.... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070120151 - Non-volatile memory: A NVM including a substrate, a control gate layer, a charge storage layer, a tunneling layer, a charge barrier layer, a gate dielectric layer and a first doping region is described. The control gate layer is disposed in a first trench of the substrate; the charge storage layer is disposed... Agent: Jianq Chyun Intellectual Property Office

20070120150 - Semiconductor component arrangement and method for fabricating it: A semiconductor component arrangement is disclosed. In one embodiment, the semiconductor component arrangement includes a power transistor formed within a semiconductor layer in at least one first region and further semiconductor components formed at least in a second region, an effective thickness of the semiconductor layer being smaller in the... Agent: Dicke, Billig & Czaja, P.l.l.c.

20070120152 - Gate-in-panel type liquid crystal display device and method of fabricating the same: A liquid crystal display device comprises: a first substrate and a second substrate facing and spaced apart from each other, the first substrate and the second substrate including an active area, a signal input area and a pad area, the signal input area and the pad area being disposed at... Agent: Mckenna Long & Aldridge LLP

20070120153 - Rugged mesfet for power applications: A rugged MESFET for power applications includes a drain region surrounded by a ring shaped gate. The gate is surrounded, in turn by a source region. This eliminates the high-field point between gate and drain along the device's etched mesa surface and results in improved avalanche capability.... Agent: Advanced Analogic Technologies

20070120155 - Colors only process to reduce package yield loss: Disclosed is an ordered microelectronic fabrication sequence in which color filters are formed by conformal deposition directly onto a photodetector array of a CCD, CID, or CMOS imaging device to create a concave-up pixel surface, and, overlayed with a high transmittance planarizing film of specified index of refraction and physical... Agent: Duane Morris, LLPIPDepartment

20070120156 - Enhanced segmented channel mos transistor with multi layer regions: By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repeatably produced. Forming a corrugated substrate prior to actual device formation allows the ridges... Agent: Silcon Valley Patent Group LLP

20070120154 - Finfet structure with multiply stressed gate electrode: A semiconductor structure and its method of fabrication include a semiconductor fin located over a substrate. A gate electrode is located over the semiconductor fin. The gate electrode has a first stress in a first region located closer to the semiconductor fin and a second stress which is different than... Agent: Scully Scott Murphy & Presser, PC

20070120159 - Cmos image sensor having duble gate insulator therein and method for manufacturing the same: A method for manufacturing a CMOS image sensor includes: preparing a semiconductor substrate incorporating therein a p-type epitaxial layer by epitaxially growing up an upper portion of the semiconductor substrate; forming a pixel array in one predetermined location of the semiconductor substrate, the pixel array having a plurality of transistors... Agent: Blakely Sokoloff Taylor & Zafman

20070120158 - High dynamic range image sensor: A pixel cell with controlled leakage is formed by modifying the location and gate profile of a high dynamic range (HDR) transistor. The HDR transistor may have a dual purpose, acting as both a leaking transistor and either a transfer gate or a reset gate. Alternatively, the HDR transistor may... Agent: Dickstein Shapiro LLP

20070120157 - Organic light emitting display device: Disclosed is an organic light emitting display, which includes a large quantity of a hydroscopic layer having a good hydroscopic ability by changing a mounting structure of the hydroscopic layer. An organic light emitting display includes a first substrate. An organic emission portion is formed at one surface of the... Agent: Knobbe Martens Olson & Bear LLP

20070120161 - Method and structure to reduce optical crosstalk in a solid state imager: Methods and structures to reduce optical crosstalk in solid state imager arrays. Sections of pixel material layers that previously would have been etched away and disposed of as waste during fabrication are left as conserved sections. These conserved sections are used to amend the properties and performance of the imager... Agent: Dickstein Shapiro LLP

20070120160 - Semiconductor device having enhanced photo sensitivity and method for manufacture thereof: Provided are a semiconductor device and a method for its manufacture. In one example, the method includes forming an isolation structure having a first refraction index over a sensor embedded in a substrate. A first layer having a second refraction index that is different from the first refraction index is... Agent: Haynes And Boone, LLP

20070120163 - Complementary metal oxide semiconductor image sensor and method for fabricating the same: A CMOS image sensor and a method for fabricating the same is disclosed, to enhance the image-sensing efficiency by forming a concave lens area for improving the light-condensing efficiency in a planarization layer formed before a micro-lens array, in which the CMOS image sensor includes a plurality of photosensitive devices... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070120162 - Method and apparatus for blocking light to peripheral circuitry of an imager device: Methods and apparatuses are disclosed which provide imager devices having a light blocking material layer formed over peripheral circuitry outside a pixel cell array.... Agent: Dickstein Shapiro LLP

20070120164 - Film forming method and oxide thin film element: The invention provides a method of forming, on a substrate, a thin film of a perovskite type oxide in which at least either of a site A and a site B is constituted of plural elements and the plural elements in at least either site include elements different in valence... Agent: Fitzpatrick Cella Harper & Scinto

20070120167 - Large-area nanoenabled macroelectronic substrates and uses therefor: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor... Agent: Nanosys Inc.

20070120166 - Nonvolatile semiconductor memory device: A nonvolatile semiconductor memory device includes a semiconductor substrate. Active regions are formed on the surface of the substrate, separated from one another by element separating regions and extend in a first direction. A first word line and a second word line extend in a second direction crossing the first... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070120165 - Semiconductor device with ferroelectric capacitor and fabrication method thereof: A semiconductor device fabrication method includes the steps of forming a conductive plug in an insulating layer on a semiconductor substrate so as to be connected to an element on the substrate; forming a titanium aluminum nitride (TiAlN) oxygen barrier film over the conductive plug; forming a titanium (Ti) film... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070120168 - Metal semiconductor field effect transistors (mesfets) having channels of varying thicknesses and related methods: A unit cell of a metal-semiconductor field-effect transistor (MESFET) is provided. The unit cell includes a MESFET having a source, a drain and a gate. The gate is between the source and the drain and on a channel layer of the MESFET. The channel layer has a first thickness on... Agent: Elizabeth A. Stanek Myers Bigel Sibley & Sajovec, P.A.

20070120169 - Trench capacitor: A trench capacitor including a substrate, at least a group of capacitor units, an isolation structure and a conductive layer is described. The substrate includes a first trench and a second trench. The group of capacitor units is disposed in the substrate. The group of capacitor units includes a first... Agent: Jianq Chyun Intellectual Property Office

20070120170 - Vertical semiconductor device: A vertical semiconductor device comprises a semiconductor body, a first contact and a second contact, wherein a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type and a third semiconductor region of a second conductivity type are formed in the semiconductor body... Agent: Maginot, Moore & Beck Chase Tower

20070120175 - Eeprom: An EEPROM having a nonvolatile memory cell is provided. The nonvolatile memory cell has: a first well formed in a substrate; a floating gate formed on the substrate through a gate insulating film to overlap a first region of the first well; first and second diffusion layers formed in the... Agent: Mcginn Intellectual Property Law Group, PLLC

20070120172 - Logic compatible non-volatile memory cell: A non-volatile memory cell and a method of manufacturing the same are provided. The non-volatile memory cell includes a semiconductor substrate, a floating gate over the semiconductor substrate, a first, a second, and a third capacitor each having a first plate and sharing a common floating gate as a second... Agent: Slater & Matsil, L.L.P.

20070120173 - Non-volatile memory cell with high current output line: A memory cell having a low current memory device and a relatively high current output amplifier device, all built in the areawise footprint occupied by the memory device only. The low current memory device is a layered n-MOS or p-MOS lateral device having laterally spaced source and drain electrodes in... Agent: Schneck & Schneck

20070120171 - Nonvolatile memory cell with multiple floating gates and a connection region in the channel: A memory cell (110) has a plurality of floating gates (120L, 120R). The channel region (170) comprises a plurality of sub-regions (220L, 220R) adjacent to the respective floating gates, and a connection region (210) between the floating gates. The connection region has the same conductivity type as the source/drain regions... Agent: Macpherson Kwok Chen & Heid LLP

20070120174 - Sram devices based on resonant tunneling: The present invention discloses a resonant tunneling device. Further, the present invention discloses a memory storage device utilizing a resonant tunneling barrier. Moreover, the present invention teaches an SRAM circuit utilizing a resonant tunneling device. Additionally, the present invention teaches an NROM and NAND device utilizing a resonant tunneling barrier.... Agent: Perkins Coie LLP

20070120176 - Eeprom: An EEPROM having a nonvolatile memory cell is provided. The nonvolatile memory cell has: a first well formed in a substrate; a floating gate formed on the substrate through a gate insulating film to overlap a first region of the first well; and first and second diffusion layers formed in... Agent: Mcginn Intellectual Property Law Group, PLLC

20070120177 - Electrochemical cell structure and method of fabrication: A method of forming a metal oxide layer having metal oxide particles and a binder for an electrochemical cell, comprises: depositing a layer of metal oxide; and depositing a polymeric linking agent onto the layer of metal oxide. Additionally, a method of forming an electrochemical cell comprises forming a metal... Agent: Oliff & Berridge, PLC

20070120178 - Electrochemical cell structure and method of fabrication: A method of forming a metal oxide layer for an electrochemical cell is provided. The method includes: forming a plurality of adjacent metal oxide cells, spaced from one another; and performing localised heating of the plurality of adjacent metal oxide cells. A method of forming an electrochemical cell is also... Agent: Oliff & Berridge, PLC

20070120179 - Sonos type non-volatile memory devices having a laminate blocking insulation layer and methods of manufacturing the same: A SONOS type non-volatile memory device includes a substrate having source/drain regions doped with impurities and a channel region between the source/drain regions. A tunnel insulation layer including silicon oxide is formed on the channel region of the substrate. A charge-trapping insulation layer including silicon nitride is formed on the... Agent: Myers Bigel Sibley & Sajovec

20070120180 - Transition areas for dense memory arrays: A non-volatile memory chip has word lines spaced a sub-F (sub-minimum feature size F) width apart with extensions of the word lines in at least two transition areas. Neighboring extensions are spaced at least F apart. The present invention also includes a method for word-line patterning of a non-volatile memory... Agent: Eitan Law Group C/o Landonip, Inc.

20070120181 - Power igbt with increased robustness: A power IGBT includes a semiconductor body having an emitter zone of a first conduction type and a drift zone of a second conduction type proximate to the emitter zone. The IGBT further includes a cell array, each transistor cell of the array having a source zone, a body zone... Agent: Maginot, Moore & Beck Chase Tower

20070120183 - Integrated circuit devices having active regions with expanded effective widths: An integrated circuit device includes a substrate having a trench formed therein. An isolation layer is disposed in the trench so as to cover a first sidewall portion of the trench and an entire bottom of the trench without covering a second sidewall portion of the trench. A buffer layer... Agent: D. Scott Moore Myers Bigel Sibley & Sajovec, P.A.

20070120182 - Transistor having recess gate structure and method for fabricating the same: A transistor having a recess gate structure and a method for fabricating the same. The transistor includes a gate insulating layer formed on the inner walls of first trenches formed in a semiconductor substrate; a gate conductive layer formed on the gate insulating layer for partially filling the first trenches;... Agent: Marshall, Gerstein & Borun LLP

20070120184 - Enhanced resurf hvpmos device with stacked hetero-doping rim and gradual drift region: An HV PMOS device formed on a substrate having an HV well of a first polarity type formed in an epitaxial layer of a second polarity type includes a pair of field oxide regions on the substrate and at least partially over the HV well. Insulated gates are formed on... Agent: Hiscock & Barclay, LLP

20070120185 - Semiconductor device manufacturing method and semiconductor device: A method for manufacturing a semiconductor device includes forming an isolation region on a semiconductor substrate; forming an impurity diffusion layer in a region which includes an end of an active area adjacent to the isolation region; depositing a metal film on the semiconductor substrate; removing at least part of... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070120186 - Engineered barrier layer and gate gap for transistors with negative differential resistance: A negative differential resistance (NDR) transistor includes a gate stack formed from a gate, a barrier layer, and a dielectric layer formed between the gate and barrier layer. To enable the NDR characteristic of the transistor, the barrier layer is configured to dynamically transfer charge carriers to and from the... Agent: Bever, Hoffman & Harms, LLP

20070120189 - Crystalline semiconductor thin film, method of fabricating the same, semiconductor device, and method of fabricating the same: There is provided a technique to form a single crystal semiconductor thin film or a substantially single crystal semiconductor thin film. An amorphous semiconductor thin film is irradiated with ultraviolet light or infrared light, to obtain a crystalline semiconductor thin film (102). Then, the crystalline semiconductor thin film (102) is... Agent: Eric Robinson

20070120187 - Lateral soi semiconductor device: This invention is generally concerned with semiconductor-on-insulator devices, particularly for high voltage applications. A lateral semiconductor-on-insulator device is described, comprising: a semiconductor substrate; an insulating layer on said semiconductor substrate; and a lateral semiconductor device on said insulator; said lateral semiconductor device having: a first region of a first conductivity... Agent: Tarolli, Sundheim, Covell & Tummino L.L.P.

20070120188 - Light-emitting device and electronic apparatus: A light-emitting device includes a drive transistor that controls a current to be supplied to a light-emitting element from a power supply line, an electrical continuity portion that electrically connects the drive transistor with the light-emitting element, an initializing transistor that is turned ON to diode-connect the drive transistor, and... Agent: Oliff & Berridge, PLC

20070120190 - Electrostatic discharge (esd) protection structure and a circuit using the same: An electrostatic discharge (ESD) protection structure is disclosed. The ESD protection structure comprises an active device. The active device includes a plurality of drains. Each of the drains has a contact row and at least one body contact row. The at least one body contact row is located on the... Agent: Sawyer Law Group LLP

20070120191 - High trigger current electrostatic discharge protection device: An electrostatic discharge protection device with a high trigger current includes a semiconductor layer, a well region formed in the semiconductor layer, an anode region formed in the well region, a cathode region formed in the semiconductor layer, a bridging region bridging a junction between the semiconductor layer and the... Agent: Kinney & Lange, P.A.

20070120192 - Method and apparatus that provides differential connections with improved esd protection and routing: The present invention provides a single ESD device package that can be used to provide ESD protection to multiple high-speed lines, in particular multiple high-speed differential lines. The present invention has various aspects. Minute parasitic matching is achieved within a single package, and TMDS signal discontinuities are reduced by allowing... Agent: Pillsbury Winthrop Shaw Pittman LLP

20070120193 - Esd protection device: An ESD protection device includes: a semiconductor substrate of a first conductivity type having a first major surface and a second major surface; a signal input electrode formed on the first major surface of the semiconductor substrate; a base region of a second conductivity type formed on a surface region... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070120194 - Semiconductor device and a method of manufacturing the same: A technology is provided to reduce ON-resistance, and the prevention of punch through is achieved with respect to a trench gate type power MISFET. Input capacitance and a feedback capacitance are reduced by forming a groove in which a gate electrode is formed so as to have a depth as... Agent: Stanley P. Fisher Reed Smith LLP

20070120195 - Cmos circuits incorporating passive elements of low contact resistance, and methods of forming same: The present invention relates to complementary metal-oxide-semiconductor (CMOS) circuits, as well as methods for forming such CMOS circuits. More specifically, the present invention relates to CMOS circuits that contain passive elements, such as buried resistors, capacitors, diodes, inductors, attenuators, power dividers, and antennas, etc., which are characterized by an end... Agent: Scully Scott Murphy & Presser, PC

20070120197 - Method and structure for enhancing both nmosfet and pmosfet performance wth a stressed film: A structure and method for making includes adjacent PMOSFET and nMOSFET devices in which the gate stacks are each overlain by a stressing layer that provides compressive stress in the channel of the PMOSFET device and tensile stress in the channel of the nMOSFET device. One of the PMOSFET or... Agent: International Business Machines Corporation Dept. 18g

20070120196 - Prevention of latch-up among p-type semiconductor devices: This invention discloses a semiconductor device with latch-up prevention mechanisms. According to one embodiment, it comprises a first N-type region, wherein one or more P-type metal-oxide-semiconductor (PMOS) devices are disposed therein, a second N-type region adjacent to the first N-type region, wherein one or more PMOS devices are also disposed... Agent: L. Howard Chen, Esq. Kirkpatrick & Lockhart Preston Gates Ellis LLP

20070120198 - Latch-up prevention in semiconductor circuits: This invention discloses a semiconductor device with latch-up prevention mechanisms. According to one embodiment, it comprises a first N-type region, wherein one or more P-type metal-oxide-semiconductor (PMOS) devices are disposed therein, a second N-type region adjacent to the first N-type region, wherein one or more PMOS devices are also disposed... Agent: L. Howard Chen, Esq. Kirkpatrick & Lockhart Preston Gates Ellis LLP

20070120199 - Low resistivity compound refractory metal silicides with high temperature stability: Compound refractory metal suicides are formulated to exhibit low resistivity and high temperature stability. Embodiments include various types of semiconductor devices comprising source/drain regions with a compound refractory metal silicide layer thereon, having a resistivity of 1 ohm.μ to 10 ohm.μ and stable at temperatures up to 1100° C.... Agent: Mcdermott Will & Emery LLP

20070120200 - Mos transistor having double gate and manufacturing method thereof: There are provided a MOS transistor having a double gate and a manufacturing method thereof. The MOS transistor includes a substrate on which an insulating layer is formed, a first gate embedded in the insulating layer, in which the top surface of the first gate is exposed, a first gate... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070120201 - Semiconductor device having super junction mos transistor and method for manufacturing the same: A semiconductor device having a super junction MOS transistor includes: a semiconductor substrate; a first semiconductor layer on the substrate; a second semiconductor layer on the first semiconductor layer; a channel forming region on a first surface portion of the second semiconductor layer; a source region on a first surface... Agent: Posz Law Group, PLC

20070120202 - Semiconductor integrated circuit device and method of testing the same: Functional circuits such as a processor, an SRAM, a DRAM and a flash-EEPROM are mounted on a semiconductor chip. Of these functional circuits, for example, the flash-EEPROM which fluctuates a potential of the semiconductor chip is separated from the other circuits by means of a separating region provided in the... Agent: Hogan & Hartson L.L.P.

20070120203 - Semiconductor device and method for manufacturing the semiconductor devices: A semiconductor device includes a semiconductor substrate on which a source region and a drain region are formed, an insulating film formed on the semiconductor substrate and interposed between the source region and the drain region, a gate electrode formed on the insulating film, metal-bearing particles formed on the interface... Agent: Mcdermott Will & Emery LLP

20070120204 - Semiconductor device and manufacturing method thereof: A semiconductor device includes a semiconductor substrate containing silicon, a p-type semiconductor active region formed on the semiconductor substrate, a first gate insulating film containing at least one of Zr and Hf and formed on the p-type semiconductor active region, a first gate electrode formed on the first gate insulating... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070120205 - Physical quantity sensor having multiple through holes: A semiconductor physical quantity sensor includes: a substrate; a semiconductor layer supported on the substrate; a trench disposed in the semiconductor layer; and a movable portion disposed in the semiconductor layer and separated from the substrate by the trench. The movable portion includes a plurality of through-holes, each of which... Agent: Posz Law Group, PLC

20070120206 - Semiconductor optical device having current-confined structure: Provided is a semiconductor optical device having a current-confined structure. The device includes a first semiconductor layer of a first conductivity type which is formed on a semiconductor substrate and includes one or more material layers, a second semiconductor layer which is formed on the first semiconductor layer and includes... Agent: Blakely Sokoloff Taylor & Zafman

20070120207 - Torsion spring for mems structure: A torsion spring for a micro-electro-mechanical system (MEMS) structure is provided. The torsion spring is connected between a pivoting member and a fixed member and supports the pivoting member so that the pivoting member can pivot about the torsion spring. The torsion spring includes: a horizontal beam; at least one... Agent: Sughrue Mion, PLLC

20070120208 - Wide bandgap semiconductor based field effect transistors: A field effect transistor includes a wide bandgap semiconductor substrate including a source region, a drain region, and an intermediate region situated between the source region and the drain region. The intermediate region forms a gate channel of the field effect transistor upon application of a stimulus to the intermediate... Agent: General Electric Company Global Research

20070120211 - Magnetic elements with spin engineered insertion layers and mram devices using the magnetic elements: A method and system for providing a magnetic element are described. The method and system include providing a single pinned layer, a free layer, and a spacer layer between the pinned and free layers. The spacer layer is nonmagnetic. The magnetic element is configured to allow the free layer to... Agent: Sawyer Law Group LLP

20070120209 - Magnetic field shaping conductor: The present invention provides an integrated circuit arrangement having at least one electrical conductor (40) which, when a current flows through it, produces a magnetic field which acts on at least a further part of the circuit arrangement. The electrical conductor (40) has a first side oriented towards the at... Agent: Philips Intellectual Property & Standards

20070120210 - Spacer structure in mram cell and method of its fabrication: Methods are presented for fabricating an MTJ element having a precisely controlled spacing between its free layer and a bit line and, in addition, having a protective spacer layer formed abutting the lateral sides of the MTJ element to eliminate leakage currents between MTJ layers and the bit line. Each... Agent: George O. Saile

20070120212 - Microelectronic imagers with shaped image sensors and methods for manufacturing microelectronic imagers: Microelectronic imagers with shaped image sensors and methods for manufacturing curved image sensors. In one embodiment, a microelectronic imager device comprises an imaging die having a substrate, a curved microelectronic image sensor having a face with a convex and/or concave portion at one side of the substrate, and integrated circuitry... Agent: Dickstein Shapiro LLP

20070120213 - Wire under dam package and method for packaging image-sensor: An wire under dam package and method for packaging image-sensor. The image-sensor package includes: a substrate having a first surface and a second surface, a sensing chip being laid on the first surface, the sensing chip having multiple soldering pads; multiple inner electric contacts arranged on the first surface, the... Agent: Rosenberg, Klein & Lee

20070120214 - Method and structure to reduce optical crosstalk in a solid state imager: Methods and structures to reduce optical crosstalk in solid state imager arrays. Sections of pixel material layers that previously would have been etched away and disposed of as waste during fabrication are left as conserved sections. These conserved sections are used to amend the properties and performance of the imager... Agent: Dickstein Shapiro LLP

20070120215 - Power semiconductor device using silicon substrate as field stop layer and method of manufacturing the same: Provided are a power semiconductor device using a silicon substrate as a FS layer and a method of manufacturing the same. A semiconductor substrate of a first conductivity type is prepared. An epitaxial layer is grown on one surface of the semiconductor substrate. Here, the epitaxial layer is doped at... Agent: Hiscock & Barclay, LLP

20070120216 - Low cost bonding pad and method of fabricating same: A structure and a method of forming the structure. The structure including: an integrated circuit chip having a set of wiring levels from a first wiring level to a last wiring level, each wiring level including one or more damascene, dual-damascene wires or damascene vias embedded in corresponding interlevel dielectric... Agent: Schmeiser, Olsen & Watts

20070120217 - Circuit arrangement for buck converters and method for producing a power semiconductor component: A circuit arrangement for buck converters has a multiplicity of half bridges (10, 11). Each half bridge (10, 11) contains a first chip (HS1, HS2, HS3, HS4) and a second chip (LS1, LS2, LS3, LS4) , the first chip (HS1, HS2, HS3, HS4) and the second chip (LS1, LS2, LS3,... Agent: Baker Botts, L.L.P.

20070120218 - Cmos compatible shallow-trench efuse structure and method: A semiconductor structure including at least one e-fuse embedded within a trench that is located in a semiconductor substrate (bulk or semiconductor-on-insulator) is provided. In accordance with the present invention, the e-fuse is in electrical contact with a dopant region that is located within the semiconductor substrate. The present invention... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20070120219 - Conductive layer, manufacturing method of the same, and signal transmission substrate: There is provided a method of manufacturing a conductive layer of in a signal transmission substrate. The method includes sewing conductive thread in sheet-like material having an insulating property so as to form one of a plurality of low resistance regions using the conductive thread in a high resistance region... Agent: Greenblum & Bernstein, P.L.C

20070120221 - Electronically programmable antifuse and circuits made therewith: An antifuse device (120) that includes a bias element (124) and an programmable antifuse element (128) arranged in series with one another so as to form a voltage divider having an output node (F) located between the bias and antifuse elements. When the antifuse device is in its unprogrammed state,... Agent: Downs Rachlin Martin PLLC

20070120220 - Methods of compensating for an alignment error during fabrication of structures on semiconductor substrates: In the methods of compensating for an alignment error during fabrication of structures on semiconductor substrates, a conductive pattern structure is formed at a first position on a first semiconductor substrate. The conductive pattern structure includes a grid of first and second conductive patterns arranged as columns and intersecting rows... Agent: Myers Bigel Sibley & Sajovec

20070120222 - Method for manufacturing semiconductor silicon substrate and apparatus for manufacturing the same: This invention provides a method for manufacturing a semiconductor silicon substrate by use of carbon dioxide in a supercritical state, which method is capable of making the semiconductor silicon substrate highly reliable one. Specifically, this invention provides a method for manufacturing a semiconductor silicon substrate including at least two of:... Agent: Mcdermott Will & Emery LLP

20070120223 - Circuit and method for suppression of electromagnetic coupling and switching noise in multilayer printed circuit boards: Apparatus for suppressing noise and electromagnetic coupling in the printed circuit board of an electronic device includes an upper conductive plate and an array of conductive coplanar patches positioned a distance t2 from the upper conductive plate. The distance t2 is chosen to optimize capacitance between the conductive coplanar patches... Agent: Brinks Hofer Gilson & Lione

20070120224 - Passivation structure with voltage equalizing loops: A semiconductor device which includes a passivation structure formed with a conductive strip of resistive material that crosses itself once around the active region of the device to form a first closed loop, a continuous strip that loops around the first closed loop without crossing itself which crosses itself a... Agent: Ostrolenk, Faber, Gerb & Soffen, LLP

20070120225 - Packaging having an array of embedded capacitors for power delivery and decoupling in the mid-frequency range and methods of forming thereof: One embodiment of the present invention provides a device for providing a low noise power supply package to an IC in the mid-frequency range of 1 MHz to 3 GHz comprising installing in said package an array of embedded discrete ceramic capacitors, and optionally planar capacitor layers. A further embodiment... Agent: E I Du Pont De Nemours And Company Legal Patent Records Center

20070120226 - Avalanche photodiode: An avalanche photodiode has improved low-noise characteristics, high-speed response characteristics, and sensitivity. The avalanche photodiode includes a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, a semiconductor multiplication layer interposed between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, and a semiconductor... Agent: Leydig Voit & Mayer, Ltd

20070120227 - Heating device of the light irradiation type: To devise a heating device of the light irradiation type in which costs can reduced by reducing the number of filament lamps and current source parts without adversely affecting the illuminance distribution with respect to a wafer, in a heating device of the light irradiation type that has a light... Agent: Roberts, Mlotkowski & Hobbes

20070120228 - Semiconductor wafer and manufacturing method therefor: A plurality of IC regions are formed on a semiconductor wafer, which is cut into individual chips incorporating ICs, wherein wiring layers and insulating layers are sequentially formed on a silicon substrate. In order to reduce height differences between ICs and scribing lines, a planar insulating layer is formed to... Agent: Dickstein Shapiro LLP

20070120229 - Wet etched insulator and electronic circuit component: The present invention relates to an insulator as an insulating layer in a laminate which can inhibit dusting at the time of use, more particularly an electronic circuit component to which the insulator has been applied, particularly a wireless suspension. The insulator comprises a laminate of one or more insulation... Agent: Oliff & Berridge, PLC

20070120230 - Layer structure, method of forming the layer structure, method of manufacturing a capacitor using the same and method of manufacturing a semiconductor device using the same: In a layer structure, a method of forming the layer structure, a method of manufacturing a capacitor having the layer structure and a method of manufacturing a semiconductor device having the capacitor, a structure may be formed on a substrate. A first insulation layer including at least one kind of... Agent: Harness, Dickey & Pierce, P.L.C

20070120231 - Transmission cable and method for manufacturing the same: A transmission cable and method for manufacturing same are provided. A plurality of signal lines are formed on one side of an insulating layer and ground lines are formed between the signal lines. The ground lines are electrically connected with a shield layer formed on a back surface of the... Agent: Bell, Boyd & Lloyd, LLP

20070120232 - Laser fuse structures for high power applications: The present invention relates to a laser fuse structure for high power applications. Specifically, the laser fuse structure of the present invention comprises first and second conductive supporting elements (12a, 12b), at least one conductive fusible link (14), first and second connection elements (20a, 20b), and first and second metal... Agent: Scully, Scott, Murphy & Presser, P.C.

20070120233 - Leadframes for improved moisture reliability and enhanced solderability of semiconductor devices: A semiconductor device has a leadframe with a structure made of a base metal (105), wherein the structure consists of a chip mount pad (302) and a plurality of lead segments (303). Covering the base metal are, consecutively, a continuous nickel layer (201) on the base metal, a layer of... Agent: Texas Instruments Incorporated

20070120234 - Side view light emitting diode package: A side view LED package for a backlight unit includes a package body having a cavity with an inclined inner sidewall, first and second lead frames arranged in the package body, the cavity of the package body exposing a portion of at least one of the first and second lead... Agent: Mcdermott Will & Emery LLP

20070120235 - Wiring board and method for manufacturing the same, and semiconductor device: A wiring board according to the present invention includes: an insulating base 22; a plurality of first conductor wirings 23a aligned in an inner region on the insulating base; bumps 24 formed on the respective first conductor wirings; and a protective film 25a that is formed on the insulating base... Agent: Hamre, Schumann, Mueller & Larson P.C.

20070120236 - Semiconductor device: To minimize distance from a power supply or ground line of a semiconductor integrated circuit of a semiconductor device to electrodes of a printed board, a power supply electrode or ground line of the semiconductor integrated circuit is connected to a metal film through openings provided in a protective film... Agent: Sughrue Mion, PLLC

20070120237 - Semiconductor integrated circuit: To provide a test technology capable of reducing a package size by reducing a number of terminals (pins) in a semiconductor integrated circuit of SIP or the like constituted by mounting a plurality of semiconductor chips to a single package, in SIP 102 constituted by mounting a plurality of semiconductor... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070120238 - Semiconductor/printed circuit board assembly, and computer system: A method of forming a computer system and a printed circuit board assembly, are provided comprising first and second semiconductor dies and an intermediate substrate. The intermediate substrate is positioned between the first active surface of the first semiconductor die and the second active surface of the second semiconductor die... Agent: Dinsmore & Shohl LLP

20070120239 - Method and apparatus for full-chip thermal analysis of semiconductor chip designs: A method and apparatus for full-chip thermal analysis of semiconductor chip designs is provided. One embodiment of a novel method for performing thermal analysis of a semiconductor chip design comprises receiving at least one input relating to a semiconductor chip design to be analyzed. The input is then processed to... Agent: Moser, Patterson & Sheridan, LLP

20070120240 - Circuit substrate and method of manufacture: An aspect of the present invention comprises a method of producing a circuit substrate comprising providing a substrate, coating the substrate with a conductive layer, patterning the conductive layer to form at least two circuits joined by a buss-line and forming a slot in the substrate beneath the buss-line. Another... Agent: 3m Innovative Properties Company

20070120243 - Assembly jig and manufacturing method of multilayer semiconductor device: There are provided a base member 14, a position restriction mechanism 15, a height restriction mechanism 17, an evenness holding mechanism, and an alignment mechanism 20, 22. A plurality of semiconductor modules is serially layered on the base member. Each semiconductor module comprises a semiconductor chip 7 mounted on a... Agent: Robert J. Depke Lewis T. Steadman

20070120241 - Pin-type chip tooling: An apparatus for use with multiple chips having multiple posts as to engage at least a portion of a surface of one of the multiple chips, a frame configured to releasably constrain each of the posts so that, when unconstrained, each individual post can contact an individual chip and, when... Agent: Morgan & Finnegan, L.L.P.

20070120242 - Semiconductor device and method of fabricating the same: A semiconductor device and a method of fabricating the same are disclosed. The semiconductor device includes a lower wire, an interlayer insulating film formed on the lower wire and having a via hole exposing the upper surface of the lower wire, a diffusion barrier formed on the inner wall of... Agent: Mills & Onello LLP

20070120245 - Semiconductor device: Mutual inductance from an external output signal system to an external input signal system, in which parallel input/output operation is enabled, is reduced. A semiconductor integrated circuit has a plurality of external connection terminals facing a package substrate, and has an external input terminal and an external output terminal, in... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070120244 - Semiconductor device having electrostatic breakdown protection element: A semiconductor device (1) comprises a semiconductor substrate (2) on which an integrated circuit (3, 4) is formed, a first ground terminal (7) and a second ground terminal (8) for electrically connecting the integrated circuit (3, 4) to an external ground electrode, and an electrostatic breakdown protection element (5) for... Agent: Ratnerprestia

20070120246 - Interposer and stacked chip package: An interposer may include a base substrate supporting an array of conductive lands. The conductive land may have an identical shape and size. The conductive lands may be provided at regular intervals on the base substrate. The conductive land pitch may be determined such that adjacent conductive lands may be... Agent: Harness, Dickey & Pierce, P.L.C

20070120247 - Semiconductor packages having leadframe-based connection arrays: Methods of forming a semiconductor assembly are described which include a leadframe with leads having offset portions exposed at an outer surface of a material package to form a grid array. An electrically conductive compound, such as solder, may be disposed or formed on the exposed lead portions to form... Agent: Trask Britt, P.C./ Micron Technology

20070120248 - Semiconductor device: There is disclosed a semiconductor device comprising at least two substrates, at least one wiring being provided in each of the substrates, the substrates being stacked such that major surfaces on one side of each thereof oppose each other and the wirings being connected between the major surfaces, and a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070120249 - Circuit substrate and manufacturing method thereof: A circuit substrate includes a plurality of dielectric members and a plurality of wiring patterns. The plurality of wiring patterns are stacked on one another through the plurality of dielectric members. The plurality of dielectric members includes a mount dielectric member. A first wiring pattern of the plurality of wiring... Agent: Posz Law Group, PLC

20070120250 - Thermal conductive electronics substrate and assembly: An electronics assembly is provided including a circuit board substrate having a top surface and a bottom surface and a plurality of thermal conductive vias extending from the top surface to the bottom surface. At least one electronics package is mounted to the top surface of the substrate. A heat... Agent: Delphi Technologies, Inc.

20070120252 - Nano-wire electronic device: An electronic device such as a sensor or a NEMS. The electronic device comprises at least one substrate; a plurality of electrodes disposed on the substrate; and at least one nano-wire growing from an edge of a first electrode to an edge of a second electrode. A method for making... Agent: General Electric Company (pcpi) C/o Fletcher Yoder

20070120251 - Semiconductor wafer, semiconductor device and method of manufacturing the same, circuit board, and electronic equipment: A semiconductor wafer includes a redistribution layer which is electrically connected with a pad which is an end portion of an interconnect, a first resin layer which is formed over the redistribution layer, a second resin layer which is formed over the first resin layer and covers the side surface... Agent: Oliff & Berridge, PLC

20070120253 - Core substrate and multilayer printed circuit board using paste bumps and manufacturing method thereof: A core substrate and multilayer printed circuit board using paste bumps and manufacturing method thereof are disclosed. With the method of manufacturing a core substrate using paste bumps comprising: (a) aligning a pair of paste bump boards, each of which has a plurality of paste bumps joined to its surface,... Agent: Staas & Halsey LLP

20070120254 - Semiconductor device comprising a pn-heterojunction: An electric device is disclosed comprising a pn-heterojunction (4) formed by a nanowire (3) of 111-V semiconductor material and a semiconductor body (1) comprising a group IV semiconductor material. The nanowire (3) is positioned in direct contact with the surface (2) of the semiconductor body (1) and has a first... Agent: Philips Electronics North America Corporation Intellectual Property & Standards

20070120255 - Semiconductor chip having island dispersion structure and method for manufacturing the same: The present invention has an object to provide a semiconductor chip of high reliability with less risk of breakage. Specifically, the present invention provides a semiconductor chip having a semiconductor silicon substrate including a semiconductor device layer and a porous silicon domain layer, the semiconductor device layer being provided in... Agent: Mcdermott Will & Emery LLP

20070120259 - Detection of residual liner materials after polishing in damascene process: A method and structure for the detection of residual liner materials after polishing in a damascene processes includes an integrated circuit comprising a substrate; a dielectric layer over the substrate; a marker layer over the dielectric layer; a liner over the marker layer and dielectric layer; and a metal layer... Agent: Frederick W. Gibb, Iii Gibb & Rahman, LLC

20070120261 - Power and ground shield mesh to remove both capacitive and inductive signal coupling effects of routing in integrated circuit device: A power and ground shield mesh to remove both capacitive and inductive signal coupling effects of routing in integrated circuit device. An embodiment describes the routing of a shield mesh of both power and ground lines to remove noise created by capacitive and inductive coupling. Relatively long signal lines are... Agent: Blakely Sokoloff Taylor & Zafman

20070120256 - Reinforced interconnection structures: Reinforced interconnection structures are provided. A reinforced interconnection structure comprises a first conductive layer formed in a first dielectric layer. A second conductive layer is formed in a second dielectric layer which overlies the first dielectric layer. A third conductive layer formed in a third dielectric layer which overlies the... Agent: Birch, Stewart, Kolasch & Birch, LLP

20070120258 - Semiconductor device: The present invention has for its purpose to provide a technique capable of reducing planar dimension of the semiconductor device. An input/output circuit is formed over the semiconductor substrate, a grounding wiring and a power supply wiring pass over the input/output circuit, and a conductive layer for a bonding pad... Agent: Miles & Stockbridge PC

20070120260 - Semiconductor integrated circuit wiring design method and semiconductor integrated circuit: The facility of operation in a manufacturing process and the reliability of the finished product can be improved by making a design based on two basic wiring pattern layers in which wiring traces are formed with regularity, and a basic via array layer inserted between the two basic wiring pattern... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070120257 - Semiconductor integrated circuit with improved power supply system: Cells are formed on a substrate. First and second cell power wiring lines extend in a first direction on the substrate. First and second intermediate layer power wiring lines are formed on the first and second cell power lines. First upper layer power wiring lines are formed on the first... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070120262 - Semiconductor device and method for manufacturing the same: Embodiments relate to a semiconductor device and a method for manufacturing the same. Embodiments may include forming a lower porous oxide layer on a semiconductor substrate having a conductive layer, forming a pyrolytic polymer layer on the lower porous oxide layer, forming an upper porous oxide layer on the pyrolytic... Agent: Sherr & Nourse, PLLC

20070120263 - Conductor track arrangement and associated production method: A conductor track arrangement includes a substrate, at least two conductor tracks, a cavity and a resist layer that covers the conductor tracks and closes off the cavity. By forming carrier tracks with a width less than a width of the conductor tracks, air gaps can also be formed laterally... Agent: Brinks Hofer Gilson & Lione

20070120264 - A semiconductor having a copper-based metallization stack with a last aluminum metal line layer: By replacing, in an otherwise copper-based metallization stack, copper with aluminum in the very last metal line layer, the respective terminal metal layer of conventional semiconductor devices may be omitted. Consequently, an enormous gain in production cost savings may be achieved, since a plurality of process steps may be omitted,... Agent: Williams, Morgan & Amerson

20070120265 - Semiconductor device and its manufacturing method: A semiconductor device comprises at least one first electrode 11b provided on the front surface of a semiconductor chip and electrically connected to at least one of electrodes that constitute a transistor, a second electrode 9 provided on the back surface of the semiconductor chip and electrically connected to one... Agent: Harness, Dickey & Pierce, P.L.C

20070120266 - Chip resistor: Format data is subjected to the last memory function for each of one or more external inputs, and when the same input is re-selected in the next time or the power is turned on again, the data already subjected to the last memory function is output as an image with... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20070120267 - Multi chip module: The present invention provides a multi chip module which realizes high functions or high performances thereof. A multi chip module is constituted by stacking a first semiconductor chip on which a digital signal processing circuit is mounted, a second semiconductor chip which constitutes a dynamic random access memory, a third... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070120270 - Flip chip hermetic seal using pre-formed material: A flip chip architecture providing a hermetic seal. A flip chip die is assembled so as to be in contact with a package substrate. A pre-form of seal material is placed such that it surrounds the flip chip die and is in contact with the package substrate. The pre-form material... Agent: Smith, Gambrell & Russell

20070120269 - Flip chip package and manufacturing method of the same: A flip chip package including a chip structure, a substrate and an under-fill is provided. The chip structure includes a base, a number of pads, a first passivation layer, a second passivation layer and a number of bumps. The pads are formed on the base. The first passivation layer is... Agent: Birch Stewart Kolasch & Birch

20070120268 - Intermediate connection for flip chip in packages: An electronic component includes a substrate having contacts and a chip having contacts and a passivation layer disposed on an active side of the chip. The active side of the chip is mounted on a first surface of the substrate by flip chip technology such that the contacts of the... Agent: Slater & Matsil LLP

20070120271 - Dicing and die bonding adhesive tape: A dicing and die bonding tape, comprising a substrate 1, a pressure sensitive adhesive layer (A) 2 superimposed on the substrate 1, a substrate 3 superimposed on the pressure sensitive adhesive layer (A) 2, a pressure sensitive adhesive layer (B) 4 superimposed on the substrate 3, and an adhesive layer... Agent: Birch Stewart Kolasch & Birch

20070120272 - Electronic component and manufacturing method of the electronic component: In an electronic component in which a semiconductor device such as a light emitting diode is encapsulated by an encapsulation resin and a manufacturing method of the same, formation of flash on occasion of filling a resin is prevented. The semiconductor device (SIC) is mounted in a reception concavity of... Agent: Greenblum & Bernstein, P.L.C

20070120273 - Method for disposing a conductor structure on a substrate, and substrate comprising said conductor structure: A separable connection is created between at least one transfer support and the conductor structure. The transfer support including the conductor structure and the substrate are joined together such that a connection that is stronger than the separable connection between the transfer support and the conductor structure is created between... Agent: Staas & Halsey LLP

20070114508 - Reversible resistivity-switching metal oxide or nitride layer with added metal: A layer of resistivity-switching metal oxide or nitride can attain at least two stable resistivity states. Such a layer may be used in a state-change element in a nonvolatile memory cell, storing its data state, for example a “0” or a “1”, in this resistivity state. Including additional metal atoms... Agent: Patent Dept., Sandisk 3d LLC(matrix)

20070114509 - Memory cell comprising nickel-cobalt oxide switching element: Oxides of both nickel and cobalt have lower resistivity than either nickel oxide or cobalt oxide. Nickel oxide and cobalt oxide can be reversibly switched between two or more stable resistivity states by application of suitable electrical pulses. It is expected that oxides including both nickel and cobalt, or (NixCoy)O,... Agent: Patent Dept., Sandisk 3d LLC(matrix)

20070114510 - Electrically rewritable non-volatile memory element: A non-volatile semiconductor memory device includes a plurality of lower electrodes arranged in a matrix manner, a plurality of recording layer patterns, each being arranged on the lower electrode, that contain a phase change material, and an interlayer insulation film that is provided between the lower electrode and the recording... Agent: Mcdermott Will & Emery LLP

20070114514 - Light emitting device: A light emitting device includes: a light emitting element; and a substantially rectangular package body in which the light emitting element is contained and a concave portion is formed. The concave portion has a bottom surface on which the light emitting element is disposed, and is filled with a transparent... Agent: Morrison & Foerster LLP

20070114512 - Light emitting element and light emitting device using the same: An object of the prevent invention is to provide a light emitting element having slight increase in driving voltage with accumulation of light emitting time. Another object of the invention is to provide a light emitting element having slight increase in resistance value with increase in film thickness. A light... Agent: Eric Robinson

20070114511 - Lll-nitride compound semiconductor light emiting device: The present invention relates to a HI-nitride semiconductor light-emitting device having high external quantum efficiency, provides a HI-nitride compound semiconductor light-emitting device including an active layer generating light by recombination of electrons and holes and containing gallium and nitrogen, an n-type Al(x)ln(y)Ga(1-x-y)N layer epitaxially grown before the active layer is... Agent: Blackwell Sanders Peper Martin LLP

20070114515 - Nitride semiconductor device having a silver-base alloy electrode: An LED is disclosed which comprises a nitride-made main semiconductor region formed on a substrate for generating light, and an electrode formed on the main semiconductor region to a thickness sufficiently small to transmit the light from the main semiconductor region. The electrode is made from a silver-base alloy, rather... Agent: Woodcock Washburn LLP

20070114513 - Semiconductor laser and method for manufacturing semiconductor laser: A back-surface-electrode type semiconductor laser of GaN-based compound has low electric resistance and high light emitting efficiency, and includes negative electrodes made of Al having a contact surface that contacts with the n-type GaN substrate. The back-surface-electrode type semiconductor laser has GaN-based compound layers laminated on an n-type GaN substrate... Agent: Rohm Co., Ltd. C/o Keating & Bennett, LLP

20070114516 - Dielectric media including surface-treated metal oxide particles: Briefly, the present invention provides an electronic device, typically a transistor or a capacitor, comprising at least one electrically conductive electrode and, adjacent to the electrode, a dielectric layer; wherein the dielectric layer comprises a polymeric matrix and, dispersed in the polymeric matrix, metal oxide particles; wherein the metal oxide... Agent: 3m Innovative Properties Company

20070114525 - Display device and manufacturing method: Embodiments of a display device comprises an insulating substrate; a source electrode and a drain electrode on the insulating substrate and separated from one another to define a channel region; a wall having one or more openings to expose the channel region, at least a portion of the source electrode,... Agent: Macpherson Kwok Chen & Heid LLP

20070114524 - Display device and manufacturing method thereof: According to an embodiment of the present invention, a manufacturing method of a display device includes forming a plurality of gate wires comprising a gate electrode on an insulating substrate, forming an electrode layer comprising a source electrode and a drain electrode spaced apart from each