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Active solid-state devices (e.g., transistors, solid-state diodes) April patents by class relation 04/07

20070090336 - Semiconductor memory: In a semiconductor memory comprising a matrix of memory cells each composed of one transistor and one chalcogenide layer as a memory element, no chalcogenide layer is disposed at a joint between an upper electrode wire connected to the chalcogenide layer and another wiring layer.... Agent: Sughrue Mion, PLLC

20070090337 - Infrared sensor ic, and infrared sensor and manufacturing method thereof: An infrared sensor IC and an infrared sensor, which are extremely small and are not easily affected by electromagnetic noise and thermal fluctuation, and a manufacturing method thereof are provided. A compound semiconductor that has a small device resistance and a large electron mobility is used for a sensor (2),... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070090338 - Light-emitting device and light-emitting device array using a whispering gallery mode, and method for manufacturing same: A light-emitting device is capable of oscillating in a convex-whispering gallery mode. The lighting-emitting device includes a PIN-type semiconductor including a p-type distributed Bragg reflector, an active region and an n-type distributed Bragg reflector formed on a substrate by an epitaxial growth, wherein the PIN-type semiconductor having a hole with... Agent: Bacon & Thomas, PLLC

20070090339 - Nitride semiconductor light emitting device: A nitride semiconductor light emitting device has high internal quantum efficiency but low operating voltage. The nitride semiconductor light emitting device includes an n-nitride semiconductor layer; an active layer of multi-quantum well structure formed on the n-nitride semiconductor layer, and having a plurality of quantum well layers and a plurality... Agent: Mcdermott Will & Emery LLP

20070090340 - Organic light emitting display, method of fabricating the same, and mobile display including the organic light emitting display: An organic light emitting display and a method of fabricating the same are disclosed. The organic light emitting display may include a transistor on a substrate, a lower electrode on the substrate, the lower electrode being electrically connected to the transistor, an organic light emitting layer on the lower electrode,... Agent: Lee & Morse, P.C.

20070090341 - Group i-vii semiconductor single crystal thin film and process for producing same: A CaF2 buffer layer (3) is formed on a CaF2 (111) substrate (2) by an MBE method. Furthermore, a CuCl thin film is grown on the CaF2 buffer layer (3) by the MBE method while irradiating it with an electron beam to form an electro beam irradiation film (1a). Subsequently,... Agent: Nixon & Vanderhye, PC

20070090342 - Method for fabrication of high temperature superconductors: A layered article of manufacture and a method of manufacturing same is disclosed. A substrate has a biaxially textured MgO crystalline layer having the c-axes thereof inclined with respect to the plane of the substrate deposited thereon. A layer of one or more of YSZ or Y2O3 and then a... Agent: Harry M. Levy Olson & Hierl, Ltd.

20070090347 - Data driver, display device using the same, and method of driving the same: A data driver and a method of driving the same. The data driver includes a shift register for generating sampling signals; sampling latches for sampling digital data applied to output channels, respectively, in accordance with the sampling signals; holding latch units for receiving the sampled digital data of the channels... Agent: Christie, Parker & Hale, LLP

20070090350 - Display device and method for manufacturing the same: The present invention discloses a display device having a substrate, an organic material layer arranged on the substrate, a pixel electrode arranged on one surface of the organic material layer, a common electrode arranged on another surface of the organic material layer, and a light penetration layer through which light... Agent: H.c. Park & Associates, PLC

20070090348 - Electronic juction devices featuring redox electrodes: The electronic properties of molecular junctions of the general type carbon/molecule/TiO2/Au as examples of “molecular heterojunctions” consisting of a molecular monolayer and a semiconducting oxide. Junctions containing fluorene bonded to pyrolyzed photoresist film (PPF) were compared to those containing Al2O3 instead of fluorene, and those with only the TiO2 layer.... Agent: Standley Law Group LLP

20070090353 - Indene derivatives and organic light emitting diode using the same: The present invention provides an indene derivatives having a new structure and an organic light-emitting diode using the same. The organic light-emitting diode according to the present invention shows improved effects in efficiency, driving voltage and stability.... Agent: Mckenna Long & Aldridge LLP Song K. Jung

20070090344 - Multi-stable molecular device: In accordance with the present invention, a molecular device is provided that can act as a finite state machine, such as a logic device or a memory device. The molecular device includes operating molecules having two or more rotors. Each rotor has an electric dipole moment and multiple discrete rotor... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070090345 - Organic light emitting diode display: An organic light emitting diode (OLED) display panel is provided. The OLED display panel includes a substrate, a conductive layer, an active matrix pixel array and several thin film transistors (TFTs). The conductive layer having several openings is disposed above the substrate. The active matrix pixel array having several pixels... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070090351 - Organic thin film transistor and flat panel display device having the same: An organic thin film transistor that can control the threshold voltage and reduce leakage current includes: a gate electrode; an organic semiconductor layer insulated from the gate electrode; a source electrode and a drain electrode insulated from the gate electrode and electrically connected to the organic semiconductor layer; a gate... Agent: Stein, Mcewen & Bui, LLP

20070090349 - Organic thin film transistor, flat panel display apparatus comprising the same, and method of manufacturing the organic thin film transistor: An organic thin film transistor that can reduce contact resistance between source and drain electrodes and an organic semiconductor layer and can be readily manufactured, a flat panel display apparatus utilizing the organic thin film transistor, and a method of manufacturing the organic thin film transistor. The organic thin film... Agent: Stein, Mcewen & Bui, LLP

20070090346 - Porous chalcogenide thin film, method for preparing the same and electronic device using the same: A porous chalcogenide thin film having a microporous structure, a method for preparing the chalcogenide thin film and an electronic device employing the chalcogenide thin film, are provided. The porous chalcogenide thin film has superior crystallinity and can be applied as a semiconductor layer having superior electrical properties to the... Agent: Cantor Colburn, LLP

20070090343 - System and method for processing an organic memory cell: A system and method are disclosed for processing an organic memory cell. An exemplary system can employ an enclosed processing chamber, a passive layer formation component operative to form a passive layer on a first electrode, and an organic semiconductor layer formation component operative to form an organic semiconductor layer... Agent: Amin, Turocy & Calvin, LLP

20070090352 - Thin film transistor and flat panel display including the same: A thin film transistor includes: a gate electrode; source and drain electrodes insulated from the gate electrode; an organic semiconductor layer that is insulated from the gate electrode and is electrically connected to the source and drain electrodes; an insulating layer that insulates the gate electrode from the source and... Agent: Stein, Mcewen & Bui, LLP

20070090354 - Chalcogenide-based electrokinetic memory element and method of forming the same: Memory elements including a first electrode and a second electrode. A chalcogenide material layer is between the first and second electrodes and a tin-chalcogenide layer is between the chalcogenide material layer and the second electrode. A selenide layer is between the tin-chalcogenide layer and the chalcogenide material layer. Optionally, a... Agent: Dickstein Shapiro LLP

20070090356 - Semiconductor device: A semiconductor device includes a semiconductor substrate having electrodes, a resin layer provided on the surface of the semiconductor substrate on which the electrodes are formed and having concave portions formed on a second surface on the other side of a first surface facing the semiconductor substrate, test pads electrically... Agent: Harness, Dickey & Pierce, P.L.C

20070090355 - Single separable electrode and self-contained pad viability tester: A single separable electrode that includes a plurality of separable electrically connected electrode sections.... Agent: Philips Intellectual Property & Standards

20070090357 - Thin film transistor, pixel structure and repairing method thereof: A pixel structure including a scan line, a gate pattern, a first dielectric layer, a channel layer, a source, a drain, a data line, a second dielectric layer and a pixel electrode is provided. The gate pattern is electrically connected with the scan line and has an opening therein. The... Agent: Jianq Chyun Intellectual Property Office

20070090360 - Blanket implant diode: Blanket implant diode which can be used for transient voltage suppression having a P+ substrate implanted with an N-type dopant blanket implant near a top surface of the substrate, creating a P− region. An oxide mask is layered adjacent to and above the P− region. The oxide mask is partially... Agent: Mckee, Voorhees & Sease, P.L.C

20070090358 - Light-emitting device and method for manufacturing the same: Especially in case that a light-emitting element composed of layers containing organic compounds or inorganic compounds is driven by a thin film transistor (TFT), a structure having at least two transistors installed with a drive TFT is required to prevent irregularities of ON current of a switching TFT provided to... Agent: Nixon Peabody, LLP

20070090359 - Organic light-emitting diode: An organic light-emitting diode comprising a substrate having a first opposing surface and a second opposing surface; a first electrode layer overlying the first opposing surface; a light-emitting element overlying the first electrode layer, the light-emitting element comprising a hole-transport layer and an emissive/electron-transport layer, wherein the hole-transport layer and... Agent: Dow Corning Corporation Co1232

20070090361 - Thin film transistor substrate and liquid crystal display panel: The present invention relates to a thin film transistor substrate and a liquid crystal display panel for use in a liquid crystal display apparatus, and aims to provide a thin film transistor substrate and a liquid crystal display panel with good display quality. The thin film transistor substrate has a... Agent: Birch Stewart Kolasch & Birch

20070090362 - Thin film transistor, method of manufacturing the same and flat panel display having the thin film transistor: A thin film transistor includes: a gate electrode; source and drain electrodes insulated from the gate electrode; an organic semiconductor layer that is insulated from the gate electrode and electrically connected to the source and drain electrodes; an insulating layer that insulates the gate electrode from the source and drain... Agent: Stein, Mcewen & Bui, LLP

20070090363 - Dram including a vertical surround gate transistor: DRAM memory cells having a feature size of less than about 4F2 include vertical surround gate transistors that are configured to reduce any short channel effect on the reduced size memory cells. In addition, the memory cells may advantageously include reduced resistance word line contacts and reduced resistance bit line... Agent: Knobbe Martens Olson & Bear LLP

20070090365 - Field-effect transistor including transparent oxide and light-shielding member, and display utilizing the transistor: A field-effect transistor includes a substrate, a source electrode, a drain electrode, a gate electrode, a gate-insulating film, and an active layer. The active layer contains an oxide having a transmittance of 70% or more in the wavelength range of 400 to 800 nm. A light-shielding member is provided as... Agent: Fitzpatrick Cella Harper & Scinto

20070090364 - Method of manufacturing an image tft array for an indirect x-ray sensor and structure thereof: The present invention discloses a method of manufacturing an image TFT array and a structure thereof. A substrate is provided. At least one first line, a lower electrode, a pad electrode, a common electrode and a first electrode connected with the first line are defined simultaneously by etching a first... Agent: North America Intellectual Property Corporation

20070090368 - Method of manufacturing electro-optical device, electro-optical device, transferred chip, transfer origin substrate, and electronic apparatus: The invention enhances a production yield of a display device (an electro-optical device). The invention provides a method of manufacturing an electro-optical device including a display region in which a plurality of basic pixels are arranged, each basic pixel including a plurality of color pixels. The method includes: forming on... Agent: Oliff & Berridge, PLC

20070090366 - Tft array substrate and photo-masking method for fabricating same: An exemplary method for fabricating a thin film transistor (TFT) array substrate (200) includes: forming a transparent conductive layer (202) and a gate metal layer (203) on an insulating substrate (201); forming a photo-resist layer (231) on the gate metal layer; exposing the photo-resist layer using a photo-mask with a... Agent: Wei Te Chung Foxconn International, Inc.

20070090367 - Thin film transistor array panel and manufacturing method thereof: A TFT array panel includes: first and second gate members connected to each other; a gate insulating layer formed on the first and the second gate members; first and second semiconductor members formed on the gate insulating layer opposite the first and the second gate members, respectively; first and second... Agent: Frank Chau, Esq. F. Chau & Associates, LLP

20070090369 - Method for manufacturing p-type group iii nitride semiconductor, and group iii nitride semiconductor light-emitting device: The inventive method for manufacturing a p-type group III nitride semiconductor comprises: (a) growing a group III nitride semiconductor containing a p-type dopant at 1000° C. or higher in an atmosphere containing H2 gas and/or NH3 gas; and (b) after the growth of the group III nitride semiconductor, substituting the... Agent: Sughrue Mion, PLLC

20070090370 - Silicon carbide semiconductor device and manufacturing method therefor: With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given... Agent: Nixon & Vanderhye, PC

20070090373 - Iii-nitride device with improved layout geometry: A III-nitride power device for controlling high currents as an interdigitated electrode pattern for increasing device rating while decreasing device dimensions. Fingers of the interdigitated electrode pattern have tips with smaller dimensions than the remainder of the fingers. The tapered finger design balances current flow in the electrode fingers to... Agent: Ostrolenk, Faber, Gerb & Soffen, LLP

20070090372 - Light emitting diode: A light emitting diode including a substrate, a semiconductor stacking layer, a first electrode and a second electrode is provided. The semiconductor stacking layer including an n-type doped semiconductor layer, a p-type doped semiconductor layer and an active layer is disposed on the substrate. The n-type doped semiconductor layer has... Agent: J C Patents, Inc.

20070090371 - Photoactive component with organic layers: The invention relates to a photoactive component, especially a solar cell, comprising organic layers and formed by at least one stacked pi, ni, and/or pin diode. The diodes are characterised in that they comprise at least one p-doped or n-doped transport layer having a larger optical band gap than that... Agent: Heslin Rothenberg Farley & Mesiti PC

20070090374 - Flat lamp panel: A flat lamp panel includes a top substrate and a bottom substrate. The bottom substrate includes at least an electrode pair, a dielectric layer, and a first phosphor layer covering the up surface of the bottom substrate. The top substrate is disposed above the bottom substrate in a parallel manner.... Agent: North America Intellectual Property Corporation

20070090375 - Multichip on-board led illumination device: An LED-based illumination device can use an array of four LEDs to produce high intensity light over a broad color spectrum and a broad range of color temperature. A high quality white light can be produced by using two green LEDs with a single red and a single blue LED.... Agent: Stallman & Pollock LLP

20070090377 - Light emitting device and method of forming the same: A light emitting device includes a substrate and an adhesive layer on the substrate. At least two multi-layer epitaxial structures are on the substrate. Each structure sequentially includes an upper cladding layer, an active layer, a lower cladding layer, an ohmic contact epitaxial layer, and a first ohmic contact electrode... Agent: Snell & Wilmer L.L.P. (main)

20070090376 - Light-emitting element and light-emitting device: It is an object of the present invention to provide a light-emitting element having, between a pair of electrodes, a layer containing a light-emitting material and a transparent conductive film, wherein the electric erosion of the transparent conductive film and reflective metal can be prevented and to provide a light-emitting... Agent: Cook, Alex, Mcfarron, Manzo, Cummings & Mehler Ltd

20070090378 - Nitride-based semiconductor light emitting diode: A nitride-based semiconductor LED which is flip-chip bonded on a lead pattern of a sub-mount through a bump ball comprises a substrate; a light-emitting structure formed on the substrate; an electrode formed on the light-emitting structure; a protective film formed on the resulting structure having the electrode formed therein, the... Agent: Mcdermott Will & Emery LLP

20070090380 - Image sensor structure with a connector: An image sensor structure with a connector includes a substrate having an upper surface, which is formed with a central region and first electrodes arranged at the periphery of central region, and a lower surface is formed with second electrodes corresponding to electrically connect the first electrodes. A frame layer... Agent: Pro-techtor International Services

20070090383 - Light emitting device: The light emitting device has a light emitting diode which is made of a nitride semiconductor and a phosphor which absorbs a part of lights emitted from the light emitting diode and emits different lights with wavelengths other than those of the absorbed lights. The phosphor is made of alkaline... Agent: Mcginn Intellectual Property Law Group, PLLC

20070090379 - Light emitting device with adjustable reflector cup: A light emitting device has a light emitting diode (LED), a reflector cup, and one or more adjustment mechanisms to control the intensity profile of light emitted from the light emitting device. The reflector cup has a base and a sidewall extending outward from the base. A base adjustment mechanism... Agent: Avago Technologies, Ltd.

20070090382 - Light emitting diode package: A light emitting diode package is provided. A package body has a mounting part surrounded by side walls and lead electrodes on a bottom surface of the mounting part. A light emitting diode chip is mounted on the bottom surface of the mounting part and electrically connected to the lead... Agent: Mcdermott Will & Emery LLP

20070090381 - Semiconductor light emitting device: A semiconductor light emitting device comprises: a semiconductor light emitting element that emits first wavelength light; a first fluorescent material that absorbs the first wavelength light and emits second wavelength light having a longer wavelength than the first wavelength light; and a second fluorescent material that absorbs the first wavelength... Agent: Banner & Witcoff, Ltd. Attorneys For Client No. 000449, 001701

20070090386 - Air cooled high-efficiency light emitting diode spotlight or floodlight: The present invention replaces a standard size halogen tungsten lamp spotlight or floodlight with a much cooler LED lamp that also fits into existing housings. However, the LED's still need to be cooled. The Present Invention mounts up to three LED's into a special reflector with a plurality of specially... Agent: Stanley H. Kremen

20070090384 - Nitride based semiconductor device having multiple layer buffer structure and fabrication method thereof: A multiple layered buffer structure for nitride based semiconductor device is provided herein. The buffer structure contains a first layer of AlxInyGa1-x-yN grown under a high temperature, and a second layer of an un-doped or appropriately doped GaN based material grown under a low temperature The GaN based material of... Agent: Lin & Associates Intellectual Property

20070090385 - Semiconductor device: The present invention provides a semiconductor device in which a power line is not affected by noise due to a voltage drop caused by instantaneous high-current consumption in the buffer portion and that has no possibility that a logic portion malfunctions. In a case where the same potential is supplied... Agent: Fish & Richardson P.C.

20070090387 - Solid state light sheet and encapsulated bare die semiconductor circuits: An electronically active sheet includes a bottom substrate having a bottom electrically conductive surface. A top substrate having a top electrically conductive surface is disposed facing the bottom electrically conductive surface. An electrical insulator separates the bottom electrically conductive surface from the top electrically conductive surface. At least one bare... Agent: Michaud-duffy Group LLP

20070090389 - Cob-typed led package with phosphor: A light emitting diode (LED) package unit, comprising a substrate having a concave, a LED chip, at least two electrodes, at least two wires, a gel and a first wavelength-converting material. The LED chip, disposed in the concave, comprising a top-face, a bottom-face for jointing with the substrate, and at... Agent: Bruce H. Troxell Suite 1404

20070090388 - Light emitting diode and fabricating method thereof: A light emitting diode including a substrate, a semiconductor layer, multiple electrodes, a passivation layer, multiple under bump metallurgy (UBM) layers and a reflective layer is provided. The semiconductor layer is disposed on the substrate. The electrodes and the passivation layer are disposed on the semiconductor layer. The passivation layer... Agent: J.c. Patents, Inc.

20070090390 - Light emitting diode chip: A LED chip including a substrate, a first type doped semiconductor layer, a second type doped semiconductor layer, a light emitting layer, at least an Indium-doped AlxGa1-xN based material layer (0≦x<1) and at least a tunneling junction layer is provided. The first type doped semiconductor layer is disposed on the... Agent: Jianq Chyun Intellectual Property Office

20070090391 - Light-emitting element having at least one light-emitting chip crystal: A light-emitting element, in particular a light-emitting diode, having at least one light-emitting chip crystal, in particular a semiconductor crystal, is described. At least free surfaces of the light-emitting chip crystal are covered with an inert material—liquid fluid—which is in direct contact with the light-emitting chip crystal.... Agent: Factor & Lake, Ltd

20070090392 - Low capacitance scr with trigger element: A silicon rectifier semiconductor device with selectable trigger and holding voltages includes a trigger element. A first well region of a first conductivity type formed within a semiconductor body. A first region of the first conductivity type is formed within the first well region. A second region of a second... Agent: Texas Instruments Incorporated

20070090393 - Gain cells and methods of making and using the same: In a first aspect, a first apparatus is provided. The first apparatus is a memory cell of a substrate that includes (1) a PFET with an orientation approximately planar to a surface of the substrate; and (2) an NFET coupled to the approximately planar PFET. An orientation of the NFET... Agent: Ibm Corporation Intellectual Property Law Dept. 917

20070090394 - Deep diffused thin photodiodes: This invention comprises photodiodes, optionally organized in the form of an array, including p+ deep diffused regions or p+ and n+ deep diffused regions. More specifically, the invention permits one to fabricate thin 4 inch and 6 inch wafer using the physical support provided by a n+ deep diffused layer... Agent: Patentmetrix

20070090395 - Semiconductor device and method for fabricating the same: A MIS transistor includes a gate electrode portion, insulating sidewalls formed on side surfaces of the gate electrode portion, source/drain regions and a stress film formed so as to cover the gate electrode portion and the source/drain regions. A height of an upper surface of the gate electrode portion is... Agent: Mcdermott Will & Emery LLP

20070090396 - Semiconductor substrate of gaas and semiconductor device: A semiconductor substrate (1) of GaAs with a semiconductor layer sequence (2) applied on top. The semiconductor layer sequence (2) contains a plurality of semiconductor layers (3, 4, 5, 6, 7) of Al1−yGayAs1−xPx with 0≦x≦1 and 0≦y≦1, the phosphorus component x in a number of the semiconductor layers respectively being... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20070090397 - Semiconductor photo-detecting element: In a semiconductor photo-detecting element (an avalanche photodiode), a high-sensitivity element is obtained by incorporating a multiplication layer having high-performance multiplication characteristics. By using a structure which reduces an electric field applied to an etching stopper layer, it is possible to use a multiplication layer having higher-performance multiplication characteristics (a... Agent: Young & Thompson

20070090398 - Systems and methods for electromagnetic noise suppression using hybrid electromagnetic bandgap structures: A hybrid electromagnetic bandgap (EBG) structure for broadband suppression of noise on printed wiring boards includes an array of coplanar patches interconnected into a grid by series inductances, and a corresponding array of shunt LC networks connecting the coplanar patches to a second conductive plane. This combination of series inductances... Agent: Brinks Hofer Gilson & Lione

20070090399 - Bifet semiconductor device having vertically integrated fet and hbt: The invention provides a BiFET semiconductor device vertically integrating a FET and a HBT on the same substrate. The BiFET semiconductor device comprises a HBT structure, a high-resistivity structure, and a FET structure, sequentially formed in this order from bottom to top on a semi-insulating substrate. The high-resistivity structure comprises... Agent: Lin & Associates Intellectual Property

20070090400 - Method of producing the same: A method of producing a semiconductor device includes the steps of: preparing a double SOI substrate, forming a deep trench, filling the deep trench, forming an opening, forming a cavity, depositing a polycrystalline silicon layer, and forming a bipolar transistor.... Agent: Takeuchi & Kubotera, LLP

20070090401 - I/o driver power distribution method for reducing silicon area: Embodiments of the present invention provide an integrated circuit (IC) in which power to input output (IO) drivers may be distributed within unused areas over macro processing circuits. This IC includes a long distance power and ground distribution network, an input output (IO) power and ground distribution network, a number... Agent: Garlick Harrison & Markison

20070090402 - Bond pad structure: Bond pad structures are presented. Some embodiments of the structure include a conductive conductor-insulator layer overlying a substrate. The conductive conductor-insulator layer includes a composite region having a conductor sub-region and insulator sub-region, which neighbor each other, and a single material region. The insulator is harder than the conductor.... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070090403 - Array substrate and method of manufacturing the same: An array substrate includes a substrate, an electrode pad, an insulating layer and a transparent electrode. The substrate includes a display region and a peripheral region adjacent to the display region. The electrode pad is in the peripheral region. The electrode pad includes a first metal layer and a second... Agent: F. Chau & Associates, LLC

20070090404 - Process for the fabrication of thin-film device and thin-film device: A thin-film device is fabricated by forming a protective layer and a thin-film device layer one by one on a first substrate and bonding a second substrate on the thin-film device layer via a first adhesive layer or a coating layer and first adhesive layer, removing the first substrate at... Agent: David R. Metzger Sonnenschein Nath & Rosenthal

20070090405 - Charge compensated dielectric layer structure and method of making the same: A method of forming a semiconductor structure comprises providing an insulator layer overlying a III-V compound substrate, the insulator layer having a surface charge layer, the surface charge layer having a deleterious performance effect on the underlying layer or layers of the III-V compound substrate. The method further comprises transforming... Agent: Freescale Semiconductor, Inc. Law Department

20070090408 - Narrow-body multiple-gate fet with dominant body transistor for high performance: A field-effect transistor for a narrow-body, multiple-gate transistor such as a FinFET, tri-gate or Ω-FET is described. The corners of the channel region disposed beneath the gate are rounded n, for instance, oxidation steps, to reduce the comer effect associated with conduction initiating in the corners of the channel region.... Agent: Blakely Sokoloff Taylor & Zafman

20070090409 - Semiconductor device comprising an undoped oxide barrier: The present invention relates to a semiconductor device comprising at least one gate located in each of a memory array area and a periphery circuit area of a substrate, respectively, wherein the pattern density in the memory array area is higher than that in the periphery circuit area. The semiconductor... Agent: Birch Stewart Kolasch & Birch

20070090406 - Structure and method for manufacturing high performance and low leakage field effect transistor: There is provided a field effect transistor (FET) including a source side semiconductor; a drain side semiconductor; and a gate. The source side semiconductor is made of a high mobility semiconductor material, and the drain side semiconductor is made of a low leakage semiconductor material. In one embodiment, the FET... Agent: Ohlandt, Greeley, Ruggiero & Perle, LLP

20070090407 - Thin film transistor array substrate and manufacturing method thereof: A thin film transistor array substrate and a manufacturing method thereof are provided. Wherein, scan lines and data lines are disposed on a substrate to define a plurality of pixel regions. Thin film transistors are disposed in the pixel regions correspondingly and driven by the scan lines and the data... Agent: Jianq Chyun Intellectual Property Office

20070090410 - Thin film transistor array, electrostatic discharge protective device thereof, and methods for fabricating the same: A thin film transistor array, an electrostatic discharge protective device thereof, and methods for fabricating the same are provided. The thin film transistor array comprises a plurality of scan lines, a plurality of data lines, a first shorting bar, and a second shorting bar. The electrostatic discharge protective device comprises... Agent: Jianq Chyun Intellectual Property Office

20070090411 - Sensor chip, process for producing the same, and sensor using the same: A sensor chip includes a layer-shaped base body, which has a plurality of fine holes formed in one surface, and fine metal particles, each of which is loaded in one of the fine holes of the base body. At least a part of each of the fine metal particles is... Agent: Sughrue Mion, PLLC

20070090412 - Semiconductor device: Disclosed is a semiconductor device has a semiconductor substrate of a first conductivity type in which at least a first element-forming region and a second element-forming region are formed. Wells are formed in respective ones of the element-forming regions of the semiconductor substrate, and the well of at least one... Agent: Sughrue Mion, PLLC

20070090413 - Nonvolatile ferroelectric memory device and method thereof: A nonvolatile ferroelectric memory device has a plurality of ferroelectric memory cells. The ferroelectric memory cells include a first double gate cell for storing a bit of datum, the first double gate cell including a ferroelectric layer and a floating channel layer, wherein a polarity state of the ferroelectric layer... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070090414 - Semiconductor device including esd protective element: A semiconductor device includes a plurality of gate electrodes, source and drain regions, a plurality of source contacts, a plurality of drain contacts, substrate contacts, and a salicide block. The gate electrodes are arrayed in parallel on a semiconductor region on a semiconductor substrate. The source and drain regions are... Agent: Banner & Witcoff, Ltd. Attorneys For Client No. 000449, 001701

20070090416 - Cmos devices with a single work function gate electrode and method of fabrication: Described herein are a device utilizing a gate electrode material with a single work function for both the pMOS and nMOS transistors where the magnitude of the transistor threshold voltages is modified by semiconductor band engineering and article made thereby. Further described herein are methods of fabricating a device formed... Agent: Intel/blakely

20070090415 - Power device with high switching speed and manufacturing method thereof: A power device is formed by a thyristor and by a MOSFET transistors, series-connected between a first and a second current-conduction terminal. The power device moreover has a control terminal connected to an insulated-gate electrode of the MOSFET transistor and receiving a control voltage for turning on/off the device, and... Agent: Seed Intellectual Property Law Group PLLC

20070090417 - Semiconductor device and method for fabricating the same: A semiconductor device includes a first MIS transistor including a first gate electrode fully silicided with a metal. With the first MIS transistor includes: a first gate insulating film formed on a semiconductor region; the first gate electrode formed on the first gate insulating film; a first sidewall spacer formed... Agent: Mcdermott Will & Emery LLP

20070090419 - Cmos image sensor and manufacturing method thereof: A CMOS image sensor and a method for manufacturing the same are provided. The CMOS image sensor includes: a photo diode formed in a semiconductor substrate for generating an optical signal from incident light; a first micro lens formed on the semiconductor substrate above the photo diode; a plurality of... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20070090418 - Method for fabricating a high performance pin focal plane structure using three handle wafers: The present invention concerns, in part, a method for fabricating a silicon PIN detector component wherein three handle wafers are bonded to the wafer at varying points in the fabrication process. The utilization of three handle wafers during fabrication significantly ease handling concerns associated with what would otherwise be a... Agent: Raytheon Company Intellectual Property & Licensing, Eo/e04/n119

20070090421 - Array substrate for liquid crystal display device and method of fabricating the same: An array substrate for a liquid crystal display device includes: a gate line and a first storage electrode on a substrate; a gate insulating layer on the gate line and the first storage electrode; a data line over the gate insulating layer, the data line crossing the gate line to... Agent: Song K. Jung Mckenna Long & Aldridge LLP

20070090420 - Pixel array: A pixel array formed on a substrate mainly including scan lines and data lines is provided. The scan lines and the data lines are essentially consisted of conductive patterns disposed at different layers and contact windows electrically connected with the conductive patterns disposed at the different layers. The scan lines... Agent: J.c. Patents, Inc.

20070090422 - Thin-film transistor panel having structure that suppresses characteristic shifts and method for manufacturing the same: A thin-film transistor panel includes a substrate, and a thin-film transistor formed on the substrate. The transistor includes a gate electrode, a gate insulating film, a semiconductor thin film, first and second ohmic contact layers formed on the semiconductor thin film, and source and drain electrodes which are respectively formed... Agent: Frishauf, Holtz, Goodman & Chick, PC

20070090423 - Cmos image sensor: A complementary metal-oxide semiconductor (CMOS) image sensor includes a photodiode, a gate pattern of a transfer transistor contacting one side of the photodiode, a gate pattern of a drive transistor disposed to have a predetermined spacing distance from the gate pattern of the transfer transistor, and a floating diffusion node... Agent: Morgan Lewis & Bockius LLP

20070090424 - Cmos image sensor and method of manufacturing the same: Disclosed herein are a CMOS image sensor and a method of manufacturing the same, which can reduce current leakage through a plug connecting a photodiode and a transfer transistor to each other, and thereby provide low dark current levels. The CMOS image sensor includes a first epitaxial layer on or... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20070090426 - Ferroelectric capacitor: A ferroelectric capacitor includes a bottom electrode formed on a substrate, a ferroelectric material film formed on the bottom electrode and a top electrode formed on the ferroelectric material film. The ferroelectric material film is predominantly made of a compound represented by the general formula of SrxBiyTa2-zNbzO9 (wherein 0.69≦x≦0.81, 2.09≦y≦2.31... Agent: Mcdermott Will & Emery LLP

20070090425 - Memory cell comprising switchable semiconductor memory element with trimmable resistance: A nonvolatile memory cell comprising doped semiconductor material and a diode can store memory states by changing the resistance of the doped semiconductor material by application of a set pulse (decreasing resistance) or a reset pulse (increasing resistance.) Set pulses are of short duration and above a threshold voltage, while... Agent: Patent Dept., Sandisk 3d LLC(matrix)

20070090427 - Semiconductor device and method of manufacturing same: A method of manufacturing a semiconductor device, comprises: forming a high dielectric gate insulating film in an nMIS formation region and a pMIS formation region of a semiconductor substrate; forming a first metal film on the high dielectric gate insulating film, the first metal film; removing the first metal film... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070090429 - Capacitor structure: A capacitor structure is provided. The capacitor structure is configured in a substrate. The capacitor structure includes a plurality of electrode sets, at least a first conductive plug and at least a second conductive plug. The electrode sets correspond with each other and are disposed in different layers of the... Agent: Jianq Chyun Intellectual Property Office

20070090428 - Integrated semiconductor structure for sram cells: A semiconductor structure includes a semiconductor substrate having a first device area and a second device area. A gate layer is formed across the first device area and the second device area on the semiconductor substrate, wherein a first portion of the gate layer running across the first device area... Agent: L. Howard Chen, Esq. Kirkpatrick & Lockhart Preston Gates Ellis LLP

20070090430 - Semiconductor memory device: semiconductor memory device comprising: a semiconductor layer; a gate electrode formed on the semiconductor layer through a gate insulating film; a channel region provided beneath the gate electrode; source/drain diffusion regions having a conductivity type opposite to that of the channel region and provided on both sides of the channel... Agent: Birch Stewart Kolasch & Birch

20070090431 - Device layout for reducing device upset due to single event effects: A device layout for reducing device upset due to single event effects is described. A transistor is formed on a substrate. The transistor has a source, a drain, and a gate. The drain and/or the source are formed such that the drain and/or the source have a low impedance contact... Agent: Honeywell International Inc.

20070090436 - Deep trench capacitor: A deep trench capacitor disposed in a deep trench in a substrate is provided. The deep trench capacitor includes a bottom electrode disposed in the substrate surrounding a bottom of the deep trench; a first conductive layer disposed in the deep trench; a capacitor dielectric layer disposed between a lower... Agent: Jianq Chyun Intellectual Property Office

20070090433 - Isolation collar void and methods of forming the same: In a first aspect, a first apparatus is provided. The first apparatus includes a void formed around one or more portions of a microelectronic device in a bulk substrate. The void is adapted to reduce a parasitic leakage between the microelectronic device and the bulk substrate. Numerous other aspects are... Agent: James R. Nock IBM Corporation

20070090432 - Method and system for incorporating high voltage devices in an eeprom: A method and system for fabricating a stacked capacitor and a DMOS transistor are disclosed. In one aspect, the method and system include providing a bottom plate, an insulator, and an additional layer including first and second plates. The insulator covers at least a portion of the bottom plate and... Agent: Sawyer Law Group LLP

20070090435 - Mos transistor with recessed gate and method of fabricating the same: A MOS transistor with a recessed gate and a method of fabricating the same: The MOS transistor comprises a semiconductor substrate, and a trench isolation layer located in a predetermined region of the semiconductor substrate for defining an active region. The trench isolation layer has a negative slope on at... Agent: Marger Johnson & Mccollom, P.C.

20070090434 - Power semiconductor device and method therefor: A power transistor includes a plurality of transistor cells. Each transistor cell has a first electrode coupled to a first electrode interconnection region overlying a first major surface, a control electrode coupled to a control electrode interconnection region overlying the first major surface, and a second electrode coupled to a... Agent: Hvvi Semiconductors, Inc.

20070090437 - Semiconductor devices including gate patterns for reducing void formation: A method of forming a semiconductor device includes forming an insulating layer on a semiconductor substrate. The insulating layer has a trench therein with opposing sidewalls and a bottom surface. A first conductive layer is formed on the sidewalls and on the bottom surface of the trench to define a... Agent: Myers Bigel Sibley & Sajovec

20070090438 - Semiconductor device and method of manufacturing the same: Provided is a semiconductor device, including a silicon substrate, a first insulating film formed on the silicon substrate, a first conductive plug formed in an inside of a first contact hole of the first insulating film, an underlying conductive film having a flat surface formed on the first conductive plug... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070090439 - Hafnium titanium oxide films: Embodiments of a dielectric layer containing a hafnium titanium oxide film structured as one or more monolayers include the dielectric layer disposed in an integrated circuit. Embodiments of methods of fabricating such a dielectric layer provide a dielectric layer for use in a variety of electronic devices.... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070090440 - Lanthanum aluminum oxynitride dielectric films: Electronic apparatus and methods of forming the electronic apparatus include a lanthanum aluminum oxynitride film on a substrate for use in a variety of electronic systems. The lanthanum aluminum oxynitride film may be structured as one or more monolayers.... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070090441 - Titanium aluminum oxide films: A dielectric layer containing an insulating metal oxide film having multiple metal components and a method of fabricating such a dielectric layer produce a reliable dielectric layer for use in a variety of electronic devices. Embodiments include a titanium aluminum oxide film structured as one or more monolayers. Embodiments also... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070090442 - Asymmetric floating gate nand flash memory: A NAND-type flash memory device includes asymmetric floating gates overlying respective wordlines. A given floating gate is sufficiently coupled to its respective wordline such that a large gate (i.e., wordline) bias voltage will couple the floating gate with a voltage which can invert the channel under the floating gate. The... Agent: Akin Gump Strauss Hauer & Feld L.L.P.

20070090443 - Method of fabricating a semiconductor device having self-aligned floating gate and related device: A semiconductor device such as a flash memory device having a self-aligned floating gate and a method of fabricating the same is provided. An embodiment of the device includes an isolation layer defining a fin body is formed in a semiconductor substrate. The fin body has a portion protruding above... Agent: Marger Johnson & Mccollom, P.C.

20070090444 - Nonvolatile memory device including nano dot and method of fabricating the same: A nonvolatile memory device including a nano dot and a method of fabricating the same are provided. The nonvolatile memory device may include a lower electrode, an oxide layer on the lower electrode, a nano dot in the oxide layer and an upper electrode on the oxide layer. In example... Agent: Harness, Dickey & Pierce, P.L.C

20070090446 - Hardmask etch for gate polyetch: A semiconductor device is provided that comprises a substrate; an oxide layer over the substrate; and a silicon layer over the oxide layer, the silicon layer forming a notch-free gate structure; wherein the gate structure has been formed using a hard mask comprising an antireflective layer over a silicon oxide... Agent: Birch Stewart Kolasch & Birch

20070090445 - Non-volatile memory devices with wraparound-shaped floating gate electrodes and methods of forming same: Non-volatile memory devices include memory cells therein with reduced cell-to-cell coupling capacitance. These memory cells include floating gate electrodes with open-ended wraparound shapes that operate to reduce the cell-to-cell coupling capacitance in a bit line direction, while still maintaining a high coupling ratio between control and floating gate electrodes within... Agent: Myers Bigel Sibley & Sajovec

20070090447 - Semiconductor device and method of manufacture thereof: A seal ring is provided between a region where a circuit is formed on a semiconductor substrate and a dicing region. The seal ring has a portion where sealing layers of which the cross sectional form is in T-shape are layered and a portion where sealing layers of which the... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070090449 - Non-volatile memory devices and methods of forming the same: A non-volatile memory device and a method of forming the same are provided. The non-volatile memory device may include a cell isolation pattern and a semiconductor pattern sequentially stacked on a predetermined or given region of a semiconductor substrate, a cell gate line on the semiconductor pattern and on a... Agent: Harness, Dickey & Pierce, P.L.C

20070090448 - Systems and methods for memory structure comprising embedded flash memory: A memory structure that combines multiple embedded flash memory. The flash memory can be used, e.g., as air replacement cells or back up memory, or additional memory cells. In one aspect, the flash memory cells are stacked on top of the flash memory cells and the flash memory cells share... Agent: Baker & Mckenzie LLP Patent Department

20070090450 - Semiconductor device with high dielectric constant insulating film and manufacturing method for the same: A semiconductor device has a substrate and a dielectric film formed directly or indirectly on the substrate. The dielectric film contains a metal silicate film, and a silicon concentration in the metal silicate film is lower in a center portion in the film thickness direction than in an upper portion... Agent: Sughrue Mion, PLLC

20070090451 - Lateral dmos transistors including retrograde regions therein and methods of fabricating the same: A metal-oxide semiconductor transistor includes a semiconductor substrate including a source region and a drain region adjacent a surface of the substrate and a drift region between the source region and the drain region. The drift region has an impurity concentration distribution such that a peak impurity concentration of the... Agent: Myers Bigel Sibley & Sajovec

20070090453 - Non-volatile memory and manufacturing method and operating method thereof: A non-volatile memory unit includes a substrate, a conductive layer, a charge storage layer, a first doped regions, two second doped regions, a first bit line and a second bit line. Wherein, there is a trench in the substrate, the conductive layer is disposed in the substrate and filled the... Agent: Jianq Chyun Intellectual Property Office

20070090452 - Recess channel transistor for preventing deterioration of device characteristics due to misalignment of gate layers and method of forming the same: The recess channel transistor includes: a semiconductor substrate including a device insulation layer defining an activation region in which recesses are formed; insulation buffer patterns, each of which is formed at an opening of the recess on a surface of the substrate; gates, each of which includes a recess gate... Agent: Ladas & Parry LLP

20070090454 - Transistor device: A transistor device is provided, including a lightly doped layer of semiconductor material of a first type and a body region of semiconductor material of a second type. A source region of the first type is formed in the body region. The source region being more doped than the lightly... Agent: Hewlett Packard Company

20070090455 - Electronic device including transistor structures with sidewall spacers and a process for forming the electronic device: An electronic device can include a first transistor structure including a first gate electrode surrounded by a first sidewall spacer having a first stress and a second transistor structure including a second gate electrode surrounding a second sidewall spacer having second stress. The first sidewall spacer is an only sidewall... Agent: Larson Newman Abel Polansky & White, LLP

20070090458 - Semiconductor device having first and second separation trenches: A semiconductor device includes: a SOI substrate having a SOI layer, a buried oxide layer and a support substrate; multiple first separation trenches on the SOI layer; multiple MOS transistors, each of which is surrounded with one first separation trench; a second separation trench on the SOI layer including n-ply... Agent: Posz Law Group, PLC

20070090456 - Soi device and method for fabricating the same: A semiconductor-on-insulator (SOI) device is described, including a substrate, a first insulating layer and a second insulating layer on the substrate, a semiconductor layer covering the first and the second insulating layers, a gate dielectric layer and a gate on the semiconductor layer, and two doped regions as source/drain regions... Agent: Jianq Chyun Intellectual Property Office

20070090457 - Thin film transistor substrate for display unit: A thin film transistor (TFT) substrate comprises: a plastic insulation substrate; a first silicon nitride layer with a first refractive index, formed one surface of the plastic insulation substrate; and a TFT comprising a second silicon nitride layer formed with a second refractive index smaller than the first refractive index... Agent: Macpherson Kwok Chen & Heid LLP

20070090459 - Multiple gate printed transistor method and apparatus: A printed transistor has a first gate (202) printed and disposed on a first side of a printed deposit of semiconductor material (201) and a second printed gate (301) disposed on an opposite side of the printed deposit of semiconductor material. By one approach these elements are provided using a... Agent: Fitch Even Tabin And Flannery

20070090460 - Electrostatic protection systems and methods: Systems and methods are disclosed herein to provide improved electrostatic protection for electrical circuits. For example, in accordance with an embodiment of the present invention, an electrostatic protection device includes: a drain region formed in a substrate; a gate separated from the substrate by a gate oxide; and an isolation... Agent: Macpherson Kwok Chen & Heid LLP

20070090461 - Ferroelectric capacitor with parallel resistance for ferroelectric memory: Ferroelectric memory cells (3) are presented, in which a cell resistor (R) is integrated into the cell capacitor (C) to inhibit charge accumulation or charge loss at the cell storage node (SN) when the cell (3) is not being accessed while avoiding significant disruption of memory cell access operations. Methods... Agent: Texas Instruments Incorporated

20070090464 - Power circuit package and fabrication method: A power circuit package includes a base including a substrate, a plurality of interconnect circuit layers over the substrate with each including a substrate insulating layer patterned with substrate electrical interconnects, and via connections extending from a top surface of the substrate to at least one of the substrate electrical... Agent: General Electric Company Global Research

20070090465 - Semiconductor device and method for manufacturing the same: In a semiconductor device having a first MIS transistor on a semiconductor substrate, the first MIS transistor includes a p-type semiconductor layer, a first gate insulating film, a first gate electrode, a first sidewall insulting film including at least a first sidewall, an n-type extension diffusion layer, and an n-type... Agent: Mcdermott Will & Emery LLP

20070090463 - Semiconductor devices with multiple heat sinks: A semiconductor device that includes multiple heat sinks is provided along with methods for forming a semiconductor device having multiple heat sinks. The semiconductor device includes a first heat sink that is configured as a conductive lead frame. The conductive lead frame is electrically coupled to a conducting area of... Agent: Courtney Staniford & Gregory LLP

20070090462 - Silicided regions for nmos and pmos devices: A semiconductor device having an NMOS and a PMOS device formed thereon is provided. The NMOS device has additional spacers formed alongside the gate electrode to allow the silicide region to be formed farther away from the gate electrode. By placing the silicide region farther away from the gate electrode,... Agent: Slater & Matsil, L.L.P.

20070090466 - Methods of forming electronic devices having partially elevated source/drain structures: Methods of forming an electronic device may include forming a gate electrode on a semiconductor substrate, and forming first and second impurity doped regions of the semiconductor substrate on opposite sides of the gate electrode. An insulating layer may be formed on the semiconductor substrate including the first and second... Agent: Myers Bigel Sibley & Sajovec

20070090467 - Semiconductor substrate with multiple crystallographic orientations: A semiconductor structure and its method for fabrication include a first surface semiconductor layer of a first crystallographic orientation located upon a dielectric surface of a substrate. Located laterally separated upon the dielectric surface from the first surface semiconductor layer is a stack layer. The stack layer includes a buried... Agent: Scully Scott Murphy & Presser, PC

20070090468 - Semiconductor device with silicon-film fins and method of manufacturing the same: A semiconductor device includes a semiconductor substrate, an insulating film projected on a surface of the semiconductor substrate, a semiconductor film provided on a side surface of the insulating film, and MIS transistor formed in the semiconductor film, the MIS transistor having source, gate and drain region. The semiconductor device... Agent: Frommer Lawrence & Haug

20070090469 - Semiconductor device: A semiconductor device according to an embodiment of the present invention includes a semiconductor chip. The semiconductor chip includes a semiconductor substrate, an interconnect layer, a back electrode (first working electrode), and a back dummy electrode (first dummy electrode). On the semiconductor substrate, the interconnect layer including an interconnect is... Agent: Young & Thompson

20070090470 - Semiconductor devices with a field shaping region: A semiconductor device, for example a diode (200), having a pn junction (101) has an insulating material field shaping region (201) adjacent, and possibly bridging, the pn junction. The field shaping region (201) preferably has a high dielectric constant and is coupled via capacitive voltage coupling regions (204,205) to substantially... Agent: Philips Electronics North America Corporation Intellectual Property & Standards

20070090471 - Low threshold voltage semiconductor device with dual threshold voltage control means: A semiconductor structure, particularly a pFET, which includes a dielectric material that has a dielectric constant of greater than that of SiO2 and a Ge or Si content of greater than 50% and at least one other means for threshold/flatband voltage tuning by material stack engineering is provided. The other... Agent: Scully Scott Murphy & Presser, PC

20070090472 - Semiconductor device and method for production thereof: A semiconductor device having a silicon substrate, an element isolating film, an active region, a gate electrode provided via a gate insulating film, a diffusion layer provided on the active region on opposite sides of the gate electrode, an interlayer insulating film, and a plug filled in a hole formed... Agent: Sughrue Mion, PLLC

20070090474 - Mems device and method of fabrication: A MEMS device and method of fabrication including a plurality of structural tie bars for added structural integrity. The MEMS device includes an active layer and a substrate having an insulating material formed therebetween, first and second pluralities of stationary electrodes and a plurality of moveable electrodes in the active... Agent: Ingrassia, Fisher & Lorenz, P.C.

20070090473 - Microelectromechanical component and method for the production thereof: A microelectromechanical component and to a method for the production thereof is disclosed. In one embodiment, the microelectromechanical component has a pressure-sensitive semiconductor chip, which is covered in its pressure-sensitive region by a rubber-elastic layer and is arranged in a cavity housing and covered by a rubber-elastic covering. This rubber-elastic... Agent: Dicke, Billig & Czaja, P.l.l.c.

20070090475 - Mems performance improvement using high gravity force conditioning: A system for conditioning a sensor die. The sensor die may have a sensor wafer and a substrate wafer anodically bonded together. The sensor die may have an inertial device such as an accelerometer or a gyroscope. The device has a scale factor that may change with a bowing of... Agent: Honeywell International Inc.

20070090476 - Surface-emission cathodes having cantilevered electrodes: A surface-emission cathode formed on an insulating surface having cantilevered, i.e. “undercut,” electrodes. Suitable insulating surfaces include negative electron affinity (NEA) insulators such as glass or diamond. The cathode can operate in a comprised vacuum (e.g., 10−7 Torr) with no bias on the electrodes and low vacuum electric fields (e.g.,... Agent: Goodwin Procter LLP Patent Administrator

20070090477 - Photodiode array, method for manufacturing same, and radiation detector: A theme is to prevent the generation of noise due to damage in a photodetecting portion in a mounting process in a photodiode array, a method of manufacturing the same, and a radiation detector. In a photodiode array, wherein a plurality of the photodiodes (4) are formed in array form... Agent: Drinker Biddle & Reath (dc)

20070090479 - Controlling bond fronts in wafer-scale packaging: A system for controlling bond front propagation in wafer-scale packaging includes a first substrate, a second substrate, and a bonder pressure plate having protruded structures thereon to selectively establish at least one point of contact between the first and second substrates to initiate a bond front therebetween. The protruded structures... Agent: Hewlett Packard Company

20070090478 - Image sensor package structure: An image sensor package structure is proposed, in which an image sensor is fixed on a substrate having metallization traces and an adhesion layer. Electric paths of the package structure are changed from the COG (chip on glass) process to the CIS (CMOS image sensor) process to improve electric characteristics.... Agent: Rosenberg, Klein & Lee

20070090480 - Solid-state imaging device and method for manufacturing the same: The solid-state imaging device of the present invention includes: a plurality of photodetectors that are arranged in a two-dimensional matrix; a plurality of vertical transfer portions that transfer, in a vertical direction, signal electric charges which are read out from the respective photodetectors; a horizontal transfer portion that receives the... Agent: Hamre, Schumann, Mueller & Larson P.C.

20070090481 - Silicon carbide schottky diode: A SiC Schottky diode which includes a Schottky barrier formed on a silicon face 4H—SiC body.... Agent: Ostrolenk Faber Gerb & Soffen

20070090482 - High-breakdown voltage semiconductor switching device and switched mode power supply apparatus using the same: A high-breakdown voltage semiconductor switching device includes a resurf region of a second conductivity type; a base region of a first conductivity type formed to be adjacent to the resurf region; an emitter/source region of the second conductivity type formed in the base region to be spaced from the resurf... Agent: Mcdermott Will & Emery LLP

20070090483 - Systems, methods and devices relating to actuatably moveable machines: Systems, methods and devices relating to actuatably movable machines and with methods of using and manufacturing the same.... Agent: Fish & NeaveIPGroup Ropes & Gray LLP

20070090484 - Integrated circuit stress control system: An integrated circuit stress control system is provided. A gate is formed on a substrate and a channel is formed in the substrate. A source/drain is formed around the gate. A shallow trench isolation is formed in the substrate, the shallow trench isolation producing strain on the channel. A stress... Agent: Ishimaru & Zahrt LLP

20070090485 - Semiconductor device and method of manufacturing the same: Provided is a semiconductor device including: a p-type silicon substrate; a p-well which is formed in the silicon substrate, and which has a planar shape with no hole; an n-well integrally formed, in the silicon substrate, in a planar shape obtained by inverting the pattern of the p-well; a first... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070090486 - Fuse and method for disconnecting the fuse: The fuse comprises an interconnection part 14 luding a silicon layer; a contact part 20b connected one end of the interconnection part 14; and a contact part 20aconnected to the other end of the interconnection part 14 and containing a metal material. A current is flowed from the contact part... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070090487 - Method for tuning epitaxial growth by interfacial doping and structure including same: A method that allows for uniform, simultaneous epitaxial growth of a semiconductor material on dissimilarly doped semiconductor surfaces (n-type and p-type) that does not impart substrate thinning via a novel surface preparation scheme, as well as a structure that results from the implementation of this scheme into the process integration... Agent: Scully Scott Murphy & Presser, PC

20070090488 - High-efficiency matrix-type led device: A high-efficiency matrix-type LED device comprises an epitaxial wafer on which a plurality of independently insulated LEDs are formed by a method of manufacturing integrated circuits; and a conducting line mounted on each one of the LEDs by an evaporation method for forming a large-sized matrix-type LED unit capable of... Agent: Troxell Law Office PLLC

20070090489 - Shape controlled growth of nanostructured films and objects: A method and apparatus for growing nanostructures is presented. A growth substrate including at least one reaction site is provided as is a device disposed proximate the growth substrate. Energy is provided to the reaction site and a reaction species is introduced to the growth substrate. This results in a... Agent: Barry W. Chapin, Esq. Chapin Intellectual Property Law, LLC

20070090490 - Wafer-to-wafer stack with supporting pedestal: A novel three dimensional wafer stack and the manufacturing method therefor are provided. The three dimensional wafer stack includes a first wafer having a first substrate and a first device layer having thereon at least one chip, a second wafer disposed above the first wafer and having a second substrate,... Agent: Volpe And Koenig, P.C.

20070090491 - Semiconductor structure with silicon on insulator: A semiconductor structure with silicon on insulator is disclosed in this present invention. The semiconductor structure at least comprises a first substrate and a second substrate. The crystal orientation of the first substrate is in a first orientation favorable for dicing the semiconductor structure into chips, and the crystal orientation... Agent: Arent Fox PLLC

20070090492 - Semiconductor device with capacitively coupled field plate: A termination region of a semiconductor die is provided, which includes one or more field rings arranged in the termination region, one or more metal field plates, and an insulation layer disposed to prevent direct electrical contact between the field rings and the field plate such that the at least... Agent: Ostrolenk Faber Gerb & Soffen

20070090493 - Fabrication of nitrogen containing regions on silicon containing regions in integrated circuits, and integrated circuits obtained thereby: Silicon oxide (210) is grown on a silicon region (130). At least a portion (210N) of the silicon oxide (210) adjacent to the silicon region (130) is nitrided. Then some of the silicon oxide (210) is removed, leaving the nitrided portion (210N). Additional silicon oxide is thermally grown on the... Agent: Macpherson Kwok Chen & Heid LLP

20070090494 - Insulation-coated conductor and manufacturing method thereof: There is provided an insulation-coated conductor including a conductive member that has a comer potion and a non-comer portion, and an insulating resin coated around the conductive member. The insulating resin is subjected to plastic deformation so that the insulating resin at the non-comer portion partly shifts to the comer... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20070090496 - Electronic module and method of assembling the same: An electronic module includes a semiconductor power switch and a semiconductor diode. The lower side of the semiconductor power switch includes an output contact mounted on a die pad of a leadframe, and the upper side of the semiconductor power switch includes a control contact and an input contact. The... Agent: Edell, Shapiro & Finnan, LLC

20070090500 - Housed dram chip for high-speed applications: A housed DRAM chip includes a DRAM chip and a housing substrate. The DRAM chip is arranged on the housing substrate such that shorter conductive connections between the chip pads of the DRAM chip and external housing connections can be achieved for high data transmission speeds.... Agent: Edell, Shapiro & Finnan, LLC

20070090501 - Lead frame: A lead frame base is coated with a four-layer plating. The four-layer plating includes an underlayer plating (Ni), a palladium plating, a silver plating and a gold plating arranged in this order from bottom to top.... Agent: Mcdermott Will & Emery LLP

20070090497 - Leadframes for improved moisture reliability of semiconductor devices: A semiconductor device has a leadframe with a structure made of a base metal (105), wherein the structure consists of a chip mount pad (402) and a plurality of lead segments (403). Covering the base metal are, consecutively, a nickel layer (301) on the base metal, and a continuous layer... Agent: Texas Instruments Incorporated

20070090499 - Production process for manufacturing such semiconductor package: In a semiconductor package including at least one plate-like mount, a semiconductor chip has at least one electrode formed on a top surface thereof, and is mounted on the plate-like mount such that a bottom surface of the semiconductor chip is in contact with the plate-like mount. The semiconductor package... Agent: Young & Thompson

20070090498 - Stack type semiconductor package module utilizing solder coated stacking protrusions and method for manufacturing the same: The stack type semiconductor package module includes a lower semiconductor package having a main substrate, a chip mounted on the main substrate and electrically connected to the main substrate through a wire. An epoxy molding compound (EMC) is provided on the main substrate to cover the chip and the wire.... Agent: Ladas & Parry LLP

20070090495 - Thin package system with external terminals: A thin package system with external terminals and a leadframe is provided. An external bond finger defining template is provided and used to form external bond fingers on the leadframe. A die is provided and attached to the leadframe. At least portions of the die and the external bond fingers... Agent: Ishimaru & Zahrt LLP

20070090502 - Methods and apparatus for improved thermal performance and electromagnetic interference (emi) shielding in leadframe integrated circuit (ic) packages: Methods and apparatus for improved thermal performance and electromagnetic interference (EMI) shielding in integrated circuit (IC) packages is described. A die-up or die-down package includes a heat spreader cap defining a cavity, an IC die, and a leadframe. The leadframe includes a centrally located die attach pad, a plurality of... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20070090503 - Semiconductor package having an optical device and the method of making the same: The present invention relates to a semiconductor package having an optical device and the method of making the same. The semiconductor package comprises: a transparent substrate, a chip, an optical device and a carrier substrate. The transparent substrate has a plurality of first contacts and second contacts, wherein the first... Agent: Volentine Francos, & Whitt PLLC

20070090505 - Apparatus and method for manufacturing imaging device package: An apparatus for manufacturing a package packing a solid-state imaging device is provided, the package having: a package container fixing the solid-state imaging device therein; and an IR-coated cover glass hermetically sealing the solid-state imaging device in the package container. The apparatus has an ultraviolet radiation unit that radiates an... Agent: Sughrue-265550

20070090504 - Optical sensor chip package: The present invention relates to an optical sensor chip package in a cavity of forming frame thereof and has a gap between protection layer and optical sensor chip. The optical sensor chip avoids accepting the pressure from protection layer that damage the reliability between pads and metallic traces when protection... Agent: Rosenberg, Klein & Lee

20070090506 - Interposer for compliant interfacial coupling: In one aspect, the present invention provides interposers that can mechanically, electrically, and thermally interconnect first and second microelectronic components. An interposer in accordance with the present invention includes a substrate, preferably flexible, having first and second oppositely facing surfaces. Such interposers also include an array of links traversing from... Agent: Honeywell International Inc. Law Dept. Ab2

20070090507 - Multi-chip package structure: A multi-chip package structure includes a first substrate, a first chip, a sub-package, and a first molding compound. The first substrate has a first surface and a second surface. The first chip is attached to the first surface of the first substrate by flip-chip bonding so as to reduce a... Agent: Volentine Francos, & Whitt PLLC

20070090508 - Multi-chip package structure: The present invention relates to a multi-chip package structure, which comprises a first substrate, a first chip, a sub-package structure, a plurality of first solder balls, and a first molding compound. The first substrate has a first surface and a second surface. The first chip is electrically connected to the... Agent: Volentine Francos, & Whitt PLLC

20070090509 - Electromagnetic interference circuit package shield: In one embodiment, a shielding includes one or more contact elements configured to electrically contact one or more electrical elements of an integrated circuit package. The one or more electrical elements may be located on a top surface of the package. A bottom surface of the package may be coupled... Agent: Trellis Intellectual Property Law Group, PC

20070090510 - Package structure for solid-state lighting devices and method of fabricating the same: Silicon substrates are applied to the package structure of solid-state lighting devices. Wet etching is performed to both top and bottom surfaces of the silicon substrate to form reflecting cavity and electrode access holes. Materials of the reflecting layer and electrode can be different from each other whose preferred materials... Agent: Oliff & Berridge, PLC

20070090511 - Power core devices and methods of making thereof: A device comprising a power core wherein said power core comprises: at least one embedded singulated capacitor layer containing at least one embedded singulated capacitor wherein said embedded singulated capacitor comprises at least a first electrode and a second electrode and wherein said embedded singulated capacitor is positioned on the... Agent: E I Du Pont De Nemours And Company Legal Patent Records Center

20070090513 - Power module fabrication method and structure thereof: A power module fabrication method and structure thereof is disclosed. The method includes steps of: providing a metal plate and defining a pattern on the metal plate; cutting the metal plate according to the pattern to form a plurality of pins and the heat-conducting plate, wherein the pin is coupled... Agent: Madson & Austin Gateway Tower West

20070090512 - Signal transmission line: A signal transmission line used in a printed circuit board (PCB), the signal transmission line comprises a driving terminal for driving a signal, a contact portion, the signal line connected with the driving terminal and the contact portion to transmit the signal wherein a length of the signal line is... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang Jeffrey T. Knapp

20070090516 - Heated substrate support and method of fabricating same: A method and apparatus for forming a substrate support is provided herein. In one embodiment, the substrate support is fabricated by a process that includes forming a groove in a body, disposing a heater element in the groove, and welding the groove to enclose the heater element, wherein the welding... Agent: Patterson & Sheridan, LLP

20070090515 - Semiconductor structure and method of assembly: A semiconductor structure (100, 900) includes a substrate (110) having a surface (111) and also includes one or more semiconductor chips (120) located over the substrate surface. The semiconductor structure further includes an electrical isolator structure (340) located over the substrate surface, where the electrical isolator structure includes one or... Agent: George C. Chen Bryan Cave LLP

20070090514 - Semiconductor structure and method of manufacture: A semiconductor structure (100) includes a substrate (110) having a first surface (111) with a mold lock feature (101). The semiconductor structure also includes a semiconductor chip (120) located over the first surface of the substrate. The semiconductor structure further includes an electrical isolator structure (340) located over the first... Agent: George C. Chen Bryan Cave LLP

20070090518 - Microelectronic cooling apparatus and associated method: An apparatus and associated method to provide localized cooling to a microelectronic device are generally described. In this regard, according to one example embodiment, a cooling apparatus comprising a heat spreader and one or more thermoelectric cooler(s) thermally coupled to the heat spreader provides cooling to one or more hot... Agent: Blakely Sokoloff Taylor & Zafman

20070090517 - Stacked die package with thermally conductive block embedded in substrate: Disclosed are embodiments of a stacked die package including a thermally conductive block disposed in the substrate. The die stack may include a lower die thermally coupled with the conductive block and one or more upper die disposed on the lower die. The upper die may be electrically interconnected to... Agent: Intel Corporation C/o Intellevate, LLC

20070090520 - Cooling plate, bake unit, and substrate treating apparatus: A bake unit includes a cooling plate for cooling a substrate and a lift pin assembly for loading a substrate on the cooling plate. When a wafer is cooled on the cooling plate, a guide groove is formed at the cooling plate to allow a space between the wafer and... Agent: Harness, Dickey & Pierce, P.L.C

20070090519 - Encased thermal management device and method of making such a device: A thermal management device comprises an electronic device (20) encased in thermal management structures (10, 26, 28) comprising anisotropic carbon encapsulated in an encapsulating material.... Agent: Dicke, Billig & Czaja, P.l.l.c.

20070090521 - Circuit device and method of manufacturing the same: It is an object of the present invention to provide a circuit device in which a plurality of circuit elements including a circuit element having a hollow inside are sealed with resin, and to provide a method of manufacturing the same. A circuit device (10) has a first circuit element... Agent: Fish & Richardson P.C.

20070090522 - Integrated circuit mounting for thermal stress relief useable in a multi-chip module: Disclosed is a mounting structure for mounting an IC on a substrate, and particularly useful in a Multi-Chip Module (MCM). The mounting structure intervenes between the IC and the MCM substrate, and promotes heat dissipation from the IC. The mounting structure is insulative, and preferably comprises a direct bond to... Agent: Motorola, Inc.

20070090523 - Semiconductor component and methods to produce a semiconductor component: A semiconductor component and production method is disclosed. In one embodiment, the semiconductor component includes at least one vertical semiconductor power device having an upper side which includes at least one output electrode and a lower side which includes at least one input electrode and at least one control electrode.... Agent: Dicke, Billig & Czaja, P.l.l.c.

20070090524 - Structure and method of molded qfn device suitable for miniaturization, multiple rows and stacking: A semiconductor device comprising a semiconductor chip (101) assembled on a first copper cuboid (110); the cuboid has sides of a height (111). The device further has a plurality of second copper cuboids (120) suitable for wire bond attachment; the second cuboids have sides of a height (121) substantially equal... Agent: Texas Instruments Incorporated

20070090526 - Semiconductor device that attains a high integration: A semiconductor device includes a substrate a first wiring layer and a bonding wiring layer. On the substrate, semiconductor elements are formed. The first wiring layer is laminated on the substrate. The bonding wiring layer is bondable and laminated on the first wiring layer. The first wiring layer includes a... Agent: Young & Thompson

20070090525 - System and method for decreasing stress on solder holding bga module to computer motherboard: Mechanical stress on solder joints that hold BGA modules to computer motherboards is reduced by adding to the motherboard a topmost layer, and forming V-shaped channels into the layer next to the BGA module so that stress is shielded from the BGA module and its solder joints.... Agent: Rogitz & Associates

20070090528 - Device, and manufacturing method for the device: A device comprises a plurality of first electrodes which are arranged on a surface of a substrate at predetermined space, a component which has an elasticity and a longitudinal axis, a plurality of conductors which are applied to a surface of said component at predetermined space, and each of which... Agent: Dickstein Shapiro LLP

20070090527 - Integrated chip device in a package: The present invention relates to an integrated chip device in a package, including an integrated chip, a substrate comprising a redistribution wiring, a contact element and a contact pad on a common surface of the substrate, wherein the contact element is in electrical contact with the contact pad, wherein the... Agent: Patterson & Sheridan, LLP Gero Mcclellan / Infineon / Qimonda

20070090529 - Method of fabricating a vertically mountable ic package: A method of fabricating a vertically mountable integrated circuit (IC) package is presented. An integrated circuit is mounted on a printed circuit board (PCB) and electrically coupled to a bond pad on the PCB. The bond pad is coupled with a via that is embedded in the PCB. The IC,... Agent: Honeywell International Inc.

20070090531 - Method of forming an electrical isolation associated with a wiring level on a semiconductor wafer: A method of forming a wiring level and an electrical isolation associated with the wiring level on a surface of a semiconductor wafer comprises the steps of providing the semiconductor wafer having said surface, forming a plurality of electrically conductive wiring lines upon said surface, each of the wiring lines... Agent: Slater & Matsil LLP

20070090530 - Porous silicon undercut etching deterrent masks and related methods: The disclosed invention relates to masked silicon structures and methods for making porous silicon in selected areas of a silicon substrate via anodic etching. The masked silicon structures comprise: (1) a frontside barrier layer; and (2) a backside opaque ohmic contact layer. The frontside barrier layer includes a plurality of... Agent: Thomas Loop

20070090532 - Chip-packaging compositions including catalysts and hardeners, packages made therewith, and methods of assembling same: A chip-packaging composition includes a thermosetting resin and at least one of an N-heterocyclic carbene adduct, an imidazole, and a cycloaliphatic amine hardener. The chip-packaging composition is applied to flip-chip technology during no-flow underfill mounting of the flip-chip to a mounting substrate. The mounting substrate can be further mounted on... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070090533 - Closed loop thermally enhanced flip chip bga: According to one or more aspects of the present invention, a flip chip BGA packaging or mounting arrangement is disclosed where a grounding connection of implemented on the back of the chip. The grounding connection comprises one or more metal strips that are situated between the back of the chip... Agent: Texas Instruments Incorporated

20070090535 - Semiconductor component of semiconductor chip size with flip-chip-like external contacts: A semiconductor component and a method for its production in semiconductor chip size, can have a semiconductor chip, which has external contacts of the semiconductor component that are arranged in the manner of a flip-chip on its active upper side. The semiconductor chip can be encapsulated by a plastic compound... Agent: Edell, Shapiro & Finnan, LLC

20070090534 - Semiconductor module including a plurality of ic chips therein: A semiconductor module includes a driver IC chip and a plurality of memory IC chips on a common wiring board. Some of the memory IC chips nearer to the driver IC chip than the other memory IC chips are mounted on an interposer substrate mounted on the wiring board, providing... Agent: Sughrue Mion, PLLC

20070090536 - Sensor having semiconductor chip and circuit chip: A sensor includes: a semiconductor chip having a sensing portion; a circuit chip; and first and second films. The sensing portion is disposed on a first side of the semiconductor chip. The first side of the semiconductor chip is electrically connected to the circuit chip through a bump. The first... Agent: Posz Law Group, PLC

20070090537 - Semiconductor package with controlled solder bump wetting: A semiconductor package includes a substrate having a plurality of lead fingers. A plurality of stud bumps is attached to the plurality of lead fingers. A die having a plurality solder bumps is provided. The plurality of solder bumps is attached to the plurality of stud bumps to form a... Agent: Ishimaru & Zahrt LLP

20070090540 - Semiconductor chip package and fabrication method thereof: A semiconductor chip package includes a first semiconductor chip, that is an MEMS chip having a movable structure. The movable structure has a movable section. The first semiconductor chip includes a plurality of first electrode pads, and a first sealing section. The first sealing section is a closed loop formed... Agent: Rabin & Berdo, PC

20070090539 - Semiconductor device and method for producing the same: A semiconductor device has a circuit carrier with a number of internal contact areas is disclosed, which includes a first material with a first electrochemical potential, and a semiconductor chip with an active surface and a number of chip contact areas, which include a second material with a second electrochemical... Agent: Dicke, Billig & Czaja, P.l.l.c.

20070090538 - Wire drawing die: The present invention relates to a die comprising a die core (10) of a hard material and at least two pre-stressed rings (60, 70) of increasing diameter placed around the die core and methods of making and using the same. The die core (10) is held in place by a... Agent: Pepper Hamilton LLP

20070090541 - Bonding pad and display panel: A bonding pad including an insulating layer, a pad metal layer, at least a patterned layer, a passivation layer and a conductive layer is described. The insulating layer is disposed on a substrate. The pad metal layer is disposed over the insulating layer. The at least a patterned layer is... Agent: Jianq Chyun Intellectual Property Office

20070090544 - Integrated circuit package encapsulating a hermetically sealed device: An integrated circuit package is disclosed having a semiconductor chip, a hermetically sealed device supported by the semiconductor chip, and a molding compound sealing the semiconductor chip and the device together as a composite package. A method of manufacturing the package is also disclosed.... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070090543 - Plastic packaged device with die interface layer: Structure and method are provided for plastic encapsulated semiconductor devices having a buffer layer of low dielectric constant and/or low loss tangent material separating the die surface from the plastic encapsulation. Semiconductor wafers with substantially completed SC die are coated with the buffer layer. The buffer layer is patterned to... Agent: Ingrassia, Fisher & Lorenz, P.C.

20070090542 - Semiconductor device with reduced package cross-talk and loss: Structure and method are provided for plastic encapsulated semiconductor devices having reduced package cross-talk and loss. Semiconductor die are first coated with a buffer region having a lower dielectric constant ε and/or lower loss tangent δ than the plastic encapsulation. The encapsulation surrounds the buffer region providing a solid structure.... Agent: Ingrassia, Fisher & Lorenz, P.C.

20070090545 - Semiconductor device with improved encapsulation: Structure and method are provided for plastic encapsulated semiconductor devices. The encapsulation comprises a plastic binder having a dielectric constant εb and loss tangent δb and a filler mixed therewith having lower εf and/or δf so that εm and/or δm of the mix is less than εb, δb, respectively. Hollow... Agent: Ingrassia, Fisher & Lorenz, P.C.

20070090546 - Interposer and method for fabricating the same: The interposer comprises a base 8 formed of a plurality of resin layers 68, 20, 32, 48; thin-film capacitors 18a, 18b buried between a first resin layer 68 of said plurality of resin layers and a second resin layer 20 of said plurality of resin layers, which include first capacitor... Agent: Armstrong, Kratz, Quintos, Hanson & Brooks, LLP

20070090547 - Exclusion zone for stress-sensitive circuit design: A semiconductor structure less affected by stress and a method for forming the same are provided. The semiconductor structure includes a semiconductor chip. Stress-sensitive circuits are substantially excluded out of an exclusion zone to reduce the effects of the stress to the stress-sensitive circuits. The stress-sensitive circuits include analog circuits.... Agent: Slater & Matsil, L.L.P.

20070090549 - Semiconductor device and method of fabricating the same: According to an aspect of the invention, there is provided a semiconductor device including a semiconductor substrate, a p-type impurity diffusion layer formed on the semiconductor substrate, and Ni silicide formed on the diffusion layer, wherein an alignment mark for lithography is formed on the Ni silicide.... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070090548 - Stacked alignment mark and method for manufacturing thereof: A stacked alignment mark. The stacked alignment mark comprises a first alignment mark and a second alignment mark. The first alignment mark is located in a first film layer, wherein the first alignment mark is composed of a plurality of conductive wires. The second alignment mark is located in a... Agent: Jianq Chyun Intellectual Property Office

20070085068 - Spin transfer based magnetic storage cells utilizing granular free layers and magnetic memories using such cells: A method and system for providing a magnetic element and a memory incorporating the magnetic element is described. The method and system for providing the magnetic element include providing a pinned layer, a spacer layer, and a free layer. The free layer includes granular free layer having a plurality of... Agent: Sawyer Law Group LLP

20070085069 - Method and apparatus for manufacturing ic chip packaged device: A film substrate that has antenna circuits formed at a fixed spacing on one surface thereof is transported at a constant speed, and IC chips are moved along the film substrate, and are mounted at the fixed spacing on the film substrate so as to be connected to the antenna... Agent: Darby & Darby P.C.

20070085070 - Lighting system: An object of the present invention is to provide a lighting system which uses a stacked light emitting element provided with a plurality of light emitting units and causes little change in emission color even after being used for a long time. A lighting system is provided, which includes a... Agent: Cook, Alex, Mcfarron, Manzo, Cummings & Mehler Ltd

20070085077 - Electronics devices comprising conductive members that connect electrodes to other conductive members within a substrate and processes for forming the electronic devices: An electronic device includes a substrate including a pixel driving circuit, a first conductive member, and a second conductive member. The first and second conductive members are spaced apart, the first conductive member is connected to the pixel driving circuit, and the second conductive member can be part of a... Agent: E I Du Pont De Nemours And Company Legal Patent Records Center

20070085075 - Light emitting device, electronic equipment and apparatus for manufacturing the same: To provide an aspect of a novel display device using a light emitting element which is composed of a cathode, an EL layer and an anode, and a manufacturing device of the display device. According to the present invention, dual-sided emission display can be performed in one sheet white color... Agent: Fish & Richardson P.C.

20070085071 - Low temperature-cured polymer gate insulation layer and organic thin film transistor using the same: Provided are a low temperature-cured polymer gate insulation layer and an organic thin film transistor having the same. The gate insulation layer includes an acrylate-based compound, an anhydride-based compound, and an epoxy-based compound each by 0.1 weight % or more.... Agent: Ladas & Parry LLP

20070085074 - Merocyanine dye and use thereof: wherein n is an integer of from 0 to 3; R1 is unsubstituted or phenyl-, halogen-, ester-, siliy-substituted linear or branched alkyl group having 1 to 6 carbon atoms; R2 is unsubstituted or substituted phenyl, benzyl or naphthyl; N and R1R2 together represent aromatic-fused N-containing heterocyclic group (NR1R2); Y1 is... Agent: Madson & Austin Gateway Tower West

20070085076 - Organic electronic device and method for manufacturing the same: An organic electronic device of the present invention includes a substrate, at least two electrodes formed on the substrate, a conductive organic thin film that is formed on the substrate and electrically connects the electrodes, and a coating film for coating at least a portion of the electrodes. The conductive... Agent: Hamre, Schumann, Mueller & Larson P.C.

20070085073 - Organometallic complex, and light-emitting element and light-emittting device using the same: It is an object of the present invention to provide an organometallic complex that can emit phosphorescence. In the following general formula (G1), X represents —O— or —N(R10)—. R1 to R9 each represent any of hydrogen, an alkyl group or a cycloalkyl group having 1 to 6 carbon atoms, an... Agent: Eric Robinson

20070085072 - Production method of semiconductor device: Provided is a method of producing a semiconductor device having an organic semiconductor layer, which includes the steps of providing a crystallization promoting layer on a substrate; providing an organic semiconductor precursor on the crystallization promoting layer; and applying light energy and thermal energy simultaneously to the organic semiconductor precursor... Agent: Fitzpatrick Cella Harper & Scinto

20070085078 - Semiconductor memory element and lifetime operation starting appartus therefor: An example memory includes an address control portion, a protection film, a property deterioration material layer, data storage areas, and bonding pads. The protection film protects an organic semiconductor layer of a semiconductor circuit and prevents intrusion of moisture or chemical molecules in the air, light, or the like, into... Agent: Nixon & Vanderhye, PC

20070085079 - Liquid crystal display device and method of fabricating the same: A liquid crystal display (LCD) device includes a gate line and a data line crossing each other to define a pixel region on a first substrate, a thin film transistor connected to the gate line and the data line, a first protrusion and a second protrusion formed on the first... Agent: Morgan Lewis & Bockius LLP

20070085080 - Semiconductor device and method of manufacturing the same: To provide a semiconductor device composed of a semiconductor element or a group of semiconductor elements, in which a crystalline semiconductor film having as few grain boundaries as possible in a channel formation region is formed on an insulating surface, which can operate at high speed, which have high current... Agent: Eric Robinson

20070085083 - Anisotropic collimation devices and related methods: Devices, such as light-emitting devices (e.g., LEDs), and methods associated with such devices are provided. A light-emitting device designed to emit light may include an interface through which emitted light passes therethrough, wherein the interface has a dielectric function that varies spatially according to a pattern. The pattern may be... Agent: Wolf Greenfield & Sacks, PC

20070085085 - Dissipative pick and place tools for light wire and led displays: The present invention provides for placement of an LED device on a carrier through the use of a pick-and-place tool. The tool conducts electricity at a rate sufficient to prevent charge buildup but not at so high a rate as to overload the LED being placed.... Agent: Carr & Ferrell LLP

20070085084 - Isotropic collimation devices and related methods: Devices, such as light-emitting devices (e.g., LEDs), and methods associated with such devices are provided. A light-emitting device may include an interface through which emitted light passes therethrough. The interface having a dielectric function that varies spatially according to a pattern, wherein the pattern is arranged to provide light emission... Agent: Wolf Greenfield & Sacks, PC

20070085082 - Light-emitting devices and related systems: Light-emitting devices can include a package that supports one or more light-emitting die (e.g., light-emitting diode die, laser diode die) and which can ensure mechanically stability, can facilitate electrical and/or thermal coupling with light-emitting die, and can manipulate the manner by which light generated by the die is emitted out... Agent: Wolf Greenfield & Sacks, PC

20070085086 - Organic light emitting device: An organic light emitting device of high quality is disclosed that can be produced by a simple method and rarely causes color degradation due to current in the device. In one embodiment, the organic light emitting device comprises a substrate, a lower electrode disposed over the substrate, an organic light... Agent: Rossi, Kimms & Mcdowell LLP.

20070085087 - Semiconductor light-emitting device, and image display device and lighting unit comprising same: A semiconductor light-emitting device is provided. The semiconductor light-emitting device includes: a substrate having a substrate surface oriented along a substrate surface plane; a first grown layer including a first grown layer conductivity type formed on the substrate; a masking layer formed on the first grown layer; a second grown... Agent: Bell, Boyd & Lloyd, LLP

20070085081 - Thermally efficient semiconductor laser structure and method of forming same: The present invention provides a thin-film semiconductor laser device that utilizes a double-sided heat removal technique and architecture. The term “thin-film semiconductor laser”, as used herein, refers to a semiconductor laser having a p-i-n structure, in which the thickness of the p-layer is no more than 10 times the thickness... Agent: Fleshner & Kim, LLP

20070085088 - Component of a radiation detector comprising a substrate with positioning structure for a photoelectric element array: In the component of a radiation detector, an upper end face of a pad formation protrusion provided on an upper surface of an MID substrate is equal in height to an upper surface of a photodiode array, first pads are provided on upper surfaces of photodiodes arranged in the photodiode... Agent: Sughrue Mion, PLLC

20070085089 - High power light emitting diode: A high power LED comprises a substrate. An N-type semiconductor layer, an active layer and a P-type semiconductor layer are sequentially deposited on the substrate. A semi-insulator layer or a non-N-type semiconductor layer can be interposed between the N-type semiconductor layer and substrate. At least one N-type electrode is connected... Agent: Oliff & Berridge, PLC

20070085090 - Active matrix driving display device and method of manufacturing the same: Provided are an active matrix driving display device and a method of manufacturing the same. The active matrix driving display device includes: a first buffer layer formed on a plastic substrate; a laser-absorbing layer formed on the first buffer layer; a second buffer layer formed on the laser-absorbing layer; and... Agent: Blakely Sokoloff Taylor & Zafman

20070085091 - Nitride semiconductor light emitting device and method of manufacturing the same: A nitride semiconductor light emitting device is provided. The nitride semiconductor light emitting device includes a first nitride layer comprising at least N-type nitride layer. An insulating member is formed on the first nitride layer having a predetermined pattern. An active layer is formed in both sides of the insulating... Agent: Birch Stewart Kolasch & Birch

20070085094 - Flat panel display with improved white balance: Disclosed is a flat panel display capable of improving a white balance by making channel regions of transistors of R, G, and B unit pixels with different current mobilities. The flat panel display includes a plurality of pixels, each of the pixels including R, G and B unit pixels to... Agent: H.c. Park & Associates, PLC

20070085092 - Light-emitting device, planar light source and direct type backlight module: A light-emitting device (12) includes a base (14) and two red light-emitting chips (22), two green light-emitting chips (24) and a blue light-emitting chip (26) arranged on the base red, green, blue, green, red in a left-to-right order. The red light-emitting chips, the green light-emitting chips and the blue light-emitting... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang Jeffrey T. Knapp

20070085093 - Light-emitting diode and method for manufacturing same, integrated light-emitting diode and method for manufacturing same, method for growing a nitride-based iii-v group compound semiconductor, substrate for growing a nitride-based iii-v group compound se: A method for manufacturing a light-emitting diode, which includes the steps of: providing a substrate having a plurality of protruded portions on one main surface thereof wherein the protruded portion is made of a material different in type from that of the substrate and growing a first nitride-based III-V Group... Agent: Sonnenschein Nath & Rosenthal LLP

20070085096 - Light emitting diode package: An LED package is provided. The LED package includes: at least one device having at least one LED; at least one resistor having a resistance component; a plurality of bonding pads formed spaced apart from each other on one side of the resistor and changing resistance of the resistor according... Agent: Birch Stewart Kolasch & Birch

20070085095 - Nitride based semiconductor light emitting diode: A nitride based semiconductor LED is provided. In the nitride based semiconductor LED, an n-type nitride semiconductor layer is formed on a substrate. the n-type nitride semiconductor layer has the top surface divided into a first region and a second region with a finger structure, so that the first region... Agent: Mcdermott Will & Emery LLP

20070085097 - Nitride semiconductor light emitting device: The invention provides a highly reliable nitride semiconductor light emitting device improved in electrostatic discharge withstand voltage. In the light emitting device, an n-type nitride semiconductor layer, an active layer and a p-type nitride semiconductor layer are sequentially formed on a substrate. The active layer features a multiple quantum well... Agent: Mcdermott Will & Emery LLP

20070085098 - Patterned devices and related methods: Devices, such as light-emitting devices (e.g., LEDs), and methods associated with such devices are provided. The device may include an interface having a dielectric function that varies spatially according to a transformed pattern, wherein the transformed pattern conforms to a transformation of a precursor pattern according to a mathematical function.... Agent: Wolf Greenfield & Sacks, PC

20070085101 - Light emitting diode package: Provided is an LED package. It is easy to control luminance according to the luminance and an angle applicable. Since heat is efficiently emitted, the LED package is easily applicable to a high luminance LED. The manufacturing process is convenient and the cost is reduced. The LED package includes a... Agent: Birch Stewart Kolasch & Birch

20070085100 - Photonic structures for efficient light extraction and conversion in multi-color light emitting devices: A high efficiency light emitting diode (LED) comprised of a substrate, a buffer layer grown on the substrate (if such a layer is needed), a first active region comprising primary emitting species (PES) that are electrically-injected, a second active region comprising secondary emitting species (SES) that are optically-pumped by the... Agent: Gates & Cooper LLP Howard Hughes Center

20070085102 - Semiconductor light emitting element, semiconductor light emitting device, and method for fabricating semiconductor light emitting element: Projections/depressions forming a two-dimensional periodic structure are formed in a surface of a semiconductor multilayer film opposing the principal surface thereof, while a metal electrode with a high reflectivity is formed on the other surface. By using the diffracting effect of the two-dimensional periodic structure, the efficiency of light extraction... Agent: Mcdermott Will & Emery LLP

20070085099 - Semiconductor substrate cutting method: A wafer 11 having a front face 3 formed with a functional device 15 is irradiated with laser light L while positioning a light-converging point P within the wafer 11 with the rear face 17 of the wafer 11 acting as a laser light incident face, so as to generate... Agent: Drinker Biddle & Reath (dc)

20070085103 - Light emitting device using light emitting diode chip: A light emitting device comprises: an LED chip mounted in a recess formed in a mounting substrate; a wavelength converting member that is disposed so as to cover the recess and the edge area around the recess and that is excited by light emitted from the LED chip to emit... Agent: Greenblum & Bernstein, P.L.C

20070085104 - Robust group iii light emitting diode for high reliability in standard packaging applications: A physically robust light emitting diode is disclosed that offers high-reliability in standard packaging and that will withstand high temperature and high humidity conditions. The diode comprises a Group III nitride heterojunction diode with a p-type Group III nitride contact layer, an ohmic contact to the p-type contact layer, and... Agent: Summa, Allan & Additon, P.A.

20070085105 - Light emitting diode and side emitting lens: The invention is an illumination system that incorporates a light emitting diode and a side-emitting light-recycling lens. The side-emitting light-recycling lens recycles part of the light internally generated by a light emitting diode back to the light emitting diode as externally incident light. The light emitting diode reflects a portion... Agent: William Propp, Esq. Goldeneye, Inc.

20070085107 - Light emitting device: A light emitting device, free from change of color even when the wavelength of a light emitting element shifts, includes a light emitting element (106) for emitting primary light having an intensity peak at a wavelength shorter than 400 nm; a silicone resin (111) provided to embed the light emitting... Agent: Hogan & Hartson L.L.P.

20070085106 - Light emitting element, light emitting device, and electronic apparatus: To provide a light emitting element driven at a low voltage, and a light emitting element and an electronic apparatus with low power consumption. The invention provides a light emitting element in which a light emitting layer containing a light emitting substance and a layer containing bathophenanthroline are provided between... Agent: Cook, Alex, Mcfarron, Manzo, Cummings & Mehler, Ltd.

20070085108 - Liquid crystalline polymer and multilayer polymer-based passive signal processing components for rf/wireless multi-band applications: The present invention provides all organic fully-packaged miniature bandpass filters, baluns, diplexers, multiplexers, couplers and a combination of the above manufactured using liquid crystalline polymer (LCP) and other multilayer polymer based substrates. These devices are manufactured using one or more LCP layers having integrated passive components formed thereon to provide... Agent: Sutherland Asbill & Brennan LLP

20070085109 - Single element optical sensor: The single element optical sensor of this invention is a two-terminal element and comprises a light absorbing semiconductor layer, potential barrier materials positioned in said light absorbing layer and two electrodes connected to said light absorbing layer. Positions and chemical compositions of the potential barriers are adjusted according to wavebands... Agent: Bacon & Thomas, PLLC

20070085110 - Photoelectric conversion apparatus and image pick-up system using the photoelectric conversion apparatus: A primary object of the present invention is to provide a photoelectric conversion apparatus with less leak current in a floating diffusion region. In order to obtain the above object, a photoelectric conversion apparatus according to the present invention includes a photodiode for converting light into a signal charge, a... Agent: Fitzpatrick Cella Harper & Scinto

20070085111 - Termination structure: A power semiconductor device having a termination structure that includes a polysilicon field plate, a metallic field plate, and a polysilicon equipotential ring.... Agent: Ostrolenk Faber Gerb & Soffen

20070085113 - Dielectric materials for electronic devices: A dielectric material prepared from a siloxy/metal oxide hybrid composition, and electronic devices such as thin film transistors comprising such dielectric material are provided herein. The siloxy/metal oxide hybrid composition comprises a siloxy component such as, for example, a siloxane or silsesquioxane. The siloxy/metal oxide hybrid composition is useful for... Agent: Fay Sharpe / Xerox - Rochester

20070085112 - Thin film transistor, display device and liquid crystal display device and method for manufacturing the same: As a wiring becomes thicker, discontinuity of an insulating film covering the wiring has become a problem. It is difficult to form a wiring with width thin enough for a thin film transistor used for a current high definition display device. As a wiring is made thinner, signal delay due... Agent: Nixon Peabody, LLP

20070085114 - Photodetector having a near field concentration:

20070085116 - Array substrate for liquid crystal display device and manufacturing method of the same: A substrate for a display device includes a plurality of first lines on the substrate in a display area of the display device, a plurality of link lines on the substrate in a link region, the link lines electrically connected to the first lines and the link region being in... Agent: Seyfarth Shaw, LLP

20070085118 - Liquid-crystal display device with thin-film transistors and method of fabricating the same: A LCD device prevents corrosion of the transparent conductive layers and contact resistance increase without arising the step coverage degradation due to the thickness increase of the interconnection layer, the step coverage degradation due to the formation of undercut portions, and productivity reduction and fabrication cost increase. A first interconnection... Agent: Mcginn Intellectual Property Law Group, PLLC

20070085115 - Memory cell, pixel structure and manufacturing process of memory cell for display panels: A memory cell, suitable for being disposed on a substrate, comprises a poly-Si island, a first dielectric layer, a trapping layer, a second dielectric layer and a control gate. The poly-Si island is disposed on the substrate and includes a source doped region, a drain doped region and a channel... Agent: Jianq Chyun Intellectual Property Office

20070085117 - Photodetector array using isolation diffusions as crosstalk inhibitors between adjacent photodiodes: A photodetector array includes a semiconductor substrate having opposing first and second main surfaces, a first layer of a first doping concentration proximate the first main surface, and a second layer of a second doping concentration proximate the second main surface. The photodetector includes at least one conductive via formed... Agent: Akin Gump Strauss Hauer & Feld L.L.P.

20070085119 - Cmos image sensor and method for manufacturing the same: Disclosed are a CMOS image sensor and a method for manufacturing the same, for reducing or preventing damage to a photodiode and improving a pixel design margin to achieve scale down of a pixel. The CMOS image sensor includes an isolation layer in a semiconductor substrate, a gate electrode crossing... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20070085120 - Optical color sensor system: An optical color sensor system is provided including providing a substrate having an optical sensor therein and forming a passivation layer over the substrate. The passivation layer is planarized and color filters are formed over the passivation layer. A planar transparent layer is formed over the color filters and microlenses... Agent: Ishimaru & Zahrt LLP

20070085121 - Ferrite material and ceramic substrate: A low-temperature firable ceramic substrate having formed in its inside a ferrite layer with a coil embedded therein is provided. The ferrite layer has a composition of 63 to 73% by mass of Fe2O3, 5 to 10% by mass of CuO, 5 to 12% by mass of NiO, and 10... Agent: Hogan & Hartson L.L.P.

20070085122 - Semiconductor memory device having metal-insulator transition film resistor: A semiconductor memory device may have a lower leakage current and/or higher reliability, e.g., a longer retention time and/or a shorter refresh time. The device may include a switching device and a capacitor. A source of the switching device may be connected to a first end of a metal-insulator transition... Agent: Harness, Dickey & Pierce, P.L.C

20070085123 - Dynamic random access memory and manufacturing method thereof: A dynamic random access memory (DRAM) is provided. The dynamic random access memory includes a deep trench capacitor disposed in a first trench of a substrate, a conductive layer disposed in a second trench of the substrate, a gate structure, and a conductive layer disposed on the surface of the... Agent: Jianq Chyun Intellectual Property Office

20070085124 - Non-volatile memory device and manufacturing method and operating method thereof: A non-volatile memory device having a substrate, an n type well, a p type well, a control gate, a composite dielectric layer, a source region and a drain region is provided. A trench is formed in the substrate. The n type well is formed in the substrate, The p type... Agent: J.c. Patents

20070085125 - Semiconductor device including a conductive layer buried in an opening and method of manufacturing the same: A trench capacitor is formed in a semiconductor substrate with a capacitor insulating film. The trench has a conductive layer as storage node electrode buried in a trench. The conductive layer includes a first, a second, and third conductive layer. The first conductive layer is buried in a lower portion... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070085126 - Circuit board structure and dielectric layer structure thereof: A circuit board structure and a dielectric layer structure thereof are proposed. The dielectric layer structure has a dielectric layer and a plurality of bonding particles dispersed in the dielectric layer. The bonding particle is a metal powder particle coated with an insulating film. There is an additional circuit structure... Agent: Mr. Joseph A. Sawyer, Jr. Sawyer Law Group LLP

20070085127 - Semiconductor device and method of manufacturing the same: A fin type MOSFET and a method of manufacturing the fin type MOSFET are disclosed. Gate structures in the fin type MOSFET are formed by a damascene process without a photolithography process. Impurities used to form a channel region are selectively implanted into portions of a semiconductor substrate adjacent to... Agent: Volentine Francos, & Whitt PLLC

20070085128 - Semiconductor device and method for fabricating the same: Semiconductor devices and methods of manufacture thereof are disclosed that are capable of preventing a short of lower electrodes caused by a leaning or lifting phenomenon while forming the lower electrodes and securing enough capacitance of a capacitor by widening an effective capacitor area. The inventive semiconductor device includes: a... Agent: Marshall, Gerstein & Borun LLP

20070085129 - Nitride read only memory device with buried diffusion spacers and method for making the same: A method for making a nitride read only memory device with buried diffusion spacers is disclosed. An oxide-nitride-oxide (ONO) layer is formed on top of a silicon substrate, and a polysilicon gate is formed over the ONO layer. The polysilicon gate is formed less than a length of the ONO... Agent: Martine Penilla & Gencarella, LLP

20070085130 - Tungsten-containing nanocrystal, an array thereof, a memory comprising such an array, and methods of making and operating the foregoing: A nanocrystal (or quantum dot) memory cell includes a tier of separated tungsten or tungsten-containing nanocrystals on an insulative tunneling layer. The nanocrystals are formed by low pressure chemical vapor deposition. The remainder of the cell may be fabricated pursuant to conventional MOS protocols. Generally, Fowler-Nordheim tunneling occurs during write... Agent: Slater & Matsil, L.L.P.

20070085131 - Semiconductor device: A semiconductor device includes a semiconductor substrate which has a cavity and has a source region, a drain region, and a channel region above the cavity, a gate electrode which is formed on the channel region with a gate insulating film interposed between the gate electrode and the channel region,... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070085132 - Semiconductor memory device and method for producing same: A semiconductor memory device with improved operational reliability, and a method for fabricating the device. The semiconductor memory device includes a select gate 3a, arranged in a first area on a substrate 1, floating gates 6a arranged in a second are,a adjacent to the first area, first and second diffusion... Agent: Mcginn Intellectual Property Law Group, PLLC

20070085133 - High frequency excitation system: A power module is adapted to be connected to a voltage source and to supply power to a load. The power module includes a switching bridge that includes a first power transistor and a second power transistor, a first gate controller for driving the first power transistor and a second... Agent: Fish & Richardson PC

20070085134 - Semiconductor memory device with increased node capacitance: An integrated circuit semiconductor memory device (100) has a first dielectric layer (116) characterized as the BOX layer absent from a portion (130) of the substrate (112) under the gate of a storage transistor to increase the gate-to-substrate capacitance and thereby reduce the soft error rate. A second dielectric layer... Agent: International Business Machines Corporation Dept. 18g

20070085135 - Semiconductor device: A vertical-type semiconductor device for controlling a current flowing between electrodes opposed against each other across a semiconductor substrate, including: a semiconductor substrate having first and second surfaces opposed against each other; a first electrode formed in the first surface; a second electrode formed in the second surface through a... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070085136 - Field electrode trench transistor structure with voltage divider: A trench transistor structure having a field electrode arrangement formed in trenches is disclosed. In one embodiment, the field electrode arrangement is conductively connected to subvoltage taps of a voltage divider for the purpose of stabilizing the potentials on a longer time scale than dynamic charge reversal processes.... Agent: Dicke, Billig & Czaja, P.l.l.c.

20070085137 - Semiconductor integrated circuit device and a manufacturing method for the same: Provided is a manufacturing method for a power management semiconductor device or an analog semiconductor device both including a CMOS. According to the method, a substance having high thermal conductivity is additionally provided above a semiconductor region constituting a low impurity concentration drain region so as to expand the drain... Agent: Bruce L. Adams, Esq.

20070085138 - Semiconductor device and manufacturing method thereof: The invention relates to a semiconductor device including a plurality of thin film transistors provided on a base member having a curved surface. The surface may be bent in either a convex shape or a concave shape. All channel length directions of the plurality of thin film transistors may also... Agent: Nixon Peabody, LLP

20070085139 - Semiconductor device: A semiconductor device capable of preventing the occurrence of stress in a field region, and to prevent dislocation, caused by the stress, in the active region is provided. The semiconductor device includes a support substrate; an active island region having single crystal silicon being formed on the support substrate; a... Agent: GlobalIPCounselors, LLP

20070085140 - One transistor memory cell having strained electrically floating body region, and method of operating same: A semiconductor memory cell comprising a transistor having (i) an electrically floating body region and (ii) semiconductor source, drain and/or body regions that are “locally” or “globally” under mechanical strain (for example, strain introduced via tensile or compressive forces). The semiconductor memory cell includes (1) a first data state which... Agent: Neil A. Steinberg

20070085141 - Information playback system using information storage medium: According to one embodiment, there is provided a data processing method. The method includes reading management information indicative of a playback and display procedure, acquiring a content from a certain storage position at a timing determined based on the management information, and performing playback and display of the content at... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070085142 - Tunable protection system for integrated circuits: A tunable protection system including forming a tunable trigger device providing an adjustable protection activation level, forming a circuit protection device providing protection for integrated circuits, and electrically connecting the tunable trigger device and the circuit protection device to an input/output pad.... Agent: Ishimaru & Zahrt LLP

20070085143 - Semiconductor structure for draining an overvoltage pulse, and method for manufacturing same: A semiconductor structure for draining an overvoltage pulse comprises a first semiconductor region having a first doping type and a semiconductor layer arranged adjacent the first semiconductor region. The semiconductor layer includes an isolation structure configured to electrically isolate a second semiconductor region from a surrounding region. The second semiconductor... Agent: Maginot, Moore & Beck Chase Tower

20070085144 - Esd protection system for multiple-domain integrated circuits: An integrated circuit system includes a first device in a first power domain, and a second device coupled to the first device in a second power domain. A circuit module is coupled between the first device and a power supply voltage or between the first device and a complementary power... Agent: L. Howard Chen, Esq. Kirkpatrick & Lockhart Preston Gates Ellis LLP

20070085145 - High voltage transistor with improved driving current: A semiconductor device and its method of manufacture are provided. Embodiments include forming a first doped region and a second doped region. The first and second doped regions may form a double diffused drain structure as in an HVMOS transistor. A gate-side boundary of the first doped region underlies part... Agent: Slater & Matsil, L.L.P.

20070085147 - Semiconductor device and manufacturing method thereof: A semiconductor device including a first field effect transistor having a source, a first conductivity type drain, a gate, and a first conductivity type channel layer formed beneath the gate and between the source and the drain. The device also includes a first conductivity type well region, a second conductivity... Agent: Sonnenschein Nath & Rosenthal Sears Tower

20070085146 - Semiconductor integrated circuit: A semiconductor integrated circuit has a first substrate of a first polarity to which a first substrate potential is given, a second substrate of the first polarity to which a second substrate potential different from the first substrate potential is given, and a third substrate of a second polarity different... Agent: Mcdermott Will & Emery LLP

20070085148 - Trench igbt for highly capacitive loads: An IGBT for controlling the application of power to a plasma display panel has an increased current conduction capability and a reduced conduction loss at the expense of a reduced safe operating area. For a device with a 300 volt breakdown voltage rating, the die has a substrate resistivity less... Agent: Ostrolenk Faber Gerb & Soffen

20070085149 - Integrated circuit eliminating source/drain junction spiking: An integrated circuit with a semiconductor substrate is provided. A gate dielectric is on the semiconductor substrate, and a gate is on the gate dielectric. A metallic layer is on the semiconductor substrate, and the metallic layer is reacted with the semiconductor substrate to form an early phase of silicide.... Agent: Ishimaru & Zahrt LLP

20070085150 - Non-volatile semiconductor memory device and method of manufacturing the same: A non-volatile semiconductor memory device is disclosed, which comprises a memory cell unit including at least one memory cell transistor formed on a semiconductor substrate and having a laminated structure of a charge accumulation layer and a control gate layer, and a selection gate transistor one of the source/drain diffusion... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070085151 - Semiconductor device and method for fabricating the same: Both a compressive-stress-applying insulating film and a tensile-stress-applying insulating film cover an N-type MIS transistor formed at an SRAM access region of a semiconductor substrate. On the other hand, a tensile-stress-applying insulating film covers an N-type MIS transistor formed at an SRAM drive region of the semiconductor substrate.... Agent: Mcdermott Will & Emery LLP

20070085152 - Reduced area dynamic random access memory (dram) cell and method for fabricating the same: A reduced area dynamic random access memory (DRAM) cell and method for fabricating the same wherein the cell occupies an area smaller than one photolithography pitch by two photolithography pitches through the formation of sidewall spacers along a first pattern to define a first portion of the active region of... Agent: Hogan & Hartson LLP

20070085153 - Voltage controlled oscillator with a multiple gate transistor and method therefor: A voltage controlled oscillator (VCO) has a plurality of series-connected inverters. Within each inverter a first transistor has a first current electrode coupled to a first power supply voltage terminal, a second current electrode, a first control electrode coupled to an output terminal of another inverter of the plurality of... Agent: Freescale Semiconductor, Inc. Law Department

20070085154 - Forming method and forming system for insulation film: A gate insulation film (104) of a MISFET (100) is constituted of a silicon oxide film (106), silicon nitride film (107), and high-permittivity film (108). The silicon oxide film (106) and silicon nitride film (107) are formed by microwave plasma processing with a radial line slot antenna.... Agent: Crowell & Moring LLP Intellectual Property Group

20070085155 - Optically-configurable nanotube or nanowire semiconductor device: The invention relates to a semiconductor device comprising at least two electrodes and at least one nanotube or nanowire, in particular a carbon nanotube or nanowire, the device including at least one semiconductive nanotube or nanowire having at least one region that is covered at least in part by at... Agent: Alston & Bird LLP

20070085156 - Passive electrically testable acceleration and voltage measurement devices: Acceleration and voltage measurement devices and methods of fabricating acceleration and voltage measurement devices. The acceleration and voltage measurement devices including an electrically conductive plate on a top surface of a first insulating layer; a second insulating layer on a top surface of the conductive plate, the top surface of... Agent: Schmeiser, Olsen & Watts

20070085157 - Integrated proximity sensor and light sensor: Apparatuses and methods to sense proximity and to detect light. In one embodiment, an apparatus includes an emitter of electromagnetic radiation and a detector of electromagnetic radiation; the detector is configured to detect electromagnetic radiation from the emitter when the apparatus is configured to sense proximity, and the emitter is... Agent: Blakely Sokoloff Taylor & Zafman

20070085158 - Apparatus comprising an avalanche photodiode: Avalanche photodiodes are provided, wherein the APDs provide both high optical coupling efficiency and low dark count rate. The APDs are formed such that their cap layer has an active region of sufficient width to enable high optical coupling efficiency but the APD still exhibits a low dark count rate.... Agent: Demont & Breyer, LLC

20070085159 - Image correlation sensor: A sensor includes an array of substantially parallel wires, radiant energy sensitive material formed adjacent the array of parallel wires, and output units connected to each of the wires and constructed to provide an analog correlation vector output responsive to radiant energy incident on the sensor. The sensor is constructed... Agent: Blaise Mouttet

20070085160 - Process for resurf diffusion for high voltage mosfet: A starting wafer for high voltage semiconductor devices is formed by implanting arsenic into the top surface of a p type silicon substrate wafer to a depth of about 0.1 micron. A N type non-graded epitaxial layer is then grown atop the substrate without any diffusion step so that the... Agent: Ostrolenk, Faber, Gerb & Soffen, LLP

20070085162 - Capping of copper structures in hydrophobic ild using aqueous electro-less bath: Capping of copper structures in hydrophobic interlayer dielectric layer, using aqueous electro-less bath is described herein.... Agent: Schwabe, Williamson & Wyatt, P.C.

20070085163 - Gallium nitride thin film on sapphire substrate having reduced bending deformation: p

20070085161 - Integrated semiconductor temperature detection apparatus and method: An integrated semiconductor apparatus (300)(such as, but not limited to, a radio frequency power device) is comprised of a plurality of active device cells (302, 303), a plurality of temperature detectors (304, 305), and a controller (308). The active device cells are preferably each comprised of a plurality of active... Agent: Motorola, Inc.

20070085164 - Method of manufacture for a trench isolation structure having an implanted buffer layer: The present invention provides a trench isolation structure, a method of manufacture therefor and a method for manufacturing an integrated circuit including the same. The trench isolation structure (130), in one embodiment, includes a trench located within a substrate (110), the trench having an implanted buffer layer (133) located in... Agent: Texas Instruments Incorporated

20070085165 - Capacitor, semiconductor device including the capacitor and methods of fabricating the same: A capacitor, a semiconductor device and methods of fabricating the same are disclosed. The capacitor may include a lower electrode, a dielectric layer covering an upper surface of the lower electrode and having a width wider than that of the lower electrode and an upper electrode covering an upper surface... Agent: Harness, Dickey & Pierce, P.L.C

20070085166 - Printed circuit board with film capacitor embedded therein and method for manufacturing the same: The invention provides a PCB with a thin film capacitor embedded therein and a method for manufacturing the same. The PCB includes a lower electrode formed on an insulating substrate; an amorphous paraelectric film formed on the lower electrode via low temperature film formation; a buffer layer formed on the... Agent: Mcdermott Will & Emery LLP

20070085167 - Heterojunction bipolar transistor and method for manufacturing same: A bipolar transistor 120 comprises a substrate 1, a intrinsic base region 11 and an extrinsic base region 12. The intrinsic base region 11 comprises a silicon buffer layer 109 comprised of silicon which is formed on the substrate 1, and a composition-ratio graded base layer 111 which is formed... Agent: Mcdermott Will & Emery LLP

20070085168 - High-frequency switching device: A high-frequency switching device comprises a connecting region having a first conductivity type, and a first barrier region bordering on the connecting region and having a second conductivity type. A semiconductor region border on the first barrier region and has a dopant concentration which is lower than a dopant concentration... Agent: Maginot, Moore & Beck Chase Tower

20070085169 - Semiconductor thin film forming method and semiconductor device: A polycrystal thin film forming method comprising the step of forming a semiconductor thin film on a substrate 14, and the step of flowing a heated gas to the semiconductor thin film while an energy beam 38 is being applied to the semiconductor thin film at a region to which... Agent: Armstrong, Kratz, Quintos, Hanson & Brooks, LLP

20070085170 - Single crystalline a-plane nitride semiconductor wafer having orientation flat: A single crystalline a-plane nitride semiconductor wafer includes one to three orientation flats in a crystalline direction, wherein a-plane ({11-20} plane) is formed as a main plane. Since plane orientation can easily be recognized, accuracy can be improved when a semiconductor device is formed on the nitride semiconductor wafer.... Agent: Mcdermott Will & Emery LLP

20070085171 - Semiconductor assembly for improved device warpage and solder ball coplanarity: A semiconductor device with a chip (505), its position defining a plane, and an insulating substrate (503) with first and second surfaces; the substrate is substantially coplanar with the chip, without warpage. One of the chip sides is attached to the first substrate surface using adhesive material (504), which has... Agent: Texas Instruments Incorporated

20070085172 - System-on-chip with shield rings for shielding functional blocks therein from electromagnetic interference: A system-on-chip (SoC) that is immune to electromagnetic interference has block shield rings fabricated therein. The SoC includes a microprocessor core; an on-chip bus interface; an embedded memory block; and an analog/mixed-signal integrated circuit shielded by an EMI shield ring encircling the analog/mixed-signal integrated circuit for protecting the analog/mixed-signal integrated... Agent: North America Intellectual Property Corporation

20070085174 - Apparatus and method for providing bypass capacitance and power routing in qfp package: An integrated circuit packaging apparatus includes a first conductive layer disposed between an integrated circuit die and a conductive die paddle. Bond wires connect the first conductive layer to the lead frame package and to the integrated circuit die. A first dielectric layer is disposed between the first conductive layer... Agent: Avago Technologies, Ltd.

20070085173 - Method and apparatus for providing double-sided cooling of leadframe-based wire-bonded electronic packages: A method and apparatus for providing double-sided cooling of leadframe-based wire-bonded electronic packages. The method includes the steps of: positioning a plurality of heatslug members (140) over a corresponding plurality of electronic packages (100′) formed on a leadframe strip (142), wherein each of the heatslug members includes a heatslug (130)... Agent: Philips Intellectual Property & Standards

20070085175 - Selective solder deposition by self-assembly of nano-sized solder particles, and methods of assembling soldered packages: A nano-sized solder suspension flows by selective wetting onto a bond pad and away from a bond-pad resist area. A microelectronic package is also disclosed that uses the nano-sized solder suspension. A method of assembling a microelectronic package is also disclosed. A computing system is also disclosed that includes a... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070085176 - Chip package having asymmetric molding: A chip package having asymmetric molding includes a lead frame, a chip, an adhesive layer, bonding wires and a molding compound. The lead frame includes a turbulent plate and a frame body having inner lead portions and outer lead portions. The turbulent plate is bended downwards to form a concave... Agent: J.c. Patents, Inc.

20070085178 - Conductor substrate, semiconductor device and production method thereof: A conductor substrate for mounting a semiconductor element, at least a portion thereof mounting the semiconductor element being sealed with an insulating resin, wherein an uppermost surface layer of the conductor substrate comprises copper or an alloy thereof, and the conductor substrate is partly or entirely covered with a layer... Agent: Staas & Halsey LLP

20070085177 - Semiconductor package with position member: The present disclosure provides a very thin semiconductor package including a leadframe with a die-attach pad and a plurality of lead terminals, a die attached to the die-attach pad and electrically connected to the lead terminals via bonding wires, a position member disposed upon the die and/or die-attach pad, and... Agent: Stmicroelectronics, Inc.

20070085179 - Automotive plastic lead frame sensor: A plastic lead frame, electrical component system, and method using plastic-injection, plating, and known photolithography techniques are disclosed. The plastic lead frame and electrical component system operates with an integrated circuit, which functions as a sensor, such as an automotive gear tooth sensor. The plastic lead frame includes electrical contacts... Agent: Kris T. Fredrick Honeywell International Inc.

20070085180 - Image sensor mounted by mass reflow: A package for semiconductor image pickup device is provided. The package is fabricated by using flip chip bumping. During deposition process of forming a metallic bonding layer and a metal layer for plating, a surface of a semiconductor image pickup device is maintained at the range between room temperature and... Agent: Marger Johnson & Mccollom, P.C.

20070085181 - Power semiconductor module with overcurrent protective device: A power semiconductor module having at least one fuse. The power semiconductor module comprises a housing, load terminal elements that lead outside of the housing, and a substrate disposed inside the housing with a plurality of metal connecting tracks of different polarity electrically insulated from one another. On at least... Agent: Cohen, Pontani, Lieberman & Pavane

20070085182 - Semiconductor device and fabrication method thereof: A semiconductor device includes a semiconductor chip having a plurality of electrode pads, and a rewiring pattern having a plurality of interconnects which are connected to the electrode pads and extend over an insulation film. The semiconductor device also includes a plurality of columnar electrodes each of which has a... Agent: Volentine Francos, & Whitt PLLC

20070085183 - Integrated circuit: An integrated circuit is provided. The integrated circuit comprises a plurality of electrode pads that are exposed through openings of a surface protective layer. An NG identification marker is attached to the integrated circuit. An NG marker pad is separate from the plurality of electrode pads and exposed through an... Agent: Brinks Hofer Gilson & Lione

20070085190 - Decoupling capacitor closely coupled with integrated circuit: An integrated circuit module, decoupling capacitor assembly and method are disclosed. The integrated circuit module includes a substrate and integrated circuit die mounted on the substrate and having die pads and an exposed surface opposite from the substrate. A plurality of substrate bonding pads are positioned on the substrate adjacent... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist P.A.

20070085189 - Semiconductor chip and method of manufacturing semiconductor chip: A semiconductor chip includes a semiconductor substrate having a first principal surface, and having a device layer on the first principal surface in which a semiconductor device is formed, an electrode pad disposed on the first principal surface of the semiconductor substrate and electrically connected to the semiconductor device, a... Agent: Ladas & Parry LLP

20070085188 - Stack structure of carrier board embedded with semiconductor components and method for fabricating the same: A stack structure of a carrier board embedded with semiconductor components and a method for fabricating the same are proposed. The stack structure includes first and second carrier boards having a through hole respectively, first and second semiconductors component disposed in through holes of the first and second semiconductor components... Agent: Fulbright And Jaworski LLP

20070085184 - Stacked die packaging system: A substrate is provided. A first die is placed on the substrate. A film spacer is attached to the first die and a second die is placed on the film spacer. The substrate, the first die, the film spacer, and the second die are encapsulated in an encapsulant.... Agent: Ishimaru & Zahrt LLP

20070085185 - Stacked integrated circuit chip assembly: A stacked arrangement of integrated circuit chips are bonded to a lead frame. Two side-by-side integrated circuit chips have bottom contact pads bonded to a lead frame structure having contact terminals. The two side-by-side integrated circuits have top contact pads bonded to an overlying integrated circuit chip. A low profile... Agent: Handley Law Firm, PLLC Roger N. Chauza, PC

20070085186 - Stacked-type chip package structure: A stacked-type chip package structure including a substrate, a first chip, bonding wires, a second chip and B-stage conductive bumps is provided. The first chip is disposed on the substrate, and it has first bonding pads disposed on an active surface thereof. Besides, the first bonding pads are electrically connected... Agent: J.c. Patents, Inc.

20070085187 - Vertically packaged mosfet and ic power devices as integrated module using 3d interconnected laminates: An electronic package for containing at least a top packaging module vertically stacked on a bottom packaging module. Each of the packaging modules includes a semiconductor chip packaged and connected by via connectors and connectors disposed on a laminated board fabricated with a standard printed-circuit board process wherein the top... Agent: Bo-in Lin

20070085191 - Lead pin, circuit, semiconductor device, and method of forming lead pin: A lead pin of a circuit includes a pin, an insulator that surrounds the pin, and a conductor that surrounds the insulator, the conductor including non-uniformity.... Agent: Mcginn Intellectual Property Law Group, PLLC

20070085192 - Method for producing micromechanical components in integrated circuits and arrangement of a semiconductor on a substrate: A semiconductor component includes a substrate with an active side that includes connection regions disposed thereon. A die includes an upper metallization layer disposed over an upper surface. Integrated circuitry is disposed at the upper surface of the die and a passive side of the die is disposed on the... Agent: Slater & Matsil LLP

20070085193 - Printed wiring board and method of suppressing power supply noise thereof: Disclosed is a printed wiring board having signal layers each interposed between a power supply layer and a ground layer, wherein the signal layer includes at least one of a wiring region for a ground potential and a wiring region for a power supply potential.... Agent: Norman P. Soloway Hayes Soloway P.C.

20070085194 - Dielectric composite material: A dielectric composite material containing a toughened benzocyclobutene resin and at least about 50% by weight of an inorganic filler. Also electronic packages having at least one conductive layer and at least one layer of the dielectric composite material. The dielectric composite material can have a dielectric constant less than... Agent: 3m Innovative Properties Company

20070085195 - Wafer level packaging cap and fabrication method thereof: A wafer level packaging cap for covering a device wafer with a device thereon and a fabrication method thereof are provided. The method includes operations of forming a plurality of connection grooves on a wafer, forming a seed layer on the connection grooves, forming connection parts by filling the connection... Agent: Sughrue Mion, PLLC

20070085196 - Light emitting diode package: A light emitting diode (LED) package is provided. The LED package comprises a first lead, a second lead, a heat dissipater, a housing, a conductor and an LED chip. The dissipater is disposed between the first lead and the second lead. The housing covers the heat dissipater and parts of... Agent: J C Patents, Inc.

20070085197 - Semiconductor insulation structure: A semiconductor insulation structure is disclosed for a semiconductor module, incorporating therein a semiconductor element, with which an electrically conductive structural body is held in pressured contact via an intervening insulation member. The semiconductor insulation structure includes a deformation preventing structure to avoid the insulation member from deforming when applied... Agent: Nixon & Vanderhye, PC

20070085198 - Integrated micro-channels for 3d through silicon architectures: Some embodiments of the present invention include apparatuses and methods relating to integrated micro-channels for removing heat from 3D through silicon architectures.... Agent: Blakely Sokoloff Taylor & Zafman

20070085199 - Integrated circuit package system using etched leadframe: An integrated circuit package system includes a conductive substrate. A heat sink and a plurality of leads are etched in the substrate to define a conductive film connecting the heat sink and the plurality of leads to maintain their spatial relationship. A die is attached to the heat sink and... Agent: Ishimaru & Zahrt LLP

20070085200 - Capacitor interconnection: A substrate for power decoupling and a method of forming a substrate for power decoupling. The substrate comprises one or more decoupling capacitors; and one or more interconnections to the decoupling capacitors. At least one of the interconnections comprises a lossy material.... Agent: Hugh R. Kress Browning Bushman P.C.

20070085201 - Power semiconductor device in lead frame technology with a vertical current path: One aspect of the invention relates to a power semiconductor device in lead frame technology and a method for producing the same. The power semiconductor device has a vertical current path through a power semiconductor chip. The power semiconductor chip has at least one large-area electrode on its top side... Agent: Dicke, Billig & Czaja, P.l.l.c.

20070085203 - Multilayer printed wiring board: A multilayer printed wiring board is equipped with a core board 20, a build-up layer 30 formed on the core board 20 so as to have a conductor pattern 32 on the upper surface thereof, a low-elasticity layer 40 formed on the build-up layer 30, lands 52 that are provided... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070085202 - Semiconductor device and communication system using the semiconductor device: With respect to a semiconductor device which communicates data by wireless communication, an object of the present invention is to improve sensitivity of an antenna and to protect a chip from noise without increasing the size of the device. A coiled antenna and a semiconductor integrated circuit which is electrically... Agent: Eric Robinson

20070085206 - Chip packaging process: A chip packaging process includes providing a wafer, having an active surface and a backside. The wafer has a first chip area and a second chip area adjacent to the first chip area. The wafer has several first and second bond pads on the active surface in the first and... Agent: J C Patents, Inc.

20070085204 - Chip scale power ldmos device: A semiconductor device includes at least one macro-cell device, the macro-cell device comprising a plurality of LDMOS devices. A first conductive layer is formed over the substrate, the first conductive layer providing source and drain contacts for the macro-cell device. A first isolation layer is formed over the first conductive... Agent: Duane Morris, LLPIPDepartment

20070085205 - Semiconductor device with electroless plating metal connecting layer and method for fabricating the same: A semiconductor device with electroless plating metal connecting layer and a method for fabricating the same are proposed. A supporting board with at least one cavity is provided. At least one semiconductor chip with a plurality of copper electrode pads is received in the cavity and an insulating protecting layer... Agent: Mr. Joseph A. Sawyer, Jr. Sawyer Law Group LLP

20070085207 - Pad structure, method of forming a pad structure, semiconductor device having a pad structure and method of manufacturing a semiconductor device: A pad structure, a method of forming a pad structure, a semiconductor device having a pad structure and a method of manufacturing a semiconductor device are disclosed. The pad structure may include a first pad, a second pad, a third pad and/or a spacer. The first pad may contact a... Agent: Harness, Dickey & Pierce, P.L.C

20070085209 - Anchored damascene structures: An anchored conductive damascene buried in a multi-density dielectric layer and method for forming the same, the anchored conductive damascene including a dielectric layer with an opening extending through a thickness of the dielectric layer; wherein the dielectric layer comprises at least one relatively higher density portion and a relatively... Agent: Tung & Associates

20070085212 - Dielectric composite material: A dielectric composite material containing a toughened benzocyclobutene resin and at least about 50% by weight of an inorganic filler. Also electronic packages having at least one conductive layer and at least one layer of the dielectric composite material. The dielectric composite material can have a dielectric constant less than... Agent: 3m Innovative Properties Company

20070085208 - Interconnect structure: An interconnect structure is described, disposed on a substrate with a conductive part thereon and including a first porous low-k layer on the substrate, a damascene structure in the first porous low-k layer electrically connecting with the conductive part, a second porous low-k layer over the first porous low-k layer... Agent: Jianq Chyun Intellectual Property Office

20070085210 - Interconnect structure and fabricating method thereof: An interconnect structure is described, disposed on a substrate with a conductive part thereon and including a first porous low-k layer on the substrate, a damascene structure in the first porous low-k layer electrically connecting with the conductive part, a second porous low-k layer over the first porous low-k layer... Agent: Jianq Chyun Intellectual Property Office

20070085211 - Semiconductor device and method for manufacturing the same: A second interlayer insulating film is formed on a first interlayer insulating film and a wiring including a Cu film, and a via and a trench are formed in the second interlayer insulating film so as to expose the Cu film. After a hollow having an inner diameter larger than... Agent: Mcdermott Will & Emery LLP

20070085213 - Selective electroless-plated copper metallization: Structures and methods are provided which include a selective electroless copper metallization. The present invention includes a novel methodology for forming copper vias on a substrate, including depositing a thin film seed layer of Palladium (Pd) or Copper (Cu) on a substrate to a thickness of less than 15 nanometers... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070085214 - Semiconductor device: A semiconductor device has a semiconductor chip which is usable as any one of 4-bit, 8-bit, and 16-bit structure devices, and a package for packaging the semiconductor chip. The semiconductor chip has first and second DQ pad groups of DQ system pads for said 16-bit structure device. The first DQ... Agent: Whitham, Curtis & Christofferson & Cook, P.C.

20070085218 - Flip chip package: A flip chip package structure is provided. A chip is electrically connected to a substrate. A heat sink is attached to the backside of the chip. The heat sink has at least a through hole located at a peripheral region and laterally adjacent to the chip. A dispensing process is... Agent: Jianq Chyun Intellectual Property Office

20070085217 - Mounting board and semiconductor device: A mounting board on which a semiconductor chip having multiple connection bumps is to be mounted by flip-chip bonding is disclosed. The mounting board includes multiple connection pads to be electrically connected to the corresponding connection bumps, where the connection pads have respective surfaces coated with solder; and an insulating... Agent: Ladas & Parry LLP

20070085216 - Semiconductor device having a semiconductor chip, and method for the production thereof: A semiconductor device having a semiconductor chip having an active surface with flip-chip contacts and a passive surface is disclosed. In one embodiment, the flip-chip contacts are surrounded by an electrically insulating layer as underfill material, the layer having a UV B-stageable material. The UV B-stageable material is applied on... Agent: Dicke, Billig & Czaja, P.l.l.c.

20070085215 - Silicon based optical vias: Method of fabricating a semiconductor die with a microlens associated therewith. More particularly, a method for fabricating a vertical channel guide optical via through a silicon substrate wherein the optical via can contain lens elements, a discrete index gradient guiding pillar and other embodiments. Also disclosed are means for transferring,... Agent: Thomas A. Beck Esq.

20070085219 - Method for manufacture of wafer level package with air pads: A structure for improving electrical performance and interconnection reliability of an integrated circuit in a Wafer Level Packaging (WLP) application comprises an air pad located under an interconnection metal solder pad. Using a low dielectric material such as air underlying the interconnection pad, pad capacitance is reduce, thereby improving the... Agent: Lee & Morse, P.C.

20070085220 - Re-enforced ball-grid array packages for semiconductor products: A semiconductor device (700) comprising a sheet-like substrate (701) of insulating material, the substrate having first and second surfaces; a plurality of conductive terminals (702) on the first substrate surface; at least one elastic member (705) protruding from each terminal; the members at least partially enclosed by a reflow element... Agent: Texas Instruments Incorporated

20070085222 - Molded integrated circuit package with exposed active area: An integrated circuit die having an active area that must remain exposed after packaging is secured by a compliant die attachment by which the integrated circuit die is held in position within a transfer mold during encapsulation. The compliant die attachment may comprise a flexible, compressible tape having pressure-sensitive adhesive,... Agent: Stmicroelectronics, Inc.

20070085221 - Semiconductor device and manufacturing method thereof: The semiconductor device having a bonding pad is provided. The bonding pad enables highly reliable connection and high flexibility of the selection of the area to be bonded. The semiconductor device includes a bonding pad and an area designation marking. The bonding pad includes a first region, a second region... Agent: Mcginn Intellectual Property Law Group, PLLC

20070085223 - Mechanism and process for compressing chips: A chip compressing mechanism is provided. The chip compressing mechanism essentially comprises a loading component, a head component, a gimbal and a plurality of fixing pieces. The head component is disposed under the loading component, with a gap in-between. The gimbal is disposed between the loading component and the head... Agent: Jianq Chyun Intellectual Property Office

20070085224 - Semiconductor device having strong adhesion between wiring and protective film, and manufacturing method therefor: A semiconductor device has a semiconductor substrate having a plurality of connection pads on an upper surface thereof, a protective film made of a resin which is provided on the semiconductor substrate, and has openings at those portions to which the respective connection pads correspond, an altered layer having a... Agent: Frishauf, Holtz, Goodman & Chick, PC

20070085225 - Encapsulation of a chip module: A chip module with a substrate having a top side, a chip mounted on the top side of the substrate, and an encapsulation includes an encapsulation material. The encapsulation is applied on the chip and the top side of the substrate in such a way that the chip and the... Agent: Dickstein Shapiro LLP

20070080335 - Gettering using voids formed by surface transformation: One aspect of this disclosure relates to a semiconductor structure, comprising a gettering region proximate to a device region in a semiconductor wafer. The gettering region includes a precisely-determined arrangement of a plurality of precisely-formed voids through a surface transformation process. Each of the voids has an interior surface that... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A. Attn: Marvin L. Beckman

20070080336 - Image sensors and methods of manufacturing the same: Image sensors and methods of manufacturing an image sensor are disclosed. A disclosed photo diode may receive short wavelength light in its depletion region without exhibiting defective phenomenon such as noise and dark current. In the illustrated example, this performance is achieved by forming a trench type light-transmission layer to... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20070080338 - Infra-red light-emitting device: The present infra-red light-emitting device includes a substrate with a first window layer, a silicon dioxide layer positioned on the first window layer, silicon nanocrystals distributed in the silicon dioxide layer, a second window layer, a transparent conductive layer and a first ohmic contact electrode positioned in sequence on the... Agent: Egbert Law Offices

20070080337 - Radiation emitting component: A radiation-emitting component (1) comprising a radiation source, a housing body (6), a radiation exit side (16), an underside (17) which is opposite the radiation exit side (16), a side surface (18) which connects the radiation exit side (16) and the underside (17), and at least one first contact region... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20070080339 - Universal gates for ising tqft via time-tilted interferometry: Experiments suggest that the mathematically weakest non-abelian TQFT may be physically the most robust. Such TQFT's—the v=5/2 FQHE state in particular—have discrete braid group representations, so one cannot build a universal quantum computer from these alone. Time tilted interferometry provides an extension of the computational power (to universal) within the... Agent: Woodcock Washburn LLP (microsoft Corporation)

20070080340 - Variable capacitor single-electron device: The present invention provides a single-electron transistor device 100. The device comprises a source 105 and drain 110 located over a substrate 115 and a quantum island 120 situated between the source and drain, to form tunnel junctions 125, 130 between the source and drain. The device further includes a... Agent: Texas Instruments Incorporated

20070080341 - Systems, methods and apparatus for factoring numbers: Systems, methods and apparatus for factoring numbers are provided. The factoring may be accomplished by creating a factor graph, mapping the factor graph onto an analog processor, initializing the analog processor to an initial state, evolving the analog processor to a final state, and receiving an output from the analog... Agent: Seed Intellectual Property Law Group PLLC

20070080342 - Method for producing tris-ortho-metallated complexes and use of such complexes in oleds: where R1, R2, R3, R4, R5, R6 and X have the meanings given in the description, Ir complexes which can be prepared by the process of the invention, the use of the Ir complexes as emitter molecule in organic light-emitting diodes (OLEDs), a light-emitting layer comprising the Ir complexes, an... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070080343 - New materials for electroluminescence and the utilization thereof: The present invention relates to organic semiconductors which contain structural units L=X and in addition structural units which emit light from the triplet state. The materials according to the invention are more soluble and easier to synthesise and are therefore more suitable for use in organic light-emitting diodes than comparative... Agent: Connolly Bove Lodge & Hutz, LLP

20070080346 - Organic thin film transistor array panel: An organic thin film transistor array panel according to an embodiment of the present invention includes: a substrate; a first signal line disposed on the substrate; a second signal line intersecting the first signal line; a source electrode connected to the first signal line; a drain electrode separated from source... Agent: Macpherson Kwok Chen & Heid LLP

20070080344 - Thin film diode panel for trans-reflective liquid crystal display: A thin film diode panel has a insulating substrate, a first and second gate lines (121, 122) formed on the insulating substrate, a reflection electrode (190a) and a transmission electrode (190b) formed on the insulating substrate, A first MIM diode (D1) is formed on the insulating substrate and connected to... Agent: Macpherson Kwok Chen & Heid LLP

20070080345 - Volatile negative differential resistance device using metal nanoparticles: Disclosed herein is a volatile negative differential resistance device using metal nanoparticles, the device includes an organic layer disposed between two metal electrodes, in which the organic layer includes uniformly dispersed metal nanoparticles having a diameter of about 10 nm or less in an organic material. The device of this... Agent: Cantor Colburn, LLP

20070080347 - Test pattern of cmos image sensor and method of measuring process management using the same: The test pattern according to the present invention consists of an opaque metal film pattern formed on a semiconductor substrate, an insulating film formed on the semiconductor substrate and the metal film pattern, a red color filter formed on the insulating film, a planarization layer formed on the insulating film... Agent: Mayer, Brown, Rowe & Maw LLP

20070080348 - Active device array substrate: An active device array substrate is provided. The active device array substrate comprises a substrate, multiple first lines, second lines, active devices, pixel electrodes and common lines. The first lines and second lines are disposed on the substrate and they form multiple pixel regions on the substrate. The active devices... Agent: J.c. Patents, Inc.

20070080350 - Panel for flexible display device and manufacturing method thereof: A flexible display panel according to an embodiment of the present invention includes a flexible substrate, a gate line formed on the substrate and including a gate electrode, a gate insulating layer formed on the substrate, a semiconductor layer formed on the gate insulating layer and disposed substantially on the... Agent: F. Chau & Associates, LLC

20070080349 - Substrate for display device and liquid crystal display device having the same: The present invention relates to a substrate for a liquid crystal display device and a liquid crystal display device having the substrate, an object of the invention is to provide such a substrate for a display device that can be obtained by a simple production method with high reliability, and... Agent: Birch Stewart Kolasch & Birch

20070080351 - Display device: A display device comprises a first substrate which has a line-forming surface, a second substrate which is arranged opposite to the line-forming surface by a gap interposed and has peripheral edge bonded to the first substrate, a plurality of display elements which are provided between the first substrate and the... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070080352 - Light-emitting diode chip: A LED chip includes a substrate, a semiconductor layer, a micro-rough layer, a first electrode and a second electrode. The semiconductor layer is disposed on the substrate, the micro-rough layer is disposed in the semiconductor layer, or between the semiconductor layer and the substrate, or on an upper surface of... Agent: Jianq Chyun Intellectual Property Office

20070080353 - Nitride-based semiconductor light emitting diode and method of manufacturing the same: A nitride-based semiconductor LED includes a substrate; an n-type nitride semiconductor layer formed on the substrate; an active layer and a p-type nitride semiconductor layer that are sequentially formed on a predetermined region of the n-type nitride semiconductor layer; a transparent electrode formed on the p-type nitride semiconductor layer; a... Agent: Mcdermott Will & Emery LLP

20070080354 - Power package and fabrication method thereof: The present invention relates to a combined light emitting diode (LED) package structure and a fabricating method for fabricating the same. The combined LED package structure includes an LED chip, a conductive structure and an encapsulant. The encapsulant encapsulates the LED chip and a portion of the conductive structure. The... Agent: Birch Stewart Kolasch & Birch

20070080355 - Alternating current light-emitting device: An alternating current light-emitting device and the fabrication method thereof is disclosed. The alternating current light-emitting device includes at least one alternating current micro-die light-emitting module formed on a substrate and composed of at least two micro-dies connected to one another. The micro-dies, each includes at least two active layers,... Agent: Birch Stewart Kolasch & Birch

20070080356 - Display device and method for manufacturing display device: A display device and a method for manufacturing the display device are provided. The display device includes an organic layer on an auxiliary wiring is removed with high precision by one operation and, thereby, the yield and the productivity are improved. A lower electrode is formed by patterning in each... Agent: Bell, Boyd & Lloyd, LLP

20070080357 - Optical device package structure: An LED is mounted on a mounting portion of a lead frame with its light-emitting portion facing an aperture. Wires that connect the LED to lead portions of the lead frame are placed on the side on which the LED is mounted. A light-transmitting resin, which transmits light emitted from... Agent: Edwards & Angell, LLP

20070080358 - White light emitting device: There is provided a white light emitting device including a light emitting chip, which can emit a first light having a wavelength between 340 nm and 495 nm; an organic phosphor layer, which is formed by applying an organic polymer on the output surface of the light emitting chip using... Agent: Bacon & Thomas, PLLC

20070080362 - Led with light transmissive heat sink: An more efficient or higher luminance LED assembly may be formed from a high power LED chip having a first surface, and a second surface, the first surface being mounted to a substrate; the second surface being in intimate thermal contact with a light transmissive heat sink having a thermal... Agent: Osram Sylvania Inc

20070080360 - Microelectronic interconnect substrate and packaging techniques: A LED (Light Emitting Diode) substrate and packaging for a single diode or a diode array is described. The substrate includes an integral reflector(s) for the diode(s) in the form of a shaped cavity (or cavities) to house the diode die(s). The reflector cavity walls can optionally be plated with... Agent: Eitan Law Group C/o Landonip, Inc.

20070080361 - Optoelectronic semiconductor chip, method for producing it, and optoelectronic device: An optoelectronic semiconductor chip comprises a radiation passage area (2d), to which is applied a current spreading layer (4) containing particles (4b) of a wavelength conversion material. Furthermore, a method for producing such a semiconductor chip and also a device comprising such a semiconductor chip are specified.... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20070080359 - Plasma display apparatus: A plasma display apparatus comprises a plasma display panel comprising an electrode, a drive board and a connection unit adhered to a terminal of the drive board and electrically connected to the electrode.... Agent: Fleshner & Kim, LLP

20070080363 - Phosphor, light emitting device by using the same and manufacturing method of the same: Disclosed are a phosphor, which a light emitting device using the phosphor, and a method for producing the phosphor, which allows to control color coordinates, color temperatures and color rendering indexes by shifting a main emission peak without a decrease in light emission luminosity by changing the concentration of an... Agent: Birch Stewart Kolasch & Birch

20070080364 - White light emitting device capable of adjusting color temperature: A white light emitting device includes a first light emitting device, a photoluminescent phosphor, a second light emitting device, and a current adjuster. The first light emitting device has a light emitting layer made of semiconductor, and emits blue light. The photoluminescent phosphor completely absorbs light emitted by the first... Agent: Rosenberg, Klein & Lee

20070080365 - Gallium nitride-based compound semiconductor light-emitting device, positive electrode for the device, light-emitting diode and lamp using the device: An object of the present invention is to provide a flip-chip-type gallium nitride compound semiconductor light-emitting device exhibiting excellent ohmic characteristics, excellent bonding characteristics, and high emission output. The inventive flip-chip-type gallium nitride compound semiconductor light-emitting device comprises a substrate, an n-type semiconductor layer, a light-emitting layer, a p-type semiconductor... Agent: Sughrue Mion, PLLC

20070080369 - Group iii nitride semiconductor stacked structure and production method thereof: The inventive group III nitride semiconductor stacked structure comprises a substrate composed of R-plane sapphire (α-Al2O3), a buffer layer composed of aluminum gallium nitride (AlxGa1−xN: 0≦X≦1) formed on said substrate and an underlying layer composed of an A-plane group III nitride semiconductor (AlxGayInzN1−aMa: 0≦X≦1, 0≦Y≦1, 0≦Z≦1, and X+Y+Z=1; wherein, M... Agent: Sughrue Mion, PLLC

20070080367 - Nitride semiconductor and method for manufacturing thereof: A P-type nitride semiconductor and a method for manufacturing the same are provided. A nitride semiconductor includes a P-type nitride layer formed on a active layer, wherein the P-type nitride layer is a P-type nitride layer with the group 4 element doped.... Agent: Birch Stewart Kolasch & Birch

20070080368 - Nitride semiconductor light-emitting device and method of manufacture thereof: In a nitride semiconductor laser bar including a group III-V nitride semiconductor layer, on the front-side cavity end face, a separation layer of aluminum nitride is laid, and further on the separation layer, an end face coating film of aluminum oxide is laid. Likewise, on the rear-side cavity end face,... Agent: Harness, Dickey & Pierce, P.L.C

20070080366 - Nitride semiconductor substrate, and method for working nitride semiconductor substrate: A method for working a nitride semiconductor substrate, comprising the steps of: preparing a disk-shaped nitride semiconductor substrate comprising a plurality of striped regions having defect concentration regions in which crystal defect density is higher than in surrounding low defect regions; and forming a cut-out at a specific location along... Agent: Mcdermott Will & Emery LLP

20070080370 - Display device: A plurality of display elements each includes two signal lines: S1 and S2. An electrode 4, which is one of the electrodes constituting an element capacitor Cp, is connected to the signal line S1 via a switching element TFT1, while the other electrode 5 is connected to the signal line... Agent: Nixon & Vanderhye, PC

20070080371 - Display device: A display device which may include a first substrate and a second substrate facing each other to form a plurality of cells between the first and second substrates, a plurality of first electrodes and a plurality of second electrodes disposed between the first substrate and the second substrate, electron accelerating... Agent: Lee & Morse, P.C.

20070080372 - Composite structure with high heat dissipation: A composite structure is disclosed that includes a support wafer and a layered structure on the support wafer. The layered structure includes at least one layer of a monocrystalline material and at least one layer of a dielectric material. In addition, the layered structure materials and the thickness of each... Agent: Winston & Strawn LLP Patent Department

20070080373 - Semiconductor device and method for manufacturing the same: In a semiconductor device including a core transistor and an I/O transistor on the same semiconductor substrate, the core transistor includes a gate insulating film, a gate electrode, sidewalls, extension diffusion layers, and source/drain diffusion layers. The I/O transistor includes a gate insulating film, a gate electrode, sidewalls, and source/drain... Agent: Mcdermott Will & Emery LLP

20070080374 - Semiconductor device: Since a power source voltage is generated from a communication signal in a wireless chip, there is a risk that a large amount of voltage be generated in the wireless chip to electrically destroy a circuit in the case of supplying a strong communication signal. Therefore, the present invention is... Agent: Eric Robinson

20070080375 - Solid-state image sensor and method for producing the same: A main object of the present invention is to provide a solid-state image sensor capable of efficiently collecting a light beam when the central position of the light receiving element and the central position of the micro lens do not coincide with each other in the plan view owing to... Agent: Ladas & Parry LLP

20070080376 - Solid-state image pickup device, driving method for solid-state image pickup device and image pickup apparatus: A solid-state image pickup device includes a pixel array section including a plurality of unit pixels, a reference signal production section configured to generate a reference signal and output a detection value, a comparison section configured to compare a reset level upon resetting, a counter configured to start a counting... Agent: Sonnenschein Nath & Rosenthal LLP

20070080377 - Display device and method of manufacturing the same: A display device, and method for making the same, comprising a thin film transistor formed on a first insulating substrate, a pixel electrode electrically connected to the thin film transistor, an organic layer formed on the pixel electrode, a common electrode formed on the organic layer, a conductive layer formed... Agent: Cantor Colburn, LLP

20070080378 - Ultraviolet blocking layer: Methods and apparatuses are disclosed relating to blocking ultraviolet electromagnetic radiation from a semiconductor. Ultraviolet electromagnetic radiation, such as ultraviolet electromagnetic radiation generated by a plasma process, which may otherwise damage a semiconductor can be blocked from one or more layers below an ultraviolet blocking layer.... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20070080379 - Insulated gate field effect transistor: An insulated gate field effect transistor has a drain region (2,4), a body region (6) of opposite conductivity type and a source region (8) and an insulated gate (14) extending laterally over the body region (6), defining a channel region (30) extending in the body region (6) from a source... Agent: Philips Electronics North America Corporation Intellectual Property & Standards

20070080380 - Self-aligned gate isolation: Embodiments of the invention include a circuit with a transistor having a self-aligned gate. Insulating isolation structures may be formed, self-aligned to diffusions. The gate may then be formed self-aligned to the insulating isolation structures.... Agent: Intel Corporation C/o Intellevate, LLC

20070080384 - Phase change memory devices using magnetic resistance effect, methods of operating and methods of fabricating the same: A phase change memory device includes a substrate, a switching element formed in the substrate and a storage node connected to the switching element. The storage node may include a lower electrode connected to the switching element, a first phase change layer formed on the lower electrode, a magnetic resistance... Agent: Harness, Dickey & Pierce, P.L.C

20070080381 - Robust protective layer for mtj devices: MTJ devices commonly degrade when subjected to the heat treatments required by subsequent further processing. This problem has been overcome by protecting the MTJ's sidewalls with a two layer laminate. The first layer is laid down under oxygen-free conditions, no attempt being made to replace any oxygen that is lost... Agent: Stephen B. Ackerman

20070080382 - Semiconductor device: A silicide film is formed between a ferroelectric capacitor structure, which is formed by sandwiching a ferroelectric film between a lower electrode and an upper electrode, and a conductive plug (the conductive material constituting the plug is tungsten (W) for example). Here, an example is shown in which a base... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070080383 - Semiconductor device: A semiconductor device according to an embodiment of the present invention includes a semiconductor substrate; a ferroelectric capacitor arranged above the semiconductor substrate; an insulating protecting film covering a side surface of the ferroelectric capacitor; and a side wall film formed on a side surface of the ferroelectric capacitor through... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070080385 - Semiconductor device having vertical transistor and method of fabricating the same: There are provided a semiconductor device having a vertical transistor and a method of fabricating the same. The method includes preparing a semiconductor substrate having a cell region and a peripheral circuit region. Island-shaped vertical gate structures two-dimensionally aligned along a row direction and a column direction are formed on... Agent: Mills & Onello LLP

20070080386 - Dual damascene structure: A dual damascene structure is described, including a substrate, a dielectric layer, a hard mask layer, a contact and a conductive line. The dielectric layer is located on the substrate, the hard mask layer is on the dielectric layer, the contact is located in the dielectric layer, and a horizontal... Agent: Jianq Chyun Intellectual Property Office

20070080387 - Method and structure for a 1t-ram bit cell and macro: A one transistor (1T-RAM) bit cell and method for manufacture are provided. A metal-insulator-metal (MIM) capacitor structure and method of manufacturing it in an integrated process that includes a finFET transistor for the 1T-RAM bit cell is provided. In some embodiments, the finFET transistor and MIM capacitor are formed in... Agent: Slater & Matsil, L.L.P.

20070080388 - Capacitor assembly: A capacitor assembly includes a semiconductor substrate having an interlayer insulation film on a first main surface of the semiconductor substrate, and a conductive barrier layer formed on the interlayer insulation film. The capacitor assembly also includes a contact plug electrically connected to the conductive barrier layer through the interlayer... Agent: Volentine Francos, & Whitt PLLC

20070080389 - Dynamic control of capacitance elements in field effect structures: A field effect device includes at least one segmented field plate, each of the at least one segmented field plates having a plurality of segments that each form a plate of a capacitor, wherein the field effect device is connected to an electronic element that dynamically connects selected segments to... Agent: Philips Intellectual Property & Standards

20070080390 - Memory transistor and memory unit with asymmetrical pocket doping region: An integrated memory transistor and a memory unit including a plurality of integrated memory transistors is disclosed. Generally, the integrated memory transistor includes an electron source, a channel region, a control region, a charge storage region, a source-side pocket doping region, and a drain-side pocket doping region. The electron source... Agent: Brinks Hofer Gilson & Lione Infineon

20070080392 - Semiconductor device and method of fabricating the same: A semiconductor device according to one embodiment of the present invention includes: a semiconductor substrate; a gate electrode formed on the semiconductor substrate through a gate insulating film; an elevated source/drain region formed away from the gate electrode, a surface of the elevated source/drain region being higher than that of... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070080393 - Semiconductor device having n-channel type mos transistor with gate electrode layer featuring small average polycrystalline silicon grain size: In a semiconductor device including a semiconductor substrate, and an n-channel type MOS transistor produced in the semiconductor substrate, the n-channel type MOS transistor includes a gate insulating layer formed on the semiconductor substrate and having a thickness of at most 1.6 nm, and a gate electrode layer on the... Agent: Mcginn Intellectual Property Law Group, PLLC

20070080391 - Semiconductor device with front side metallization and method for the production thereof: A semiconductor device (2) has a semiconductor chip (16) the front side (1) of which has integrated circuit elements and an electrically conductive metallization structure (3) with chip contact areas (9). The metallization structure (3) has an electrically conductive patterned adhesion layer (6), which provides a low-resistance contact with silicon,... Agent: Baker Botts, L.L.P.

20070080394 - Nonvolatile memory: A nonvolatile memory includes a plurality of drain regions and a plurality of source regions, and a plurality of control gate regions. The drain regions and the source regions are formed on a semiconductor chip so as to extend parallel to each other and extend between opposite ends of the... Agent: Volentine Francos, & Whitt PLLC

20070080395 - Lateral soi component having a reduced on resistance: An SOI semiconductor component comprises a semiconductor substrate having a basic doping, a dielectric layer arranged on the semiconductor substrate, and a semiconductor layer arranged on the dielectric layer. The semiconductor layer includes a drift zone of a first conduction type, a junction between the drift zone and a further... Agent: Maginot, Moore & Beck Chase Tower

20070080396 - Metal oxide semiconductor device and fabricating method thereof: A method of fabricating an MOS device is described. A substrate doped a first type dopant is provided as a drain. A first type epitaxial layer is formed on the substrate and is patterned with a trench to form several islands. A gate dielectric layer is than formed on the... Agent: J.c. Patents

20070080397 - Semiconductor device including field effect transistor having asymmetric structure and method of manufacturing the same: An objective of the present invention is to provide a semiconductor device capable of suppressing generation of the hot carriers while reducing resistance in a drain region, and a method of manufacturing the same. Specifically, the present invention provides a semiconductor device including a field effect transistor comprising a source... Agent: Mcdermott Will & Emery LLP

20070080398 - Fabricating method of a high voltage metal oxide semiconductor device: A high voltage metal oxide semiconductor device comprising a substrate, an N-type epitaxial layer, an isolation structure, a gate dielectric layer, a gate, an N-type drain region, a P-type well, an N-type source region, a first N-type well and a buried N-doped region is provided. The first N-type well is... Agent: Jianq Chyun Intellectual Property Office

20070080400 - Low noise vertical variable gate control voltage jfet device in a bicmos process and methods to build this device: We disclose the structure of a JFET device, the method of making the device and the operation of the device. The device is built near the top of a substrate. It has a buried layer that is electrically communicable to a drain terminal. It has a channel region over the... Agent: Texas Instruments Incorporated

20070080399 - Semiconductor device and production method therefor: A semiconductor device, including: a semiconductor substrate of a first conductivity; and a semiconductor layer provided on the semiconductor substrate and having a super junction structure including drift layers of the first conductivity and RESURF layers of a second conductivity different from the first conductivity, the drift layers and the... Agent: Rabin & Berdo, PC

20070080401 - Structure and method for forming asymmetrical overlap capacitance in field effect transistors: A method for forming asymmetric spacer structures for a semiconductor device includes forming a spacer layer over at least a pair of adjacently spaced gate structures disposed over a semiconductor substrate. The gate structures are spaced such that the spacer layer is formed at a first thickness in a region... Agent: Cantor Colburn LLP - IBM Fishkill

20070080402 - Semiconductor device and method for manufacturing the same: A semiconductor device includes a first insulator formed at a part under a semiconductor layer, a second insulator formed under the semiconductor layer in an arranged manner avoiding the first insulator and having a relative dielectric constant different from that of the first insulator, a backgate electrode formed under the... Agent: Oliff & Berridge, PLC

20070080403 - Low trigger voltage electrostatic discharge protection device: An ESD protection device with a low trigger voltage includes a semiconductor layer, a lightly doped well region formed in the semiconductor layer, a highly doped anode region formed in the well region, a highly doped cathode region formed in the semiconductor layer, a highly doped bridging region bridging a... Agent: Kinney & Lange, P.A.

20070080404 - Semiconductor device: A semiconductor device includes a substrate, a first oxide film lying on the substrate, a thin semiconductor film lying on the first oxide film, a first terminal formed on the semiconductor film, a second terminal formed on the semiconductor film, a semiconductor element formed on the semiconductor film and electrically... Agent: GlobalIPCounselors, LLP

20070080405 - Semiconductor device and method for fabricating the same: A semiconductor device includes: an isolation region formed in a semiconductor substrate; an active region surrounded by the isolation region in the semiconductor substrate; a gate insulating film formed on the active region; and a gate electrode formed across the boundary between the active region and the isolation region adjacent... Agent: Mcdermott Will & Emery LLP

20070080406 - Cmos device with zero soft error rate: A CMOS device and method of manufacture is provided for producing an integrated circuit that is not susceptible to various soft errors such as single-event upsets, multi-bit upsets or single-event latchup. The CMOS device and method utilizes a new and novel well architecture in conjunction with metal source/drain electrodes to... Agent: Dorsey & Whitney LLP Intellectual Property Department

20070080407 - Insulated gate bipolar transistor: An IGBT is provided which comprises N+ type extended region 9 sectively formed in P+ type collector region 1 to define a built-in diode in cooperation with N+ type extended region 9, an N− type base region 2 and a P− type base region 3 in semiconducting substrate 10. N−... Agent: Bachman & Lapointe, P.C.

20070080408 - Method for forming a silicidated contact: A method is described for forming an at least partially silicided contact. In one embodiment, a hardmask is deposited over a contact. A coating of sacrificial material is then provided on top of the hardmask. The sacrificial material coating is etched back until the top of the contact is exposed.... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP

20070080410 - Method of forming transistor having recess channel in semiconductor memory, and structure thereof: Embodiments of the invention include sequentially forming a pad oxide film and a mask film on a semiconductor substrate, and then forming an opening for partially exposing the pad oxide film. An undercut region is formed using the mask film as an etch mask, exposing a partial surface of the... Agent: Marger Johnson & Mccollom, P.C.

20070080409 - Mixed-signal semiconductor platform incorporating fully-depleted castellated-gate mosfet device and method of manufacture thereof: A Mixed-Signal Semiconductor Platform Incorporating Castellated-Gate MOSFET device(s) capable of Fully-Depleted operation is disclosed along with a method of making the same. The composite device/technology platform has robust I/O applications and includes a starting semiconductor substrate of a first conductivity type. One or more isolated regions of at least a... Agent: John J. Seliskar

20070080411 - Semiconductive film with dopant diffusion barrier and tunable work function: A method of fabricating a semiconductive film stack for use as a polysilicon germanium gate electrode to address problems associated with implant and diffusion of dopants. Achieving a sufficiently high active dopant concentration at a gate-dielectric interface while avoiding gate penetration of dopants such as boron is problematic. A higher... Agent: Schneck & Schneck

20070080412 - Electric acoustic converter and electronic device using the same: An electro-acoustic transducer wherein a stopper of a terminal is composed of an elastic body having an impulsive-force resistance and an excellent resilience. The stopper is mounted on the yoke or lower plate of magnetic circuit, which is made of a metallic material having an impulsive-force resistance. In this way,... Agent: Ratnerprestia

20070080413 - Cmos image sensor and method for manufacturing the same: A CMOS image sensor is provided. The CMOS image sensor incorporates a semiconductor substrate having a photodiode area and a transistor area; a trench area formed in the photodiode area; a transistor and a floating diffusion area formed on the transistor area; a first conductive type diffusion area formed on... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20070080415 - Complementary metal oxide semicoductor image sensor and method of fabricating the same: The CMOS image sensor includes one or more photodiodes formed on a semiconductor substrate to generate current in accordance with the amount of incident light, an interlayer insulating layer formed on the semiconductor substrate including the photodiodes, color filter layers formed on the interlayer insulating layer to transmit specific wavelengths,... Agent: Mayer, Brown, Rowe & Maw LLP

20070080414 - Optical ready substrates: An article of manufacture comprising an optical-ready substrate made of a first semiconductor layer, an insulating layer on top of the first semiconductor layer, and a second semiconductor layer on top of the insulating layer, wherein the second semiconductor layer has a top surface and is laterally divided into two... Agent: (bos) Wilmerhale/applied Materials

20070080416 - Semiconductor device and a method of manufacturing the same: A semiconductor device manufacturing technique which allows reduction of semiconductor chip size. First, a pad and other wires are formed over an insulating film. A surface protective film is formed over the insulating film including the pad and wires, and an opening is made in the surface protective film. The... Agent: Miles & Stockbridge PC

20070080417 - Display device: The invention provides a display device including an insulating substrate, a photosensor formed on the insulating substrate and including a semiconductor layer, an input terminal and an output terminal electrically connected to the semiconductor layer, a first insulating layer formed on the photosensor, a pixel electrode, an organic layer, and... Agent: H.c. Park & Associates, PLC

20070080418 - Wafer-level chip-scale package of image sensor and method of manufacturing the same: Provided are a WLCSP of an image sensor and a method of manufacturing the same. The WLCSP includes a wafer, support members, glass, and metal bumps. The wafer has an image sensor and a pair of pads disposed thereon, a portion of the bottom surface of the image sensor being... Agent: Staas & Halsey LLP

20070080419 - Mos type solid-state image pickup apparatus and method of manufacturing the same: A MOS type solid-state image pickup apparatus comprises: a semiconductor substrate having a light receiving surface; a plurality of photoelectric conversion elements arranged in an array manner on the light receiving surface; a plurality of layers of wirings that goes across the light receiving surface and are stacked above the... Agent: Birch Stewart Kolasch & Birch

20070080420 - Submount substrate for mounting light emitting device and method of fabricating the same: A submount substrate for mounting a light emitting device and a method of fabricating the same, wherein since a submount substrate for mouthing a light emitting device in which a Zener diode device is integrated can be fabricated by means of a silicon bulk micromachining process without using a diffusion... Agent: Fleshner & Kim, LLP

20070080421 - Memory device having highly integrated cell structure and method of its fabrication: In an embodiment, a memory device, with a highly integrated cell stricture, includes a mold insulating layer disposed on a semiconductor substrate. At least one conductive line is disposed on the mold insulating layer. Data storage elements self-aligned with the conductive line are interposed between the conductive line and the... Agent: Marger Johnson & Mccollom, P.C.

20070080422 - Semiconductor component with pn junction: A semiconductor component with a pn junction comprises a semiconductor body comprising a front side and an edge region. A pn junction is formed fashion in curved fashion in the edge region of the semiconductor body. An edge structure comprising depressions is also provided in the edge region of the... Agent: Maginot, Moore & Beck Chase Tower

20070080423 - Semiconductor device and manufacturing method thereof for reducing the area of the memory cell region: A structure is adopted for a layout of an SRAM cell which provides a local wiring 3a between a gate 2a and gate 2b and connects an active region 1a and an active region 1b. This eliminates the necessity for providing a contact between the gate 2a and the gate... Agent: Mcdermott Will & Emery LLP

20070080424 - Well for cmos imager and method of formation: A well region of a first conductivity type located in a substrate of the first conductivity type and below about half the channel length of an electrically active portion of a transistor gate is disclosed. The well region is laterally displaced from a charge collection region of a second conductivity... Agent: Dickstein Shapiro LLP

20070080425 - Method for simultaneous fabrication of a nanocrystal and non-nanocrystal device: A method of simultaneously fabricating at least two semiconductor devices, at least bone of which is a nanocrystal memory and at least one of which is a non-nanocrystal semiconductor device. A nanocrystal layer is formed over an oxide layer of the at least two semiconductor devices being fabricated. The nanocrystal... Agent: Schneck & Schneck

20070080426 - Single lithography-step planar metal-insulator-metal capacitor and resistor: MIMCAP semiconductor devices and methods for fabrication MIMCAP semiconductor devices that include a grown capacitor dielectric are provided. Exemplary MIMCAP semiconductor devices can include a bottom electrode, a grown capacitor dielectric on the bottom electrode, and a top electrode on the capacitor dielectric. The grown layer can have a k-value... Agent: Texas Instruments Incorporated

20070080427 - Semiconductor device: A semiconductor device includes semiconductor substrate, a plurality of element forming regions formed on the semiconductor substrate, and an interconnect for connecting the plurality of element forming regions to one another. A concave portion whose upper surface is lower than that of the surfaces of the element forming regions connected... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070080428 - Semiconductor film composition: A semiconductor film composition includes an oxide semiconductor material. At least one polyatomic ion is incorporated into the oxide semiconductor material.... Agent: Hewlett Packard Company

20070080429 - Plating seed layer including an oxygen/nitrogen transition region for barrier enhancement: An interconnect structure which includes a plating seed layer that has enhanced conductive material, preferably, Cu, diffusion properties is provided that eliminates the need for utilizing separate diffusion and seed layers. Specifically, the present invention provides an oxygen/nitrogen transition region within a plating seed layer for interconnect metal diffusion enhancement.... Agent: Scully Scott Murphy & Presser, PC

20070080430 - Semiconductor device: A semiconductor device in which the threshold voltage of transistors is controlled through the applied substrate bias and having relatively small size. The semiconductor device includes: a clock signal line; a shield wiring for shielding the clock signal line from another interconnection; and a substrate bias generating circuit. The substrate... Agent: Sughrue Mion, PLLC

20070080433 - Display panels: A display panel comprising a substrate, signal lines, bonding pads, connecting leads, and capacitance compensating devices. The signal lines are disposed on the substrate. The bonding pads are disposed in a bonding area on the substrate and connected to a driver. The connecting leads are arranged in a fan configuration.... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070080432 - Flexible substrate for package: The present invention provides a flexible substrate for a package of a die which has an active surface and a plurality of first bond pads arranged in a form of a row and formed on the active surface. The flexible substrate includes a flexible insulating film and a plurality of... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20070080431 - Lead frame package structure with high density of lead pins arrangement: A lead frame package structure with high density of lead pins arrangement is formed. The lead frame structure includes a die, a plurality of first lead pins and a plurality of second lead pins, wherein the first lead pins and the second lead pins are positioned on at least one... Agent: North America Intellectual Property Corporation

20070080434 - Semiconductor package having an interfacial adhesive layer: A semiconductor package has a substrate (8) and a semiconductor die (2). The substrate (8) includes a plurality of contact pads (9) on its upper surface and a second plurality of external contact areas (10) on its bottom surface. The semiconductor die (2) includes an active surface with a plurality... Agent: Baker Botts, L.L.P.

20070080435 - Semiconductor packaging process and carrier for semiconductor package: A semiconductor packaging process comprising following steps is provided. First, a wiring substrate with a first surface and a second surface is provided. Next, a non-solvent type two-stage thermosetting compound is formed on the first surface of the wiring substrate. The non-solvent type two-stage thermosetting compound is then partially-cured such... Agent: J.c. Patents, Inc.

20070080436 - System and method for noise reduction in multi-layer ceramic packages: A system and method for reducing noise in a multi-layer ceramic package are provided. With the system and method, additional shielding wires are inserted into the reference planes wherever there are no signal vias present. These additional lines in the reference planes force stronger signal interaction with the reference (vdd/gnd)... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20070080437 - Integrated circuit package system: An integrated circuit package system is provided including forming a leadframe structure having a encapsulant space provided predominantly inside the leadframe structure and attaching a die to the leadframe structure in the encapsulant space inside the leadframe structure. The system further includes electrically connecting the die to the leadframe structure... Agent: Ishimaru & Zahrt LLP

20070080438 - Semiconductor device, semiconductor module, and method of manufacturing the semiconductor module: A semiconductor light-emitting device according to an embodiment of the present invention includes chip LEDs formed on a silicon submount, in which a wiring pattern having a chip connecting terminal portion connecting the chip LEDs, an external connecting terminal portion connecting an external unit, and a plurality of lead portions... Agent: Oliff & Berridge, PLC

20070080439 - Wiring board, semiconductor device in which wiring board is used, and method for manufacturing the same: A wiring board comprising a first surface on which a first electrode is disposed and a second surface on which a second electrode is disposed; at least a single insulation layer and at least a single wiring layer; and one or a plurality of mounted semiconductor elements, wherein the second... Agent: Sughrue Mion, PLLC

20070080440 - Soi device with different crystallographic orientations: A method of forming a memory cell having a trench capacitor and a vertical transistor in a semiconductor substrate includes a step of providing a bonded semiconductor wafer having a lower substrate with an [010] axis parallel to a first wafer axis and an upper semiconductor layer having an [010]... Agent: International Business Machines Corporation Dept. 18g

20070080442 - Semiconductor module having a coupling substrate, and methods for its production: A semiconductor module (4) has a coupling substrate which is used for the internal electrical coupling of an integrated circuit on adjacent semiconductor chips (2, 3). The semiconductor chips (2, 3) have integrated circuits and are arranged on a mount structure. The semiconductor chips (2, 3) are externally connected to... Agent: Baker Botts, L.L.P.

20070080441 - Thermal expansion compensation graded ic package: An apparatus and method for connecting one substrate, such as a semiconductor die, to an opposing substrate, such as a semiconductor package or circuit board, through a plurality of intermediate thermal compensator devices, each of which can incrementally and/or locally mitigate the stresses imposed by differences in the two substrate's... Agent: Hamilton & Terrile, LLP

20070080444 - Electronic circuit chip, and electronic circuit device and method for manufacturing the same: An insulating layer 12 is formed as a surface layer of electronic circuit chip 10. A conductor interconnect 14 is formed in the insulating layer 12. The conductor interconnect 14 is exposed in the surface of the insulating layer 12. A solder wetting metallic film 16 (a metallic film) is... Agent: Mcginn Intellectual Property Law Group, PLLC

20070080443 - Packaging configurations for vertical electronic devices using conductive traces disposed on laminated board layers: This invention discloses an electronic package for containing a vertical semiconductor chip that includes a laminated board having a via connector and conductive traces distributed on multiple layers of the laminated board connected to the via connector. The semiconductor chip having at least one electrode connected to the conductive traces... Agent: Bo-in Lin

20070080445 - Semiconductor device having improved metal wiring: A semiconductor device includes a semiconductor substrate, an interlayer insulating film, a tungsten film, a first barrier metal film, a second barrier metal film and a metal wiring film. The interlayer insulating film is formed on the semiconductor substrate, and has an opening. The tungsten film is embedded in the... Agent: Young & Thompson

20070080446 - Protective enclosure for handheld electronic device: A protective enclosure for use with a handheld electronic device having a casing with controls. The protective enclosure includes an inner skin shaped to receive and form fit a major portion of the casing of the electronic device, and an outer skin shaped to receive and form fit the inner... Agent: Bereskin And Parr

20070080447 - Electronic apparatus: The invention provides an electronic apparatus having a metal core substrate including a metal plate, an insulating layer formed on the metal plate and a conductive layer formed on the insulating layer, and an electronic part, and to which the conductive layer and a terminal of the electronic part are... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070080448 - Method and structure for optimizing yield of 3-d chip manufacture: The process begins with separate device wafers having complimentary chips. Thin metal capture pads, having a preferred thickness of about 10 microns so that substantial pressure may be applied during processing without damaging capture pads, are deposited on both device wafers, which are then tested and mapped for good chip... Agent: Whitham, Curtis & Christofferson, P.C.

20070080449 - Interconnect substrate and electronic circuit device: An interconnect substrate 10 includes an insulating resin layer 12 (base material), an interconnect 14 and an electrode pad 16. On the insulating resin layer 12, the interconnect 14 and the electrode pad 16 are provided. The interconnect 14 and the electrode pad are integrally formed. A first metal material,... Agent: Mcginn Intellectual Property Law Group, PLLC

20070080452 - Bump structure and its forming method: A bump structure mainly includes a metal core, a buffer encapsulant, and a metal cap where the metal core is a stud bump formed by wire bonding. The buffer encapsulant encapsulates the metal core. A metal cap is formed on the top surface of the buffer encapsulant and is electrically... Agent: Troxell Law Office PLLC

20070080454 - Flip-chip type assembly: A structure for sufficiently alleviating the thermal stress between an LSI and substrate and allowing the LSI to be detached from a substrate easily is provided. In a flip-chip type assembly according to the present invention, an interposer made of silicon intervenes between the device and the substrate. The LSI... Agent: Sughrue Mion, PLLC

20070080451 - Intermetallic solder with low melting point: Embodiments of the invention provide a low-melting temperature comprised primarily of a bulk intermetallic phase material. This solder may allow reflow with less of a chance to damage microelectronic devices due to coefficient of thermal expansion mismatches, and may be creep resistant even at high homologous temperatures.... Agent: Intel Corporation C/o Intellevate, LLC

20070080453 - Semiconductor chip having a bump with conductive particles and method of manufacturing the same: A semiconductor chip includes a plurality of chip pads and a plurality of bumps formed on respective chip pads, each bumps including a bump main body and a conductive particle disposed on the bump main body and exposed to the air, the conductive particle including an elastic portion made of... Agent: Mills & Onello LLP

20070080450 - Wafer level laser marking system for ultra-thin wafers using support tape: A wafer level marking system is provided including: providing a wafer, a wafer frame, and a support tape; mounting the wafer and the wafer frame on the support tape; and marking the wafer through the support tape.... Agent: Ishimaru & Zahrt LLP

20070080456 - Arrangement of conductive pads on grid array package and on circuit board: The present invention discloses a dense arrangement in the conductors of a package and the corresponding conductive pads of a circuit board. The conductors and the corresponding conductive pads are separated into at least a first group in a peripheral region of the grid array package, and a second group... Agent: Birch Stewart Kolasch & Birch

20070080455 - Semiconductors and methods of making: A semiconductor having an insulating layer, a contact pad, a via, and a sacrificial dielectric cap is provided. The contact pad is embedded in the insulating layer, where the contact pad has a top metal layer of copper. The via creates an opening over the top metal layer. The sacrificial... Agent: Ohlandt, Greeley, Ruggiero & Perle, LLP

20070080457 - Manufacturing method for semiconductor device, semiconductor device and semiconductor chip: A manufacturing method for a semiconductor device includes: the step of preparing a semiconductor chip which is provided with a functional element formed on a front surface side of a semiconductor substrate, a feedthrough electrode which is placed within a through hole that penetrates the semiconductor substrate, a front surface... Agent: Rabin & Berdo, PC

20070080458 - Hybrid module and method of manufacturing the same: A hybrid module includes a silicon substrate having a plurality of part mounting openings formed therein, the plurality of part mounting openings composed of through holes, a plurality of mounted parts that are mounted in the part mounting openings such that input/output portion forming surfaces are substantially flush with a... Agent: Robert J. Depke Lewis T. Steadman

20070080459 - Semiconductor device including metal interconnection and method for forming metal interconnection: Disclosed are a method for forming a metal interconnection and a semiconductor device including the metal interconnection. The method includes the steps of forming a slope by etching a corner of a contact hole, which exposes a predetermined pattern formed on a substrate, forming a barrier metal layer on an... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070080460 - Bond pads and methods for fabricating the same: Bond pads for semiconductor devices and method for fabricating the same are provided. A bond pad has a first passivation layer having a plurality of openings. A conductive layer which overlies the openings and portions of the first passivation layer, having a first portion overlying the first passivation layer and... Agent: Birch Stewart Kolasch & Birch

20070080461 - Ultra low-k dielectric in damascene structures: A semiconductor structure includes a first dielectric layer having a k value of less than about 2.7, a second dielectric layer over the first dielectric layer, a via in the first dielectric layer, a conductive line in the second dielectric layer, wherein the conductive line extends from a top surface... Agent: Slater & Matsil, L.L.P.

20070080462 - Electrode and method for forming the same: An electrode and a method for forming the electrode. The electrode comprises: a substrate; and a plurality of metal particles adhering to the substrate. The method comprises steps of: providing a substrate; providing a solution including a solvent and a plurality of metal particles on the substrate; removing the solvent;... Agent: Bruce H. Troxell

20070080463 - Semiconductor device and method of fabricating the same: A semiconductor device includes a semiconductor substrate, a lower insulating film formed on the semiconductor substrate, an interconnect-forming metal film provided so as to fill a recess formed in the surficial portion of the lower insulating film, and containing copper as a major constituent, an upper insulating film formed on... Agent: Young & Thompson

20070080465 - Printed board, electronic board and electronic device: A printed board having wiring patterns laminated with insulating layers therebetween is provided. The printed board has a through hole and via holes. A terminal of an electronic component can be inserted into the through hole and a conducting layer is formed on the through hole for connecting wiring patterns... Agent: Oliff & Berridge, PLC

20070080464 - Support structures for semiconductor devices: Support structures for semiconductor devices and methods of manufacturing thereof are disclosed. In some embodiments, the support structures include a plurality of support members that is formed in a substantially annular shape beneath a wire bond region. The central region inside the substantially annular shape of the plurality of support... Agent: Slater & Matsil LLP

20070080467 - Semiconductor device: A semiconductor device 1 includes a semiconductor chip 10 (first semiconductor chip), a semiconductor chip 20 (second semiconductor chip) and a seal ring 30. The semiconductor chip 20 is provided on a surface S1 of the semiconductor chip 10 so as to be spaced apart from the semiconductor chip 10... Agent: Mcginn Intellectual Property Law Group, PLLC

20070080466 - Universal chip package structure: A universal chip package structure including a carrier, a chip, a plurality of bonding wires, and a molding compound is provided. The carrier has a plurality of through holes, a carrying surface, and a back surface corresponding to the carrying surface. The back surface has a plurality of contacts around... Agent: J.c. Patents, Inc.

20070080468 - Connecting structure, printed substrate, circuit, circuit package and method of forming connecting structure: A connecting structure between a circuit and another electronic component, includes a first electrode and a second electrode, and a dielectric material interposed between the first and second electrodes.... Agent: Mcginn Intellectual Property Law Group, PLLC

20070080469 - Package board, semiconductor package, and fabricating method thereof: With a semiconductor package according to an aspect of the present invention comprising a board having circuit lines, solder resist formed on a surface of the board, and a chip mounted on the board and having at least one bump attached to at least a portion of the circuit lines,... Agent: Staas & Halsey LLP

20070080470 - Leaded package integrated circuit stacking: A system and method for electrically and thermally coupling adjacent IC packages to one another in a stacked configuration is provided. A flex circuit is inserted in part between ICs to be stacked and provides a connective field that provides plural contact areas that connect to respective leads of the... Agent: J. Scott Denko

20070080471 - Semiconductor device, method for assembling semiconductor device: A semiconductor chip 36 is mounted on a package substrate 30 with its circuit side facing to a board 38. Heat is dissipated from an upper side of the semiconductor chip 36 opposite to the circuit side. A sealing resin 32 seals around the periphery of the semiconductor chip 36... Agent: Kaplan Gilman Gibson & Dernier L.L.P.

20070075304 - Reduced current phase-change memory device: A phase-change memory device more precisely controls electrical current required to accomplish a phase change by using contact holes that extend between phase change layers that are sized differently from each other.... Agent: Ladas & Parry LLP

20070075305 - Light emitting apparatus, method of manufacturing light emitting apparatus, and electronic apparatus: A light emitting apparatus is provided. The light emitting apparatus has a plurality of unit devices including, on a substrate, a reflecting layer, a semi-transmitting semi-reflecting layer, a light emitting layer disposed between the light reflecting layer and the semi-reflecting layer, and a light transmitting pixel electrode disposed between the... Agent: Oliff & Berridge, PLC

20070075306 - Light emitting device: A light emitting device having an emitting element and an element mounting portion on which the emitting element is mounted. The element mounting portion is formed of aluminum nitride.... Agent: Mcginn Intellectual Property Law Group, PLLC

20070075307 - Growth method of nitride semiconductor layer and light emitting device using the growth method: The present invention relates to a growth method of nitride semiconductor layer comprising a first step for growing a first nitride 5 semiconductor layer on an AlxGayIn1-x-yN(0<−x<1, 0<y<1, 0<x+y<1) layer, a second step for reducing the thickness of the first nitride semiconductor layer by growth interruption and, a third step... Agent: Darby & Darby P.C.

20070075308 - Active semiconductor devices: Apparatus including a support body; an organic semiconductor composition body on the support body; and a first body including a hydrogenated vinylaromatic-diene block copolymer on the organic semiconductor composition body. Apparatus including a support body; a first body including a hydrogenated vinylaromatic-diene block copolymer on the support body; and an... Agent: The Eclipse Group

20070075312 - Full-color oled display apparatus with improved color saturation and a method of manufacturing the same: This invention relates to a full-color OLED display apparatus with improved color saturation and a method of manufacturing the same. The OLED display apparatus comprises a plurality of pixels positioned on the substrate. A first electrode, a first organic light emitting layer, a second organic light emitting layer, a third... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070075309 - Negative photoresist for silicon koh etch without silicon nitride: New photoresists for use during the production of semiconductor and MEMS devices are provided. The primer layer preferably comprises a silane dissolved or dispersed in a solvent system. The photoresist layer includes copolymers prepared from styrene, acrylonitrile, and epoxy-containing monomers. The photoresist layer comprises a photoacid generator, and is preferably... Agent: Hovey Williams LLP

20070075311 - Organic electroluminescent device: The invention provides an organic electroluminescent device having at least an organic compound layer provided between a pair of electrodes. The organic electroluminescent device has at least a polymer comprising a metal complex containing a tri- or higher-dentate ligand in the polymer molecule. The metal complex preferably contains a tetra-... Agent: Birch Stewart Kolasch & Birch

20070075310 - Organic light-emitting display device and method of manufacturing the same: Provided is an organic light-emitting display device that can display a full color image by forming a simple structure of light-emitting layers and a method of manufacturing the same. The organic light-emitting display device includes a substrate; a first electrode layer formed on the substrate; a second electrode layer which... Agent: Knobbe Martens Olson & Bear LLP

20070075313 - Flat panel display device: A flat panel display device that includes a clad unit that may prevent terminals of a pad unit from becoming corroded or damaged by an etching solution during etching. The flat panel display device may include a display unit, a pad unit which may include a plurality of terminals electrically... Agent: Lee & Morse, P.C.

20070075314 - Low temperature polysilicon thin film transistor display and method of fabricating the same: A display comprises a substrate, a polysilicon layer which is crystallized by a solid phase crystallization (SPC) method, a gate dielectric layer made of silicon oxy-nitride (SiON) and formed on the polysilicon layer, and a gate electrode formed on the gate dielectric layer (i.e. SiON).... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070075316 - Light-emitting device and display device: Although an organic resin substrate is highly effective at reducing the weight and improving the shock resistance of a display device, it is required to improve the moisture resistance of the organic resin substrate for the sake of maintaining the reliability of an EL element. Hard carbon films are formed... Agent: Nixon Peabody, LLP

20070075315 - System and method for compensating for thermal expansion of lithography apparatus or substrate: To prevent a substrate from expanding significantly to generate overlay errors an exposure operation takes place in two parts. A first part exposes boundary areas and a second part exposes the larger, bulk areas. In one example, a portion of the substrate is fixed and the substrate is exposed progressively... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20070075317 - Semiconductor device and semiconductor device manufacturing method: A semiconductor device includes a back gate electrode composed of a first single-crystal semiconductor layer formed on a first insulating layer; a second insulating layer formed on the first single-crystal semiconductor layer and having a film thickness smaller than a film thickness of the first insulating layer; a second single-crystal... Agent: Oliff & Berridge, PLC

20070075320 - Semiconductor laser device and method of fabricating semiconductor laser device: A semiconductor laser device includes a supporting substrate; a semiconductor laser device portion which is formed on a surface of the supporting substrate, and which includes a pair of cavity surfaces; an adhesive layer with which the supporting substrate and the semiconductor laser device portion are adhered to each other;... Agent: Ndq&m Watchstone LLP

20070075319 - Semiconductor light-emitting device with transparent conductive film: A semiconductor light-emitting device with a transparent conductive film has: a light-emitting portion formed on a semiconductor substrate, the light-emitting portion having an n-type clad layer, an active layer and a p-type clad layer; an As-based contact layer formed on the light-emitting portion, the contact layer being doped with a... Agent: Foley And Lardner LLP Suite 500

20070075318 - Two-dimensional photonic crystal surface-emitting laser: A two-dimensional photonic crystal surface-emitting laser having a photonic crystal (20) in which a photonic crystal periodic structure (21) is located in or near an active layer (first medium) (12) which emits light when carriers are injected thereto. The photonic crystal periodic structure (21) comprises a second medium with a... Agent: Buchanan, Ingersoll & Rooney PC

20070075321 - Semiconductor light-emitting device: A semiconductor light-emitting device having: a light-emitting portion formed on a semiconductor substrate, the light-emitting portion having an n-type clad layer, an active layer and a p-type clad layer; an As-based contact layer formed on the light-emitting portion, the contact layer being doped with a p-type dopant of 1×1019/cm3 or... Agent: Foley And Lardner LLP Suite 500

20070075322 - Light-emitting device and method for manufacturing the same: The present invention provides a display device and a manufacturing method thereof that can simplify manufacturing steps and enhance efficiency in the use of materials, and further, a manufacturing method that can enhance adhesiveness of a pattern. One feature of the invention is that at least one or more patterns... Agent: Nixon Peabody, LLP

20070075323 - Light emitting apparatus: A light emitting apparatus is comprised of a multilayer chip varistor having a varistor element body, a semiconductor light emitting element, and a reflecting portion. The varistor element body includes a varistor layer, and a plurality of internal electrodes opposed to each other so as to interpose the varistor layer... Agent: Oliff & Berridge, PLC

20070075324 - Optical device: An optical device according to the present invention includes a device substrate, a translucent member, an optical element chip and a conductive portion. On a surface of the device substrate, an opening is provided so as to extend substantially in the vertical direction with respect to a surface of the... Agent: Mcdermott Will & Emery LLP

20070075325 - High power light emitting diode package: The invention relates to a high power LED package having excellent light efficiency and heat dissipating characteristics. The LED package includes a base member, a reflector unit arranged on the base member and having a plurality of first reflectors, a plurality of LED chips mounted on the base member and... Agent: Mcdermott Will & Emery LLP

20070075326 - Diamond field emmission tip and a method of formation: A diamond field emission tip and methods of forming such diamond field emission tips, for use with cathodes that will act as a source of and emit beams of charged particles.... Agent: Davidson Berquist Jackson & Gowdey LLP

20070075329 - Organic light emitting display (oled) with conductive spacer and its method of manufacture: An Organic Light Emitting Display (OLED) includes: a lower substrate having at least one thin film transistor arranged thereon in a active region and a power supply lower stripe arranged thereon in a non-emissive region; an upper substrate corresponding to the lower substrate and having a power supply upper stripe... Agent: Robert E. Bushnell

20070075327 - Semiconductor light-emitting device: A semiconductor light emitting device has a light-emitting portion formed on a semiconductor substrate, an As-based p-type contact layer formed thereon, a current spreading layer formed thereon of a metal oxide material, and a buffer layer formed between the p-type cladding layer and the p-type contact layer. The buffer layer... Agent: Foley And Lardner LLP Suite 500

20070075328 - Semiconductor light-emitting device: A semiconductor light-emitting device has a semiconductor substrate, an n-type cladding layer, an active layer, a p-type cladding layer, a p-type buffer layer, a p-type contact layer, and a current spreading layer. A part or all of the p-type buffer layer has a low Mg concentration buffer layer with a... Agent: Foley And Lardner LLP Suite 500

20070075330 - Composite semiconductor device, print head and image forming apparatus: A semiconductor device includes a light-emitting layer of a first conductivity type, a second conductivity type or non-doped type, a first contact layer of the second conductivity type disposed on the light-emitting layer and supplied with a voltage via a predetermined contact, a second contact layer of the second conductivity... Agent: Akin Gump Strauss Hauer & Feld L.L.P.

20070075331 - Insulated gate semiconductor device: A trench IGBT is disclosed which meets the specifications for turn-on losses and radiation noise. It includes a p-type base layer divided into different p-type base regions by trenches. N-type source regions are formed in only some of the p-type base regions. There is a gate runner in the active... Agent: Rossi, Kimms & Mcdowell LLP.

20070075332 - Semiconductor device: In order to achieve the object, a semiconductor device has a semiconductor substrate (1) having a first main surface (MS1), a second main surface (MS2) opposite to the first main surface, and a recess (9) defined in the second main surface (MS2) by side surfaces (91) and a bottom surface... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070075333 - Field effect transistor comprising compound semiconductor: The present invention provides a field effect transistor having a double recess structure, which minimizes an influence exerted on a channel region depending upon the surface state of an outer recess section. In the field effect transistor having such a double recess structure, an ohmic contact layer at the surface... Agent: Volentine Francos, & Whitt PLLC

20070075334 - Self aligned process for bjt fabrication: Methods for forming a SiC BJT having a low base resistance and minimal emitter width are provided. The methods incorporate a plated shadow metal layer overhanging the emitter mesa. The mushroom-shaped shadow metal layer can then act as either a deposition shadow mask or an ion implantation mask in subsequent... Agent: Marger Johnson & Mccollom, P.C.

20070075336 - Flash memory devices having shared sub active regions and methods of fabricating the same: Flash memory devices include a pair of elongated, closely spaced-apart main active regions in a substrate. A sub active region is also provided in the substrate, extending between the pair of elongated, closely spaced-apart main active regions. A bit line contact plug is provided on, and electrically contacting, the sub... Agent: Myers Bigel Sibley & Sajovec

20070075335 - Semiconductor memory device and method of production: Final sections of the word lines are arranged in a staggered fashion to fan out and have larger lateral extensions than the word lines. Interspaces are filled with a dielectric material, and a mask is applied that partially covers the final sections and leaves contact areas in regions adjacent to... Agent: Slater & Matsil LLP

20070075337 - Image sensor and method of fabricating the same: Example embodiments relate to an image sensor and a fabrication method thereof. An image sensor may include a semiconductor substrate. A charge transfer structure may be formed on the semiconductor substrate. The charge transfer structure may include a gate insulating film that may be formed on a channel region in... Agent: Harness, Dickey & Pierce, P.L.C

20070075338 - Image sensor and fabrication method thereof: An image sensor includes a substrate having an active pixel sensor region defined therein, a plurality of first conductivity type photodiodes formed in the active pixel sensor region and a first conductivity-type first deep well formed in the active pixel sensor region in a location which does not include the... Agent: F. Chau & Associates, LLC

20070075339 - Gas-sensitive field effect transistor for detecting chlorine: A gas-sensitive field effect transistor reads signals generated by the principle of measuring work functions, for the detection of chlorine (Cl) with a gas-sensitive layer of gold.... Agent: O'shea Getz & Kosakowski, P.C.

20070075340 - Epitaxial substrate, component made therewith and corresponding production method: Proposed is a III-V-semiconductor-containing epitaxial substrate comprising at least one layer of porous III-V semiconductor material, together with a corresponding production method. Also specified is a component, particularly an LED, produced on the proposed epitaxial substrate, and a corresponding production method.... Agent: Fish & Richardson PC

20070075341 - Semiconductor decoupling capacitor: A semiconductor capacitor that includes a plurality of overlapping conductive layers and a field-effect transistor. The plurality of conductive layers include a first and second conductive layers that are spaced apart to creating a capacitance between the plurality of layers. In the semiconductor capacitor, the FET has a source, a... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20070075342 - Semiconductor device with fin structure and method of manufacturing the same: A semiconductor device with a fin structure according to one embodiment of the present invention includes: a fin of a predetermined height formed on an insulating layer of a substrate; a gate electrode formed on both sides of the fin through a gate insulating film; and a source/drain region formed... Agent: Foley And Lardner LLP Suite 500

20070075343 - Solid-state imaging device, solid-state imaging apparatus and methods for manufacturing the same: To arrange diffusion-inhibitory films 5a, 5b, and 5c for inhibiting the diffusion of a wiring material absent in a region on or above a light receiving unit 2, the diffusion-inhibitory films 5a, 5b, and 5c formed on a region above the light receiving unit 2 are selectively removed. Alternatively, the... Agent: Robert J. Depke Lewis T. Steadman

20070075344 - Semiconductor photo-detection device and radiation detection apparatus: On the front side of an n-type semiconductor substrate 5, p-type regions 7 are two-dimensionally arranged in an array. A high-concentration n-type region 9 and a p-type region 11 are disposed between the p-type regions 7 adjacent each other. The high-concentration n-type region 9 is formed by diffusing an n-type... Agent: Drinker Biddle & Reath (dc)

20070075345 - Platinum stuffed with silicon oxide as a diffusion oxygen barrier for semiconductor devices: The present invention provides techniques to fabricate high dielectric MIM storage cell capacitors. In one embodiment, this is accomplished by forming a silicon contact is then formed to electrically connect the formed bottom electrode layer in the container with the at least one associated transistor device. A titanium nitride barrier... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070075346 - Light emitting diode and the package structure thereof: A light emitting diode (LED) is disclosed. The LED includes a substrate, a patterned semiconductor layer, two contact pads, a dielectric layer and a fluorescence thin film. Wherein, the patterned semiconductor layer is disposed on the substrate and suitable for emitting a first light, while the contact pads are disposed... Agent: Jianq Chyun Intellectual Property Office

20070075347 - Phase change memory devices with reduced programming current: A phase change memory device and a method of forming the same are provided. The phase change memory device includes a conducting electrode in a dielectric layer, a bottom electrode over the conducting electrode, a phase change layer over the bottom electrode, and a top electrode over the phase change... Agent: Slater & Matsil, L.L.P.

20070075348 - High density, high q capacitor on top of a protective layer: In accordance with the invention, there are methods for making and there is an integrated circuit comprising a semiconductor substrate comprising device elements and a metallization layer interconnecting the device elements and having an uppermost layer. The integrated circuit can also include a protective overcoat formed over the metallization layer,... Agent: Texas Instruments Incorporated

20070075349 - Semiconductor constructions: The invention includes a method of depositing a noble metal. A substrate is provided. The substrate has a first region and a second region. The first and second regions are exposed to a mixture comprising a precursor of a noble metal and an oxidant. During the exposure, a layer containing... Agent: Wells St. John P.s.

20070075350 - On-chip capacitor structure with adjustable capacitance: At least a first capacitor is formed on a substrate and connected to a first differential node of a differential circuit, and the first capacitor may be variable in capacitance. A second capacitor is formed on the substrate and connected to a second differential node of the differential circuit, and... Agent: Brake Hughes PLC C/o Portfolioip

20070075352 - Non-volatile semiconductor memory device, fabricating method of the same, and semiconductor memory system: In a non-volatile semiconductor memory device typically of a MONOS type storing data by trapping charge in a multilayer film composed of a plurality of insulating films, which includes: source and drain regions of a second conductivity type disposed apart from each other in a semiconductor substrate of a first... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070075351 - Semiconductor devices and methods of manufacture thereof: Semiconductor devices and methods of manufacture thereof are disclosed. A complimentary metal oxide semiconductor (CMOS) device includes a PMOS transistor having at least two first gate electrodes comprising a first parameter, and an NMOS transistor having at least two second gate electrodes comprising a second parameter, wherein the second parameter... Agent: Slater & Matsil LLP

20070075355 - Capacitor and its manufacturing method, ferroelectric memory device, actuator, and liquid jetting head: A capacitor includes a lower electrode, a first dielectric film composed of lead zirconate titanate niobate formed above the lower electrode, a second dielectric film composed of lead zirconate titanate or lead zirconate titanate niobate with a Nb composition smaller than a Nb composition of the lead zirconate titanate niobate... Agent: Harness, Dickey & Pierce, P.L.C

20070075353 - Flash memory structure and method for fabricating the same: A flash memory structure comprises a semiconductor substrate having a V-groove, a first doped region positioned in the semiconductor substrate, two second doped regions positioned in the semiconductor substrate and at two sides of the V-groove, a dielectric stack having trapping sites interposed therein positioned on the V-groove, and a... Agent: Oliff & Berridge, PLC

20070075354 - Memory cell and nonvolatile semiconductor memory: A nonvolatile semiconductor memory has a memory cell structure with a doped semiconductor substrate, a gate electrode, a channel area disposed in the substrate below the gate electrode, a pair of variable resistance areas disposed on opposite sides of the channel area in the substrate, charge storage bodies formed above... Agent: Rabin & Berdo, PC

20070075356 - Strained silicon device: A method of manufacturing a microelectronic device includes forming a p-channel transistor on a silicon substrate by forming a poly gate structure over the substrate and forming a lightly doped source/drain region in the substrate. An oxide liner and nitride spacer are formed adjacent to opposing side walls of the... Agent: Haynes And Boone, LLP

20070075357 - Semiconductor storage device and manufacturing method thereof: A non-volatile semiconductor storage device having a high-dielectric-constant insulator and a manufacturing method thereof suitable for miniaturization are disclosed. According to one aspect of the present invention, it is provided a semiconductor storage device comprising a semiconductor substrate, a plurality of first conductor layers formed on the semiconductor substrate through... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070075358 - Flash memory structure and method for fabricating the same: A flash memory structure comprises a silicon substrate having at least one concave structure, two doped regions positioned in the semiconductor substrate and at two sides of the concave structure, at least one carrier trapping region positioned in the concave structure, and a conductive layer positioned above the concave structure.... Agent: Oliff & Berridge, PLC

20070075359 - Circuit device including vertical transistors connected to buried bitlines and method of manufacturing the same: In a circuit device including vertical transistors connected to buried bitlines and a method of manufacturing the circuit device, the circuit device includes a semiconductor substrate including a peripheral circuit region and left and right cell regions at both sides of the peripheral circuit region; bottom active regions arranged on... Agent: Mills & Onello LLP

20070075360 - Cobalt silicon contact barrier metal process for high density semiconductor power devices: This invention discloses an improved trenched metal oxide semiconductor field effect transistor (MOSFET) cell that includes a trenched gate surrounded by a source region encompassed in a body region above a drain region disposed on a bottom surface of a substrate. The MOSFET cell further includes a source contact opening... Agent: Bo-in Lin

20070075361 - Method for producing a trench transistor and trench transistor: In a method for producing a trench transistor, a substrate of a first conduction type is provided and a trench in the substrate and a gate dielectric in the trench are formed. A first conductive filling in the trench as a gate electrode on the gate dielectric and first source... Agent: Jenkins, Wilson, Taylor & Hunt, P. A.

20070075362 - Self-aligned schottky-barrier clamped trench dmos transistor structure and its manufacturing methods: The self-aligned Schottky-barrier clamped trench DMOS transistor structure of the present invention comprises a Schottky-barrier diode being formed in a middle semiconductor portion of a self-aligned source region. The self-aligned source region comprises a lightly-doped epitaxial semiconductor layer, a moderately-doped base diffusion ring being formed in a surface portion of... Agent: Lowe Hauptman Berner, LLP

20070075363 - Semiconductor device and method of manufacturing the same: In a semiconductor device of the present invention, an N type epitaxial layer is formed on a P type single crystal silicon substrate. The substrate and the epitaxial layer are partitioned into a plurality of element formation regions by isolation regions. Each of the isolation regions is formed of a... Agent: Morrison & Foerster LLP

20070075364 - Power mosfets and methods of making same: A MOSFET comprising an epitaxial layer of a semiconductor substrate of a first conductivity type, the MOSFET comprises a polysilicon gate, a source region of the first conductivity type and a body region of a second conductivity type, the polysilicon gate comprises a first layer of polysilicon and a second... Agent: Buchanan, Ingersoll & Rooney PC

20070075368 - Cmos inverter cell: A CMOS inverter cell having a small horizontal length which is reduced by substituting metal lines for supplying data signals to gates with a connection pattern which is mounted in one end of a supply voltage area of the CMOS inverter cell and is made of the same material as... Agent: F. Chau & Associates, LLC

20070075366 - Semiconductor memory device and method for manufacturing the same: According to the present invention, there is provided a semiconductor memory device having: a semiconductor layer of a first conductivity type formed above a semiconductor substrate via an embedded insulation film, a gate electrode formed above the semiconductor layer via a gate insulation film, a floating body region of a... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070075367 - Soi semiconductor component with increased dielectric strength: An SOI semi-conductor element has field electrodes and/or field zones which are arranged between a first and a second semi-conductor zone. Electric coupling is possible between the field electrodes and the field zones.... Agent: Baker Botts, L.L.P.

20070075369 - Thin film transistor and method of fabricating the same: A thin film transistor and a method of fabricating the same capable of reducing stress of a substrate caused by a metal layer of the drain and source electrodes, the thin film transistor including a substrate; a semiconductor layer disposed on the substrate and including source, drain and channel regions;... Agent: Stein, Mcewen & Bui, LLP

20070075365 - Thin-film transistor and method of making the same: A thin-film transistor includes a substrate having a substantially outwardly protruding support structure formed thereon such that a portion adjacent to the structure is exposed. The support structure has opposed sidewalls sloped at an angle relative to the substrate surface. A stack is established over the portion and over a... Agent: Hewlett Packard Company

20070075370 - Thermal sensing method and apparatus using existing esd devices: The present invention provides a method, an apparatus, and a computer program product for measuring the temperature of a microprocessor through the use of ESD circuitry. The present invention uses diodes and an I/O pad within ESD circuits to determine the temperature at the location of the ESD circuitry. First,... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20070075371 - Integrated circuit with self-aligned line and via: An integrated circuit is provided having a base with a first dielectric layer formed thereon. A second dielectric layer is formed over the first dielectric layer. A third dielectric layer is formed in spaced-apart strips over the second dielectric layer. A first trench opening is formed through the first and... Agent: Ishimaru & Zahrt LLP

20070075373 - Radiation tolerant electrostatic discharge protection networks: Realizing that rather than protect electronic circuitry, electrostatic discharge networks when hit by cosmic rays and charged particles, can actually cause the electronic circuitry in satellites and other space applications to fail, the inventor created an ESD network having a redundant voltage clamping element in series with a first voltage... Agent: Ibm Microelectronics Intellectual Property Law

20070075372 - Semiconductor device and manufacturing process therefor: There is provided a semiconductor device wherein at least the largest width of a source/drain region is larger than the width of a semiconductor region and the source/drain region has a slope having a width continuously increasing from the uppermost side to the substrate side, and a silicide film is... Agent: Foley And Lardner LLP Suite 500

20070075374 - Semicondutor device and method for fabricating the same: A semiconductor device includes: a first field-effect transistor including a first gate electrode; and a second field-effect transistor including a second gate electrode. The first and second gate electrodes are fully silicided with metal and have different gate lengths. A trench is formed in an upper portion of the first... Agent: Mcdermott Will & Emery LLP

20070075375 - Field effect semiconductor component and method for its production: A field effect semiconductor component has a bipolar transistor structure in a semiconductor body consisting of a lightly doped upper area of a first conductivity type as base region and of a lower heavily doped area as emitter region with a complementary conductivity type. Between the base region and the... Agent: Baker Botts, L.L.P.

20070075376 - Semiconductor device: A semiconductor device comprises a semiconductor substrate having an N-type base region, a collector region, a P-type base region, an emitter region, a collector-shorting region, a buffer region, and a P-type semiconductor region, and a gate bus line disposed on the P-type semiconductor region through an insulating film. The collector-shorting... Agent: Howard & Howard Attorneys, P.C.

20070075377 - High performance device design: A semiconductor structure having a recessed active region and a method for forming the same are provided. The semiconductor structure comprises a first and a second isolation structure having an active region therebetween. The first and second isolation structures have sidewalls with a tilt angle of substantially less than 90... Agent: Slater & Matsil, L.L.P.

20070075378 - Metal oxide semiconductor transistor device: A metal-oxide-semiconductor (MOS) transistor device is provided. The MOS transistor device includes a substrate, a gate structure, a spacer, a source/drain region and a barrier layer. The gate structure is disposed on the substrate. The gate structure includes a gate and a gate dielectric layer disposed between the gate and... Agent: Jianq Chyun Intellectual Property Office

20070075379 - Metal-oxide-semiconductor transistor device: A metal-oxide-semiconductor transistor device is disclosed, in which, a silicon nitride spacer has been formed but is removed after an ion implantation process to form a source/drain region and a salicide process to form a metal silicide layer on the surface of the source/drain region and the gate electrode are... Agent: North America Intellectual Property Corporation

20070075380 - Semiconductor device and method of manufacturing semiconductor device: A semiconductor device includes a semiconductor layer formed partially on a semiconductor substrate by epitaxial growth, an embedded oxide film embedded between the semiconductor substrate and the semiconductor layer, first and second gate electrodes disposed on sidewalls of the semiconductor layer, a source layer formed in the semiconductor layer and... Agent: Oliff & Berridge, PLC

20070075381 - Semiconductor memory device and method of production: The bit lines are produced by an implantation of a dopant by means of a sacrificial hard mask layer, which is later replaced with the gate electrodes formed of polysilicon in the memory cell array. Striplike areas of the memory cell array, which run transversely to the bit lines, are... Agent: Slater & Matsil LLP

20070075382 - Integrated circuit and method for manufacturing the same: An integrated circuit is provided, and in the integrated circuit, a microlens array is formed with a silicon nitride film which provides an interlayer insulation film for Al wiring, so that any stress migration in the Al wiring and any deformation of lens shape can be prevented. A silicon nitride... Agent: Oliff & Berridge, PLC

20070075383 - Semiconductor device and method of manufacturing the same: A semiconductor device having a vertical gate and method of manufacturing the same are disclosed. An example semiconductor device includes a pair of first source/drain regions formed apart from each other by a predetermined distance on a silicon substrate, a first silicon epitaxial layer formed on the pair of first... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20070075384 - Transistor device and methods of manufacture thereof: Methods of forming transistor devices and structures thereof are disclosed. A first dielectric material is formed over a workpiece, and a second dielectric material is formed over the first dielectric material. The workpiece is annealed, causing a portion of the second dielectric material to combine with the first dielectric material... Agent: Slater & Matsil LLP

20070075385 - Sidewall sonos gate structure with dual-thickness oxide and method of fabricating the same: A SONOS gate structure has an oxide structure on a substrate having gate pattern thereon. The oxide structure has a relatively thinner oxide portion on the substrate for keeping good program/erase efficiency, and a relatively thicker oxide portion on sidewalls of the gate pattern for inhibiting gate disturb. Trapping dielectric... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070075386 - Apparatus and method for forming film hole: The present invention provides a film hole forming apparatus (400), which includes a chemical etching system (410) and a driving system (420). The driving system comprising a transmission belt, which pass through the chemical etching system. A material of the transmission belt being teflon, teflon-containing material, poly (vinylidene finoride), metal,... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang Jeffrey T. Knapp

20070075387 - Bi-directional released-beam sensor: An acceleration sensor includes a semiconductor substrate, a first layer formed on the substrate, a first aperture within the first layer, and a beam coupled at a first end to the substrate and suspended above the first layer for a portion of the length thereof. The beam includes a first... Agent: Stmicroelectronics, Inc.

20070075388 - Polarizing, photochromic devices and methods of making the same: Provided is an optical element including: a substrate; at least one at least partially ordered orientation facility connected to at least a portion of the substrate; and an at least partial coating connected to at least a portion of the at least partially ordered orientation facility. The at least partial... Agent: Frank P. Mallak Ppg Industries, Inc.

20070075389 - Image pickup device: An image pickup device comprises: a flexible substrate; a photosensitive layer formed above the flexible substrate and sandwiched between a pixel electrode layer and an opposite electrode layer; a signal reading section, formed on the flexible substrate, that reads a photoelectric charge generated as a result of incidence of light... Agent: Mcginn Intellectual Property Law Group, PLLC

20070075390 - Radiation hardening, detection & protection design methods and circuit examples thereof: Radiation hardening, detection and protection design methods are disclosed. An example write drive circuit is disclosed having radiation hardened analog circuitry. A passive transistor is provided to generate a radiation photo-current to offset any net radiation photo-current of the operational circuitry. Using this technique, a radiation hardened reference-mirror control circuit... Agent: Honeywell International Inc.

20070075391 - Schottky barrier diode and method thereof: Pt/n−GaN Schottky barrier diodes are disclosed that are particularly suited to serve as ultra-violet sensors operating at wavelengths below 200 nm. The Pt/n−GaN Schottky barrier diodes have very large active areas, up to 1 cm2, which exhibit extremely low leakage current at low reverse biases. Very large area Pt/n−GaN Schottky... Agent: Nasa Goddard Space Flight Center

20070075392 - Junction barrier schottky (jbs) with floating islands: A Schottky diode includes a Schottky barrier and a plurality of dopant regions disposed near the Schottky barrier as floating islands to function as PN junctions for preventing a leakage current generated from a reverse voltage. At least a trench opened in a semiconductor substrate with a Schottky barrier material... Agent: Bo-in Lin

20070075393 - Lateral semiconductor device: In a high voltage P-channel MOS transistor formed on a silicon-on-insulator (SOI) substrate, a P+-type source region (8), an N-type body region (4) and an N+-body contact diffusion region (10) are surrounded by a P+-type drain region (9) and a P-type drift region (5). A gate electrode (7) is formed... Agent: Steptoe & Johnson LLP

20070075395 - Capacitor of a semiconductor device: A capacitor of a semiconductor device and a method of fabricating a capacitor in a semiconductor device are disclosed. The capacitor may include a bottom electrode formed on a semiconductor substrate, an insulation layer having different regions having different thicknesses, and a top electrode over a region of the insulation... Agent: Sherr & Nourse, PLLC

20070075394 - Microelectronic assembly and method for forming the same: A microelectronic assembly and a method for forming the same are provided. The method includes forming first and second lateral etch stop walls in a semiconductor substrate having first and second opposing surfaces. An inductor is formed on the first surface of the semiconductor substrate and a hole is formed... Agent: Ingrassia, Fisher & Lorenz, P.C.

20070075396 - Semiconductor device and manufacturing method thereof: A semiconductor device includes a semiconductor substrate having a diffusion layer. An insulating film is formed on the semiconductor substrate, a fuse section of fuses is formed on the insulating film. An interlayer insulating film is formed on the fuse section and the insulating film, and an antenna section is... Agent: Sughrue Mion, PLLC

20070075397 - On-chip capacitor structure: A first capacitor is formed on a substrate and connected to a first differential node of a differential circuit, and a second capacitor is formed on the substrate and connected to a second differential node of the differential circuit. A third capacitor is connected between the first differential node and... Agent: Brake Hughes PLC C/o Portfolioip

20070075398 - Integrated thermal characterization and trim of polysilicon resistive elements: Devices, systems, and methods for providing an on-chip, temperature-stable resistance network for generating a precision current or precision resistance are disclosed. The resistance network includes a first resistance material having a linear, negative temperature coefficient of resistance and a second resistance material having a linear, positive temperature resistance. The first... Agent: Texas Instruments Incorporated

20070075399 - Method of forming a self-aligned transistor and structure therefor: In one embodiment, a transistor is formed to use two conductors to make electrical connection to one of the active regions of the transistor.... Agent: Semiconductor Components Industries, LLC Bradley J. Botsch

20070075400 - Semiconductor device with a toroidal-like junction: Formation of elements of a vertical bipolar transistor is described, in particular a vertical npn transistor formed on a p-type substrate. Accordingly, an improved method not limited by constraints of photolithography, and an ensuing device made by such methods, is described. A temporary spacer (e.g., an oxide spacer) is deposited... Agent: Schneck & Schneck

20070075401 - Gettering using voids formed by surface transformation: One aspect of this disclosure relates to a memory device, comprising at least one gettering region, a memory array, a plurality of word lines and bit lines, and control circuitry. The gettering region is formed in a semiconductor substrate. The gettering region includes a precise arrangement of precisely-formed voids to... Agent: Attn: Marvin L. Beekman Schwegman, Lundberg, Woessner & Kluth, P.A.

20070075402 - Attachment system: An attachment system. The attachment system includes a first structure and a second structure. The first structure has a surface and a recess in the surface. The second structure is molded into the recess and extends above the surface. The second structure adheres to the first structure at a boundary... Agent: Avago Technologies, Ltd.

20070075403 - Functional structural element, method of manufacturing functional structural element, and substrate for manufacturing functional structural body: The functional structural element includes: a substrate member which has a surface made of directionally solidified silicon; and a functional structural body which is made of a functional material and is formed on the surface of the substrate member.... Agent: Birch Stewart Kolasch & Birch

20070075404 - Integrated circuit package system with multi-surface die attach pad: An integrated circuit package system is provided including an integrated circuit package system including an integrated circuit and a lead frame. The lead frame has a multi-surface die attach pad and the integrated circuit is mounted to the multi-surface die attach pad.... Agent: Ishimaru & Zahrt LLP

20070075405 - System and method to control signal line capacitance: A system may include a conductive plane defining a non-conductive antipad area and a second non-conductive area extending from the antipad area in at least a first direction, a dielectric plane coupled to the conductive plane, a conductive via passing through the dielectric plane and the antipad area, a conductive... Agent: Buckley, Maschoff, Talwalkar LLC

20070075406 - Wafer-level method for metallizing source, gate and drain contact areas of semiconductor die: A wafer level method for metallizing source, gate and drain contact areas of a semiconductor die includes the steps of (a) plating Ni onto the source, gate and drain contact areas of the semiconductor die, and (b) plating Au onto the source, gate and drain contact areas of the semiconductor... Agent: Fortune Law Group LLP

20070075407 - Microelectronic devices with improved heat dissipation and methods for cooling microelectronic devices: Microelectronic devices with improved heat dissipation, methods of making microelectronic devices, and methods of cooling microelectronic devices are disclosed herein. In one embodiment, the microelectronic device includes a microelectronic substrate having a first surface, a second surface facing opposite from the first surface, and a plurality of active devices at... Agent: Perkins Coie LLP Patent-sea

20070075409 - Method of forming a molded array package device having an exposed tab and structure: In one embodiment, a method for forming a molded flat pack style package includes attaching electronic chips to an array lead frame, which includes a plurality of elongated flag portions with tab portions and a plurality of leads. The method further includes connecting the electronic chips to specific leads, and... Agent: Semiconductor Components Industries, LLC Bradley J. Botsch

20070075408 - Semiconductor device and radiation detector employing it: A wiring substrate to which a semiconductor element 10 is connected, is a wiring substrate 20 comprised of a glass substrate with through-hole groups 20d, each group consisting of a plurality of through holes 20c extending from input surface 20a to output surface 20b and formed in a predetermined array,... Agent: Drinker Biddle & Reath (dc)

20070075410 - Semiconductor device for radio frequency applications and method for making the same: A semiconductor device (5) for radio frequency applications has a semiconductor chip (1) with an integrated circuit accommodated in a radio frequency package. Inside bumps (2) comprise inside contacts between the semiconductor chip (1) and a redistribution substrate (3). The inside bumps (2) have a metallic or plastic core (6)... Agent: Baker Botts L.L.P. Patent Department

20070075411 - State recognition tag: A state recognition tag is configured to include a tag main body, and a tag fragment separable from the tag main body, and each of the tag main body and the tag fragment is provided with an information holding unit storing therein information to be transmitted, a separation-state recognizing unit... Agent: Gregory A. Stobbs

20070075412 - Mid-plane arrangement for components in a computer system: A chip package for a computer system includes a substrate having a first region and a second region on a first surface, at least one die coupled to the first region on the first surface of the substrate and a main logic board coupled to the second region on the... Agent: Sawyer Law Group LLP

20070075413 - Semiconductor package: A semiconductor package according to the present invention includes a substrate; first and second semiconductor chips mounted on a first surface of the substrate; and a heat-radiation sheet. The heat-radiation sheet includes a heat-transferable conductive layer and first and second insulating layers formed on top and bottom surfaces of the... Agent: Rabin & Berdo, PC

20070075414 - Semiconductor device and a manufacturing method of the same: A semiconductor device is disclosed wherein first wiring lines in a first row extend respectively from first connecting portions toward one side of a semiconductor chip, while second wiring lines extend respectively from second connecting portions toward the side opposite to the one side of the semiconductor chip. The reduction... Agent: Miles & Stockbridge PC

20070075415 - Semiconductor device and semiconductor device production method: The present invention provides a semiconductor device in which the warp of a board is suppressed without the need for provision of a solder resist on opposite surfaces of the board and semiconductor element connection characteristics are improved by reducing stress exerted on a connection portion, and increases flexibility in... Agent: Steptoe & Johnson LLP

20070075416 - Electronic devices and methods for forming the same: Electronic devices, such as those having a flexible substrate and printed material on the flexible substrate. In one embodiment, the printed material and substrate are part of an electronic device having at least three terminals, wherein the electronic device has a charge carrier mobility of at least 10 cm2/V-s. Multi-terminal... Agent: Lexmark International, Inc. Intellectual Property Law Department

20070075417 - Mems module package using sealing cap having heat releasing capability and manufacturing method thereof: A MEMS module package using a sealing cap having heat releasing capability is disclosed, which comprises a lower substrate, a MEMS element mounted on the lower substrate, a driver integrated circuit mounted on the lower substrate adjacently to the MEMS element which operates the MEMS element, and a sealing cap... Agent: Christensen, O'connor, Johnson, Kindness, PLLC

20070075418 - Emi shielding device for pcb: A shielding device is provided for reducing EMI for a PCB. The shielding device includes a plurality of conductive grounded portions arranged on the PCB, an insulating mask, and an auxiliary grounded layer. A plurality of through holes is defined in the insulating mask corresponding to the grounded portions. The... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang Jeffrey T. Knapp

20070075419 - Semiconductor device having metallic lead and electronic device having lead frame: A semiconductor device includes: first to fourth vertical type semiconductor elements having first and second electrodes; a metallic lead; a resin mold; a circuit board; an electric circuit on the circuit board; and an electronic chip on the circuit board. The electronic chip drives and controls each semiconductor element through... Agent: Posz Law Group, PLC

20070075420 - Microelectronic package having direct contact heat spreader and method of manufacturing same: A method of fabricating a microelectronic package having a direct contact heat spreader, a package formed according to the method, a die-heat spreader combination formed according to the method, and a system incorporating the package. The method comprises metallizing a backside of a microelectronic die to form a heat spreader... Agent: Blakely Sokoloff Taylor & Zafman

20070075421 - Ultra-thin wafer system: An ultra-thin wafer system providing thinning a wafer on a protective tape to an ultra-thin thickness and forming electrical interconnects on the thinned wafer on a support plate.... Agent: Ishimaru & Zahrt LLP

20070075422 - Electronic device, semiconductor device using same, and method for manufacturing semiconductor device: Disclosed is an electronic device comprising a substrate, a bump formed on a substrate surface and composed of a first metal material, a junction film for connection with an electrical connecting portion of another device which is formed on the top face of the bump and composed of a second... Agent: Rabin & Berdo, PC

20070075425 - Semicondictor device and manufacturing method of the same: The invention prevents a pad electrode for external connection of a semiconductor device from being damaged. An electronic circuit, a first pad electrode connected to the electronic circuit, and a second pad electrode connected to the first pad electrode are formed on a semiconductor substrate. A first protection film is... Agent: Morrison & Foerster LLP

20070075424 - Semiconductor chip and semiconductor device: In the peripheral part of a semiconductor chip, third electrode pads for wire bonding and plate wiring and first electrode pads dedicated to wire bonding are provided. On the other hand, second electrode pads dedicated to plate wiring are provided on an inner part away from the edge of the... Agent: Nixon & Vanderhye, PC

20070075423 - Semiconductor element with conductive bumps and fabrication method thereof: A semiconductor element with conductive bumps and a fabrication method thereof are provided. The fabrication method includes providing a semiconductor element having a plurality of bond pads formed on an active surface thereof, wherein each of the bond pads has a predetermined bonding area; applying a passivation layer on the... Agent: Ishimaru & Zahrt LLP

20070075426 - Wiring board: A flexible insulating base, a plurality of conductor wirings aligned on the flexible insulating base, and bump electrodes provided respectively in end portions of the plurality of conductor wirings in a region where a semiconductor chip is to be placed are provided. The semiconductor chip is mounted on the conductor... Agent: Hamre, Schumann, Mueller & Larson P.C.

20070075427 - Amine-free deposition of metal-nitride films: A method for forming a metal carbide layer begins with providing a substrate, an organometallic precursor material, at least one doping agent such as nitrogen, and a plasma such as a hydrogen plasma. The substrate is placed within a reaction chamber; and heated. A process cycle is then performed, where... Agent: Blakely Sokoloff Taylor & Zafman

20070075428 - Encapsulated damascene with improved overlayer adhesion: An integrated circuit device comprising a partially embedded and encapsulated damascene structure and method for forming the same to improve adhesion to an overlying dielectric layer, the integrated circuit device including a conductive material partially embedded in an opening formed in a dielectric layer; wherein said conductive material is encapsulated... Agent: Tung & Associates

20070075429 - Metal interconnection lines of semiconductor devices and methods of forming the same: Metal interconnection lines of semiconductor devices and methods of forming the same are disclosed. Improved reliability is achieved in a disclosed metal line of a semiconductor device by preventing metal layers from eroding and preventing metal lines from being destroyed due to electro-migration (EM) and stress-migration (SM). An illustrated metal... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20070075430 - Solder joint intermetallic compounds with improved ductility and toughness: A method including forming a intermetallic compound including (1) an interfacial reaction product between a solder and a contact point and (2) a reaction species. A method including doping a solder material with a species; and forming a intermetallic compound including an interfacial reaction product between the solder material and... Agent: Blakely Sokoloff Taylor & Zafman

20070075431 - Power feed device to power pins of electrical component: A power feed device for an electrical component which improves the quality of transmission and reduces the mounting density of a printed circuit board in the power feed device or reduces the thickness of the printed circuit board and thereby realizes smaller size, provided with a power supply for supplying... Agent: Staas & Halsey LLP

20070075434 - Method for producing a pcm memory element and corresponding pcm memory element: The invention relates to a method for producing a PCM memory element and to a corresponding PCM element. The method of production comprises the following steps: providing a first and a second line device (Ma, Mb) underneath an insulating layer (10); providing a hole (5a, 5b) in the insulation layer... Agent: Jenkins, Wilson, Taylor & Hunt, P. A.

20070075432 - Printed circuit board with differential pair arrangement: A printed circuit board (PCB) with a differential pair arrangement includes a mounting area for receiving a chip, a plurality of first pads located near one edge of the mounting area, a plurality of second pads located near an opposite edge of the mounting area, the first pads and the... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang Jeffrey T. Knapp

20070075433 - Semiconductor device having high-density contact holes with oval plane shape arranged to reduce malfunction resulting from bowing during etching: A semiconductor device includes a substrate on which a plurality of contact holes, a plane shape of each of which is a oval, are formed and contacts formed in each of the contact holes and having oval-shaped profiles that correspond to each of the holes. The position on the perimeter... Agent: Mcginn Intellectual Property Law Group, PLLC

20070075435 - Semiconductor device: On a substrate (2), a first package (4) is mounted through bumps (3), and a second package (6) is stacked on the first package (4). Each of the bumps (3) includes: a resin core (3a) having elasticity; and metal layers formed on an outer surface of the resin core. The... Agent: Nixon & Vanderhye, PC

20070075436 - Electronic device and manufacturing method of the same: A semiconductor chip of the present invention has a wiring substrate and a chip part. The wiring substrate has an insulating resin layer having a first major surface and a second major surface, and a first wiring layer disposed on the insulating resin layer on the second major surface side.... Agent: Young & Thompson

20070075438 - Package board and semiconductor device: A package board for flip-chip packaging on whose one surface an element is mounted in a facedown manner is provided. The package board has: an interconnection provided on the one surface; a bump formation region in which a bump electrically connecting the interconnection with an electrode pad of the element... Agent: Young & Thompson

20070075437 - Relay board and semiconductor device having the relay board: A relay board provided in a semiconductor device includes a first terminal, and a plurality of second terminals connecting to the first terminal by a wiring. The wiring connecting to the first terminal is split on the way so that the wiring connects to each of the second terminals.... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070075439 - Circuit board, and semiconductor device: A circuit board including a flexible insulating substrate, a plurality of conductive wirings placed in line on the flexible insulating substrate, and bumps provided at end portions of the respective conductive wirings positioned in a region for mounting a semiconductor chip is provided. The circuit board further includes an auxiliary... Agent: Hamre, Schumann, Mueller & Larson P.C.

20070075440 - Semiconductor device including semiconductor chip with two pad rows: A semiconductor device includes a semiconductor chip having at a center area thereof first and second pad rows which include a plurality of first pads and a plurality of second pads, respectively. A package substrate is bonded to the semiconductor chip. The package substrate includes a substrate opening corresponding to... Agent: Foley And Lardner LLP Suite 500

20070075441 - Chip package structure: A chip package structure including a chip, a carrier, a plurality of bonding wires and a molding compound is provided. The chip has an active surface, a back surface opposite to the active surface, a plurality of side surfaces, and a plurality of flash-preventing surfaces located between the active surface... Agent: J C Patents, Inc.

20070075442 - Method and apparatus for facilitating proximity communication and power delivery: One embodiment of the present invention provides a system that facilitates precise inter-chip alignment for proximity communication and power delivery. The system includes a first integrated circuit chip, whose surface has etch pit wells. The system also includes a second integrated circuit chip, whose surface has corresponding etch pit wells... Agent: Sun Microsystems Inc. C/o Park, Vaughan & Fleming LLP

20070075444 - Optical imaging device for optical proximity communication: An assembly comprising first and second electronic devices and an optical coupling device that optically couples an optical waveguide on the first electronic device to an optical waveguide on the second electronic device. In this way, optical proximity communication between the devices is possible. The electronic devices may be integrated... Agent: Hickman Palermo Truong & Becker, LLP And Sun Microsystems, Inc.

20070075443 - Resonator system for optical proximity communication: An assembly comprising first and second electronic devices and an optical resonator that optically couples an optical waveguide on the first electronic device to an optical waveguide on the second electronic device. In this way, optical proximity communication between the devices is possible. The electronic devices may be integrated circuit... Agent: Hickman Palermo Truong & Becker, LLP And Sun Microsystems, Inc.

20070075445 - Microelectronic assembly and method for forming the same: According to one aspect of the present invention, a method is provided for forming a microelectronic assembly. The method comprises forming first and second trenches on a semiconductor substrate, filling the first and second trenches with an etch stop material, forming an inductor on the semiconductor substrate, forming an etch... Agent: Ingrassia, Fisher & Lorenz, P.C.