Active solid-state devices (e.g., transistors, solid-state diodes) inventions 04/07

20070090336 - Semiconductor memory: In a semiconductor memory comprising a matrix of memory cells each composed of one transistor and one chalcogenide layer as a memory element, no chalcogenide layer is disposed at a joint between an upper electrode wire connected to the chalcogenide layer and another wiring layer.... Agent: Sughrue Mion, PLLC

20070090337 - Infrared sensor ic, and infrared sensor and manufacturing method thereof: An infrared sensor IC and an infrared sensor, which are extremely small and are not easily affected by electromagnetic noise and thermal fluctuation, and a manufacturing method thereof are provided. A compound semiconductor that has a small device resistance and a large electron mobility is used for a sensor (2),... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070090338 - Light-emitting device and light-emitting device array using a whispering gallery mode, and method for manufacturing same: A light-emitting device is capable of oscillating in a convex-whispering gallery mode. The lighting-emitting device includes a PIN-type semiconductor including a p-type distributed Bragg reflector, an active region and an n-type distributed Bragg reflector formed on a substrate by an epitaxial growth, wherein the PIN-type semiconductor having a hole with... Agent: Bacon & Thomas, PLLC

20070090339 - Nitride semiconductor light emitting device: A nitride semiconductor light emitting device has high internal quantum efficiency but low operating voltage. The nitride semiconductor light emitting device includes an n-nitride semiconductor layer; an active layer of multi-quantum well structure formed on the n-nitride semiconductor layer, and having a plurality of quantum well layers and a plurality... Agent: Mcdermott Will & Emery LLP

20070090340 - Organic light emitting display, method of fabricating the same, and mobile display including the organic light emitting display: An organic light emitting display and a method of fabricating the same are disclosed. The organic light emitting display may include a transistor on a substrate, a lower electrode on the substrate, the lower electrode being electrically connected to the transistor, an organic light emitting layer on the lower electrode,... Agent: Lee & Morse, P.C.

20070090341 - Group i-vii semiconductor single crystal thin film and process for producing same: A CaF2 buffer layer (3) is formed on a CaF2 (111) substrate (2) by an MBE method. Furthermore, a CuCl thin film is grown on the CaF2 buffer layer (3) by the MBE method while irradiating it with an electron beam to form an electro beam irradiation film (1a). Subsequently,... Agent: Nixon & Vanderhye, PC

20070090342 - Method for fabrication of high temperature superconductors: A layered article of manufacture and a method of manufacturing same is disclosed. A substrate has a biaxially textured MgO crystalline layer having the c-axes thereof inclined with respect to the plane of the substrate deposited thereon. A layer of one or more of YSZ or Y2O3 and then a... Agent: Harry M. Levy Olson & Hierl, Ltd.

20070090347 - Data driver, display device using the same, and method of driving the same: A data driver and a method of driving the same. The data driver includes a shift register for generating sampling signals; sampling latches for sampling digital data applied to output channels, respectively, in accordance with the sampling signals; holding latch units for receiving the sampled digital data of the channels... Agent: Christie, Parker & Hale, LLP

20070090350 - Display device and method for manufacturing the same: The present invention discloses a display device having a substrate, an organic material layer arranged on the substrate, a pixel electrode arranged on one surface of the organic material layer, a common electrode arranged on another surface of the organic material layer, and a light penetration layer through which light... Agent: H.c. Park & Associates, PLC

20070090348 - Electronic juction devices featuring redox electrodes: The electronic properties of molecular junctions of the general type carbon/molecule/TiO2/Au as examples of “molecular heterojunctions” consisting of a molecular monolayer and a semiconducting oxide. Junctions containing fluorene bonded to pyrolyzed photoresist film (PPF) were compared to those containing Al2O3 instead of fluorene, and those with only the TiO2 layer.... Agent: Standley Law Group LLP

20070090353 - Indene derivatives and organic light emitting diode using the same: The present invention provides an indene derivatives having a new structure and an organic light-emitting diode using the same. The organic light-emitting diode according to the present invention shows improved effects in efficiency, driving voltage and stability.... Agent: Mckenna Long & Aldridge LLP Song K. Jung

20070090344 - Multi-stable molecular device: In accordance with the present invention, a molecular device is provided that can act as a finite state machine, such as a logic device or a memory device. The molecular device includes operating molecules having two or more rotors. Each rotor has an electric dipole moment and multiple discrete rotor... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070090345 - Organic light emitting diode display: An organic light emitting diode (OLED) display panel is provided. The OLED display panel includes a substrate, a conductive layer, an active matrix pixel array and several thin film transistors (TFTs). The conductive layer having several openings is disposed above the substrate. The active matrix pixel array having several pixels... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070090351 - Organic thin film transistor and flat panel display device having the same: An organic thin film transistor that can control the threshold voltage and reduce leakage current includes: a gate electrode; an organic semiconductor layer insulated from the gate electrode; a source electrode and a drain electrode insulated from the gate electrode and electrically connected to the organic semiconductor layer; a gate... Agent: Stein, Mcewen & Bui, LLP

20070090349 - Organic thin film transistor, flat panel display apparatus comprising the same, and method of manufacturing the organic thin film transistor: An organic thin film transistor that can reduce contact resistance between source and drain electrodes and an organic semiconductor layer and can be readily manufactured, a flat panel display apparatus utilizing the organic thin film transistor, and a method of manufacturing the organic thin film transistor. The organic thin film... Agent: Stein, Mcewen & Bui, LLP

20070090346 - Porous chalcogenide thin film, method for preparing the same and electronic device using the same: A porous chalcogenide thin film having a microporous structure, a method for preparing the chalcogenide thin film and an electronic device employing the chalcogenide thin film, are provided. The porous chalcogenide thin film has superior crystallinity and can be applied as a semiconductor layer having superior electrical properties to the... Agent: Cantor Colburn, LLP

20070090343 - System and method for processing an organic memory cell: A system and method are disclosed for processing an organic memory cell. An exemplary system can employ an enclosed processing chamber, a passive layer formation component operative to form a passive layer on a first electrode, and an organic semiconductor layer formation component operative to form an organic semiconductor layer... Agent: Amin, Turocy & Calvin, LLP

20070090352 - Thin film transistor and flat panel display including the same: A thin film transistor includes: a gate electrode; source and drain electrodes insulated from the gate electrode; an organic semiconductor layer that is insulated from the gate electrode and is electrically connected to the source and drain electrodes; an insulating layer that insulates the gate electrode from the source and... Agent: Stein, Mcewen & Bui, LLP

20070090354 - Chalcogenide-based electrokinetic memory element and method of forming the same: Memory elements including a first electrode and a second electrode. A chalcogenide material layer is between the first and second electrodes and a tin-chalcogenide layer is between the chalcogenide material layer and the second electrode. A selenide layer is between the tin-chalcogenide layer and the chalcogenide material layer. Optionally, a... Agent: Dickstein Shapiro LLP

20070090356 - Semiconductor device: A semiconductor device includes a semiconductor substrate having electrodes, a resin layer provided on the surface of the semiconductor substrate on which the electrodes are formed and having concave portions formed on a second surface on the other side of a first surface facing the semiconductor substrate, test pads electrically... Agent: Harness, Dickey & Pierce, P.L.C

20070090355 - Single separable electrode and self-contained pad viability tester: A single separable electrode that includes a plurality of separable electrically connected electrode sections.... Agent: Philips Intellectual Property & Standards

20070090357 - Thin film transistor, pixel structure and repairing method thereof: A pixel structure including a scan line, a gate pattern, a first dielectric layer, a channel layer, a source, a drain, a data line, a second dielectric layer and a pixel electrode is provided. The gate pattern is electrically connected with the scan line and has an opening therein. The... Agent: Jianq Chyun Intellectual Property Office

20070090360 - Blanket implant diode: Blanket implant diode which can be used for transient voltage suppression having a P+ substrate implanted with an N-type dopant blanket implant near a top surface of the substrate, creating a P− region. An oxide mask is layered adjacent to and above the P− region. The oxide mask is partially... Agent: Mckee, Voorhees & Sease, P.L.C

20070090358 - Light-emitting device and method for manufacturing the same: Especially in case that a light-emitting element composed of layers containing organic compounds or inorganic compounds is driven by a thin film transistor (TFT), a structure having at least two transistors installed with a drive TFT is required to prevent irregularities of ON current of a switching TFT provided to... Agent: Nixon Peabody, LLP

20070090359 - Organic light-emitting diode: An organic light-emitting diode comprising a substrate having a first opposing surface and a second opposing surface; a first electrode layer overlying the first opposing surface; a light-emitting element overlying the first electrode layer, the light-emitting element comprising a hole-transport layer and an emissive/electron-transport layer, wherein the hole-transport layer and... Agent: Dow Corning Corporation Co1232

20070090361 - Thin film transistor substrate and liquid crystal display panel: The present invention relates to a thin film transistor substrate and a liquid crystal display panel for use in a liquid crystal display apparatus, and aims to provide a thin film transistor substrate and a liquid crystal display panel with good display quality. The thin film transistor substrate has a... Agent: Birch Stewart Kolasch & Birch

20070090362 - Thin film transistor, method of manufacturing the same and flat panel display having the thin film transistor: A thin film transistor includes: a gate electrode; source and drain electrodes insulated from the gate electrode; an organic semiconductor layer that is insulated from the gate electrode and electrically connected to the source and drain electrodes; an insulating layer that insulates the gate electrode from the source and drain... Agent: Stein, Mcewen & Bui, LLP

20070090363 - Dram including a vertical surround gate transistor: DRAM memory cells having a feature size of less than about 4F2 include vertical surround gate transistors that are configured to reduce any short channel effect on the reduced size memory cells. In addition, the memory cells may advantageously include reduced resistance word line contacts and reduced resistance bit line... Agent: Knobbe Martens Olson & Bear LLP

20070090365 - Field-effect transistor including transparent oxide and light-shielding member, and display utilizing the transistor: A field-effect transistor includes a substrate, a source electrode, a drain electrode, a gate electrode, a gate-insulating film, and an active layer. The active layer contains an oxide having a transmittance of 70% or more in the wavelength range of 400 to 800 nm. A light-shielding member is provided as... Agent: Fitzpatrick Cella Harper & Scinto

20070090364 - Method of manufacturing an image tft array for an indirect x-ray sensor and structure thereof: The present invention discloses a method of manufacturing an image TFT array and a structure thereof. A substrate is provided. At least one first line, a lower electrode, a pad electrode, a common electrode and a first electrode connected with the first line are defined simultaneously by etching a first... Agent: North America Intellectual Property Corporation

20070090368 - Method of manufacturing electro-optical device, electro-optical device, transferred chip, transfer origin substrate, and electronic apparatus: The invention enhances a production yield of a display device (an electro-optical device). The invention provides a method of manufacturing an electro-optical device including a display region in which a plurality of basic pixels are arranged, each basic pixel including a plurality of color pixels. The method includes: forming on... Agent: Oliff & Berridge, PLC

20070090366 - Tft array substrate and photo-masking method for fabricating same: An exemplary method for fabricating a thin film transistor (TFT) array substrate (200) includes: forming a transparent conductive layer (202) and a gate metal layer (203) on an insulating substrate (201); forming a photo-resist layer (231) on the gate metal layer; exposing the photo-resist layer using a photo-mask with a... Agent: Wei Te Chung Foxconn International, Inc.

20070090367 - Thin film transistor array panel and manufacturing method thereof: A TFT array panel includes: first and second gate members connected to each other; a gate insulating layer formed on the first and the second gate members; first and second semiconductor members formed on the gate insulating layer opposite the first and the second gate members, respectively; first and second... Agent: Frank Chau, Esq. F. Chau & Associates, LLP

20070090369 - Method for manufacturing p-type group iii nitride semiconductor, and group iii nitride semiconductor light-emitting device: The inventive method for manufacturing a p-type group III nitride semiconductor comprises: (a) growing a group III nitride semiconductor containing a p-type dopant at 1000° C. or higher in an atmosphere containing H2 gas and/or NH3 gas; and (b) after the growth of the group III nitride semiconductor, substituting the... Agent: Sughrue Mion, PLLC

20070090370 - Silicon carbide semiconductor device and manufacturing method therefor: With a view to preventing increases in forward voltage due to a change with the lapse of time of a bipolar semiconductor device using a silicon carbide semiconductor, a buffer layer, a drift layer and other p-type and n-type semiconductor layers are formed on a growth surface, which is given... Agent: Nixon & Vanderhye, PC

20070090373 - Iii-nitride device with improved layout geometry: A III-nitride power device for controlling high currents as an interdigitated electrode pattern for increasing device rating while decreasing device dimensions. Fingers of the interdigitated electrode pattern have tips with smaller dimensions than the remainder of the fingers. The tapered finger design balances current flow in the electrode fingers to... Agent: Ostrolenk, Faber, Gerb & Soffen, LLP

20070090372 - Light emitting diode: A light emitting diode including a substrate, a semiconductor stacking layer, a first electrode and a second electrode is provided. The semiconductor stacking layer including an n-type doped semiconductor layer, a p-type doped semiconductor layer and an active layer is disposed on the substrate. The n-type doped semiconductor layer has... Agent: J C Patents, Inc.

20070090371 - Photoactive component with organic layers: The invention relates to a photoactive component, especially a solar cell, comprising organic layers and formed by at least one stacked pi, ni, and/or pin diode. The diodes are characterised in that they comprise at least one p-doped or n-doped transport layer having a larger optical band gap than that... Agent: Heslin Rothenberg Farley & Mesiti PC

20070090374 - Flat lamp panel: A flat lamp panel includes a top substrate and a bottom substrate. The bottom substrate includes at least an electrode pair, a dielectric layer, and a first phosphor layer covering the up surface of the bottom substrate. The top substrate is disposed above the bottom substrate in a parallel manner.... Agent: North America Intellectual Property Corporation

20070090375 - Multichip on-board led illumination device: An LED-based illumination device can use an array of four LEDs to produce high intensity light over a broad color spectrum and a broad range of color temperature. A high quality white light can be produced by using two green LEDs with a single red and a single blue LED.... Agent: Stallman & Pollock LLP

20070090377 - Light emitting device and method of forming the same: A light emitting device includes a substrate and an adhesive layer on the substrate. At least two multi-layer epitaxial structures are on the substrate. Each structure sequentially includes an upper cladding layer, an active layer, a lower cladding layer, an ohmic contact epitaxial layer, and a first ohmic contact electrode... Agent: Snell & Wilmer L.L.P. (main)

20070090376 - Light-emitting element and light-emitting device: It is an object of the present invention to provide a light-emitting element having, between a pair of electrodes, a layer containing a light-emitting material and a transparent conductive film, wherein the electric erosion of the transparent conductive film and reflective metal can be prevented and to provide a light-emitting... Agent: Cook, Alex, Mcfarron, Manzo, Cummings & Mehler Ltd

20070090378 - Nitride-based semiconductor light emitting diode: A nitride-based semiconductor LED which is flip-chip bonded on a lead pattern of a sub-mount through a bump ball comprises a substrate; a light-emitting structure formed on the substrate; an electrode formed on the light-emitting structure; a protective film formed on the resulting structure having the electrode formed therein, the... Agent: Mcdermott Will & Emery LLP

20070090380 - Image sensor structure with a connector: An image sensor structure with a connector includes a substrate having an upper surface, which is formed with a central region and first electrodes arranged at the periphery of central region, and a lower surface is formed with second electrodes corresponding to electrically connect the first electrodes. A frame layer... Agent: Pro-techtor International Services

20070090383 - Light emitting device: The light emitting device has a light emitting diode which is made of a nitride semiconductor and a phosphor which absorbs a part of lights emitted from the light emitting diode and emits different lights with wavelengths other than those of the absorbed lights. The phosphor is made of alkaline... Agent: Mcginn Intellectual Property Law Group, PLLC

20070090379 - Light emitting device with adjustable reflector cup: A light emitting device has a light emitting diode (LED), a reflector cup, and one or more adjustment mechanisms to control the intensity profile of light emitted from the light emitting device. The reflector cup has a base and a sidewall extending outward from the base. A base adjustment mechanism... Agent: Avago Technologies, Ltd.

20070090382 - Light emitting diode package: A light emitting diode package is provided. A package body has a mounting part surrounded by side walls and lead electrodes on a bottom surface of the mounting part. A light emitting diode chip is mounted on the bottom surface of the mounting part and electrically connected to the lead... Agent: Mcdermott Will & Emery LLP

20070090381 - Semiconductor light emitting device: A semiconductor light emitting device comprises: a semiconductor light emitting element that emits first wavelength light; a first fluorescent material that absorbs the first wavelength light and emits second wavelength light having a longer wavelength than the first wavelength light; and a second fluorescent material that absorbs the first wavelength... Agent: Banner & Witcoff, Ltd. Attorneys For Client No. 000449, 001701

20070090386 - Air cooled high-efficiency light emitting diode spotlight or floodlight: The present invention replaces a standard size halogen tungsten lamp spotlight or floodlight with a much cooler LED lamp that also fits into existing housings. However, the LED's still need to be cooled. The Present Invention mounts up to three LED's into a special reflector with a plurality of specially... Agent: Stanley H. Kremen

20070090384 - Nitride based semiconductor device having multiple layer buffer structure and fabrication method thereof: A multiple layered buffer structure for nitride based semiconductor device is provided herein. The buffer structure contains a first layer of AlxInyGa1-x-yN grown under a high temperature, and a second layer of an un-doped or appropriately doped GaN based material grown under a low temperature The GaN based material of... Agent: Lin & Associates Intellectual Property

20070090385 - Semiconductor device: The present invention provides a semiconductor device in which a power line is not affected by noise due to a voltage drop caused by instantaneous high-current consumption in the buffer portion and that has no possibility that a logic portion malfunctions. In a case where the same potential is supplied... Agent: Fish & Richardson P.C.

20070090387 - Solid state light sheet and encapsulated bare die semiconductor circuits: An electronically active sheet includes a bottom substrate having a bottom electrically conductive surface. A top substrate having a top electrically conductive surface is disposed facing the bottom electrically conductive surface. An electrical insulator separates the bottom electrically conductive surface from the top electrically conductive surface. At least one bare... Agent: Michaud-duffy Group LLP

20070090389 - Cob-typed led package with phosphor: A light emitting diode (LED) package unit, comprising a substrate having a concave, a LED chip, at least two electrodes, at least two wires, a gel and a first wavelength-converting material. The LED chip, disposed in the concave, comprising a top-face, a bottom-face for jointing with the substrate, and at... Agent: Bruce H. Troxell Suite 1404

20070090388 - Light emitting diode and fabricating method thereof: A light emitting diode including a substrate, a semiconductor layer, multiple electrodes, a passivation layer, multiple under bump metallurgy (UBM) layers and a reflective layer is provided. The semiconductor layer is disposed on the substrate. The electrodes and the passivation layer are disposed on the semiconductor layer. The passivation layer... Agent: J.c. Patents, Inc.

20070090390 - Light emitting diode chip: A LED chip including a substrate, a first type doped semiconductor layer, a second type doped semiconductor layer, a light emitting layer, at least an Indium-doped AlxGa1-xN based material layer (0≦x<1) and at least a tunneling junction layer is provided. The first type doped semiconductor layer is disposed on the... Agent: Jianq Chyun Intellectual Property Office

20070090391 - Light-emitting element having at least one light-emitting chip crystal: A light-emitting element, in particular a light-emitting diode, having at least one light-emitting chip crystal, in particular a semiconductor crystal, is described. At least free surfaces of the light-emitting chip crystal are covered with an inert material—liquid fluid—which is in direct contact with the light-emitting chip crystal.... Agent: Factor & Lake, Ltd

20070090392 - Low capacitance scr with trigger element: A silicon rectifier semiconductor device with selectable trigger and holding voltages includes a trigger element. A first well region of a first conductivity type formed within a semiconductor body. A first region of the first conductivity type is formed within the first well region. A second region of a second... Agent: Texas Instruments Incorporated

20070090393 - Gain cells and methods of making and using the same: In a first aspect, a first apparatus is provided. The first apparatus is a memory cell of a substrate that includes (1) a PFET with an orientation approximately planar to a surface of the substrate; and (2) an NFET coupled to the approximately planar PFET. An orientation of the NFET... Agent: Ibm Corporation Intellectual Property Law Dept. 917

20070090394 - Deep diffused thin photodiodes: This invention comprises photodiodes, optionally organized in the form of an array, including p+ deep diffused regions or p+ and n+ deep diffused regions. More specifically, the invention permits one to fabricate thin 4 inch and 6 inch wafer using the physical support provided by a n+ deep diffused layer... Agent: Patentmetrix

20070090395 - Semiconductor device and method for fabricating the same: A MIS transistor includes a gate electrode portion, insulating sidewalls formed on side surfaces of the gate electrode portion, source/drain regions and a stress film formed so as to cover the gate electrode portion and the source/drain regions. A height of an upper surface of the gate electrode portion is... Agent: Mcdermott Will & Emery LLP

20070090396 - Semiconductor substrate of gaas and semiconductor device: A semiconductor substrate (1) of GaAs with a semiconductor layer sequence (2) applied on top. The semiconductor layer sequence (2) contains a plurality of semiconductor layers (3, 4, 5, 6, 7) of Al1−yGayAs1−xPx with 0≦x≦1 and 0≦y≦1, the phosphorus component x in a number of the semiconductor layers respectively being... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20070090397 - Semiconductor photo-detecting element: In a semiconductor photo-detecting element (an avalanche photodiode), a high-sensitivity element is obtained by incorporating a multiplication layer having high-performance multiplication characteristics. By using a structure which reduces an electric field applied to an etching stopper layer, it is possible to use a multiplication layer having higher-performance multiplication characteristics (a... Agent: Young & Thompson

20070090398 - Systems and methods for electromagnetic noise suppression using hybrid electromagnetic bandgap structures: A hybrid electromagnetic bandgap (EBG) structure for broadband suppression of noise on printed wiring boards includes an array of coplanar patches interconnected into a grid by series inductances, and a corresponding array of shunt LC networks connecting the coplanar patches to a second conductive plane. This combination of series inductances... Agent: Brinks Hofer Gilson & Lione

20070090399 - Bifet semiconductor device having vertically integrated fet and hbt: The invention provides a BiFET semiconductor device vertically integrating a FET and a HBT on the same substrate. The BiFET semiconductor device comprises a HBT structure, a high-resistivity structure, and a FET structure, sequentially formed in this order from bottom to top on a semi-insulating substrate. The high-resistivity structure comprises... Agent: Lin & Associates Intellectual Property

20070090400 - Method of producing the same: A method of producing a semiconductor device includes the steps of: preparing a double SOI substrate, forming a deep trench, filling the deep trench, forming an opening, forming a cavity, depositing a polycrystalline silicon layer, and forming a bipolar transistor.... Agent: Takeuchi & Kubotera, LLP

20070090401 - I/o driver power distribution method for reducing silicon area: Embodiments of the present invention provide an integrated circuit (IC) in which power to input output (IO) drivers may be distributed within unused areas over macro processing circuits. This IC includes a long distance power and ground distribution network, an input output (IO) power and ground distribution network, a number... Agent: Garlick Harrison & Markison

20070090402 - Bond pad structure: Bond pad structures are presented. Some embodiments of the structure include a conductive conductor-insulator layer overlying a substrate. The conductive conductor-insulator layer includes a composite region having a conductor sub-region and insulator sub-region, which neighbor each other, and a single material region. The insulator is harder than the conductor.... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070090403 - Array substrate and method of manufacturing the same: An array substrate includes a substrate, an electrode pad, an insulating layer and a transparent electrode. The substrate includes a display region and a peripheral region adjacent to the display region. The electrode pad is in the peripheral region. The electrode pad includes a first metal layer and a second... Agent: F. Chau & Associates, LLC

20070090404 - Process for the fabrication of thin-film device and thin-film device: A thin-film device is fabricated by forming a protective layer and a thin-film device layer one by one on a first substrate and bonding a second substrate on the thin-film device layer via a first adhesive layer or a coating layer and first adhesive layer, removing the first substrate at... Agent: David R. Metzger Sonnenschein Nath & Rosenthal

20070090405 - Charge compensated dielectric layer structure and method of making the same: A method of forming a semiconductor structure comprises providing an insulator layer overlying a III-V compound substrate, the insulator layer having a surface charge layer, the surface charge layer having a deleterious performance effect on the underlying layer or layers of the III-V compound substrate. The method further comprises transforming... Agent: Freescale Semiconductor, Inc. Law Department

20070090408 - Narrow-body multiple-gate fet with dominant body transistor for high performance: A field-effect transistor for a narrow-body, multiple-gate transistor such as a FinFET, tri-gate or Ω-FET is described. The corners of the channel region disposed beneath the gate are rounded n, for instance, oxidation steps, to reduce the comer effect associated with conduction initiating in the corners of the channel region.... Agent: Blakely Sokoloff Taylor & Zafman

20070090409 - Semiconductor device comprising an undoped oxide barrier: The present invention relates to a semiconductor device comprising at least one gate located in each of a memory array area and a periphery circuit area of a substrate, respectively, wherein the pattern density in the memory array area is higher than that in the periphery circuit area. The semiconductor... Agent: Birch Stewart Kolasch & Birch

20070090406 - Structure and method for manufacturing high performance and low leakage field effect transistor: There is provided a field effect transistor (FET) including a source side semiconductor; a drain side semiconductor; and a gate. The source side semiconductor is made of a high mobility semiconductor material, and the drain side semiconductor is made of a low leakage semiconductor material. In one embodiment, the FET... Agent: Ohlandt, Greeley, Ruggiero & Perle, LLP

20070090407 - Thin film transistor array substrate and manufacturing method thereof: A thin film transistor array substrate and a manufacturing method thereof are provided. Wherein, scan lines and data lines are disposed on a substrate to define a plurality of pixel regions. Thin film transistors are disposed in the pixel regions correspondingly and driven by the scan lines and the data... Agent: Jianq Chyun Intellectual Property Office

20070090410 - Thin film transistor array, electrostatic discharge protective device thereof, and methods for fabricating the same: A thin film transistor array, an electrostatic discharge protective device thereof, and methods for fabricating the same are provided. The thin film transistor array comprises a plurality of scan lines, a plurality of data lines, a first shorting bar, and a second shorting bar. The electrostatic discharge protective device comprises... Agent: Jianq Chyun Intellectual Property Office

20070090411 - Sensor chip, process for producing the same, and sensor using the same: A sensor chip includes a layer-shaped base body, which has a plurality of fine holes formed in one surface, and fine metal particles, each of which is loaded in one of the fine holes of the base body. At least a part of each of the fine metal particles is... Agent: Sughrue Mion, PLLC

20070090412 - Semiconductor device: Disclosed is a semiconductor device has a semiconductor substrate of a first conductivity type in which at least a first element-forming region and a second element-forming region are formed. Wells are formed in respective ones of the element-forming regions of the semiconductor substrate, and the well of at least one... Agent: Sughrue Mion, PLLC

20070090413 - Nonvolatile ferroelectric memory device and method thereof: A nonvolatile ferroelectric memory device has a plurality of ferroelectric memory cells. The ferroelectric memory cells include a first double gate cell for storing a bit of datum, the first double gate cell including a ferroelectric layer and a floating channel layer, wherein a polarity state of the ferroelectric layer... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070090414 - Semiconductor device including esd protective element: A semiconductor device includes a plurality of gate electrodes, source and drain regions, a plurality of source contacts, a plurality of drain contacts, substrate contacts, and a salicide block. The gate electrodes are arrayed in parallel on a semiconductor region on a semiconductor substrate. The source and drain regions are... Agent: Banner & Witcoff, Ltd. Attorneys For Client No. 000449, 001701

20070090416 - Cmos devices with a single work function gate electrode and method of fabrication: Described herein are a device utilizing a gate electrode material with a single work function for both the pMOS and nMOS transistors where the magnitude of the transistor threshold voltages is modified by semiconductor band engineering and article made thereby. Further described herein are methods of fabricating a device formed... Agent: Intel/blakely

20070090415 - Power device with high switching speed and manufacturing method thereof: A power device is formed by a thyristor and by a MOSFET transistors, series-connected between a first and a second current-conduction terminal. The power device moreover has a control terminal connected to an insulated-gate electrode of the MOSFET transistor and receiving a control voltage for turning on/off the device, and... Agent: Seed Intellectual Property Law Group PLLC

20070090417 - Semiconductor device and method for fabricating the same: A semiconductor device includes a first MIS transistor including a first gate electrode fully silicided with a metal. With the first MIS transistor includes: a first gate insulating film formed on a semiconductor region; the first gate electrode formed on the first gate insulating film; a first sidewall spacer formed... Agent: Mcdermott Will & Emery LLP

20070090419 - Cmos image sensor and manufacturing method thereof: A CMOS image sensor and a method for manufacturing the same are provided. The CMOS image sensor includes: a photo diode formed in a semiconductor substrate for generating an optical signal from incident light; a first micro lens formed on the semiconductor substrate above the photo diode; a plurality of... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20070090418 - Method for fabricating a high performance pin focal plane structure using three handle wafers: The present invention concerns, in part, a method for fabricating a silicon PIN detector component wherein three handle wafers are bonded to the wafer at varying points in the fabrication process. The utilization of three handle wafers during fabrication significantly ease handling concerns associated with what would otherwise be a... Agent: Raytheon Company Intellectual Property & Licensing, Eo/e04/n119

20070090421 - Array substrate for liquid crystal display device and method of fabricating the same: An array substrate for a liquid crystal display device includes: a gate line and a first storage electrode on a substrate; a gate insulating layer on the gate line and the first storage electrode; a data line over the gate insulating layer, the data line crossing the gate line to... Agent: Song K. Jung Mckenna Long & Aldridge LLP

20070090420 - Pixel array: A pixel array formed on a substrate mainly including scan lines and data lines is provided. The scan lines and the data lines are essentially consisted of conductive patterns disposed at different layers and contact windows electrically connected with the conductive patterns disposed at the different layers. The scan lines... Agent: J.c. Patents, Inc.

20070090422 - Thin-film transistor panel having structure that suppresses characteristic shifts and method for manufacturing the same: A thin-film transistor panel includes a substrate, and a thin-film transistor formed on the substrate. The transistor includes a gate electrode, a gate insulating film, a semiconductor thin film, first and second ohmic contact layers formed on the semiconductor thin film, and source and drain electrodes which are respectively formed... Agent: Frishauf, Holtz, Goodman & Chick, PC

20070090423 - Cmos image sensor: A complementary metal-oxide semiconductor (CMOS) image sensor includes a photodiode, a gate pattern of a transfer transistor contacting one side of the photodiode, a gate pattern of a drive transistor disposed to have a predetermined spacing distance from the gate pattern of the transfer transistor, and a floating diffusion node... Agent: Morgan Lewis & Bockius LLP

20070090424 - Cmos image sensor and method of manufacturing the same: Disclosed herein are a CMOS image sensor and a method of manufacturing the same, which can reduce current leakage through a plug connecting a photodiode and a transfer transistor to each other, and thereby provide low dark current levels. The CMOS image sensor includes a first epitaxial layer on or... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20070090426 - Ferroelectric capacitor: A ferroelectric capacitor includes a bottom electrode formed on a substrate, a ferroelectric material film formed on the bottom electrode and a top electrode formed on the ferroelectric material film. The ferroelectric material film is predominantly made of a compound represented by the general formula of SrxBiyTa2-zNbzO9 (wherein 0.69≦x≦0.81, 2.09≦y≦2.31... Agent: Mcdermott Will & Emery LLP

20070090425 - Memory cell comprising switchable semiconductor memory element with trimmable resistance: A nonvolatile memory cell comprising doped semiconductor material and a diode can store memory states by changing the resistance of the doped semiconductor material by application of a set pulse (decreasing resistance) or a reset pulse (increasing resistance.) Set pulses are of short duration and above a threshold voltage, while... Agent: Patent Dept., Sandisk 3d LLC(matrix)

20070090427 - Semiconductor device and method of manufacturing same: A method of manufacturing a semiconductor device, comprises: forming a high dielectric gate insulating film in an nMIS formation region and a pMIS formation region of a semiconductor substrate; forming a first metal film on the high dielectric gate insulating film, the first metal film; removing the first metal film... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070090429 - Capacitor structure: A capacitor structure is provided. The capacitor structure is configured in a substrate. The capacitor structure includes a plurality of electrode sets, at least a first conductive plug and at least a second conductive plug. The electrode sets correspond with each other and are disposed in different layers of the... Agent: Jianq Chyun Intellectual Property Office

20070090428 - Integrated semiconductor structure for sram cells: A semiconductor structure includes a semiconductor substrate having a first device area and a second device area. A gate layer is formed across the first device area and the second device area on the semiconductor substrate, wherein a first portion of the gate layer running across the first device area... Agent: L. Howard Chen, Esq. Kirkpatrick & Lockhart Preston Gates Ellis LLP

20070090430 - Semiconductor memory device: semiconductor memory device comprising: a semiconductor layer; a gate electrode formed on the semiconductor layer through a gate insulating film; a channel region provided beneath the gate electrode; source/drain diffusion regions having a conductivity type opposite to that of the channel region and provided on both sides of the channel... Agent: Birch Stewart Kolasch & Birch

20070090431 - Device layout for reducing device upset due to single event effects: A device layout for reducing device upset due to single event effects is described. A transistor is formed on a substrate. The transistor has a source, a drain, and a gate. The drain and/or the source are formed such that the drain and/or the source have a low impedance contact... Agent: Honeywell International Inc.

20070090436 - Deep trench capacitor: A deep trench capacitor disposed in a deep trench in a substrate is provided. The deep trench capacitor includes a bottom electrode disposed in the substrate surrounding a bottom of the deep trench; a first conductive layer disposed in the deep trench; a capacitor dielectric layer disposed between a lower... Agent: Jianq Chyun Intellectual Property Office

20070090433 - Isolation collar void and methods of forming the same: In a first aspect, a first apparatus is provided. The first apparatus includes a void formed around one or more portions of a microelectronic device in a bulk substrate. The void is adapted to reduce a parasitic leakage between the microelectronic device and the bulk substrate. Numerous other aspects are... Agent: James R. Nock IBM Corporation

20070090432 - Method and system for incorporating high voltage devices in an eeprom: A method and system for fabricating a stacked capacitor and a DMOS transistor are disclosed. In one aspect, the method and system include providing a bottom plate, an insulator, and an additional layer including first and second plates. The insulator covers at least a portion of the bottom plate and... Agent: Sawyer Law Group LLP

20070090435 - Mos transistor with recessed gate and method of fabricating the same: A MOS transistor with a recessed gate and a method of fabricating the same: The MOS transistor comprises a semiconductor substrate, and a trench isolation layer located in a predetermined region of the semiconductor substrate for defining an active region. The trench isolation layer has a negative slope on at... Agent: Marger Johnson & Mccollom, P.C.

20070090434 - Power semiconductor device and method therefor: A power transistor includes a plurality of transistor cells. Each transistor cell has a first electrode coupled to a first electrode interconnection region overlying a first major surface, a control electrode coupled to a control electrode interconnection region overlying the first major surface, and a second electrode coupled to a... Agent: Hvvi Semiconductors, Inc.

20070090437 - Semiconductor devices including gate patterns for reducing void formation: A method of forming a semiconductor device includes forming an insulating layer on a semiconductor substrate. The insulating layer has a trench therein with opposing sidewalls and a bottom surface. A first conductive layer is formed on the sidewalls and on the bottom surface of the trench to define a... Agent: Myers Bigel Sibley & Sajovec

20070090438 - Semiconductor device and method of manufacturing the same: Provided is a semiconductor device, including a silicon substrate, a first insulating film formed on the silicon substrate, a first conductive plug formed in an inside of a first contact hole of the first insulating film, an underlying conductive film having a flat surface formed on the first conductive plug... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070090439 - Hafnium titanium oxide films: Embodiments of a dielectric layer containing a hafnium titanium oxide film structured as one or more monolayers include the dielectric layer disposed in an integrated circuit. Embodiments of methods of fabricating such a dielectric layer provide a dielectric layer for use in a variety of electronic devices.... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070090440 - Lanthanum aluminum oxynitride dielectric films: Electronic apparatus and methods of forming the electronic apparatus include a lanthanum aluminum oxynitride film on a substrate for use in a variety of electronic systems. The lanthanum aluminum oxynitride film may be structured as one or more monolayers.... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070090441 - Titanium aluminum oxide films: A dielectric layer containing an insulating metal oxide film having multiple metal components and a method of fabricating such a dielectric layer produce a reliable dielectric layer for use in a variety of electronic devices. Embodiments include a titanium aluminum oxide film structured as one or more monolayers. Embodiments also... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070090442 - Asymmetric floating gate nand flash memory: A NAND-type flash memory device includes asymmetric floating gates overlying respective wordlines. A given floating gate is sufficiently coupled to its respective wordline such that a large gate (i.e., wordline) bias voltage will couple the floating gate with a voltage which can invert the channel under the floating gate. The... Agent: Akin Gump Strauss Hauer & Feld L.L.P.

20070090443 - Method of fabricating a semiconductor device having self-aligned floating gate and related device: A semiconductor device such as a flash memory device having a self-aligned floating gate and a method of fabricating the same is provided. An embodiment of the device includes an isolation layer defining a fin body is formed in a semiconductor substrate. The fin body has a portion protruding above... Agent: Marger Johnson & Mccollom, P.C.

20070090444 - Nonvolatile memory device including nano dot and method of fabricating the same: A nonvolatile memory device including a nano dot and a method of fabricating the same are provided. The nonvolatile memory device may include a lower electrode, an oxide layer on the lower electrode, a nano dot in the oxide layer and an upper electrode on the oxide layer. In example... Agent: Harness, Dickey & Pierce, P.L.C

20070090446 - Hardmask etch for gate polyetch: A semiconductor device is provided that comprises a substrate; an oxide layer over the substrate; and a silicon layer over the oxide layer, the silicon layer forming a notch-free gate structure; wherein the gate structure has been formed using a hard mask comprising an antireflective layer over a silicon oxide... Agent: Birch Stewart Kolasch & Birch

20070090445 - Non-volatile memory devices with wraparound-shaped floating gate electrodes and methods of forming same: Non-volatile memory devices include memory cells therein with reduced cell-to-cell coupling capacitance. These memory cells include floating gate electrodes with open-ended wraparound shapes that operate to reduce the cell-to-cell coupling capacitance in a bit line direction, while still maintaining a high coupling ratio between control and floating gate electrodes within... Agent: Myers Bigel Sibley & Sajovec

20070090447 - Semiconductor device and method of manufacture thereof: A seal ring is provided between a region where a circuit is formed on a semiconductor substrate and a dicing region. The seal ring has a portion where sealing layers of which the cross sectional form is in T-shape are layered and a portion where sealing layers of which the... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070090449 - Non-volatile memory devices and methods of forming the same: A non-volatile memory device and a method of forming the same are provided. The non-volatile memory device may include a cell isolation pattern and a semiconductor pattern sequentially stacked on a predetermined or given region of a semiconductor substrate, a cell gate line on the semiconductor pattern and on a... Agent: Harness, Dickey & Pierce, P.L.C

20070090448 - Systems and methods for memory structure comprising embedded flash memory: A memory structure that combines multiple embedded flash memory. The flash memory can be used, e.g., as air replacement cells or back up memory, or additional memory cells. In one aspect, the flash memory cells are stacked on top of the flash memory cells and the flash memory cells share... Agent: Baker & Mckenzie LLP Patent Department

20070090450 - Semiconductor device with high dielectric constant insulating film and manufacturing method for the same: A semiconductor device has a substrate and a dielectric film formed directly or indirectly on the substrate. The dielectric film contains a metal silicate film, and a silicon concentration in the metal silicate film is lower in a center portion in the film thickness direction than in an upper portion... Agent: Sughrue Mion, PLLC

20070090451 - Lateral dmos transistors including retrograde regions therein and methods of fabricating the same: A metal-oxide semiconductor transistor includes a semiconductor substrate including a source region and a drain region adjacent a surface of the substrate and a drift region between the source region and the drain region. The drift region has an impurity concentration distribution such that a peak impurity concentration of the... Agent: Myers Bigel Sibley & Sajovec

20070090453 - Non-volatile memory and manufacturing method and operating method thereof: A non-volatile memory unit includes a substrate, a conductive layer, a charge storage layer, a first doped regions, two second doped regions, a first bit line and a second bit line. Wherein, there is a trench in the substrate, the conductive layer is disposed in the substrate and filled the... Agent: Jianq Chyun Intellectual Property Office

20070090452 - Recess channel transistor for preventing deterioration of device characteristics due to misalignment of gate layers and method of forming the same: The recess channel transistor includes: a semiconductor substrate including a device insulation layer defining an activation region in which recesses are formed; insulation buffer patterns, each of which is formed at an opening of the recess on a surface of the substrate; gates, each of which includes a recess gate... Agent: Ladas & Parry LLP

20070090454 - Transistor device: A transistor device is provided, including a lightly doped layer of semiconductor material of a first type and a body region of semiconductor material of a second type. A source region of the first type is formed in the body region. The source region being more doped than the lightly... Agent: Hewlett Packard Company

20070090455 - Electronic device including transistor structures with sidewall spacers and a process for forming the electronic device: An electronic device can include a first transistor structure including a first gate electrode surrounded by a first sidewall spacer having a first stress and a second transistor structure including a second gate electrode surrounding a second sidewall spacer having second stress. The first sidewall spacer is an only sidewall... Agent: Larson Newman Abel Polansky & White, LLP

20070090458 - Semiconductor device having first and second separation trenches: A semiconductor device includes: a SOI substrate having a SOI layer, a buried oxide layer and a support substrate; multiple first separation trenches on the SOI layer; multiple MOS transistors, each of which is surrounded with one first separation trench; a second separation trench on the SOI layer including n-ply... Agent: Posz Law Group, PLC

20070090456 - Soi device and method for fabricating the same: A semiconductor-on-insulator (SOI) device is described, including a substrate, a first insulating layer and a second insulating layer on the substrate, a semiconductor layer covering the first and the second insulating layers, a gate dielectric layer and a gate on the semiconductor layer, and two doped regions as source/drain regions... Agent: Jianq Chyun Intellectual Property Office

20070090457 - Thin film transistor substrate for display unit: A thin film transistor (TFT) substrate comprises: a plastic insulation substrate; a first silicon nitride layer with a first refractive index, formed one surface of the plastic insulation substrate; and a TFT comprising a second silicon nitride layer formed with a second refractive index smaller than the first refractive index... Agent: Macpherson Kwok Chen & Heid LLP

20070090459 - Multiple gate printed transistor method and apparatus: A printed transistor has a first gate (202) printed and disposed on a first side of a printed deposit of semiconductor material (201) and a second printed gate (301) disposed on an opposite side of the printed deposit of semiconductor material. By one approach these elements are provided using a... Agent: Fitch Even Tabin And Flannery

20070090460 - Electrostatic protection systems and methods: Systems and methods are disclosed herein to provide improved electrostatic protection for electrical circuits. For example, in accordance with an embodiment of the present invention, an electrostatic protection device includes: a drain region formed in a substrate; a gate separated from the substrate by a gate oxide; and an isolation... Agent: Macpherson Kwok Chen & Heid LLP

20070090461 - Ferroelectric capacitor with parallel resistance for ferroelectric memory: Ferroelectric memory cells (3) are presented, in which a cell resistor (R) is integrated into the cell capacitor (C) to inhibit charge accumulation or charge loss at the cell storage node (SN) when the cell (3) is not being accessed while avoiding significant disruption of memory cell access operations. Methods... Agent: Texas Instruments Incorporated

20070090464 - Power circuit package and fabrication method: A power circuit package includes a base including a substrate, a plurality of interconnect circuit layers over the substrate with each including a substrate insulating layer patterned with substrate electrical interconnects, and via connections extending from a top surface of the substrate to at least one of the substrate electrical... Agent: General Electric Company Global Research

20070090465 - Semiconductor device and method for manufacturing the same: In a semiconductor device having a first MIS transistor on a semiconductor substrate, the first MIS transistor includes a p-type semiconductor layer, a first gate insulating film, a first gate electrode, a first sidewall insulting film including at least a first sidewall, an n-type extension diffusion layer, and an n-type... Agent: Mcdermott Will & Emery LLP

20070090463 - Semiconductor devices with multiple heat sinks: A semiconductor device that includes multiple heat sinks is provided along with methods for forming a semiconductor device having multiple heat sinks. The semiconductor device includes a first heat sink that is configured as a conductive lead frame. The conductive lead frame is electrically coupled to a conducting area of... Agent: Courtney Staniford & Gregory LLP

20070090462 - Silicided regions for nmos and pmos devices: A semiconductor device having an NMOS and a PMOS device formed thereon is provided. The NMOS device has additional spacers formed alongside the gate electrode to allow the silicide region to be formed farther away from the gate electrode. By placing the silicide region farther away from the gate electrode,... Agent: Slater & Matsil, L.L.P.

20070090466 - Methods of forming electronic devices having partially elevated source/drain structures: Methods of forming an electronic device may include forming a gate electrode on a semiconductor substrate, and forming first and second impurity doped regions of the semiconductor substrate on opposite sides of the gate electrode. An insulating layer may be formed on the semiconductor substrate including the first and second... Agent: Myers Bigel Sibley & Sajovec

20070090467 - Semiconductor substrate with multiple crystallographic orientations: A semiconductor structure and its method for fabrication include a first surface semiconductor layer of a first crystallographic orientation located upon a dielectric surface of a substrate. Located laterally separated upon the dielectric surface from the first surface semiconductor layer is a stack layer. The stack layer includes a buried... Agent: Scully Scott Murphy & Presser, PC

20070090468 - Semiconductor device with silicon-film fins and method of manufacturing the same: A semiconductor device includes a semiconductor substrate, an insulating film projected on a surface of the semiconductor substrate, a semiconductor film provided on a side surface of the insulating film, and MIS transistor formed in the semiconductor film, the MIS transistor having source, gate and drain region. The semiconductor device... Agent: Frommer Lawrence & Haug

20070090469 - Semiconductor device: A semiconductor device according to an embodiment of the present invention includes a semiconductor chip. The semiconductor chip includes a semiconductor substrate, an interconnect layer, a back electrode (first working electrode), and a back dummy electrode (first dummy electrode). On the semiconductor substrate, the interconnect layer including an interconnect is... Agent: Young & Thompson

20070090470 - Semiconductor devices with a field shaping region: A semiconductor device, for example a diode (200), having a pn junction (101) has an insulating material field shaping region (201) adjacent, and possibly bridging, the pn junction. The field shaping region (201) preferably has a high dielectric constant and is coupled via capacitive voltage coupling regions (204,205) to substantially... Agent: Philips Electronics North America Corporation Intellectual Property & Standards

20070090471 - Low threshold voltage semiconductor device with dual threshold voltage control means: A semiconductor structure, particularly a pFET, which includes a dielectric material that has a dielectric constant of greater than that of SiO2 and a Ge or Si content of greater than 50% and at least one other means for threshold/flatband voltage tuning by material stack engineering is provided. The other... Agent: Scully Scott Murphy & Presser, PC

20070090472 - Semiconductor device and method for production thereof: A semiconductor device having a silicon substrate, an element isolating film, an active region, a gate electrode provided via a gate insulating film, a diffusion layer provided on the active region on opposite sides of the gate electrode, an interlayer insulating film, and a plug filled in a hole formed... Agent: Sughrue Mion, PLLC

20070090474 - Mems device and method of fabrication: A MEMS device and method of fabrication including a plurality of structural tie bars for added structural integrity. The MEMS device includes an active layer and a substrate having an insulating material formed therebetween, first and second pluralities of stationary electrodes and a plurality of moveable electrodes in the active... Agent: Ingrassia, Fisher & Lorenz, P.C.

20070090473 - Microelectromechanical component and method for the production thereof: A microelectromechanical component and to a method for the production thereof is disclosed. In one embodiment, the microelectromechanical component has a pressure-sensitive semiconductor chip, which is covered in its pressure-sensitive region by a rubber-elastic layer and is arranged in a cavity housing and covered by a rubber-elastic covering. This rubber-elastic... Agent: Dicke, Billig & Czaja, P.l.l.c.

20070090475 - Mems performance improvement using high gravity force conditioning: A system for conditioning a sensor die. The sensor die may have a sensor wafer and a substrate wafer anodically bonded together. The sensor die may have an inertial device such as an accelerometer or a gyroscope. The device has a scale factor that may change with a bowing of... Agent: Honeywell International Inc.

20070090476 - Surface-emission cathodes having cantilevered electrodes: A surface-emission cathode formed on an insulating surface having cantilevered, i.e. “undercut,” electrodes. Suitable insulating surfaces include negative electron affinity (NEA) insulators such as glass or diamond. The cathode can operate in a comprised vacuum (e.g., 10−7 Torr) with no bias on the electrodes and low vacuum electric fields (e.g.,... Agent: Goodwin Procter LLP Patent Administrator

20070090477 - Photodiode array, method for manufacturing same, and radiation detector: A theme is to prevent the generation of noise due to damage in a photodetecting portion in a mounting process in a photodiode array, a method of manufacturing the same, and a radiation detector. In a photodiode array, wherein a plurality of the photodiodes (4) are formed in array form... Agent: Drinker Biddle & Reath (dc)

20070090479 - Controlling bond fronts in wafer-scale packaging: A system for controlling bond front propagation in wafer-scale packaging includes a first substrate, a second substrate, and a bonder pressure plate having protruded structures thereon to selectively establish at least one point of contact between the first and second substrates to initiate a bond front therebetween. The protruded structures... Agent: Hewlett Packard Company

20070090478 - Image sensor package structure: An image sensor package structure is proposed, in which an image sensor is fixed on a substrate having metallization traces and an adhesion layer. Electric paths of the package structure are changed from the COG (chip on glass) process to the CIS (CMOS image sensor) process to improve electric characteristics.... Agent: Rosenberg, Klein & Lee

20070090480 - Solid-state imaging device and method for manufacturing the same: The solid-state imaging device of the present invention includes: a plurality of photodetectors that are arranged in a two-dimensional matrix; a plurality of vertical transfer portions that transfer, in a vertical direction, signal electric charges which are read out from the respective photodetectors; a horizontal transfer portion that receives the... Agent: Hamre, Schumann, Mueller & Larson P.C.

20070090481 - Silicon carbide schottky diode: A SiC Schottky diode which includes a Schottky barrier formed on a silicon face 4H—SiC body.... Agent: Ostrolenk Faber Gerb & Soffen

20070090482 - High-breakdown voltage semiconductor switching device and switched mode power supply apparatus using the same: A high-breakdown voltage semiconductor switching device includes a resurf region of a second conductivity type; a base region of a first conductivity type formed to be adjacent to the resurf region; an emitter/source region of the second conductivity type formed in the base region to be spaced from the resurf... Agent: Mcdermott Will & Emery LLP

20070090483 - Systems, methods and devices relating to actuatably moveable machines: Systems, methods and devices relating to actuatably movable machines and with methods of using and manufacturing the same.... Agent: Fish & NeaveIPGroup Ropes & Gray LLP

20070090484 - Integrated circuit stress control system: An integrated circuit stress control system is provided. A gate is formed on a substrate and a channel is formed in the substrate. A source/drain is formed around the gate. A shallow trench isolation is formed in the substrate, the shallow trench isolation producing strain on the channel. A stress... Agent: Ishimaru & Zahrt LLP

20070090485 - Semiconductor device and method of manufacturing the same: Provided is a semiconductor device including: a p-type silicon substrate; a p-well which is formed in the silicon substrate, and which has a planar shape with no hole; an n-well integrally formed, in the silicon substrate, in a planar shape obtained by inverting the pattern of the p-well; a first... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070090486 - Fuse and method for disconnecting the fuse: The fuse comprises an interconnection part 14 luding a silicon layer; a contact part 20b connected one end of the interconnection part 14; and a contact part 20aconnected to the other end of the interconnection part 14 and containing a metal material. A current is flowed from the contact part... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070090487 - Method for tuning epitaxial growth by interfacial doping and structure including same: A method that allows for uniform, simultaneous epitaxial growth of a semiconductor material on dissimilarly doped semiconductor surfaces (n-type and p-type) that does not impart substrate thinning via a novel surface preparation scheme, as well as a structure that results from the implementation of this scheme into the process integration... Agent: Scully Scott Murphy & Presser, PC

20070090488 - High-efficiency matrix-type led device: A high-efficiency matrix-type LED device comprises an epitaxial wafer on which a plurality of independently insulated LEDs are formed by a method of manufacturing integrated circuits; and a conducting line mounted on each one of the LEDs by an evaporation method for forming a large-sized matrix-type LED unit capable of... Agent: Troxell Law Office PLLC

20070090489 - Shape controlled growth of nanostructured films and objects: A method and apparatus for growing nanostructures is presented. A growth substrate including at least one reaction site is provided as is a device disposed proximate the growth substrate. Energy is provided to the reaction site and a reaction species is introduced to the growth substrate. This results in a... Agent: Barry W. Chapin, Esq. Chapin Intellectual Property Law, LLC

20070090490 - Wafer-to-wafer stack with supporting pedestal: A novel three dimensional wafer stack and the manufacturing method therefor are provided. The three dimensional wafer stack includes a first wafer having a first substrate and a first device layer having thereon at least one chip, a second wafer disposed above the first wafer and having a second substrate,... Agent: Volpe And Koenig, P.C.

20070090491 - Semiconductor structure with silicon on insulator: A semiconductor structure with silicon on insulator is disclosed in this present invention. The semiconductor structure at least comprises a first substrate and a second substrate. The crystal orientation of the first substrate is in a first orientation favorable for dicing the semiconductor structure into chips, and the crystal orientation... Agent: Arent Fox PLLC

20070090492 - Semiconductor device with capacitively coupled field plate: A termination region of a semiconductor die is provided, which includes one or more field rings arranged in the termination region, one or more metal field plates, and an insulation layer disposed to prevent direct electrical contact between the field rings and the field plate such that the at least... Agent: Ostrolenk Faber Gerb & Soffen

20070090493 - Fabrication of nitrogen containing regions on silicon containing regions in integrated circuits, and integrated circuits obtained thereby: Silicon oxide (210) is grown on a silicon region (130). At least a portion (210N) of the silicon oxide (210) adjacent to the silicon region (130) is nitrided. Then some of the silicon oxide (210) is removed, leaving the nitrided portion (210N). Additional silicon oxide is thermally grown on the... Agent: Macpherson Kwok Chen & Heid LLP

20070090494 - Insulation-coated conductor and manufacturing method thereof: There is provided an insulation-coated conductor including a conductive member that has a comer potion and a non-comer portion, and an insulating resin coated around the conductive member. The insulating resin is subjected to plastic deformation so that the insulating resin at the non-comer portion partly shifts to the comer... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20070090496 - Electronic module and method of assembling the same: An electronic module includes a semiconductor power switch and a semiconductor diode. The lower side of the semiconductor power switch includes an output contact mounted on a die pad of a leadframe, and the upper side of the semiconductor power switch includes a control contact and an input contact. The... Agent: Edell, Shapiro & Finnan, LLC

20070090500 - Housed dram chip for high-speed applications: A housed DRAM chip includes a DRAM chip and a housing substrate. The DRAM chip is arranged on the housing substrate such that shorter conductive connections between the chip pads of the DRAM chip and external housing connections can be achieved for high data transmission speeds.... Agent: Edell, Shapiro & Finnan, LLC

20070090501 - Lead frame: A lead frame base is coated with a four-layer plating. The four-layer plating includes an underlayer plating (Ni), a palladium plating, a silver plating and a gold plating arranged in this order from bottom to top.... Agent: Mcdermott Will & Emery LLP

20070090497 - Leadframes for improved moisture reliability of semiconductor devices: A semiconductor device has a leadframe with a structure made of a base metal (105), wherein the structure consists of a chip mount pad (402) and a plurality of lead segments (403). Covering the base metal are, consecutively, a nickel layer (301) on the base metal, and a continuous layer... Agent: Texas Instruments Incorporated

20070090499 - Production process for manufacturing such semiconductor package: In a semiconductor package including at least one plate-like mount, a semiconductor chip has at least one electrode formed on a top surface thereof, and is mounted on the plate-like mount such that a bottom surface of the semiconductor chip is in contact with the plate-like mount. The semiconductor package... Agent: Young & Thompson

20070090498 - Stack type semiconductor package module utilizing solder coated stacking protrusions and method for manufacturing the same: The stack type semiconductor package module includes a lower semiconductor package having a main substrate, a chip mounted on the main substrate and electrically connected to the main substrate through a wire. An epoxy molding compound (EMC) is provided on the main substrate to cover the chip and the wire.... Agent: Ladas & Parry LLP

20070090495 - Thin package system with external terminals: A thin package system with external terminals and a leadframe is provided. An external bond finger defining template is provided and used to form external bond fingers on the leadframe. A die is provided and attached to the leadframe. At least portions of the die and the external bond fingers... Agent: Ishimaru & Zahrt LLP

20070090502 - Methods and apparatus for improved thermal performance and electromagnetic interference (emi) shielding in leadframe integrated circuit (ic) packages: Methods and apparatus for improved thermal performance and electromagnetic interference (EMI) shielding in integrated circuit (IC) packages is described. A die-up or die-down package includes a heat spreader cap defining a cavity, an IC die, and a leadframe. The leadframe includes a centrally located die attach pad, a plurality of... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20070090503 - Semiconductor package having an optical device and the method of making the same: The present invention relates to a semiconductor package having an optical device and the method of making the same. The semiconductor package comprises: a transparent substrate, a chip, an optical device and a carrier substrate. The transparent substrate has a plurality of first contacts and second contacts, wherein the first... Agent: Volentine Francos, & Whitt PLLC

20070090505 - Apparatus and method for manufacturing imaging device package: An apparatus for manufacturing a package packing a solid-state imaging device is provided, the package having: a package container fixing the solid-state imaging device therein; and an IR-coated cover glass hermetically sealing the solid-state imaging device in the package container. The apparatus has an ultraviolet radiation unit that radiates an... Agent: Sughrue-265550

20070090504 - Optical sensor chip package: The present invention relates to an optical sensor chip package in a cavity of forming frame thereof and has a gap between protection layer and optical sensor chip. The optical sensor chip avoids accepting the pressure from protection layer that damage the reliability between pads and metallic traces when protection... Agent: Rosenberg, Klein & Lee

20070090506 - Interposer for compliant interfacial coupling: In one aspect, the present invention provides interposers that can mechanically, electrically, and thermally interconnect first and second microelectronic components. An interposer in accordance with the present invention includes a substrate, preferably flexible, having first and second oppositely facing surfaces. Such interposers also include an array of links traversing from... Agent: Honeywell International Inc. Law Dept. Ab2

20070090507 - Multi-chip package structure: A multi-chip package structure includes a first substrate, a first chip, a sub-package, and a first molding compound. The first substrate has a first surface and a second surface. The first chip is attached to the first surface of the first substrate by flip-chip bonding so as to reduce a... Agent: Volentine Francos, & Whitt PLLC

20070090508 - Multi-chip package structure: The present invention relates to a multi-chip package structure, which comprises a first substrate, a first chip, a sub-package structure, a plurality of first solder balls, and a first molding compound. The first substrate has a first surface and a second surface. The first chip is electrically connected to the... Agent: Volentine Francos, & Whitt PLLC

20070090509 - Electromagnetic interference circuit package shield: In one embodiment, a shielding includes one or more contact elements configured to electrically contact one or more electrical elements of an integrated circuit package. The one or more electrical elements may be located on a top surface of the package. A bottom surface of the package may be coupled... Agent: Trellis Intellectual Property Law Group, PC

20070090510 - Package structure for solid-state lighting devices and method of fabricating the same: Silicon substrates are applied to the package structure of solid-state lighting devices. Wet etching is performed to both top and bottom surfaces of the silicon substrate to form reflecting cavity and electrode access holes. Materials of the reflecting layer and electrode can be different from each other whose preferred materials... Agent: Oliff & Berridge, PLC

20070090511 - Power core devices and methods of making thereof: A device comprising a power core wherein said power core comprises: at least one embedded singulated capacitor layer containing at least one embedded singulated capacitor wherein said embedded singulated capacitor comprises at least a first electrode and a second electrode and wherein said embedded singulated capacitor is positioned on the... Agent: E I Du Pont De Nemours And Company Legal Patent Records Center

20070090513 - Power module fabrication method and structure thereof: A power module fabrication method and structure thereof is disclosed. The method includes steps of: providing a metal plate and defining a pattern on the metal plate; cutting the metal plate according to the pattern to form a plurality of pins and the heat-conducting plate, wherein the pin is coupled... Agent: Madson & Austin Gateway Tower West

20070090512 - Signal transmission line: A signal transmission line used in a printed circuit board (PCB), the signal transmission line comprises a driving terminal for driving a signal, a contact portion, the signal line connected with the driving terminal and the contact portion to transmit the signal wherein a length of the signal line is... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang Jeffrey T. Knapp

20070090516 - Heated substrate support and method of fabricating same: A method and apparatus for forming a substrate support is provided herein. In one embodiment, the substrate support is fabricated by a process that includes forming a groove in a body, disposing a heater element in the groove, and welding the groove to enclose the heater element, wherein the welding... Agent: Patterson & Sheridan, LLP

20070090515 - Semiconductor structure and method of assembly: A semiconductor structure (100, 900) includes a substrate (110) having a surface (111) and also includes one or more semiconductor chips (120) located over the substrate surface. The semiconductor structure further includes an electrical isolator structure (340) located over the substrate surface, where the electrical isolator structure includes one or... Agent: George C. Chen Bryan Cave LLP

20070090514 - Semiconductor structure and method of manufacture: A semiconductor structure (100) includes a substrate (110) having a first surface (111) with a mold lock feature (101). The semiconductor structure also includes a semiconductor chip (120) located over the first surface of the substrate. The semiconductor structure further includes an electrical isolator structure (340) located over the first... Agent: George C. Chen Bryan Cave LLP

20070090518 - Microelectronic cooling apparatus and associated method: An apparatus and associated method to provide localized cooling to a microelectronic device are generally described. In this regard, according to one example embodiment, a cooling apparatus comprising a heat spreader and one or more thermoelectric cooler(s) thermally coupled to the heat spreader provides cooling to one or more hot... Agent: Blakely Sokoloff Taylor & Zafman

20070090517 - Stacked die package with thermally conductive block embedded in substrate: Disclosed are embodiments of a stacked die package including a thermally conductive block disposed in the substrate. The die stack may include a lower die thermally coupled with the conductive block and one or more upper die disposed on the lower die. The upper die may be electrically interconnected to... Agent: Intel Corporation C/o Intellevate, LLC

20070090520 - Cooling plate, bake unit, and substrate treating apparatus: A bake unit includes a coo