Active solid-state devices (e.g., transistors, solid-state diodes) inventions 02/07

20070040159 - Manufacturing method and structure for improving the characteristics of phase change memory: A manufacturing method and structure for better phase change memory characteristics by improving the interface and the hole-filling properties. The present invention can reduce the power consumption needed to operate and is easy to fabricate.... Agent: Rabin & Berdo, P.C.

20070040160 - Memory array for increased bit density and method of forming the same: A memory array having a plurality of resistance variable memory units and method for forming the same are provided. Each memory unit includes a first electrode, a resistance variable material over the first electrode, and a first second-electrode over the resistance variable material. The first second-electrode is associated with the... Agent: Dickstein Shapiro LLP

20070040162 - Highly efficient iii-nitride-based top emission type light emitting device having large area and high capacity and method of manufacturing the same: Disclosed are a nitride-based top emission type light emitting device and a method of manufacturing the same. The light emitting device includes an n-nitride-based cladding layer, a p-nitride-based cladding layer, a nitride-based active layer, and a multiple p-ohmic contact layer. The multiple p-ohmic contact layer includes at least one pair... Agent: Cantor Colburn, LLP

20070040161 - Light-emitting element and light-emitting device: It is an object of the present invention to provide a light-emitting element having a layer containing a light-emitting material and a transparent conductive film between a pair of electrodes, in which electric erosion of the transparent conductive film and metal can be prevented, and also to provide a light-emitting... Agent: Cook, Alex, Mcfarron, Manzo, Cummings & Mehler Ltd

20070040163 - Electronic component and method of manufacturing the same: The invention relates to a surface mount type electronic component mounted on a printed circuit board or hybrid IC (HIC) and a method of manufacturing the same and provides an electronic component which can be formed with a small size and a low height at a low cost and a... Agent: Oliff & Berridge, PLC

20070040166 - Compound eye image sensor design: A flexible image sensor having an array of lenses disposed on one surface of a substrate flexible optical polymeric substrate, and an array of organic integrated circuit photodetectors on a second surface of the substrate, each lens in the lens array being in optical correspondence with a photodetector in the... Agent: Wilmer Cutler Pickering Hale And Dorr LLP

20070040165 - Method of fabricating organic fets: At least two thicknesses of dielectric are formed in the fabrication of organic field effect transistors. One thickness is formed in the active regions of the transistor for adjusting the desired threshold of the device. A second thickness is deposited in the field regions of the transistor to electrically isolate... Agent: Hogan & Hartson LLP

20070040168 - Organic electroluminescent element: wherein M11 represents a hexacoordinate transition metal ion, Y11 represents a nitrogen atom or a substituted or unsubstituted carbon atom, L11 represents a ligand, Q11 and Q12 each represents an atomic group for forming a nitrogen-containing heterocyclic ring, n11 represents an integer of 1 to 3, n12 represents an integer... Agent: Sughrue-265550

20070040169 - Organic thin film transistor and manufacturing method thereof: An organic thin film transistor includes a substrate, a gate electrode, a gate insulating layer, a first electrode, and a second electrode disposed on the substrate, a first layer disposed on the substrate, the first layer being photosensitive, a second layer disposed on the first layer, the second layer being... Agent: Lee & Morse, P.C.

20070040164 - Polymer complex compound and polymer light emitting device using the same: (wherein, Ring P and Ring Q each independently represent an aromatic ring, but Ring P may be either existent or non-existent. When Ring P is existent, two connecting bonds respectively are on Ring P and/or Ring Q, and when Ring P is non-existent, two connecting bonds respectively are on 5... Agent: Sughrue Mion, PLLC

20070040167 - Water-based synthesis of poly(tetrazoles) and articles formed therefrom: A polyvinyl(tetrazole) is formed by a water-based method. A gas generating composition 12 containing the polyvinyl(tetrazole) is contained within an exemplary gas generator 10. An article or gas generating system 200 incorporates the polyvinyl(tetrazole) therein. A vehicle occupant protection system 180 incorporates the gas generating system 200. An article or... Agent: L.c. Begin & Associates, PLLC

20070040170 - Electronic devices: An electronic device including at least first and second transistors integrated together on a substrate and each including an organic semiconductor region, wherein the first and second transistors are either both n-type or both p-type but wherein one of the first and second transistors is a normally-ON transistor and the... Agent: Sughrue Mion, PLLC

20070040171 - Organic thin film transistor array panel and method for manufacturing the same: An organic thin film transistor array panel includes; a substrate, a data line formed on the substrate, a gate line intersecting the data line and including a gate electrode, a first interlayer insulating layer formed on the gate line and the data line and including a first opening exposing the... Agent: Cantor Colburn, LLP

20070040172 - Source/drain electrodes, thin-film transistor substrates, manufacture methods thereof, and display devices: A source/drain electrode is used in a thin-film transistor substrate containing a substrate, a thin-film transistor semiconductor layer, source/drain electrodes, and a transparent picture electrode. The source/drain electrode includes a nitrogen-containing layer and a thin film of pure aluminum or an aluminum alloy. Nitrogen of the nitrogen-containing layer binds to... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070040173 - Source/drain electrodes, transistor substrates and manufacture methods, thereof, and display devices: In a thin-film transistor substrate including a substrate, a thin-film transistor semiconductor layer, a source/drain electrode, and a transparent pixel electrode, the source/drain electrode includes a thin film of an aluminum alloy containing 0.1 to 6 atomic percent of nickel as an alloy element, and the aluminum alloy thin film... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070040174 - Thin film transistor substrate and fabrication thereof: A thin film transistor substrate having a semiconductor layer including a low concentration region and a source region/drain region adjacent to the low concentration region at both sides of a channel region made of polysilicon; a gate insulating layer and a conductive layer on the substrate the conductive layer patterned... Agent: Macpherson Kwok Chen & Heid LLP

20070040175 - Polysilicon thin film transistor and method of fabricating the same: A polysilicon thin film transistor (TFT) may include a substrate, at least one insulating layer, a semiconductor layer, a gate electrode, a source electrode, a drain electrode, and a heat retaining layer formed to contact the semiconductor layer. The heat retaining layer may reduce and/or prevent a reduction in a... Agent: Lee & Morse, P.C.

20070040176 - Semiconductor device: A semiconductor device having a display unit, which is small in size, suppresses the defect caused by the mounting of IC chips and the like on the substrate, and operates at a high speed. A semiconductor display unit and other circuit blocks are integrally formed on the substrate having an... Agent: Eric Robinson

20070040177 - Multi-channel type thin film transistor and method of fabricating the same: A multi-channel type thin film transistor includes a gate electrode over a substrate extending along a first direction, a plurality of active layers parallel to and spaced apart from each other extending along a second direction crossing the first direction, and source and drain electrodes spaced apart from each other... Agent: Morgan Lewis & Bockius LLP

20070040178 - Thin film transistor substrate for display device and fabricating method thereof: A thin film transistor substrate for a display device having a plurality of thin film transistors and pixel electrodes connected to the thin film transistors, said thin film transistor substrate includes: a plurality of pad electrodes in a non-display area of the display device for applying signals to the plurality... Agent: Morgan Lewis & Bockius LLP

20070040179 - Light-emitting device, display and light-emitting method: A light-emitting device includes a light-emitting portion and an oxygen concentration control portion. The light-emitting portion includes a surface. The light-emitting portion emits light with an intensity corresponding to an oxygen concentration on the surface when receiving light energy. The oxygen concentration control portion controls the oxygen concentration on the... Agent: Oliff & Berridge, PLC

20070040180 - Integrated circuit device: An integrally packaged optronic integrated circuit device including an integrated circuit die containing at least one of a radiation emitter and radiation receiver and having a transparent packaging layer overlying a surface of the die, the transparent packaging layer having an opaque coating adjacent to edges of the layer.... Agent: Tessera Lerner David Et Al.

20070040181 - Crystalline composition, wafer, and semi-conductor structure: A crystalline composition is provided that includes gallium and nitrogen. The crystalline composition may have an amount of oxygen present in a concentration of less than about 3×1018 per cubic centimeter, and may be free of two-dimensional planar boundary defects in a determined volume of the crystalline composition. The volume... Agent: General Electric Company Global Research

20070040182 - Light emitting diode packaging structure: A light emitting diode (LED) packaging structure has a carrier having an insulating layer and a conducting layer formed thereon. A top surface of the carrier is partially depressed to form a cup portion having a raised central seat upward projected from a bottom thereof. The raised central seat has... Agent: Pro-techtor International Services

20070040183 - Gallium nitride-based compound semiconductor light-emitting device and electrode for the same: An object of the present invention is to provide a light-permeable electrode for use in a gallium nitride-based compound semiconductor light-emitting device, the electrode having improved light permeability and contact resistance. The inventive electrode comprises a light-permeable first layer which is in contact with a surface of a p-contact layer... Agent: Sughrue Mion, PLLC

20070040185 - Semiconductor device and capacitance regulation circuit: According to an embodiment of the invention, there is provided a semiconductor device comprising: a semiconductor element having a first main electrode, a second main electrode and a control electrode, a current flowing between the first and second main electrodes being controlled by a control signal which is input between... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070040184 - Semiconductor device and capacitance regulation circuit: According to an embodiment of the invention, there is provided a semiconductor device comprising: a semiconductor element having a first main electrode, a second main electrode and a control electrode, a current flowing between the first and second main electrodes being controlled by a control signal which is input between... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070040186 - Power semiconductor packaging method and structure: A semiconductor chip packaging structure comprising a dielectric film having one or more through holes aligned with the one or more contact pads of at least one power semiconductor chip. A patterned electrically conductive layer adjacent to the dielectric film has one or more electrically conductive posts which extend through... Agent: General Electric Company Global Research

20070040187 - Semiconductor device and manufacturing method of the same: There is a need for providing a technology capable of decreasing on-resistance of a power transistor in a semiconductor device that integrates the power transistor and a control integrated circuit into a single semiconductor chip. There is another need for providing a technology capable of reducing a chip size of... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070040188 - Contact or via hole structure with enlarged bottom critical dimension: An integrated circuit chip includes a buffer layer, an underlying layer, a dielectric layer, a hole, and barrier layer. The buffer layer is over the underlying layer. The dielectric layer is over the buffer layer. The hole is formed in and extending through the dielectric layer and the buffer layer,... Agent: Slater & Matsil, L.L.P.

20070040189 - Bi-directional switch, and use of said switch: A bi-directional switch has at least one first controllable semiconductor component with a first input contact, a first output contact, and a first control contact, and at least one second controllable semiconductor component with a second input contact, a second output contact, and a second control contact. The first input... Agent: Staas & Halsey LLP

20070040190 - Ink jet recording head and ink discharge method: An ink jet recording head is provided with one heat generating member in each of ink flow paths, and the discharge port thereof is arranged on the extended line extending in the normal direction from the center of the main surface of the heat generating member to the surface of... Agent: Fitzpatrick Cella Harper & Scinto

20070040191 - Nanowire structures and electrical devices: The present invention provides structures and devices comprising conductive segments and conductance constricting segments of a nanowire, such as metallic, superconducting or semiconducting nanowire. The present invention provides structures and devices comprising conductive nanowire segments and conductance constricting nanowire segments having accurately selected phases including crystalline and amorphous states, compositions,... Agent: Greenlee Winner And Sullivan P C

20070040192 - Photodiode array and production method thereof, and radiation detector: A photodiode array 1 is provided with an n-type silicon substrate 3. A plurality of photodiodes 4 are formed in array on the opposite surface side to an incident surface of light L to be detected, in the n-type silicon substrate 3. A resin film 6 for transmitting the light... Agent: Drinker Biddle & Reath (dc)

20070040193 - Semiconductor device, electro-optic device, and electric device: A semiconductor device includes a semiconductor layer, and a first transistor and a second transistor that are formed using the semiconductor layer, wherein each conductance of the first and second transistors changes complementarily to each other according to a curvature of the semiconductor layer.... Agent: Oliff & Berridge, PLC

20070040194 - Solid state imaging device: A CCD image sensor includes photodiodes, vertical transfer CCDs for transferal of signal charge of the photodiodes, and a light shielding layer for protection of the vertical transfer CCDs from light. The light shielding layer covers over recesses disposed above the photodiodes, and each of the recesses has an opening... Agent: Birch Stewart Kolasch & Birch

20070040195 - Monolithic integrated passive and active electronic devices with biocompatible coatings: A bio-compatible electrical element including a high-dielectric amorphous TixAl1-xOy oxide alloy wherein a TiO2 layer is between the bio-compatible electrical element and a biological such as human environment. A continuous and substantially pinhole free dielectric amorphous TixAl1-xOy oxide alloy wherein x is in the range of from about 0.5 to... Agent: Harry M. Levy Emrich & Dithmar, LLC

20070040196 - Semiconductor device and manufacturing method thereof, and thin film device: A manufacturing method of a semiconductor device is disclosed. The manufacturing method includes the steps of forming a contact plug in an insulation film so as to be connected to an element on a semiconductor substrate, applying PLA pretreatment to the insulation film in an NH3 atmosphere, forming a Ti... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070040197 - Non-volatile memory, manufacturing method and operating method thereof: A non-volatile memory including a memory unit, a first bit line and a second bit line is provided. The memory unit includes a first doped region, a second doped region, a first memory cell, a select gate structure, and a second memory cell. The first doped region and the second... Agent: Jianq Chyun Intellectual Property Office

20070040198 - Semiconductor device and manufacturing method thereof, and thin film device: A manufacturing method of a semiconductor device is disclosed. The manufacturing method includes the steps of forming a contact plug in an insulation film so as to be connected to an element on a semiconductor substrate, applying a PLA process to the insulation film in an NH3 atmosphere, forming a... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070040199 - Semiconductor device and method for manufacturing the same: In a semiconductor device, a transistor in an N-type logic region NL is covered with a tensile stress applying film and a transistor in a P-type logic region PL is covered with a compressive stress applying film. Transistors in a P-type SRAM region PS and an N-type SRAM region NS... Agent: Mcdermott Will & Emery LLP

20070040200 - Trench buried bit line memory devices and methods thereof: A memory device includes isolation trenches that are formed generally parallel to and along associated strips of active area. A conductive bit line is recessed within each isolation trench such that the uppermost surface of the bit line is recessed below the uppermost surface of the base substrate. A bit... Agent: Dinsmore & Shohl LLP

20070040202 - Semiconductor memory cell array having self-aligned recessed gate mos transistors and method for forming the same: In a semiconductor memory including an array of memory cells, each memory cell includes a trench capacitor, the trench capacitor including an inner electrode, an outer electrode and a dielectric layer disposed between the inner electrode and the outer electrode, and a selection transistor, the selection transistor including a first... Agent: Morrison & Foerster LLP

20070040201 - Trench capacitor and fabricating method thereof: A method of fabricating trench capacitors is described. A substrate having at least one isolation structure is provided. A first trench and a second trench are formed in the substrate beside the isolation structure. A first lower electrode and a second lower electrode are formed in the substrate around the... Agent: Jianq Chyun Intellectual Property Office

20070040204 - Integrating three-dimensional high capacitance density structures: Disclosed are three-dimensional dielectric structures on high surface area electrodes and fabrication methods. Exemplary structures comprise a copper foil substrate, trench electrodes or high surface area porous electrode structures formed on the substrate, a insulating thin film formed on the surface and laminating the foil on a organic substrate. A... Agent: Law Offices Of Kenneth W. Float

20070040203 - Semiconductor device capacitors with oxide-nitride layers and methods of fabricating such capacitors: Capacitors having upper electrodes that include a lower electrode, a dielectric layer and an upper electrode that includes a conductive metal nitride layer and a doped polysilicon germanium layer are provided. At least part of the conductive metal nitride layer is oxidized and/or at least part of the dielectric layer... Agent: D. Randal Ayers Myers Bigel Sibley & Sajovec, P.A.

20070040205 - Stud capacitor device and fabrication method: The present teachings relate to a method of forming a container capacitor structure on a substrate. In one embodiment, the method comprises etching a recess in the substrate, depositing a first conductive layer on the substrate so as to overlie the substrate and the recess, depositing a filler layer so... Agent: Knobbe Martens Olson & Bear LLP

20070040207 - Electronic devices including dielectric layers with different densities of titanium: Methods of forming an electronic device include providing a fist electrode, providing a dielectric oxide layer on the first electrode, and providing a second electrode on the dielectric oxide layer so that the dielectric oxide layer is between the first and second electrodes. More particularly, a first portion of the... Agent: Myers Bigel Sibley & Sajovec

20070040206 - High dielectric material composed of sintered body of rare earth sulfide: A high-dielectric material which is especially useful as a material for a high-capacitance capacitor and which has a high dielectric constant is provided. The high-dielectric material is composed of a sintered body of a rare-earth sulfide, the high-dielectric material having a crystal structure of tetragonal β type, a chemical composition... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070040208 - Fabrication method and structure of semiconductor non-volatile memory device: A non-volatile semiconductor memory device with good write/erase characteristics is provided. A selection gate is formed on a p-type well of a semiconductor substrate via a gate insulator, and a memory gate is formed on the p-type well via a laminated film composed of a silicon oxide film, a silicon... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070040210 - Nonvolatile semiconductor memory and fabrication method for the same: The present invention provides a nonvolatile semiconductor memory that allows simultaneous implementation of high performance transistors in a low-voltage circuit region and transistors with high withstand voltages in a high-voltage circuit region. The nonvolatile semiconductor memory includes a cell array region that comprises aligned memory cell transistors, each including a... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070040209 - Novel applications for insulated gate bipolar transistors: The amount of current flowing in the bitline during reading of a memory cell which is in the conductive state, hereinafter called the memory cell current, can be amplified manifold by changing the above mentioned select transistors to a novel device which is described in detail. The increase of the... Agent: Spadea Gregorio

20070040211 - Nonvolatile memory device and method of forming the same: A multi-bit memory cell includes a substrate; a multi-bit charge-trapping cell over the substrate, the multi-bit charge-trapping cell having a first lateral side and a second lateral side; a source region in the substrate, a portion of the source region being under the first side of the multi-bit charge-trapping cell;... Agent: Akin Gump Strauss Hauer & Feld L.L.P.

20070040212 - Asymmetric hetero-doped high-voltage mosfet (ah2mos): An asymmetric heterodoped metal oxide (AH2MOS) semiconductor device includes a substrate and an insulated gate on the top of the substrate disposed between a source region and a drain region. On one side of the gate, heterodoped tub and source regions are formed. The tub region has dopants of a... Agent: Hiscock & Barclay, LLP

20070040215 - Power semiconductor device with interconnected gate trenches: A power semiconductor device which includes a plurality of gate trenches and a perimeter trench intersecting the gate trenches.... Agent: Ostrolenk Faber Gerb & Soffen

20070040213 - Trench gate field effect devices: The present invention provides a technique for accumulating minority carriers in the body region, that is, the intermediate region interposed between the top region and the deep region, and thus increasing the concentration of minority carriers in the intermediate region. A semiconductor device has a top region (34) of a... Agent: Kenyon & Kenyon LLP

20070040214 - Ultra dense trench-gated power device with the reduced drain-source feedback capacitance and miller charge: The cellular structure of the power device includes a substrate that has a highly doped drain region. Over the substrate there is a more lightly doped epitaxial layer of the same doping. Above the epitaxial layer is a well region formed of an opposite type doping. Covering the wells is... Agent: Hiscock & Barclay, LLP

20070040217 - Power semiconductor device: The power semiconductor device according to one embodiment of the present invention at least comprises: first pillar layers of the first conductive type and second pillar layers of a second conductive type which constitute a super-junction structure in a device section and which are arranged alternately in a horizontal direction,... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070040216 - Semiconductor device used as high-speed switching device and power device: A low resistance layer is formed on a semiconductor substrate, and a high resistance layer formed on the low resistance layer. A source region of a first conductivity type is formed on a surface region of the high resistance layer. A drain region of the first conductivity type is formed... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070040218 - Hybrid-orientation technology buried n-well design: A semiconductor structure is provided that includes a hybrid orientated substrate having at least two coplanar surfaces of different surface crystal orientations, wherein one of the coplanar surfaces has bulk-like semiconductor properties and the other coplanar surface has semiconductor-on-insulator (SOI) properties. In accordance with the present invention, the substrate includes... Agent: Scully, Scott, Murphy & Pressner

20070040219 - Iii-v group nitride system semiconductor self-standing substrate, method of making the same and iii-v group nitride system semiconductor wafer: A III-V group nitride system semiconductor self-standing substrate is made of III-V group nitride system semiconductor single crystal with a hexagonal crystal system crystalline structure. The substrate is provided with a surface that is off-oriented 0.09 degrees or more and 24 degrees or less in the a-axis or m-axis direction... Agent: Mcginn Intellectual Property Law Group, PLLC

20070040220 - An electrostatic discharge circuit: An electrostatic discharge circuit includes at least an electrostatic discharge zener diode, an NMOS transistor, and a PMOS transistor. The electrostatic discharge zener diode is used for lowering the breakdown voltage and making the electrical current discharge through it, thereby preventing the circuit device from burning out and greatly enhancing... Agent: Pai Patent & Trademark Law Firm

20070040221 - Electrostatic discharge protection element: A gate controlled fin resistance element for use as an electrostatic discharge (ESD) protection element in an electrical circuit has a fin structure having a first connection region, a second connection region and a channel region formed between the first and second connection regions. Furthermore, the fin resistance element has... Agent: Brinks Hofer Gilson & Lione Infineon

20070040222 - Method and apparatus for improved esd performance: The present invention provides an integrated circuit for improved ESD protection and method of forming the same. The integrated circuit comprises a substrate and an insulating layer formed over the substrate. The circuit also comprises a field effect field effect transistor (FET) formed over the insulating layer. The FET includes... Agent: Patent Docket Administrator Lowenstein Sandler P.C.

20070040223 - Lateral undercut of metal gate in soi device: Embodiments of the invention provide a device with a metal gate, a high-k gate dielectric layer, source/drain extensions a distance beneath the metal gate, and lateral undercuts in the sides of the metal gate.... Agent: Intel Corporation C/o Intellevate, LLC

20070040224 - Method for forming a buried digit line with self aligning spacing layer and contact plugs during the formation of a semiconductor device, semiconductor devices, and systems including same: A method for use during fabrication of a semiconductor device comprises the formation of buried digit lines and contacts. During formation, a buried bit line layer may be used as a mask to etch one or more openings in a dielectric layer. A conductive layer is then formed in the... Agent: Micron Technology, Inc.

20070040225 - High performance mosfet comprising a stressed gate metal silicide layer and method of fabricating the same: The present invention relates to a semiconductor device that comprises at least one field effect transistor (FET) containing a source region, a drain region, a channel region, a gate dielectric layer, a gate electrode, and one or more gate sidewall spacers. The gate electrode of such an FET contains an... Agent: Scully Scott Murphy & Presser, PC

20070040226 - Cascode circuit: A cascode circuit in which two field effect transistors “FET”) are connected in cascode has a first FET having its source grounded, a second FET having its source connected to the drain of the first FET, and a Schottky barrier diode having an anode connected to the source of the... Agent: Leydig Voit & Mayer, Ltd

20070040227 - Reducing gate dielectric material to form a metal gate electrode extension: In a metal gate replacement process, a cup-shaped gate metal oxide dielectric may have vertical portions that may be exposed to a reduction reaction. As a result of the reduction reaction, the vertical portions may be converted to metal, which adds to the existing gate electrode. In some cases, removing... Agent: Trop Pruner & Hu, PC

20070040228 - Semiconductor device utilizing a metal gate material such as tungsten and method of manufacturing the same: Known drawbacks associated with use of tungsten as a gate material in a semiconductor device are prevented. A gate oxide layer, a polysilicon layer, and a nitride layer are sequentially formed on a semiconductor substrate having a isolation layer for defining the active region. A recess is defined by etching... Agent: Ladas & Parry LLP

20070040230 - Micromechanical component: A micromechanical component has a structure such that a material flow is guided from at least one preferred direction for the purpose of uniformly enveloping the micromechanical component.... Agent: Kenyon & Kenyon LLP

20070040229 - Self-assembly microstructure with polymide thin-film elastic joint: The invention relates to a self-assembly microstructure with a polyimide thin-film elastic joint, which contains at least one stationary part of the microstructure and at least one movable part of the microstructure. An elastic joint located between the stationary part and the movable part is a photosensitive polyimide thin film... Agent: Bacon & Thomas, PLLC

20070040231 - Partially etched leadframe packages having different top and bottom topologies: A package for a micro-electromechanical (MEMS) device is described. A premolded leadframe base has opposing top and bottom surfaces. Each surface is defined by a topology having at least one electrically conductive portion and at least one electrically non-conductive portion, and the topology of the top surface differs from the... Agent: Bromberg & Sunstein LLP

20070040232 - Data download to imager chip using image sensor as a receptor: An imaging device having a CMOS photosensor array for capturing images is described in which the array is also used to input programming and/or data used to control the imaging operations. The data-input can be based upon variations in light color, value, intensity, and patterning, or any combinations of the... Agent: Dickstein Shapiro LLP

20070040233 - Photovoltaic device:

20070040234 - Data download to imager chip using image sensor as a receptor: An imaging device having a CMOS photosensor array for capturing images is described in which the array is also used to input programming and/or data used to control the imaging operations. The data-input can be based upon variations in light color, value, intensity, and patterning, or any combinations of the... Agent: Dickstein Shapiro LLP

20070040235 - Dual trench isolation for cmos with hybrid orientations: The present invention provides a semiconductor structure in which different types of devices are located upon a specific crystal orientation of a hybrid substrate that enhances the performance of each type of device. In the semiconductor structure of the present invention, a dual trench isolation scheme is employed whereby a... Agent: Scully Scott Murphy & Presser, PC

20070040236 - Discrete on-chip soi resistors: A semiconductor resistor, method of making the resistor and method of making an IC including resistors. Buried wells are formed in the silicon substrate of a silicon on insulator (SOI) wafer. At least one trench is formed in the buried wells. Resistors are formed along the sidewalls of the trench... Agent: Law Office Of Charles W. Peterson, Jr. Burlington

20070040238 - Coil structure, method for manufacturing the same and semiconductor package: A chip coil has a chip format including a rectangle substrate of an insulating resin material and a coil portion having a solenoid structure a part of which is embedded within the substrate and in which adjacent coils are insulated from each other by the substrate. The resin material contains... Agent: Rankin, Hill, Porter & Clark LLP

20070040237 - High current semiconductor device system having low resistance and inductance: A high current semiconductor device (for example QFN for 30 to 70 A) with low resistance and low inductance is encapsulated by molding compound (401, height 402 about 0.9 mm) so that the second lead surfaces 110b remain unencapsulated. A copper heat slug (404) may be attached to chip surface... Agent: Texas Instruments Incorporated

20070040239 - Integrated beol thin film resistor: In the course of forming a resistor in the back end of an integrated circuit, an intermediate dielectric layer is deposited and a trench etched through it and into a lower dielectric layer by a controllable amount, so that the top of a resistor layer deposited in the trench is... Agent: Ibm Microelectronics Intellectual Property Law

20070040240 - Bulk nitride mono-crystal including substrate for epitaxy: The invention relates to a substrate for epitaxy, especially for preparation of nitride semiconductor layers. Invention covers a bulk nitride mono-crystal characterized in that it is a mono-crystal of gallium nitride and its cross-section in a plane perpendicular to c-axis of hexagonal lattice of gallium nitride has a surface area... Agent: Smith Patent Office

20070040242 - Semiconductor device and method for manufacturing the same: In manufacturing a semiconductor memory, a gate oxide film, a polysilicon film and a WSi film are laminated on the major surface of a semiconductor wafer corresponding to both an element region on which a semiconductor chip is to be formed and a dicing region serving as a dicing line.... Agent: Hogan & Hartson L.L.P.

20070040241 - Wafer inspection device: The invention relates to a wafer inspection device. The device comprises an air-cushion stage which can be displaced in two directions (X,Y) that are perpendicular to one another. Several air nozzles are provided for this purpose. At least one valve is connected to at least one electric control unit, the... Agent: Simpson & Simpson, PLLC

20070040243 - Insulating target material, method of manufacturing insulating target material, conductive complex oxide film, and device: An insulating target material for obtaining a conductive complex oxide film represented by a general formula ABO3, the insulating target material including an oxide of an element A, an oxide of an element B, and at least one of an Si compound and a Ge compound.... Agent: Harness, Dickey & Pierce, P.L.C

20070040244 - Substrate for sensors: It is an object of the present invention to provide a substrate for sensors and a container, wherein the adhesiveness of the substrate to a thin film is improved, a physiologically active substance can be immobilized without the peeling of the thin film from a plastic substrate, and non-specific adsorption... Agent: Sughrue Mion, PLLC

20070040245 - Anisotropic conductive sheet, manufacturing method thereof, and product using the same: An anisotropically conductive sheet that can surely achieve necessary electrical connection even to an object to be connected, the arrangement pitch of electrodes to be connected of which is extremely small, a production process thereof, and applied products equipped with the anisotropically conductive sheet. The anisotropically conductive sheet according to... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070040247 - Leadframe package with dual lead configurations: The invention provides a variety of leadframe packages in which signal connections and fixed voltage connections are configured differently to improve the relative performance of the connections relative to their assigned function. The signal connections incorporate one or more configurations of signal lead and corresponding signal bonding wires that tend... Agent: Harness, Dickey & Pierce, P.L.C

20070040246 - Touch pad module with electrostatic discharge protection: A touch pad module with electrostatic discharge protection is disclosed. The touch pad module comprises a casing, a metal sheet, a touch pad and a metal holder, wherein the casing covers the metal sheet and has a first opening to expose a portion of the touch pad. The metal sheet... Agent: Rabin & Berdo, P.C.

20070040250 - Semiconductor device: A semiconductor device, wherein a first metallic member is bonded to a first electrode of a semiconductor element via a first metallic body containing a first precious metal, and a second metallic member is bonded to a second electrode via a second metallic body containing a second precious metal.... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070040249 - Semiconductor device: A semiconductor device, wherein a first metallic member is bonded to a first electrode of a semiconductor element via a first metallic body containing a first precious metal, and a second metallic member is bonded to a second electrode via a second metallic body containing a second precious metal.... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070040248 - Semiconductor device: A semiconductor device, wherein a first metallic member is bonded to a first electrode of a semiconductor element via a first metallic body containing a first precious metal, and a second metallic member is bonded to a second electrode via a second metallic body containing a second precious metal.... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070040251 - Method for connecting a die assembly to a substrate in an integrated circuit and a semiconductor device comprising a die assembly: A semiconductor device includes a substrate, a die assembly attachable to the substrate and a flexible strip extending over the substrate and the die assembly. The flexible strip has one or more routing circuits carried thereon. The die assembly and the substrate are arranged to be electrically connected through the... Agent: Slater & Matsil LLP

20070040252 - Semiconductor power component with a vertical current path through a semiconductor power chip: A semiconductor power component using flat conductor technology includes a vertical current path through a semiconductor power chip. The semiconductor power chip includes at least one large-area electrode on its top side and a large-area electrode on its rear side. The rear side electrode is surface-mounted on a flat conductor... Agent: Edell, Shapiro & Finnan, LLC

20070040253 - Chip type led: A chip type LED which is capable of laterally emitting light from the light emitting diode chip and having a relatively small thickness is provided. The chip type LED includes an insulating substrate 12, a light emitting diode chip 15 mounted on the upper surface of the insulating substrate, and... Agent: Hamre, Schumann, Mueller & Larson, P.C.

20070040255 - Semiconductor device: A semiconductor device capable of reducing the thermal resistance in a flip chip packaging structure while achieving both the high radiation performance and manufacturing readiness without increasing the manufacturing cost is provided. In a semiconductor device having a semiconductor circuit for power amplification and a control circuit of the semiconductor... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070040254 - Semiconductor die package: A clip-less packaged semiconductor device includes at least one semiconductor die having bottom and top surfaces each having at least one electrode. A leadframe comprising a sheet of conductive material having top and bottom surfaces, the top surface being substantially planar, the bottom surface having a recessed region having a... Agent: Duane Morris, LLPIPDepartment

20070040256 - Semiconductor device, method of authentifying and system: The semiconductor device (11) of the invention comprises a circuit and a protecting structure (50). It is provided with a first and a second security element (12A, 12B) and with an input and an output (14,15). The security elements (12A, 12B) have a first and a second impedance, respectively, which... Agent: Philips Electronics North America Corporation Intellectual Property & Standards

20070040257 - Chip packages with covers: This invention discloses a crystalline substrate based device including a crystalline substrate having formed thereon a microstructure; and at least one packaging layer which is sealed over the microstructure by means of an adhesive and defines therewith at least one gap between the crystalline substrate and the at least one... Agent: Tessera Lerner David Et Al.

20070040259 - Bumpless chip package: A bumpless chip package including at least a panel-shaped component, a chip, an interconnection structure and a conductive channel is provided. The chip is disposed on the panel-shaped component. The chip has a plurality of chip pads disposed on an active surface of the chip. The interconnection structure is disposed... Agent: J.c. Patents, Inc.

20070040258 - Method of packaging and interconnection of integrated circuits: A method is disclosed for packaging semiconductor chips on a flexible substrate employing thin film transfer. The semiconductor chips are placed on a temporary adhesive substrate, then covered by a permanent flexible substrate with a casting layer for planarizingly embedding the chips on the permanent substrate before removing the temporary... Agent: James Sheats

20070040260 - Power semiconductor device comprising a semiconductor chip stack and method for producing the same: A power semiconductor device has a power field effect transistors connected in a bridge circuit (16), parallel circuit or series circuit (18), the power semiconductor device (30) having a base power semiconductor chip (1) with large-area external contacts (S1, D1) on the top side (31) and rear side (32) and... Agent: Baker Botts, L.L.P.

20070040261 - Semiconductor component comprising an interposer substrate and method for the production thereof: A semiconductor component (10) has an interposer substrate (1) as stack element of a semiconductor component stack (25). The interposer substrate (1) has, on one of the interposer substrate sides (2, 4), a semiconductor chip protected by plastics composition (12) in its side edges (22). An interposer structure (3) partly... Agent: Baker Botts, L.L.P.

20070040262 - Flexible substrate capable of preventing lead thereon from fracturing: The invention discloses a flexible substrate including a flexible insulating film and a plurality of leads formed on an upper surface of the flexible insulating film. Each of the leads includes a first portion, a second portion, and a connection portion connecting the first portion and the second portion. The... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20070040263 - Green data center and virtual power plant: A power system for cooling backup computer storage facilities having eight independent levels of redundancy for the power supply to allow the storage facility to survive even extreme and debilitating events and having redundant communications. If power from the existing gas or electric grid is lost, a series of back-up... Agent: Dykema Gossett PLLC

20070040264 - Underfilled semiconductor die assemblies and methods of forming the same: An apparatus and method for packaging a semiconductor die and a carrier substrate to substantially prevent trapped moisture therebetween and provide a robust, inflexible cost-effective bond. The semiconductor die is attached to the carrier substrate with a plurality of discrete adhesive elements so as to provide a gap or standoff... Agent: Trask Britt, P.C./ Micron Technology

20070040265 - Substrate support having brazed plates and resistance heater: A substrate support comprises top, middle and bottom plates which are brazed together. The top plate has a top surface with a plurality of outwardly projecting mesas dispersed across a recessed pocket, a network of recessed grooves, a vacuum port terminating in the recessed grooves, and plurality of gas ports.... Agent: Janah & Associates, P.C.

20070040266 - Heat-conducting packaging of electronic circuit units: The invention relates to a heat-conducting coating of electronic circuit assemblies (102), comprising a coating agent (100), which encloses the electronic circuit assembly (102) and which is electrically insulating, with dispersed particles in the coating agent (100) which have a high thermal conductivity, whereby the particles dispersed in the coating... Agent: Jenkins, Wilson, Taylor & Hunt, P. A.

20070040267 - Method and system for secure heat sink attachment on semiconductor devices with macroscopic uneven surface features: Methods, systems, and apparatuses for attaching heat sinks to integrated circuit packages using thermally conductive adhesive materials are described. The adhesive materials can be shaped to conform to surfaces of the integrated circuit package and/or heat sink, prior to hardening, such as by curing the adhesive material.... Agent: Sterne, Kessler, Goldstein & Fox PLLC

20070040268 - Device package and methods for the fabrication and testing thereof: Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second... Agent: Rohm And Haas Electronic Materials LLC

20070040269 - Thermally enhanced cavity down ball grid array package: Dummy chip 90 has a coefficient of thermal expansion (CTE) approximately equal to the coefficient of thermal expansion of the chip 40. Because the CTE of the dummy chip 90 is approximately equal to the CTE of the chip 40 and the amount of the encapsulant 60 used will be... Agent: Birch, Stewart, Kolasch & Birch, LLP

20070040270 - Electronic device and carrier substrate: The electronic device comprises a semiconductor device (10), particularly an integrated circuit, and a carrier substrate (20) with conductive layers on the first side (21) and the second side (22), and voltage supply (62) and ground connections (61) mutually arranged according to a chessboard pattern. These connections (61,62) extend in... Agent: Philips Electronics North America Corporation Intellectual Property & Standards

20070040271 - Integrated circuit package: An integrated circuit package comprising: an substrate having a first main surface and a second main surface which are opposite to each other; a first plurality of external terminals disposed on the first main surface of said interconnection substrate; and a second plurality of external terminals disposed on the second... Agent: Ware Fressola Van Der Sluys & Adolphson, LLP

20070040272 - Method of packaging and interconnection of integrated circuits: A semiconductor chip packaging on a flexible substrate is disclosed. The chip and the flexible substrate are provided with corresponding raised and indented micron-scale contact pads with the indented contact pads partially filled with a liquid amalgam. After low temperature amalgam curing, the chip and the substrate form a flexible... Agent: James Sheats

20070040273 - Methods for wafer-level packaging of microelectronic devices and microelectronic devices formed by such methods: Methods for packaging microelectronic devices, microelectronic workpieces having packaged dies, and microelectronic devices. One aspect of the invention is directed toward a microelectronic workpiece comprising a substrate having a device side and a backside. In one embodiment, the microelectronic workpiece further includes a plurality of dies formed on the device... Agent: Perkins Coie LLP Patent-sea

20070040274 - Interconnect of group iii- v semiconductor device and fabrication method for making the same: An interconnect of the group III-V semiconductor device and the fabrication method for making the same are described. The interconnect includes a first adhesion layer, a diffusion barrier layer for preventing the copper from diffusing, a second adhesion layer and a copper wire line. Because a stacked-layer structure of the... Agent: Jianq Chyun Intellectual Property Office

20070040275 - Semiconductor device including diffusion barrier and method for manufacturing the same: Provided are a semiconductor device including a diffusion barrier and a method for manufacturing the same. In the method, an interlayer insulating layer on a semiconductor substrate is formed. The interlayer insulating layer is selectively removed, so that a via hole is formed therein. A first diffusion barrier is formed... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070040276 - Adopting feature of buried electrically conductive layer in dielectrics for electrical anti-fuse application: An anti-fuse structure that included a buried electrically conductive, e.g., metallic layer as an anti-fuse material as well as a method of forming such an anti-fuse structure are provided. According to the present invention, the inventive anti-fuse structure comprises regions of leaky dielectric between interconnects. The resistance between these original... Agent: Scully Scott Murphy & Presser, PC

20070040277 - Suppression of localized metal precipitate formation and corresponding metallization depletion in semiconductor processing: A method and structure for suppressing localized metal precipitate formation (LMPF) in semiconductor processing. For each metal wire that is exposed to the manufacturing environment and is electrically coupled to an N region, at least one P+ region is formed electrically coupled to the same metal wire. As a result,... Agent: Schmeiser, Olsen & Watts

20070040278 - Multifunctional material having carbon-doped titanium oxide layer: A multifunctional material having a carbon-doped titanium oxide layer, which has carbon doped in the state of Ti—C bonds, is excellent in durability (high hardness, scratch resistance, wear resistance, chemical resistance, heat resistance) and functions as a visible light responding photocatalyst, is provided. The multifunctional material of the present invention... Agent: Sughrue Mion, PLLC

20070040280 - Multi-chip package for reducing parasitic load of pin: Multi-chip package includes first through Nth semiconductor chips, each of which includes an input/output pad, an input/output driver coupled to the input/output pad, and an internal circuit. Each of the first through Nth semiconductor chips includes an internal pad for coupling the internal input/output driver and the internal circuit. The... Agent: Volentine Francos, & Whitt PLLC

20070040279 - Switching device for altering built-in function of ic chip: A switching device provided on a package substrate for altering the built-in function of an IC chip includes a first contact, a second contact, and a conductive layer. The first contact is electrically connected to a signal-receiving end of the package substrate, and the second contact is electrically connected to... Agent: Birch Stewart Kolasch & Birch

20070040281 - Semiconductor device and method of producing the same: To provide a semiconductor device configured that a micro device having a device substrate, a function element provided on the device substrate and having an oscillator or a movable part, first lands provided on a surface of the device substrate by being arranged on its outer circumference portion of the... Agent: Robert J. Depke Lewis T. Steadman

20070040282 - Printed circuit board and method thereof and a solder ball land and method thereof: A printed circuit board and method thereof and a solder ball land and method thereof. The example printed circuit board (PCB) may include a first solder ball land having a first surface treatment portion configured for a first type of resistance and a second solder ball land having a second... Agent: Harness, Dickey & Pierce, P.L.C

20070040283 - Encapsulated chip scale package having flip-chip on lead frame structure and method: In one embodiment, an encapsulated electronic package includes a semiconductor chip having patterned solderable pads formed on a major surface. During an assembly process, the patterned solderable pads are directly affixed to conductive leads. The assembly is encapsulated using, for example, a MAP over-molding process, and then placed through a... Agent: Semiconductor Components Industries, LLC Bradley J. Botsch

20070040284 - Two layer substrate ball grid array design: A routing pattern for high speed signals for a package substrate. Electrically conductive bond fingers are disposed on a first surface of the package substrate. The first surface is adapted to receive an integrated circuit in an attachment zone, and the bond fingers are disposed in at least two substantially... Agent: Lsi Logic Corporation

20070040285 - Heat dissipating grease: A heat dissipating grease includes a polymer matrix and a plurality of heat conducting fillers incorporated thereinto. A thermal conductivity of the polymer matrix is 0.1˜0.2 W/mK. A thermal conductivity of the heat conducting filler is 20˜1000 W/mK. A weight ratio of the polymer matrix and the heat conducting filler... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang Jeffrey T. Knapp

20070040286 - Structure for circuit assembly: A structure for circuit assembly is applied to positional alignment in bonding process. The structure for circuit assembly comprises a first substrate, having a plurality of first terminals and both a first alignment mark and a second alignment mark located in the vicinity of the first terminals, and a second... Agent: Birch Stewart Kolasch & Birch

20070040287 - Method for forming capacitor in a semiconductor device: A method for forming a capacitor of a semiconductor device ensures charging capacity and improves leakage current characteristic. In the capacitor forming method, a semiconductor substrate formed with a storage node contact is prepared first. Next, a storage electrode is formed such that the storage electrode is connected to the... Agent: Ladas & Parry LLP

20070034849 - Multi-layer chalcogenide devices: A multi-layer chalcogenide electronic device. The device includes an active region in electrical communication with two terminals, where the active region includes two or more layers. In one embodiment, the pore region includes two or more chalcogenide materials which differ in chemical composition. In another embodiment, the pore region includes... Agent: Energy Conversion Devices, Inc.

20070034848 - Reproducible resistance variable insulating memory devices and methods for forming same: The present invention relates to the use of a shaped bottom electrode in a resistance variable memory device. The shaped bottom electrode ensures that the thickness of the insulating material at the tip of the bottom electrode is thinnest, creating the largest electric field at the tip of the bottom... Agent: Dickstein Shapiro LLP

20070034851 - Chalcogenide devices and materials having reduced germanium or telluruim content: A chalcogenide material and chalcogenide memory device exhibiting fast operation (short set pulse times) over an extended range of reset state resistances. Electrical devices containing the instant chalcogenide materials permit rapid transformations from the reset state to the set state for reset and set states having a high resistance ratio.... Agent: Energy Conversion Devices, Inc.

20070034850 - Chalcogenide devices incorporating chalcogenide materials having reduced germanium or telluruim content: A chalcogenide material and chalcogenide memory device having less stringent requirements for formation, improved thermal stability and/or faster operation. The chalcogenide materials include materials comprising Ge, Sb and Te in which the Ge and/or Te content is lean relative to the commonly used Ge2Sb2Te5 chalcogenide composition. Electrical devices containing the... Agent: Energy Conversion Devices, Inc.

20070034856 - Light emitting element, light emitting device and electronic device: It is an object of the present invention to provide a light emitting element with improved luminous efficiency, a reduced drive voltage, and improved degree of deterioration with respect to driving time. According to a light emitting element including a first electrode; a second electrode; and a light emitting laminated... Agent: Cook, Alex, Mcfarron, Manzo, Cummings & Mehler, Ltd.

20070034852 - Mid-infrared resonant cavity light emitting diodes: A Resonant Cavity Light Emitting Diode (RCLED) device having a first active region having one or more quantum wells disposed within, a first chamber and a second chamber coupled to the first active region and a first reflector and a second reflector coupled to the first and second chambers respectively... Agent: Baker & Hostetler LLP

20070034855 - Nitride semiconductor light emitting device: The invention relates to a high-output nitride light emitting device. The light emitting device includes a first conductivity type nitride semiconductor layer, an active layer and a second conductivity type nitride semiconductor layer deposited in their order on a substrate. The light emitting device also includes first and second insulation... Agent: Mcdermott Will & Emery LLP

20070034857 - Nitride-based white light emitting device and manufacturing method thereof: A light emitting device includes an n-type cladding layer. a p-type cladding layer. an active layer interposed between the n-type cladding layer and the p-type cladding layer and an ohmic contact layer contacting the p-type cladding layer or the n-type cladding layer. The ohmic contact layer includes a first film... Agent: Cantor Colburn, LLP

20070034854 - Organometallic complex, and light emitting element and electronic appliance using the same: It is an object of the present invention to provide a substance which can emit red phosphorescence which is closer to the chromaticity coordinates of red according to the NTSC standard. The present invention provides an organometallic complex represented by the general formula (1), wherein each of R1 to R3... Agent: Cook, Alex, Mcfarron, Manzo, Cummings & Mehler, Ltd.

20070034853 - Structures for reducing operating voltage in a semiconductor device: A light-emitting device comprises an active region configured to generate light in response to injected charge, and an n-type material layer and a p-type material layer, wherein at least one of the n-type material layer and the p-type material layer is doped with at least two dopants, at least one... Agent: Avago Technologies, Ltd.

20070034858 - Light-emitting diodes with quantum dots: An apparatus includes a light-emitting diode. The light-emitting diode has a semiconductor matrix of one or more group III-nitride alloys and quantum dots dispersed inside the matrix. The quantum dots include a group III-nitride alloy different from the one or more group III-nitride alloys of the matrix.... Agent: Lucent Technologies Inc. Docket Administrator - Room 3j-219

20070034859 - Electroluminescent device: An optical device comprising an anode, a cathode comprising barium, strontium or calcium, and a layer of organic semiconducting material between the anode and the cathode wherein a layer of hole transporting and electron blocking material is located between the anode and the layer of organic semiconducting material.... Agent: Marshall, Gerstein & Borun LLP

20070034862 - Electronic device comprising an organic semiconductor, an organic semiconductor, and an intermediate buffer layer made of a polymer that is cationically polymerizable and contains no photoacid: The present invention describes a novel design principle for organic electronic elements by inserting at least one additional crosslinkable layer. The properties of the electronic devices are thereby improved. Structured construction of these devices is furthermore facilitated.... Agent: Connolly Bove Lodge & Hutz, LLP

20070034860 - Field effect organic transistor: A field effect organic transistor includes a source electrode, a drain electrode, a gate electrode, a gate insulating layer and an organic semiconductive layer; in the field effect organic transistor, the organic semiconductive layer includes a first organic semiconductive layer forming a channel region and a second organic semiconductive layer... Agent: Fitzpatrick Cella Harper & Scinto

20070034861 - Field effect type organic transistor and process for production thereof: A field effect type organic transistor is provided which comprises a source electrode, a drain electrode, and a gate electrode, a gate insulating layer, and an organic semiconductor layer, wherein the gate insulating layer contains an optical anisotropic material having an anisotropic structure formed by light irradiation, and the organic... Agent: Fitzpatrick Cella Harper & Scinto

20070034866 - Laser induced thermal imaging (liti) mask and an organic electroluminescent device fabrication method using the mask: A Laser Induced Thermal Imaging (LITI) mask and an organic electroluminescent device fabrication method using the mask provides a LITI mask in which corner regions are reinforced to improve adhesive force between a receptor substrate and a transfer layer on corners of a pixel portion of the receptor substrate, and... Agent: Robert E. Bushnell

20070034865 - Memory device and a semiconductor device: The present invention provides a memory device and a semiconductor device which have high reliability for writing at low cost. Furthermore, the present invention provides a memory device and a semiconductor device having a non-volatile memory element in which data can be additionally written and which can prevent forgery due... Agent: Eric Robinson

20070034863 - Metal complexes: The present invention describes new types of metal complexes. Such compounds can be used as functional materials in a series of different types of applications which can be classified within the electronics industry in the widest sense. The inventive compounds are described by the formulae (1) and (4).... Agent: Hamilton, Brook, Smith & Reynolds, P.C.

20070034864 - Organic light-emitting device with improved layer conductivity distribution: An OLED comprises an anode, a hole source, an emissive region, an electron source and a cathode, wherein the materials for the electron source and the hole source are chosen such that the electrical conductivity of these charge carrier sources is greater than the electrical conductivity of the emissive region.... Agent: Ware Fressola Van Der Sluys & Adolphson, LLP

20070034867 - Organic thin film transistor and flat panel display device using the same: An organic thin film transistor and a flat panel display device using the same are disclosed. The organic thin film transistor includes an inorganic layer doped with an impurity in a region of the outer surfaces of source and drain electrodes, or the source and drain electrodes is formed by... Agent: Christie, Parker & Hale, LLP

20070034868 - Semiconductor device and test system thereof: A semiconductor device that includes a clock buffer, which generates an internal clock signal in response to a clock signal and a complementary clock signal if the semiconductor device is operating in a first mode and generates the internal clock signal in response to the clock signal and a reference... Agent: Harness, Dickey & Pierce, P.L.C

20070034869 - Solid-state imaging device and method for producing the same: In the solid-state imaging device of the present invention having a photoelectric conversion section and a charge transfer section equipped with a charge transfer electrode for transferring an electric charge generated in the photoelectric conversion section, the charge transfer electrode has an alternate arrangement of a first layer electrode comprising... Agent: Birch Stewart Kolasch & Birch

20070034870 - Semiconductor device and method of fabricating the same: In a semiconductor device including a laminate of a first insulating layer, a crystalline semiconductor layer, and a second insulating layer, characteristics of the device are improved by determining its structure in view of stress balance. In the semiconductor device including an active layer of the crystalline semiconductor layer having... Agent: Cook, Alex, Mcfarron, Manzo, Cummings & Mehler Ltd

20070034875 - Light-emitting device: The reliability of a light-emitting device constituted by a combination of a TFT and a light-emitting element is to be improved. A light-emitting element is formed between a first substrate and a second substrate. The light-emitting device is formed over a first insulating layer made of an organic compound and... Agent: Nixon Peabody, LLP

20070034872 - Process for manufacturing a thin-film transistor (tft) device and tft device manufactured by the process: A process for manufacturing a thin-film transistor device includes forming a dielectric insulation layer on a substrate, forming an amorphous silicon layer on the dielectric insulation layer, crystallizing the amorphous silicon layer, so as to obtain polycrystalline silicon, forming gate structures on the polycrystalline silicon, and forming first doped regions... Agent: Graybeal, Jackson, Haley LLP

20070034874 - Semiconductor device and method for manufacturing the same: A semiconductor device that can be manufactured with a reduced cost by decreasing the number of masks is disclosed, and a method for manufacturing the semiconductor device is disclosed. The method for manufacturing the semiconductor device comprises the steps of: forming a semiconductor layer 3 having a source and a... Agent: Eric Robinson

20070034873 - Semiconductor device and semiconductor display device: A semiconductor device includes a control circuit for carrying out gamma correction of a supplied signal, and a memory for storing data used in the gamma correction. The control circuit and the memory are constituted by TFTs, and are integrally formed on the same insulating substrate. A semiconductor display device... Agent: Cook, Alex, Mcfarron, Manzo, Cummings & Mehler Ltd

20070034871 - Thin film transistor and method of manufacturing the same: An island-like semiconductor layer is formed on a main surface of an insulating substrate. A side wall of the island-like semiconductor layer is made substantially perpendicular to the insulating substrate. An insulating film is formed along the side wall of the semiconductor layer. The insulating film is formed to include... Agent: C. Irvin Mcclelland Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070034876 - Semiconductor device: A systemized active matrix display in which a pixel matrix circuit, a driver circuit and a logic circuit are mounted on the same substrate, is formed. A TFT of the present invention has such characteristics as to be able to operate in a wide driving frequency range of 0.05 to... Agent: Fish & Richardson P.C.

20070034877 - Semiconductor device and semiconductor device producing system: An insulating film having depressions and projections are formed on a substrate. A semiconductor film is formed on the insulating film. Thus, for crystallization by using laser light, a part where stress concentrates is selectively formed in the semiconductor film. More specifically, stripe or rectangular depressions and projections are provided... Agent: Eric Robinson

20070034878 - Semiconductor device and method for manufacturing the same: A memory element is formed by providing an organic compound between a pair of upper and lower electrodes. However, when the electrode is formed over a layer containing an organic compound, a temperature is limited because the layer containing the organic compound can be influenced depending on a temperature for... Agent: Eric Robinson

20070034879 - Liquid crystal display: A liquid crystal display (“LCD”) includes a data interconnection line including a data line, a source electrode as a branch of the data line, and a drain electrode formed spaced apart from the source electrode, a semiconductor layer formed under the data interconnection line and connected to the source electrode... Agent: Cantor Colburn, LLP

20070034881 - Light emitting device: When a light emitting element is actuated to allow the light emission, the generation of Joule heat occurs, leading to the decomposition or crystallization of an organic compound to cause the degradation of the light emitting device. Therefore, a light emitting element of the present invention is provided for effecting... Agent: Fish & Richardson P.C.

20070034880 - Method for the production of a plurality of opto-electronic semiconductor chips and opto-electronic semiconductor chip: A method for the production of a plurality of optoelectronic semiconductor chips and The invention relates to a method for the production of a plurality of optoelectronic semiconductor chips each having a plurality of structural elements with respectively at least one semiconductor layer. The method involves providing a chip composite... Agent: Cohen, Pontani, Lieberman & Pavane

20070034882 - Semiconductor light-emitting device: An LED chip of the present invention includes a columnar GaP substrate in which a tapered portion whose outer shape is narrowed toward an upper bottom surface side is formed in an outer wall surface thereof, an upper-surface electrode provided in an upper bottom surface of the GaP substrate, a... Agent: C. Irvin Mcclelland Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070034883 - Light emitting device: A light emitting device includes a transparent substrate having first and second surfaces, a semiconductor layer provided on the first surface, a first light emission layer provided on the semiconductor layer and emitting first ultraviolet light including a wavelength corresponding to an energy larger than a forbidden bandwidth of a... Agent: C. Irvin Mcclelland Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070034884 - Pixel cells in a honeycomb arrangement: The present invention, in the various exemplary embodiments, provides a RGB color filter array. The red, green and blue pixel cells are arranged in a honeycomb pattern. The honeycomb layout provides the space to vary the size of pixel cells of an individual color so that, for example, the photosensor... Agent: Dickstein Shapiro LLP

20070034888 - Electromagnetic radiation emitting semiconductor chip and procedure for its production: A semiconductor chip which emits electromagnetic radiation is presented. The chip includes an epitaxially produced semiconductor layer stack based on nitride semiconductor material, which includes an n-conducting semiconductor layer, a p-conducting semiconductor layer, and an electromagnetic radiation generating region, which is arranged between these two semiconductor layers. The chip further... Agent: Cohen, Pontani, Lieberman & Pavane

20070034885 - Green-emitting led: Phosphor from the class of the oxynitridosilicates, having a cation M which is doped with divalent europium and having the empirical formula M(1-c)Si2O2N2:DC, where M=Sr or M=Sr(1-x-y)BaYCax with x+y<0.5 is used, the oxynitridosilicate completely or predominantly comprising the high-temperature-stable modification HT.... Agent: Cohen, Pontani, Lieberman & Pavane

20070034887 - Phosphor-converted led devices having improved light distribution uniformity: A New Phosphor-converted LED Device (“NPCLD”) is disclosed. The NPCLD may include a lens over a phosphor body, in which the lens and the phosphor body each have a substantially convex upper surface. The NPCLD may alternatively include first and second lenses, the first lens having a substantially flat interface... Agent: Avago Technologies, Ltd.

20070034886 - Plcc package with integrated lens and method for making the package: A plastic leaded chip carrier (PLCC) package includes an encapsulant having a domed portion, which is formed as an integral single piece structure. The encapsulant may be formed using an injection molding process. Another injection molding process may be used to form a structural body of the PLCC package.... Agent: Avago Technologies, Ltd.

20070034889 - Diode housing: A housing accommodating a semiconductor chip is set out. The housing and chip may be used for sending and/or receiving radiation. Popular applications of the housing may be in light emitting diodes. The housing includes a conductor strip that is punched into two electrically isolated portions. The housing further includes... Agent: Fish & Richardson PC

20070034890 - Multiple die led and lens optical system: A light emitting device includes a number of light emitting diode dies (LEDs) mounted on a shared submount and covered with a single lens element that includes a corresponding number of lens elements. The LEDs are separated from each other by a distance that is sufficient for lens element to... Agent: Patent Law Group LLP

20070034891 - Nitride-based light emitting device and manufacturing method thereof: A light emitting device according to an exemplary embodiment of the present invention includes: an n-type cladding layer; a p-type cladding layer; an active layer interposed between the n-type cladding layer and the p-type cladding layer; and an ohmic contact layer contacting the p-type cladding layer or the n-type cladding... Agent: Cantor Colburn, LLP

20070034892 - Single-crystal nitride-based semiconductor substrate and method of manufacturing high-quality nitride-based light emitting device by using the same: A nitride-based light emitting device is manufactured by using a single-crystal nitride-based semiconductor substrate. A seed material layer is deposited on a first substrate where organic residues including a natural oxide layer are removed from an upper surface of the first substrate. A multifunctional substrate is grown from the seed... Agent: Cantor Colburn, LLP

20070034893 - Solid-state image pickup device and manufacturing method of the same: In a solid-state image pickup device according to the present invention, groove-like recesses are formed on a semiconductor substrate, and first wiring for vertical transfer electrode use are formed in the groove-like recesses, in order to reduce the distance between the semiconductor substrate and the microlens. According to the solid-state... Agent: Edwards & Angell, LLP

20070034894 - Semiconductor device including field effect transistor for use as a high-speed switching device and a power device: A body layer of a first conductivity type is formed on a semiconductor substrate, and a source layer of a second conductivity type is formed in a surface region of the body layer. An offset layer of the second conductivity type is formed on the semiconductor substrate, and a drain... Agent: C. Irvin Mcclelland Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070034895 - Folded-gate mos transistor: An insulated-gate transistor includes a semiconductor layer of a first conductivity type, an insulated gate comprising a trench gate extending into the semiconductor layer, a source and a drain regions of a second conductivity type formed in the semiconductor layer at respective sides of the trench gate, wherein each one... Agent: Graybeal Jackson Haley LLP

20070034897 - Esd protecting circuit and manufacturing method thereof: An ESP protecting circuit and a manufacturing method thereof are provided. The ESP protecting circuit includes a device isolation layer, first and second high-concentration impurity regions, a third high-concentration impurity region of a complementary type, first and second conductive wells, and a fourth conductive impurity region. The ESD protecting circuit... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20070034896 - Silicon-controlled rectifier for electrostatic discharge protection circuits and structure thereof: A Silicon-Controlled Rectifier (SCR) for Electrostatic Discharge (ESD) protection includes an isolation device. The isolation device isolates a main ground voltage line, connected to a first cathode, from a peripheral ground voltage line, connected to a second cathode. As result, even when noise occurs in the peripheral ground voltage line... Agent: Marger Johnson & Mccollom, P.C.

20070034898 - Heterojunction photodiode: The present invention provides a heterojunction photodiode which includes a pn or Schottky-barrier junction formed in a first material region having a bandgap energy Eg1. When reverse-biased, the junction creates a depletion region which expands towards a second material region having a bandgap energy Eg2 which is less than Eg1.... Agent: Koppel, Patrick & Heybl

20070034899 - Silicon-on-insulator photodiode optical monitoring system for color temperature control in solid state light systems: A silicon-on-insulator (SOI) photodiode optical monitoring method and system for color temperature control in solid state light systems. The method includes the steps of providing a plurality of SOI photodiodes, wherein each SOI photodiode includes a silicon substrate, a buried oxide layer formed on the silicon substrate, and a silicon... Agent: Philips Intellectual Property & Standards

20070034900 - Bipolar junction transistor and method of fabricating the same: A bipolar junction