Active solid-state devices (e.g., transistors, solid-state diodes) inventions 01/07

20070018148 - Phase change memory with u-shaped chalcogenide cell: A phase change memory may be made of a chalcogenide material having a U-shape. The U-shaped chalcogenide may transition between amorphous and crystalline phases in an upper part of a vertical portion thereof. As a result, in some embodiments, self-heating may be achieved without the need for a heater, and... Agent: Trop Pruner & Hu, PC

20070018149 - Semiconductor device and method of producing the same: In a semiconductor device, a phase change layer is formed as a side wall and is therefore reduced in volume. Even if the number of times of rewriting is small, the phase change layer is entirely used as a phase change region. Therefore, the phase change region is not increased... Agent: Young & Thompson

20070018150 - Self-emission panel and method of manufacturing same: A self-emission panel and a method of manufacturing a self-emission panel which can prevent emission failures from occurring due to various factors, thereby achieving a self-emission panel that is free from emission failures. The self-emission panel is manufactured by forming a first conductive layer on a substrate directly or via... Agent: Arent Fox PLLC

20070018156 - Dual panel type organic electroluminescent device: An organic electroluminescent device includes first and second substrates facing each other and spaced apart from each other, each of the first and second substrates having a first region and a second region in a periphery of the first region; an array element on an inner surface of the first... Agent: Mckenna Long & Aldridge LLP

20070018154 - Imidazole derivatives and organic electronic device using the same: Disclosed herein are novel imidazole derivatives and organic electronic device using the same. The disclosed organic electronic device show excellent characteristics in terms of efficiency, driving voltage and stability.... Agent: Mckenna Long & Aldridge LLP

20070018155 - New imidazole derivatives, preparation method thereof and organic electronic device using the same: The present invention relates to a new imidazole derivative, a method for preparing the derivative, and an organic electronic device using the derivative. The imidazole derivative according to the invention can perform functions of hole injection, hole transportation, electron injection, electron transportation, and/or light emission in an organic electronic device... Agent: Mckenna Long & Aldridge LLP

20070018152 - Organic electroluminescent device, manufacturing method therefor, and electronic devices therewith: A method for manufacturing an organic EL device in accordance with the invention includes: coating a composition including an organic EL material on a plurality of electrodes to form an organic EL layer on each electrode; defining an effectively optical area in which the plurality of electrodes are formed; and... Agent: Oliff & Berridge, PLC

20070018151 - Short-channel transistors: An electronic switching device comprising a source electrode, a drain electrode, an insulating layer in the region between source and drain electrode, a semiconducting layer in contact with both the source and the drain electrode, and in contact with said insulating layer, wherein the smallest distance between said source and... Agent: Sughrue Mion, PLLC

20070018153 - Thick light emitting polymers to enhance oled efficiency and lifetime: The light emitting polymer layer of an organic light emitting diode (“OLED”) device is formed to be thick having a thickness of more than 80 nanometers and preferably between 80 and 200 nanometers.... Agent: Fish & Richardson P.C.

20070018157 - Methods of forming phase change storage cells for memory devices: Storage cells for a phase change memory device and phase change memory devices are provided that include a first phase change material pattern and a first high-resist phase change material pattern on the first phase change material pattern. The first high-resist phase change material pattern has a higher resistance than... Agent: Myers Bigel Sibley & Sajovec

20070018158 - Apparatus for separating metal coating film and method for separating metal coating film: A metal coating removing apparatus (1) includes a first electrode (13) arranged so as to be opposed to a metal coating (101) as an object to be removed, a second electrode 14 arranged so as to be opposed to the metal coating (101) at a predetermined distance from the first... Agent: Hamre, Schumann, Mueller & Larson P.C.

20070018159 - Array substrate and display device having the same: An array substrate includes a base substrate, a plurality of pixel electrodes, a plurality of first conductive lines, a plurality of second conductive lines and a plurality of semiconductor patterns. The pixel electrodes are disposed on the base substrate. The first conductive lines are disposed between the pixel electrodes. The... Agent: F. Chau & Associates, LLC

20070018160 - Display for displaying product-specific information on display screen: When an ID number is “123”, TFTs (those corresponding to the position of “1”, those corresponding to the position of “2” and those corresponding to the position of “3”) are set to have a lower current drive capability than remaining TFTs. In an ID display mode, driving of TFTs is... Agent: C. Irvin Mcclelland Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070018165 - Electro-optical device and method for manufacturing the same: An electro-optical device and a method for manufacturing the same are disclosed. The device comprises a pair of substrates and an electro-optical modulating layer (e.g. a liquid crystal layer having sandwiched therebetween, said pair of substrates consisting of a first substrate having provided thereon a plurality of gate wires, a... Agent: Eric Robinson

20070018163 - Semiconductor device: A semiconductor device can include a channel including a zinc-indium oxide film.... Agent: Hewlett-packard Company Intellectual Property Administration

20070018164 - Semiconductor device and manufacturing method thereof: A method of realizing an active matrix display device having flexibility is provided. Further, a method for reducing parasitic capacitance between wirings formed on different layers is provided. After fixing a second substrate to a thin film device formed on a first substrate by bonding, the first substrate is removed,... Agent: Fish & Richardson P.C.

20070018162 - Thin film transistor substrate and manufacturing method thereof: Embodiments of the invention provide a thin film transistor substrate, comprising: an insulating substrate; a gate wire formed on the insulating substrate; a first gate insulating layer made of an inorganic material, formed on the gate wire and having a first insulating layer contact hole for exposing at least a... Agent: Macpherson Kwok Chen & Heid LLP

20070018161 - Thin film transistor substrate and method for fabricating the same: A thin film transistor substrate includes an insulating substrate, a gate electrode formed on the insulating substrate, a first gate insulating film formed on the gate electrode and having an opening for exposing at least part of the gate electrode, a second gate insulating film covering the gate electrode exposed... Agent: Cantor Colburn, LLP

20070018166 - Stacked transistors and process: A method of horizontally stacking transistors on a common semiconductor substrate is initiated by providing a single crystal, generally silicon, semiconductor substrate. A plurality of transistors are formed on the single crystal semiconductor substrate and encapsulated in an insulating layer, such as silicon dioxide. One or more openings are formed... Agent: Robert A. Parsons

20070018167 - Semiconductor integrated circuit and method of fabricating same: A semiconductor integrated circuit comprising thin-film transistors in each of which the second wiring is prevented from breaking at steps. A silicon nitride film is formed on gate electrodes and on gate wiring extending from the gate electrodes. Substantially triangular regions are formed out of an insulator over side surfaces... Agent: Eric Robinson

20070018169 - Liquid crystal display device and fabrication method thereof: A liquid crystal display device and its fabrication method may prevent occurrence of light leakage generated from the sides of a data line. A dummy pattern at sides of the data line with glass powder as an insulation film may simplify the repairing process. A method for fabricating a liquid... Agent: Brinks Hofer Gilson & Lione

20070018170 - Organic light emitting display device: An organic light emitting display device including a flexible substrate and a plurality of thin film transistors (TFTs) formed on the substrate. The plurality of TFTs formed on the substrate include a pixel transistor for driving a pixel and a driver circuit transistor for driving a driver circuit, and a... Agent: Christie, Parker & Hale, LLP

20070018168 - Thin film transistor substrate, display device, and method of fabricating the same: A thin film transistor (“TFT”) substrate includes a gate line formed on a base substrate, a data line insulated from the gate line, and a TFT formed at the intersection between the gate line and the data line. A line width of the gate line is greater than a line... Agent: Cantor Colburn, LLP

20070018171 - Semiconductor device and a method for production thereof: A semiconductor device comprises a first layer (1) of a wide band gap semiconductor material doped according to a first conductivity type and a second layer (3) on top thereof designed to form a junction blocking current in the reverse biased state of the device at the interface to said... Agent: Dilworth & Barrese, LLP

20070018172 - Crystals of phenylalanine derivatives and production methods thereof: s

20070018173 - Method of fabricating vertical devices using a metal support film: A method of fabricating semiconductor devices, such as GaN LEDs, on insulating substrates, such as sapphire. Semiconductor layers are produced on the insulating substrate using normal techniques. Trenches that define the boundaries of the individual devices are formed through the semiconductor layers and into the insulating substrate, beneficially by inductive... Agent: Mckenna Long & Aldridge LLP

20070018174 - Light emission from semiconductor integrated circuits: Structures and methods to inject electrons into an insulator from a semiconductor layer that are then collected in a thin layer of a direct semiconductor material which in turn emits light by bandgap recombination.... Agent: John P. O'banion O'banion & Ritchey LLP

20070018175 - Light emitting diodes with improved light collimation: A light emitting diode with improved light collimation comprises a substrate-supported LED die disposed within a transparent dome. A portion of the dome laterally circumscribe the die comprises light reflecting material to reflect emitted light back to the die. A portion of the dome centrally overlying the die is substantially... Agent: Patent Docket Administrator Lowenstein Sandler PC

20070018176 - Image display device and method of manufacturing the same: An image display device includes an envelope having a first substrate and a second substrate located opposite the first substrate across a gap and a plurality of pixels provided in the envelope. A plurality of columnar spacers which support an atmospheric load acting on the first and second substrates are... Agent: C. Irvin Mcclelland Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070018179 - Vertical conducting power semiconducting devices made by deep reactive ion etching: The Invention Is A Method For Making Power Device On A Semiconductor Wafer, Where The Backside Of The Wafer Has Been Thinned In Selected Regions To A Thickness Of About 25 Um By Reactive Ion Etching.... Agent: Naval Research Laboratory Associate Counsel (patents)

20070018178 - Vertical electrode structure of gallium nitride based light emitting diode: A vertical electrode structure of GaN-based light emitting diode discloses an oxide window layer constructing the GaN-based light emitting diode of vertical electrode structure, which effectively decreases the Fresnel reflection loss and total reflection, and further advances the luminous efficiency. Moreover, the further included metal reflecting layer causes the reflection... Agent: Rosenberg, Klein & Lee

20070018177 - Vertical gan-based led and method of manufacturing the same: Provided are a vertical GaN-based LED and a method of manufacturing the same. The vertical GaN-based LED includes an n-electrode. An AlGaN layer is formed under the n-electrode. An undoped GaN layer is formed under the AlGaN layer to provide a two-dimensional electron gas layer to a junction interface of... Agent: Mcdermott Will & Emery LLP

20070018180 - Vertical electrode structure of gallium nitride based light emitting diode: A vertical electrode structure of GaN-based light emitting diode discloses an oxide window layer constructing the GaN-based light emitting diode of vertical electrode structure, which effectively decreases the Fresnel reflection loss and total reflection, and further advances the luminous efficiency. Moreover, the further included metal reflecting layer causes the reflection... Agent: Rosenberg, Klein & Lee

20070018186 - Light emitting diode device having advanced light extraction efficiency and preparation method thereof: Disclosed is an LED device, a method for manufacturing the same, and a light emitting apparatus having the same. The LED device includes (a) a light emitting diode unit and (b) an adjustment layer laminated on a light emitting surface of the light emitting diode unit, a fine pattern having... Agent: Mckenna Long & Aldridge LLP

20070018185 - Light emitting diode package and light guide pipe and backlight module and liquid crystal display device using the same: A light emitting diode (LED) package includes a base, a body and several LED chips. The body having an end surface is disposed on the base. A peripheral recess is formed in the end surface. The LED chips are disposed on a bottom of the peripheral recess for providing sidelight... Agent: Lowe Hauptman Berner, LLP

20070018184 - Light emitting diodes with high light extraction and high reflectivity: The invention is a light emitting diode that exhibits high reflectivity to externally incident light and high extraction efficiency for internally generated light. The light emitting diode includes a first reflecting electrode that reflects both externally incident light and internally generated light. The first reflecting electrode can be a metal... Agent: William Propp, Esq. Goldeneye, Inc.

20070018182 - Light emitting diodes with improved light extraction and reflectivity: The invention is a light emitting diode that exhibits high reflectivity to externally incident light and high extraction efficiency for internally generated light. The light emitting diode includes a first reflecting electrode that reflects both externally incident light and internally generated light. A multi-layer semiconductor structure is in contact with... Agent: William Propp, Esq. Goldeneye, Inc.

20070018183 - Roughened high refractive index layer/led for high light extraction: A light emitting diode (LED) includes a p-type layer of material, an n-type layer of material and an active layer between the p-type layer and the n-type layer. A roughened layer of transparent material is adjacent one of the p-type layer of material and the n-type layer of material. The... Agent: Koppel, Patrick & Heybl

20070018188 - Thin film transistor sunstrate of a horizontal electric filed type and method of darkening deflective pixel in the same: A method of darkening a defective pixel including a short between a source electrode and a drain electrode in a thin film transistor substrate includes forming a gate line and a data line on a substrate to define a pixel region; forming a thin film transistor at a crossing of... Agent: Mckenna Long & Aldridge LLP

20070018187 - Vertical gan-based led and method of manfacturing the same: A vertical GaN-based LED and a method of manufacturing the same are provided. The vertical GaN-based LED includes an n-electrode, a first n-type GaN layer, a first AlGaN layer, a GaN layer, a second AlGaN layer, a second n-type GaN layer, an active layer, a p-type GaN layer, and a... Agent: Mcdermott Will & Emery LLP

20070018181 - White led headlight: A vehicle headlight (12) that employs a plurality of LED units (38) that emit white light. Each LED unit (38) employs chip-on-board technology where LED semiconductor chips (64) are mounted directly to a submount substrate (56) using solder or stud bumps (60). An elongated lens (28) is molded over the... Agent: Warn Hoffmann Miller & Lalone

20070018190 - Led package and fabricating method thereof: The invention provides an LED package capable of effectively releasing heat emitted from an LED chip out of the package and a fabrication method thereof. For this purpose, at least one groove is formed on an underside surface of the substrate to package the LED chip and the groove is... Agent: Mcdermott Will & Emery LLP

20070018189 - Light emitting diode: A light emitting diode is disclosed. A light emitting diode comprises: a bracing frame; and at least two chips stacked on the bracing frame in a chip-on-chip stacking manner. The light emitting diode for uniform color mixing is completed after each of said at least two chips is electrically connected.... Agent: Troxell Law Office PLLC Suite 1404

20070018191 - Side view led with improved arrangement of protection device: A side view LED includes an insulating substrate, and first and second metal layers each having first and second areas spaced apart from each other at a predetermined gap and disposed on top and underside surfaces of the insulating substrate, respectively. First and second electrical connectors are formed in a... Agent: Mcdermott Will & Emery LLP

20070018192 - Devices incorporating heavily defected semiconductor layers: The structure and growth method are disclosed for a novel heterojunction diode structure. The invention exploits the Fermi level pinning properties of dislocations and defects in compound semiconductors to achieve heterojunctions with nonlinear current-voltage characteristics despite highly defected, polycrystalline, or amorphous semiconductors. The invention enable new diode, photodetector, and transistor... Agent: Dr. Dave S. Garrod, Esq. Goodwin-procter

20070018193 - Initial-on scr device for on-chip esd protection: A semiconductor device for electrostatic discharge (ESD) protection comprises a silicon controlled rectifier (SCR) including a semiconductor substrate, a first well formed in the substrate, a second well formed in the substrate, a first p-type region formed in the first well to serve as an anode, and a first n-type... Agent: Akin Gump Strauss Hauer & Feld L.L.P.

20070018194 - Driving circuit: When a PWM command signal reaches a low level, an input transistor turns on, an on-driving transistor turns off, Darlington-connected off-driving transistors connected in series with the on-driving transistor turn on, and an output MOSFET changes from an on-state to an off-state. At this time, a base current of the... Agent: Posz Law Group, PLC

20070018195 - Semiconductor structure and method: A semiconductor structure includes a semiconductor layer stack includes a semiconductor substrate of a first conductivity type, a heavily-doped buried layer of a second conductivity type, and a monocrystalline semiconductor layer of a third conductivity type formed on top of the semiconductor layer and the buried layer, a contact to... Agent: Dicke, Billig & Czaja, P.l.l.c.

20070018196 - Power semiconductor device with current sense capability: A power semiconductor device includes a power device and a current sense device formed in a common semiconductor region.... Agent: Ostrolenk Faber Gerb & Soffen

20070018197 - Semiconductor device: A semiconductor device is disclosed that includes a first and a second semiconductor package. Each semiconductor package includes a semiconductor element, a plurality of electrode members, and an encapsulating member. The semiconductor elements are interposed between the respective electrode members, and the electrode members are in electrical communication with and... Agent: Posz Law Group, PLC

20070018198 - High electron mobility electronic device structures comprising native substrates and methods for making the same: An electronic device structure comprises a substrate layer of semi-insulating AlxGayInzN, a first layer comprising AlxGayInzN, a second layer comprising Alx′Gay′Inz′N, and at least one conductive terminal disposed in or on any of the foregoing layers, with the first and second layers being adapted to form a two dimensional electron... Agent: Intellectual Property / Technology Law

20070018199 - Nitride-based transistors and fabrication methods with an etch stop layer: A III-Nitride field-effect transistor, specifically a HEMT, comprises a channel layer, a barrier layer on the channel layer, an etch stop layer on the cap layer, a dielectric layer on the etch stop layer, a gate recess that extends to the barrier layer, and a gate contact in the gate... Agent: Myers Bigel Sibley & Sajovec

20070018200 - Single frequency laser: This invention relates to generally to semiconductor devices, for example lasers and more particularly to single frequency lasers and is directed at overcoming problems associated with the manufacture of these devices. In particular, a laser device is provided formed on a substrate having a plurality of layers (1,2,3,4,5), the laser... Agent: Gordon & Rees LLP

20070018201 - Non-volatile memory cells and methods for fabricating non-volatile memory cells: The invention relates to a method for fabricating stacked non-volatile memory cells. Further, the invention relates to stacked non-volatile memory cells. The invention particularly relates to the field of non-volatile NAND memories having non-volatile stacked memory cells. The stacked non-volatile memory cells are formed on a semiconductor wafer, having a... Agent: Slater & Matsil LLP

20070018202 - High performance mosfet comprising stressed phase change material and method of fabricating the same: The present invention relates to semiconductor devices that each comprises at least one field effect transistor (FET) containing an intrinsically stressed phase change material layer. The intrinsically stressed phase change material layer is arranged and constructed for creating stress in the channel region of the FET. Preferably, the intrinsically stressed... Agent: Scully, Scott, Murphy & Pressner, P.C.

20070018203 - Strain inducing multi-layer cap: A strained transistor includes a silicon transistor, an encapsulating layer of silicon insulating material with an outer surface, and a stress inducing multilayer cap deposited on the outer surface of the encapsulating layer with at least two layers including a layer of rare earth oxide and a layer including silicon.... Agent: Robert A. Parsons

20070018204 - High-frequency device including high-frequency switching circuit: A high-frequency device having a switching circuit includes a compound semiconductor substrate; a first high-frequency input/output terminal; a second high-frequency input/output terminal; a control signal input terminal; a power terminal; a ground terminal; an insulating portion disposed on one main surface of the compound semiconductor substrate; and a voltage-applying electrode... Agent: Sonnenschein Nath & Rosenthal LLP

20070018208 - Depletable cathode low charge storage diode: An integrated circuit device comprising a diode and a method of making an integrated circuit device comprising a diode are provided. The diode can comprise an island of a first conductivity type, a first region of a second conductivity type formed in the island, and a cathode diffusion contact region... Agent: Min, Hsieh & Hack LLP

20070018209 - Semiconductor circuit device and simulation method of the same: A first PMIS transistor includes a first active region which is formed on a semiconductor substrate and a first gate electrode which is formed on the first active region and which is connected at one end thereof to a first gate wiring and includes at the other end thereof a... Agent: Mcdermott Will & Emery LLP

20070018207 - Split gate storage device including a horizontal first gate and a vertical second gate in a trench: A split gate storage device includes a first gate electrode in contact with a first gate dielectric and a second gate electrode in contact with a second gate dielectric. A first diffusion region underlies a portion of a trench defined in a semiconductor substrate and a second diffusion region occupies... Agent: Larson Newman Abel Polansky & White, LLP

20070018205 - Structure and method for improved stress and yield in pfets with embedded sige source/drain regions: The present invention provides a technique for forming a CMOS structure including at least one pFET that has a stressed channel which avoids the problems mentioned in the prior art. Specifically, the present invention provides a method for avoiding formation of deep canyons at the interface between the active area... Agent: Scully, Scott, Murphy & Pressner, P.C.

20070018206 - Surround gate access transistors with grown ultra-thin bodies: A vertical transistor having an annular transistor body surrounding a vertical pillar, which can be made from oxide. The transistor body can be grown by a solid phase epitaxial growth process to avoid difficulties with forming sub-lithographic structures via etching processes. The body has ultra-thin dimensions and provides controlled short... Agent: Knobbe Martens Olson & Bear LLP

20070018210 - Switch mode power amplifier using mis-hemt with field plate extension: Disclosed are a switch mode power amplifier and a field effect transistor especially suitable for use in a switch mode power amplifier. The transistor is preferably a compound high electron mobility transistor (HEMT) having a source terminal and a drain terminal with a gate terminal therebetween and positioned on a... Agent: Beyer Weaver & Thomas, LLP

20070018211 - High dielectric constant spacer for imagers: An imager having gates with spacers formed of a high dielectric material. The high dielectric spacer provides larger fringing fields for charge transfer and improves image lag and charge transfer efficiency.... Agent: Dickstein Shapiro LLP

20070018213 - Cmos image sensor and method of fabricating the same: A complementary metal-oxide semiconductor (CMOS) image sensor and a method of fabricating the same arc disclosed. In a complementary metal-oxide semiconductor (CMOS) image sensor including a photodiode receiving irradiated light and generating electric charges, a plurality of conductive circuits each formed in different layers, a plurality of interlayer dielectrics insulating... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070018212 - Photodiode array and production method thereof, and radiation detector: A photodiode array 1 is provided with an n-type silicon substrate 3. A plurality of photodiodes 4 are formed in array on the opposites surface side to an incident surface of light L to be detected, in the n-type silicon substrate 3. A depression 6 with a predetermined depth more... Agent: Drinker Biddle & Reath (dc)

20070018214 - Magnesium titanium oxide films: Embodiments of a magnesium titanium oxide structure on a substrate provide a dielectric for use in a variety of electronic devices. Embodiments of methods of fabricating such a dielectric include forming the magnesium titanium oxide structure by atomic layer deposition.... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070018216 - Electronic device including discontinuous storage elements: An electronic device can include discontinuous storage elements that lie within a trench. The electronic device can include a substrate including a trench that includes a wall and a bottom and extends from a primary surface of the substrate. The electronic device can also include discontinuous storage elements, wherein a... Agent: Larson Newman Abel Polansky & White, LLP

20070018218 - Fin field effect transistor memory cell, fin field effect transistor memory cell arrangement and method for producing the fin field effect transistor memory cell: The invention relates to a bridge field-effect transistor storage cell comprising first and second source/drain areas and a channel area arranged therebetween, which are formed in a semiconductor bridge. The inventive storage cell also comprises a charge-coupled layer that is disposed at least partially on the semiconductor bridge and a... Agent: Slater & Matsil LLP

20070018215 - Semiconductor constructions, memory arrays, electronic systems, and methods of forming semiconductor constructions: The invention includes semiconductor constructions having trenched isolation regions. The trenches of the trenched isolation regions can include narrow bottom portions and upper wide portions over the bottom portions. Electrically insulative material can fill the upper wide portions while leaving voids within the narrow bottom portions. The bottom portions can... Agent: Wells St. John P.s.

20070018217 - Semiconductor device and manufacturing method of the same: According to the present invention, a semiconductor device manufacturing method includes the steps of: forming a capacitor formation groove in a silicon (semiconductor) substrate; and forming a second insulating film by thermally oxidizing at least the upper surface of the silicon substrate and the bottom and the side surfaces of... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070018220 - Semiconductor device, gate electrode and method of fabricating the same: Example embodiments of the present invention provide a semiconductor device, a gate electrode and method of manufacturing the same. Other example embodiments of the present invention provide a gate electrode with a refractory metal layer having decreased sheet resistance and increased reliability, a semiconductor device and a method of manufacturing... Agent: Harness, Dickey & Pierce, P.L.C

20070018219 - Unit cell structure, method of manufacturing the same, non-volatile semiconductor device having the unit cell structure and method of manufacturing the non-volatile semiconductor device: A unit cell structure in a non-volatile semiconductor device includes a lower electrode. The variable resistor is formed on the lower electrode and includes a first insulation thin film, a third insulation thin film, and a second insulation thin film located between the first and third insulation thin films. A... Agent: Volentine Francos, & Whitt PLLC

20070018222 - electronic device including discontinuous storage elements: An electronic device can include discontinuous storage elements that lie within a trench. In one embodiment, the electronic device can include a substrate having a trench that includes a wall and a bottom. The electronic device can also include a portion of discontinuous storage elements that lie within the trench.... Agent: Larson Newman Abel Polansky & White, LLP

20070018221 - Programmable structure including discontinuous storage elements and spacer control gates in a trench: A semiconductor storage cell includes first and second source/drain regions underlying first and second trenches defined in a semiconductor substrate. Sidewalls of the trenches are lined with a charge storage stack that includes a layer of discontinuous storage elements (DSEs), which are preferably silicon nanocrystals. Spacer control gates are located... Agent: Larson Newman Abel Polansky & White, LLP

20070018223 - Dram including a vertical surround gate transistor: DRAM memory cells having a feature size of less than about 4F2 include vertical surround gate transistors that are configured to reduce any short channel effect on the reduced size memory cells. In addition, the memory cells may advantageously include reduced resistance word line contacts and reduced resistance bit line... Agent: Knobbe Martens Olson & Bear LLP

20070018224 - Devices and methods for preventing capacitor leakage: Devices and methods for preventing capacitor leakage caused by sharp tip. The formation of sharp tip is avoided by a thicker bottom electrode which fully fills a micro-trench that induces formation of the sharp tip. Alternatively, formation of the sharp tip can be avoided by recessing the contact plug to... Agent: Birch, Stewart, Kolasch & Birch, LLP

20070018225 - Integrated stacked capacitor and method of fabricating same: An integrated stacked capacitor comprises a first capacitor film (46) of polycrystalline silicide (poly), a second capacitor film (48) and a first dielectric (26) sandwiched between the first capacitor film (46) and second capacitor film (48). A second dielectric (34) and a third capacitor film (50) are provided. The second... Agent: Texas Instruments Incorporated

20070018226 - Nonvolatile semiconductor memory: A nonvolatile semiconductor memory includes: a memory cell transistor including a gate insulating film, a floating gate electrode, an inter-gate insulating film, and a control gate electrode; a low voltage transistor constituted by a low voltage gate insulating film, a floating gate electrode, an inter-gate insulating film having an opening,... Agent: C. Irvin Mcclelland Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070018227 - Three-gate transistor structure: A transistor structure comprises a semiconductor element extending between a source zone and a drain zone, as well as three portions of gates disposed on different sides of the semiconductor element. Such a structure is especially compact and may be used as two or three transistors having independent respective functions.... Agent: Seed Intellectual Property Law Group PLLC

20070018230 - Eeprom and methods of fabricating the same: An EEPROM includes a tunneling opening having an inclined or a stepped sidewall. A tunnel insulation layer is formed within the tunneling opening. Using a flowed photoresist pattern as an etching mask, the gate insulator is etched to form a tunneling opening having an inclined sidewall. Thus, the tunnel insulation... Agent: Mills & Onello LLP

20070018229 - Electronic device including discontinuous storage elements and a process for forming the same: An electronic device can include discontinuous storage elements that lie within a trench. In one embodiment, the electronic device can include a substrate that includes a trench extending into a semiconductor material. The trench can include a ledge and a bottom, wherein the bottom lies at a depth deeper than... Agent: Larson Newman Abel Polansky & White, LLP

20070018228 - Non-volatile memory with carbon nanotubes: Floating-gate memory cells having carbon nanotubes interposed between the substrate and the tunnel dielectric layer facilitate ballistic injection of charge into the floating gate. The carbon nanotubes may extend across the entire channel region or a portion of the channel region. For some embodiments, the carbon nanotubes may be concentrated... Agent: Leffert Jay & Polglaze, P.A. Attn: Thomas W. Leffert

20070018231 - Nonvolatile semiconductor memory device, semiconductor device and manufacturing method of nonvolatile semiconductor memory device: A nonvolatile semiconductor memory device includes a gate portion formed by laminating a tunnel insulating film, floating gate electrode, inter-poly insulating film and control gate electrode on a semiconductor substrate, and source and drain regions formed on the substrate. The tunnel insulating film has a three-layered structure having a silicon... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070018232 - Nonvolatile storage array with continuous control gate employing hot carrier injection programming: An array of storage cells include a first source/drain region underlying a first trench defined in a semiconductor substrate and a second source/drain region underlying a second trench in the substrate. A charge storage stack lines each of the trenches where the charge storage stack includes a layer of discontinuous... Agent: Larson Newman Abel Polansky & White, LLP

20070018233 - Semiconductor device and control method therefor: A semiconductor device includes an insulation layer (14) provided on a semiconductor substrate (12), a p-type semiconductor region (16) provided on the insulation layer, an isolation region (18) provided that surrounds the p-type semiconductor region to reach the insulation layer, an n-type source region (20) and an n-type drain region... Agent: Wagner, Murabito & Hao LLP Two N. Market Street

20070018234 - Electronic device including gate lines, bit lines, or a combination thereof: An electronic device can include memory cells that are connected to gate lines, bit lines, or a combination thereof. In one embodiment, at least two sets of memory cells can be oriented substantially along a first direction, (e.g., rows or columns). A first gate line may be electrically connected to... Agent: Larson Newman Abel Polansky & White, LLP

20070018235 - Nonvolatile semiconductor memory device including improved gate electrode: A floating gate is formed on a semiconductor substrate via a gate insulating film. Diffused layers are formed as sources or drain regions on opposite sides of the floating gate in the semiconductor substrate. First and second control gates are formed opposite to both of the diffused layers on the... Agent: C. Irvin Mcclelland Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070018237 - Non-volatile memory device having fin-type channel region and method of fabricating the same: A non-volatile memory device with improved integration and/or improved performance by reducing an area per bit and controlling a body bias, and a method of fabricating the same. The non-volatile memory device may use surface portions of the outer side surfaces and/or the upper surfaces of at least one pair... Agent: Harness, Dickey & Pierce, P.L.C

20070018236 - Semiconductor device and manufacturing method thereof: A semiconductor device includes a semiconductor substrate, a monocrystalline channel region of a first conductivity type formed on the surface of the semiconductor substrate, a gate electrode formed on the channel region via a gate insulating film, a pair of source/drain electrodes of a second conductivity type provided on both... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070018238 - Semiconductor device: A semiconductor device includes a semiconductor layer, a pair of a source region and a drain region formed to face each other in a direction on the semiconductor layer and made of a metal or a metal silicide, a first dielectric film formed on at least the semiconductor layer between... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070018239 - Sea-of-fins structure on a semiconductor substrate and method of fabrication: A semiconductor device and a method of fabricating a semiconductor device, wherein the method comprises forming, on a substrate, a plurality of planarized fin bodies to be used for customized fin field effect transistor (FinFET) device formation; forming a nitride spacer around each of the plurality of fin bodies; forming... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20070018241 - Early contact, high cell density process: A method of fabricating a power semiconductor device in which contact trenches are formed prior to forming the gate trenches.... Agent: Ostrolenk Faber Gerb & Soffen

20070018240 - Electronic device including discontinuous storage elements: An electronic device can include a substrate having a trench that includes a wall and a bottom. The electronic device can also include a first set of discontinuous storage elements that overlie a primary surface of the substrate and a second set of discontinuous storage elements that lie within the... Agent: Larson Newman Abel Polansky & White, LLP

20070018242 - Power semiconductor device: Disclosed is a power semiconductor device, including: a gate electrode having a cross section having a length in a vertical direction, and having a shape extending in a direction orthogonal to the cross section; a gate insulating film surrounding the gate electrode; an n-type source layer positioning to face the... Agent: C. Irvin Mcclelland Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070018243 - Semiconductor element and method of manufacturing the same: A semiconductor element is provided, comprising a first semiconductor layer of the first conduction type; and a pillar layer including first semiconductor pillars of the first conduction type and second semiconductor pillars of the second conduction type arranged periodically and alternately on the first semiconductor layer. A semiconductor base layer... Agent: C. Irvin Mcclelland Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070018244 - Gate electrode structures and methods of manufacture: Gate electrode structures used in field effect transistors and integrated circuits and methods of manufacture are disclosed. Improved work function and threshold modulation are provided by the methods and structures.... Agent: Applied Materials, Inc. Legal Affairs Department

20070018245 - Fringing field induced localized charge trapping memory: The present invention includes a semiconductor layer formed over an insulation layer and a substrate. Doped regions are formed in a portion of the semiconductor layer. A gate dielectric and a gate are respectively formed over the semiconductor layer. The arrangement of the gate sidewall and semiconductor layer surface is... Agent: Kusner & Jaffe Highland Place Suite 310

20070018247 - Method and apparatus for use in improving linearity of mosfet's using an accumulated charge sink: A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment,... Agent: Martin J. Jaquez, Esq. Jaquez & Associates

20070018246 - Semiconductor device and semiconductor device manufacturing method: A semiconductor device includes a back gate electrode composed of a first single-crystal semiconductor layer formed on a first insulating layer, a second insulating layer formed on the first single-crystal semiconductor layer, a second single-crystal semiconductor layer formed on the second insulating layer and having a film thickness smaller than... Agent: Oliff & Berridge, PLC

20070018248 - Power gating schemes in soi circuits in hybrid soi-epitaxial cmos structures: Disclosed are a multi-threshold CMOS circuit and a method of designing such a circuit. The preferred embodiment combines an MTCMOS scheme and a hybrid SOI-epitaxial CMOS structure. Generally, the logic transistors (both nFET and pFET) are placed in SOI, preferably in a high-performance, high density UTSOI; while the headers or... Agent: Scully Scott Murphy & Presser, PC

20070018249 - Extended drain metal oxide semiconductor transistor and manufacturing method thereof: A MOS transistor having an extended drain structure and including a semiconductor substrate formed in a well of a first conductivity type. A gate insulating layer is formed on the substrate, a gate electrode is formed on the gate insulating layer, and a source region is formed in a first... Agent: Sang Bum Lee

20070018250 - High-voltage diodes formed in advanced power integrated circuit devices: A diode-connected lateral transistor on a substrate of a first conductivity type includes a vertical parasitic transistor through which a parasitic substrate leakage current flows. Means for shunting at least a portion of the flow of parasitic substrate leakage current away from the vertical parasitic transistor is provided.... Agent: Hiscock & Barclay, LLP

20070018251 - Semiconductor device and method for fabricating the same: In a MIEET, an impurity which changes a lattice constant is introduced into part of a gate electrode located on an isolation region. A stress which is generated in part of the gate electrode as a starting point and improves the mobility of carries is applied to a channel region... Agent: Mcdermott Will & Emery LLP

20070018253 - Memory cell and manufacturing methods: A semiconductor structure and methods of forming the same are provided. The semiconductor structure includes a semiconductor substrate, a first memory device array on the semiconductor substrate, and a logic circuit on the semiconductor substrate. Substantially all gates of at least one type of PMOS and NMOS devices in the... Agent: Slater & Matsil, L.L.P.

20070018252 - Semiconductor device containing high performance p-mosfet and/or n-mosfet and method of fabricating the same: The present invention relates to semiconductor devices that comprise at least one n-channel field effect transistor (n-FET) and/or at least one p-channel field effect transistor (p-FET). The n-FET contains a source region and a drain region with a tensilely stressed metal silicide surface layer, which applies tensile stress to the... Agent: Scully, Scott, Murphy & Pressner, P.C.

20070018255 - Semiconductor device and method for fabricating the same: The method for fabricating a semiconductor device according to the present invention comprises the step of forming a Ni film 66 on source/drain diffused layers 64, the step of performing a first thermal processing to react a lower part of the Ni film 66 and an upper part of the... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070018254 - Shared contact structure, semiconductor device and method of fabricating the semiconductor device: A shared contact structure, semiconductor device and method of fabricating the semiconductor device, in which the shared contact structure may include a gate electrode disposed on an active region of a substrate and including facing first and second sidewalls. The first sidewall may be covered with an insulating spacer. The... Agent: Harness, Dickey & Pierce, P.L.C

20070018256 - Semiconductor memory device and method for generating rom data pattern: By simplifying the shape of memory cell diffused mask patterns, the patterns are formed stably and the yield of a semiconductor memory device is improved. Adjacent 2-bit memory cell transistors are formed with one diffused mask pattern, the diffused mask patterns are arranged on a memory cell array, and metal... Agent: Stevens, Davis, Miller & Mosher, LLP

20070018257 - Electronic circuit having variable biasing: Techniques are provided for selectively biasing wells in a circuit, such as a Complementary Metal Oxide Semiconductor (CMOS) circuit, that has two types of transistors, one type formed on a substrate and another type formed on the wells. For example, the circuit can be a memory circuit, and the selective... Agent: Ryan, Mason & Lewis, LLP

20070018258 - High-voltage device structure: A high-voltage device structure includes a high-voltage device disposed on a semiconductor substrate. The semiconductor includes an active region and an isolation region, and the high-voltage device is disposed in the active region. The high-voltage device structure includes a source diffusion region of a first conductive type, a drain region... Agent: North America Intellectual Property Corporation

20070018259 - Dual gate electrode metal oxide semciconductor transistors: A semiconductor product includes a pair of field effect transistor device structures formed one each within a pair of doped well regions within a semiconductor substrate. The pair of field effect transistor device structures is formed with a pair of metal gate electrodes formed employing different laminated metal constructions. By... Agent: Tung & Associates

20070018260 - Devices having vertically-disposed nanofabric articles and methods of making the same: Electro-mechanical switches and memory cells using vertically-disposed nanofabric articles and methods of making the same are described. An electro-mechanical device, includes a structure having a major horizontal surface and a channel formed therein. A conductive trace is in the channel; and a nanotube article vertically suspended in the channel, in... Agent: Wilmer Cutler Pickering Hale And Dorr LLP

20070018261 - Low compressive tinx materials and methods of making the same: Disclosed herein is a microelectromechanical device having a structural layer composed of a low stress TiNx layer and a method of making the same.... Agent: Texas Instruments Incorporated

20070018262 - Micromachine and production method thereof: A micromachine for a high-frequency filter which has a high Q value and a higher frequency band is provided. The micromachine includes an electrode provided on a substrate, an inter-layer insulation film composed of a first insulation film and a second insulation film which are provided on the substrate in... Agent: Sonnenschein Nath & Rosenthal LLP

20070018263 - Semiconductor device and manufacturing method of the same: The invention is directed to enhancement of performance of a back surface incident type semiconductor device having a light receiving element and a manufacturing method thereof without increasing a manufacturing cost. A supporting body is attached to a front surface of a semiconductor substrate formed with a light receiving element... Agent: Morrison & Foerster LLP

20070018264 - Optimized image sensor process and structure to improve blooming: An image sensor that has a pixel array using an isolation structure between pixels that reduce electrical cross-talk is disclosed. The pixel array is formed on a substrate that has a thin (less than 5 microns) epitaxial layer. The isolation structure uses a deep p-well to surround a shallow trench... Agent: Perkins Coie LLP

20070018265 - Mask, mask manufacturing method, film forming method, electro-optic device manufacturing method, and electronic apparatus: A mask includes: a base plate having an opening; a chip having an aperture pattern positioned at the opening in the base plate; a plug detachably arranged to the base plate; and a joining member joining the chip and the plug.... Agent: Harness, Dickey & Pierce, P.L.C

20070018266 - Photodetecting device: A method of manufacturing a photodetecting device, by providing a first wafer that includes a photosensitive layer made of a semiconductor material and a second wafer that includes a circuit layer of electronic components, with one of the photosensitive layer or the circuit layer incorporating a field isolation layer; bonding... Agent: Winston & Strawn LLP Patent Department

20070018267 - Anti-blooming storage pixel: Embodiments of the present invention provide pixel cells with increased storage capacity, which are capable of anti-blooming operations. In an exemplary embodiment a pixel cell has an electronic shutter that transfers charge generated by a photo-conversion device to a storage node before further transferring the charge to the pixel cell's... Agent: Dickstein Shapiro LLP

20070018270 - Embedded waveguide detectors: A method of fabricating a detector that involves: forming a trench in a substrate, the substrate having an upper surface; forming a first doped semiconductor layer on the substrate and in the trench; forming a second semiconductor layer on the first doped semiconductor layer and extending into the trench, the... Agent: (bos) Wilmerhale/applied Materials

20070018268 - Monolithically integrated vertical pin photodiode used in bicmos technology: The invention relates to a monolithically integrated vertical pin photodiode which is produced according to BiCMOS technology and comprises a planar surface facing the light and a rear face and anode connections located across p areas on a top face of the photodiode. An i-zone of the pin photodiode is... Agent: Duane Morris, LLPIPDepartment

20070018269 - Raised silicon photodiode: A pinned photodiode that includes a raised silicon epitaxial layer that serves as a passivating layer. This allows the N−region to be near the surface of the silicon substrate, which enhances linkage to the transfer gate. The photodiode comprises an N−region formed within a P-type region of a semiconductor substrate... Agent: Perkins Coie LLP

20070018271 - Split control pad for multiple signal: A control pad is split into two sections for output one of three signals selected from the group consisted of 00, 01, and 11 on an integrated circuit. Each section is internally connected to different voltage sources, say Vdd which represents logical “1”, or Vss which represents logical “0”, so... Agent: Hung Chang Lin

20070018272 - Reduced leakage power devices by inversion layer surface passivation: A semiconductor device is disclosed that includes a contact and an adjacent film on the surface of an underlying doped semiconductor material. The film has sufficient fixed charge to create an inversion layer adjacent the surface of the doped semiconductor material that under depletion conditions at least balances the number... Agent: Summa, Allan & Additon, P.A.

20070018273 - Reduced electric field dmos using self-aligned trench isolation: A method of fabricating an electronic device and the resulting electronic device. The method includes forming a gate oxide on an uppermost side of a silicon-on-insulator substrate; forming a first polysilicon layer over the gate oxide; and forming a first silicon dioxide layer over the first polysilicon layer. A first... Agent: Schneck & Schneck

20070018274 - Semiconductor circuit arrangement and method: One aspect of the present invention relates to a semiconductor circuit arrangement and to a method for producing the latter. One aspect of the invention is that, as a result of a connecting trench structure and an isolation trench structure of a semiconductor circuit being in direct spatial proximity with... Agent: Dicke, Billig & Czaja, P.l.l.c.

20070018276 - Semiconductor device and method of manufacturing the same: A method of manufacturing a semiconductor device that suppresses emergence of a waste in an isolation trench formation process is to be provided. The method comprises forming an isolation trench having a predetermined depth from a surface of a semiconductor substrate; forming a dielectric layer on the surface of the... Agent: Sughrue Mion, PLLC

20070018275 - Semiconductor device with trench structure: A semiconductor device includes a common diffusion structure formed in each region of a substrate in which semiconductor components are formed. The diffusion structures are separated into sections by trenches to form semiconductor components. The trenches define sizes of the semiconductor components and isolate the semiconductor components from the surrounding... Agent: Posz Law Group, PLC

20070018277 - Field effect transistor and semiconductor device: Channel forming sections that are respectively p types and have hexahedral structures are provided in a silicon epitaxial layer of an SOS substrate. Gate oxide films and a gate electrode are provided at both side surfaces of the channel forming sections. Thus, channels can be formed along both side surfaces... Agent: Nixon Peabody, LLP

20070018278 - Semiconductor memory device: The channel regions (T) of the memory cells are directed transversly to the word lines (2), which are arranged parallel at a distance from one another. Local interconnects (6) connect the source/drain regions of the memory cell transistors to bit lines running across the word lines and are connected to... Agent: Slater & Matsil LLP

20070018279 - Protection layer for preventing laser damage on semiconductor devices: A semiconductor structure prevents energy that is used to blow a fuse from causing damage. The semiconductor structure includes a device, guard ring, and at least one protection layer. The device is constructed on the semiconductor substrate underneath the fuse. The seal ring, which surrounds the fuse, is constructed on... Agent: Howard Chen Preston Gates & Ellis LLP

20070018280 - Antifuse structure and system for closing thereof: A structure and method for providing an antifuse which is closed by laser energy with an electrostatic assist. Two or more metal segments are formed over a semiconductor structure with an air gap or a porous dielectric between the metal segments. Pulsed laser energy is applied to one or more... Agent: Ratnerprestia

20070018281 - Packaging chip having inductor therein: A packaging chip having inductors therein. The packaging chip includes a substrate for mounting a circuit element therein, at least one port formed on a surface of the substrate, a sealing portion electrically connected on the substrate to the circuit element and the at least one port, respectively, and a... Agent: Sughrue Mion, PLLC

20070018282 - Semiconductor device and fabrication method thereof: A semiconductor device includes a semiconductor substrate having a plurality of conductive layers. The device further includes buried contacts and buried vias, which connect the interconnect layers respectively. At least one of the contacts and vias is dummy.... Agent: Volentine Francos, & Whitt PLLC

20070018283 - Zener diode: A zener diode, including: a semiconductor substrate; a first region of the first conductivity type formed on the surface of the semiconductor substrate; and a second region of the second conductivity type formed on the surface of the semiconductor substrate and included in the first region; and having a pn... Agent: C. Irvin Mcclelland Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070018284 - Gallium nitride semiconductor substrate and process for producing the same: Dry etching utilizing a halogen plasma is carried out in order to remove the process-transformed layer. The Ga face can be etched off with the halogen plasma. Nevertheless, owing to the dry etching, a problem arises again-surface contamination due to metal particles. To address the problem, wet etching with, as... Agent: Judge & MurakamiIPAssociates

20070018285 - Device containing isolation regions with threading dislocations: An article of manufacture includes a substrate, a relaxed buffer layer disposed on the substrate, and a plurality of isolation regions formed in the relaxed buffer layer. The isolation regions include threading dislocations while the remainder of the relaxed buffer layer is substantially free of threading dislocations. The relaxed buffer... Agent: VistaIPLaw Group LLP

20070018286 - Substrate, lithographic multiple exposure method, machine readable medium: A method for imaging using a lithographic system includes decomposing a desired pattern to be printed on the substrate into at least two constituent sub-patterns that are capable of being optically resolved by the lithographic system, coating a substrate a substrate with a stack of two sacrificial hard masks on... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20070018287 - Electronic device and carrier substrate for same: The electronic device (100) comprises an integrated circuit (10) and a carrier substrate (20) with a bottom and top conductive layer, and is provided with voltage supply, ground and signal transmission connections. In order to enable the use of more than one supply voltage, the integrated circuit (10) is subdivided... Agent: Philips Intellectual Property & Standards

20070018290 - Large die package structures and fabrication method therefor: A method for fabricating large die package structures is provided wherein at least portions of the leadtips of at least a plurality of leadfingers of a leadframe are electrically insulated. A die is positioned on the electrically insulated leadtips. The die is electrically connected to at least a plurality of... Agent: The Law Offices Of Mikio Ishimaru

20070018288 - Packaging for high speed integrated circuits: An integrated circuit package comprises an integrated circuit die comprising a first pad, a second pad adjacent to the first pad, a third pad adjacent to the second pad, and a fourth pad adjacent to the third pad. A lead frame comprising a first lead, a second lead adjacent to... Agent: Harness, Dickey & Pierce P.L.C

20070018289 - Packaging for high speed integrated circuits: A lead frame for an integrated circuit die comprises a first lead, a second lead adjacent to the first lead, a third lead adjacent to the second lead, and a fourth lead adjacent to the third lead. A first end of the fourth lead extends beyond at least one of... Agent: Harness, Dickey & Pierce P.L.C

20070018291 - Semiconductor package without chip carrier and fabrication method thereof: A semiconductor package without a chip carrier includes an insulating structure having an opening; an electroplated die pad provided in the opening; a chip attached to the electroplated die pad by a thermally conductive adhesive; a plurality of electrical contacts formed around the electroplated die pad, wherein at least one... Agent: Birch Stewart Kolasch & Birch

20070018295 - Apparatus for stacking semiconductor chips, method for manufacturing semiconductor package using the same and semiconductor package manufactured thereby: The present invention relates to an apparatus for stacking semiconductor chips, a method for manufacturing a semiconductor package using the same and a semiconductor package manufactured thereby. The apparatus for stacking semiconductor chips may comprise two tables for supporting wafers, a picker for picking up semiconductor chips and a picker... Agent: Marger Johnson & Mccollom, P.C.

20070018292 - Packaging for high speed integrated circuits: An integrated circuit package comprises an integrated circuit die comprising a first pad, a second pad adjacent to the first pad, a third pad adjacent to the second pad, and a fourth pad adjacent to the third pad. A lead frame comprises a first lead, a second lead adjacent to... Agent: Harness, Dickey & Pierce P.L.C

20070018293 - Packaging for high speed integrated circuits: An integrated circuit package comprises an integrated circuit die comprising N adjacent pads, where N is an integer greater than three. A lead frame comprises first, second, third and fourth leads that include first ends that are spaced from the integrated circuit die and second ends that are adjacent to... Agent: Harness, Dickey & Pierce P.L.C

20070018294 - Packaging for high speed integrated circuits: An integrated circuit package comprises an integrated circuit die comprising N pads, where N is an integer greater than one. A lead frame comprising N adjacent leads. N connections individually connect the N leads to the N pads, respectively. A first material comprises an insulating layer and a conductive layer.... Agent: Harness, Dickey & Pierce P.L.C

20070018296 - Stacked semiconductor package having adhesive/spacer structure and insulation: Stacked semiconductor assemblies in which a device such as a die, or a package, or a heat spreader is stacked over a first wire-bonded die. An adhesive/spacer structure is situated between the first wire-bonded die and the device stacked over it, and the device has an electrically non-conductive surface facing... Agent: Haynes Beffel & Wolfeld LLP

20070018297 - High-capacity memory card and method of making the same: A memory card assembly with a simplified structure. The memory card assembly has a memory card assembly a printed wiring board substrate and at least one integrated circuit unit mounted and electrically connected to the printed wiring board substrate. A rigid ring is fitted over a periphery of the printed... Agent: Stetina Brunda Garred & Brucker

20070018300 - Apparatus and method for testing a multi-stack integrated circuit package: Provided is an apparatus and method for a testing multi-stack integrated circuit package. The apparatus may include a vacuum pump and a socket. The socket may include a plurality of internal pins, a plurality of external pins, a socket body, and at least one first air inlet. The plurality of... Agent: Harness, Dickey & Pierce, P.L.C

20070018299 - Memory module with stacked semiconductor devices: Embodiments are described in which a stacked arrangement of integrated circuit packages comprises a dummy substrate comprising an embedded discrete or distributed capacitor connected to first and/or second power voltages, or an embedded termination register connected to one or more clock, control, address, and/or data signals(s).... Agent: Volentine Francos, & Whitt PLLC

20070018298 - Optimized multi-apparation assembly: The invention relates to a microelectronic chip assembly ASS comprising at least three microelectronic chip ICH, TCH, BCH stacked together and on which integrated devices are formed. At least one of the chip, called intermediate chip ICH, includes via holes VH running through said chip ICH and filled with conductive... Agent: Philips Electronics North America Corporation Intellectual Property & Standards

20070018302 - Planar light source device and display device provided with the same: A planar light source includes a first substrate, a second substrate disposed to be spaced apart from the first substrate so as to form a discharge region, a first electrode formed on the first substrate, and a second electrode formed on the second substrate. The planar light source further includes... Agent: F. Chau & Associates, LLC

20070018301 - Semiconductor device and method of manufacturing the same: A semiconductor device including a package (2) having a plurality of wall portions (9a) and a plurality of conductor portions (4), a semiconductor element such as a solid-state image pickup device (1) mounted in an internal space of the base, thin metal wires (5) electrically connecting the semiconductor element and... Agent: Steptoe & Johnson LLP

20070018303 - Stack package made of chip scale packages: A stack package of the present invention is made by stacking at least two area array type chip scale packages. Each chip scale package of an adjacent pair of chip scale packages is attached to the other in a manner that the ball land pads of the upper stacked chip... Agent: Marger Johnson & Mccollom, P.C.

20070018304 - Composite metal column for mounting semiconductor device: An integrated circuit chip which has a plurality of pads and non-reflowable contact members to be connected by reflow attachment to external parts. Each of these contact members has a height-to-diameter ratio and uniform diameter favorable for absorbing strain under thermo-mechanical stress. The members have a solderable surface on each... Agent: Texas Instruments Incorporated

20070018305 - Packaging for high speed integrated circuits: An integrated circuit package comprises an integrated circuit die comprising N adjacent pads, where N is an integer greater than three. A substrate comprises a first pair of traces including first and second traces and a second pair of traces including third and fourth traces. The first, second, third and... Agent: Harness, Dickey & Pierce P.L.C

20070018306 - Semiconductor device and method of manufacturing the same: A method of manufacturing a semiconductor device, including: providing a semiconductor substrate which has a plurality of electrodes and in which a depression is formed on a side on which the electrodes are formed; forming a resin protrusion on the semiconductor substrate so that part of the resin protrusion is... Agent: Oliff & Berridge, PLC

20070018307 - Integrated circuit chip module: An integrated circuit chip module includes a first integrated circuit chip including a first power source pad for a first power voltage and an adjacent second power source pad for a second power voltage, the first power voltage being higher than the second power voltage, a second integrated circuit chip... Agent: Leydig Voit & Mayer, Ltd

20070018308 - Electronic component and electronic configuration: An electronic component includes a substrate with outer contact areas including copper. Lead-free solder bumps are disposed on the outer contact areas of the electronic component. An electronic configuration includes an electronic component and a printed circuit board. The electronic component is mounted on the printed circuit board by lead-free... Agent: Edell, Shapiro & Finnan, LLC

20070018309 - Image sensor package, optical glass used therein, and processing method of the optical glass: An image sensor package, optical glass used therein, and a processing method of the optical glass are provided. The method includes defining a plurality of cutting paths on a piece of optical glass; grinding the piece of optical glass at the cutting paths to form a rough surface on each... Agent: Edwards & Angell, LLP

20070018310 - Semiconductor device and manufacturing method thereof: In a semiconductor device, a semiconductor element is mounted on a package substrate, and a heat dissipating member is laid above the semiconductor element and the package thereby sealing the semiconductor element. Resin is filled into the space defined by the semiconductor element, the package substrate, and the heat dissipating... Agent: Armstrong, Kratz, Quintos, Hanson & Brooks, LLP

20070018311 - Circuit board and light souce device having same: A circuit board comprises a substrate, a plurality of circuit islands, and a plurality of trenches. The circuit islands are formed on the substrate configured for mounting heat-generating devices thereon. The trenches are defined in the substrate configured for increasing a heat dissipation surface area of the substrate. Each of... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang Jeffrey T. Knapp

20070018312 - Wiring substrate and semiconductor package implementing the same: A wiring substrate may have a first surface including a chip mounting pad, and a second surface opposite to the first surface. A heat radiating layer may be provided on the second surface of the wiring substrate. A plurality of heat conducting elements may connect the chip mounting pad to... Agent: Harness, Dickey & Pierce, P.L.C

20070018313 - Electronic parts packaging structure and method of manufacturing the same: In an electronic parts packaging structure of the present invention constructed by stacking a plurality of sheet-like units in a thickness direction, each of the units includes a first insulating layer, wirings formed on one surface of the first insulating layer, a semiconductor chip (electronic parts) connected to the wirings,... Agent: Armstrong, Kratz, Quintos, Hanson & Brooks, LLP

20070018314 - Semiconductor chip package and fabrication method thereof: A semiconductor chip package includes a first semiconductor chip, that is an MEMS chip having a movable structure. The movable structure has a movable section. The first semiconductor chip includes a plurality of first electrode pads, and a first sealing section. The first sealing section is a closed loop formed... Agent: Rabin & Berdo, PC

20070018315 - Conductive adhesive composition: A conductive adhesive composition includes a cross-linkable, adhesive component, a fluxing agent, and a conductive metal that has a surface on which is present a metal oxide. The adhesive component includes an epoxy resin and the fluxing agent includes a phenol. The phenol is reactive with the metal oxide on... Agent: Howard & Howard Attorneys, P.C.

20070018316 - Electrode, method for producing same and semiconductor device using same: There is provided a technology for obtaining an electrode having a low contact resistance and less surface roughness. There is provided an electrode comprising a semiconductor film 101, and a first metal layer 102 and a second metal layer 103 sequentially stacked in this order on the semiconductor film 101,... Agent: Foley And Lardner LLP Suite 500

20070018317 - Semiconductor device: A semiconductor device, including: a semiconductor layer having an active region; a first conductive layer formed above the semiconductor layer and having a first width; a second conductive layer connected to the first conductive layer and having a second width smaller than the first width; an interlayer dielectric formed above... Agent: Harness, Dickey & Pierce, P.L.C

20070018319 - Ball grid array package and substrate within: A ball grid array (BGA) package includes a substrate and a chip. A bottom surface of the substrate includes a central area and a marginal area. Several source balls are disposed in the central area. Several ball groups are disposed in the marginal area. Each ball group includes one ground... Agent: Birch Stewart Kolasch & Birch

20070018318 - Means of integrating a microphone in a standard integrated circuit process: A means of integrating a microphone on the same integrated circuit die as other electronics in the system is disclosed. The structure is based on using solder bump technology to form a gap between an electrode on the silicon and another electrode. Charge is stored on the capacitor so when... Agent: Douglas G. Marsh

20070018321 - Multi-component integrated circuit contacts: An integrated circuit connection is describe that includes a first, securing member and a second, connection member. The first member, in an embodiment, is a spike that has a portion of its body fixed in a layer of an integrated circuit structure and extends outwardly from the integrated circuit structure.... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070018320 - Semiconductor chip production method, semiconductor device production method, semiconductor chip, and semiconductor device: A semiconductor chip production method including the steps of: forming a front side recess in a semiconductor substrate; depositing a metal material in the front side recess to form a front side electrode electrically connected to a functional device formed on the front surface; removing a rear surface portion of... Agent: Rabin & Berdo, PC

20070018323 - Reduced inductance in ball grid array packages: Techniques are described for reducing inductance in ball grid array (BGA) packages for integrated circuits (ICs). The BGA package comprises a set of contacts disposed near an outer edge of the BGA package that receives signal lines and isolated power and ground lines. One area of excess parasitic inductance within... Agent: Shumaker & Sieffert, P. A.

20070018322 - Wafer level package and its manufacturing method: A semiconductor package includes a semiconductor die having a plurality of bond pads, a first protective layer formed at the periphery of the bond pads of the semiconductor die, UBM (Under Bump Metals) formed at the bond pads of the semiconductor die, a plurality of solder balls wetted to the... Agent: Serge J. Hodgson Gunnison, Mckay & Hodgson, L.L.P.

20070018324 - Wafer-level-chip-scale package and method of fabrication: A wafer-level-chip-scale package and related method of fabrication are disclosed. The wafer-level-chip-scale package comprises a semiconductor substrate comprising an integrated circuit, a conductive ball disposed on the semiconductor substrate and electrically connected to the integrated circuit, and a protective portion formed from an insulating material and disposed on bottom and... Agent: Volentine Francos, & Whitt PLLC

20070018326 - Semiconductor device: A semiconductor device 1 includes a semiconductor substrate 10, insulating interlayer group 20 (first insulating interlayer group), insulating interlayer group 30 (second insulating interlayer group), and seal ring 40 (guard ring). The insulating interlayer group 20 is formed on the semiconductor substrate 10. The insulating interlayer group 30 is formed... Agent: Young & Thompson

20070018325 - Semiconductor device and method for fabricating the same: The semiconductor device includes an upper electrode line structure and a lower electrode line structure provided over a semiconductor substrate. The semiconductor device also includes a guard contact having a first portion and a second portion. The guard contact is disposed between the upper electrode line structure and the lower... Agent: Townsend And Townsend And Crew, LLP

20070018327 - Semiconductor integrated circuit device and process for manufacturing the same: In the manufacture of a semiconductor device having a high-performance and high-reliability, a silicon nitride film 17 for self alignment, which film is formed to cover the gate electrode of a MISFET, is formed at a substrate temperature of 400° C. or greater by plasma CVD using a raw material... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070018329 - Interconnection having dual-level or multi-level capping layer and method of forming the same: An interconnection having a dual-level and multi-level capping layer and a method of forming the same. The interconnection may include an interlayer dielectric layer with a groove formed therein, a metal layer formed within the groove, a metal compound layer on the metal layer, a first barrier layer on the... Agent: Harness, Dickey & Pierce, P.L.C

20070018328 - Piezoelectric stress liner for bulk and soi: A preferred embodiment of the invention provides a semiconductor device. A preferred device comprises an n-channel transistor and a p-channel transistor disposed in a semiconductor body and a piezoelectric layer overlying the n-channel transistor and the p-channel transistor. In a preferred embodiment of the invention, the piezoelectric layer is biased... Agent: Slater & Matsil LLP

20070018330 - Semiconductor device and method of manufacturing the same: A semiconductor device according to this invention comprises a substrate 100 in which semiconductor elements are formed, a first conductor 301 at least a portion of the peripheral surface of which is made of a material comprising copper as a main ingredient, and a first insulative diffusion barrier layer 203... Agent: Reed Smith LLP

20070018331 - Dummy structures extending from seal ring into active circuit area of integrated circuit chip: An integrated circuit chip is provided, which includes an active circuit area, a seal ring structure, and a first dummy structure. The seal ring structure is formed at least partially around the active circuit area. The first dummy structure extends from the seal ring structure into the active circuit area.... Agent: Slater & Matsil, L.L.P.

20070018332 - Semiconductor device and method of manufacturing the same: The method of manufacturing a semiconductor device according to the present invention includes: forming an interconnect trench in an insulating film formed on a semiconductor substrate (S100) ; forming a barrier metal layer on the whole surface of the insulating film (S102); forming a copper layer on the whole surface... Agent: Young & Thompson

20070018333 - Semiconductor packaging device and manufacture thereof: A semiconductor packaging device comprises a carrier having at least a cavity/a slot thereon, at least a chip has a back surface and an active surface w