Active solid-state devices (e.g., transistors, solid-state diodes) inventions 10/06

20060237705 - Method and related apparatus for calibrating signal driving parameters between chips: A calibrating method for adjusting related parameters when a first chip and a second chip switch signals is disclosed. The calibrating method includes: utilizing the first chip to output a test signal through using a first driving force in order to represent a test value; utilizing the second chip to...

20060237706 - Non-volatile semiconductor memory and method for controlling a non-volatile semiconductor memory: A non-volatile semiconductor memory including a plurality of memory cell transistors, each of the plurality of memory cell transistors includes: a source region having a first conductivity type and in contact with a buried insulating layer on a supporting substrate; a drain-region having the first conductivity type and in contact...

20060237707 - Memory array for increased bit density and method of forming the same: A memory array having a plurality of resistance variable memory units and method for forming the same are provided. Each memory unit includes a first electrode, a resistance variable material over the first electrode, and a first second-electrode over the resistance variable material. The first second-electrode is associated with the...

20060237708 - Semiconductor carbon nanotubes fabricated by hydrogen functionalization and method for fabricating the same: Semiconductor carbon nanotubes functionalized by hydrogen and a method for fabricating the same, wherein the functional hydrogenated semiconductor carbon nanotubes have chemical bonds between carbon and hydrogen atoms. The semiconductor carbon nanotube fabricating method includes heating carbon nanotubes in a vacuum, dissociating hydrogen molecules in hydrogen gas into hydrogen atoms,...

20060237709 - Gan-based compound semiconductor device: A gallium nitride (GaN)-based compound semiconductor device having a structure improving a surface characteristic of a thin film growing on a substrate is provided. The GaN-based compound semiconductor device includes an AlxInyGa1-x-yN substrate (0≦x≦1, 0≦y≦1, and 0≦x+y≦1) whose surface inclines toward a predetermined direction at an off-angle of greater than...

20060237710 - Semiconductor optical device: Since the semiconductor devices including a stacked structure of group-III-V alloy semiconductor layers different in the kind of group-V constituent atom form the so-called band line-up of type II, band discontinuity in the heterostructure has impeded smooth transport of carriers and deteriorated device characteristics. According to the present invention, an...

20060237711 - Field-effect transistor: A nitride-based group III-V compound semiconductor device includes a buffer layer, a first nitride semiconductor layer and a second nitride semiconductor layer successively stacked on a substrate, the first and the second nitride layers having their respective lattice constants a1 and a2 in the relation a1>a2, an ohmic source electrode...

20060237713 - Color organic electroluminescent display and method for fabricating the same: A method of fabricating a color organic electroluminescent display involves forming cathode electrodes on a substrate, and forming a first organic semiconductor layer having an electron-injection transporting property on the cathode electrodes. Solutions containing organic light-emitting material that can dissolve portions of the first organic semiconductor layer are patterned on...

20060237716 - Material and cell structure for storage applications: The present invention relates to compositions for storage applications, relates to a memory cell which comprises the abovementioned composition and two electrodes and furthermore relates to a process for the production of microelectronic components and the use of the composition according to the invention in the production of these microelectronic...

20060237712 - N,n'-di(arylalkyl)-substituted naphthalene-based tetracarboxylic diimide compounds as n-type semiconductor materials for thin film transistors: A thin film transistor comprises a layer of organic semiconductor material comprising a tetracarboxylic diimide naphthalene-based compound having, attached to each of the imide nitrogen atoms, a substituted or unsubstituted arylalkyl moiety. Such transistors can further comprise spaced apart first and second contact means or electrodes in contact with said...

20060237714 - Organic metal compounds in which compounds for host and compounds for dopant are connected, organic electroluminesence display devices using the compounds and method for preparation of the devices: The present embodiments relate to organic metal compounds in which compounds for host and compounds for dopant are connected, organic electroluminescence display devices using the compounds and a method for preparation of the devices. More precisely, the present embodiments relate to organic metal compounds in which compounds for host and...

20060237715 - Organic metal compounds in which compounds for host and compounds for dopant are connected, organic electroluminesence display devices using the compounds and method for preparation of the devices: The present embodiments relate to organic metal compounds in which compounds for host and compounds for dopant are connected, organic electroluminescence display devices using the compounds and a method for preparation of the devices. More precisely, the present embodiments relate to organic metal compounds in which the compounds for host...

20060237717 - Organic polymers, electronic devices, and methods: wherein: each R1 is independently H, an aryl group, Cl, Br, I, or an organic group that includes a crosslinkable group; each R2 is independently H, an aryl group or R4; each R3 is independently H or methyl; each R5 is independently an alkyl group, a halogen, or R4; each...

20060237718 - Valatime copper (ii) complexes and reducing agents for deposition of copper films by atomic layer deposition: The present invention relates to novel 1,3-diimine copper complexes and the use of 1,3-diimine copper complexes for the deposition of copper on substrates or in or on porous solids in an Atomic Layer Deposition process....

20060237719 - Electronic components: A method of manufacturing an electronic component comprising at least one n- or p-doped portion, comprising the steps of: co-depositing inorganic semi-conducting nanoparticles and dopant on a substrate, the nanoparticles being a group four element such as silicon or germanium; fusing the nanoparticles by heating to form a continuous layer;...

20060237720 - Active matrix substrate and liquid crystal display device, production methods thereof and electronic device: A layer stack including an operating semiconductor layer and a low resistance semiconductor layer is patterned by using a first mask pattern so as to have an insular shape and then a circumferential sidewall of the layer stack whose top surface is covered by the first mask pattern is oxidized...

20060237723 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a stopper film formed so as to cover an element formation region and an element isolation region, an interlayer insulating film formed on the stopper film, a contact hole formed in the element formation region so as to extend through the interlayer insulating film and the...

20060237722 - Solid state imaging device: A solid state imaging device includes: a plurality of photoelectric conversion elements which are arranged in a two-dimensional matrix on a semiconductor chip; vertical transfer registers including a vertical transfer channel and vertical transfer electrodes, respectively, for transferring signal charge read out of the photoelectric conversion elements in the vertical...

20060237721 - Solid-state image pickup device, driving method for solid-state image pickup device, and image pickup apparatus: A solid-state image pickup device includes a pixel array area in which pixels each including a photoelectric conversion element are two-dimensionally arranged; first control means for performing control such that signals of pixels in a desired region of the pixel array area are sequentially read row by row; and second...

20060237725 - Semiconductor devices having thin film transistors and methods of fabricating the same: Semiconductor devices having thin film transistors (TFTs) and methods of fabricating the same are provided. The semiconductor devices include a semiconductor substrate and a lower interlayer insulating layer disposed on the semiconductor substrate. A lower semiconductor body disposed on or in the lower interlayer insulating layer. A lower TFT includes...

20060237724 - Thin film transistor and method of forming the same: A thin film transistor including a gate, a gate insulating layer, a semiconductor layer and a soruce/drain is provided. The gate is disposed over a substrate, wherein the gate comprises at least one layer of aluminum-yttrium alloy nitride. The gate insulating layer is formed over the substrate to cover the...

20060237727 - Display device and semiconductor device: A display device of high definition, multiple colors and low power consumption includes a display panel having a pixel section in which pixels are arrayed in the form of a matrix at the cross points of a plurality of data lines and a plurality of scanning lines, a scanning circuit...

20060237726 - Semiconductor device: Decoupling capacitors DM1 and DM2 are connected between the source line connected to the pad for high-speed circuits which supplies electric power to circuit block C1, and the ground line connected to a ground pad, and the capacitor array for high-speed circuits is formed. A plurality of decoupling capacitor DM1...

20060237728 - Silicon carbide power devices with self-aligned source and well regions: Silicon carbide semiconductor devices and methods of fabricating silicon carbide semiconductor devices are provided by successively etching a mask layer to provide windows for formation of a source region of a first conductivity type, a buried silicon carbide region of a second conductivity type opposite to the first conductivity type...

20060237729 - Light emission from semiconductor integrated circuits: Structures and methods to inject electrons into an insulator from a semiconductor layer that are then collected in a thin layer of a direct semiconductor material which in turn emits light by bandgap recombination....

20060237730 - Peltier cooler with integrated electronic device(s): A Peltier effect cooling device is formed in combination with an electronic device to form a unique thermal and electrical relationship. An electronic device to be cooled is placed in a serial electrical relationship between at least two thermoelectric couples while simultaneously being in thermal contact with a cold side...

20060237731 - Semiconductor element, organic transistor, light-emitting device, and electronic device: It is an object of the present invention to provide an organic transistor having a low drive voltage. It is also another object of the present invention to provide an organic transistor, in which light emission can be obtained, which can be manufactured simply and easily. According to an organic...

20060237732 - Light-emitting device, method for making the same, and nitride semiconductor substrate: A light-emitting device is presented which includes a GaN substrate 1; an n-type nitride semiconductor substrate layer (n-type AlxGa1-xN layer 3) disposed on a first main surface side of the GaN substrate 1; a p-type nitride semiconductor substrate layer (p-type AlxGa1-xN layer 5) disposed further away from the GaN substrate...

20060237733 - Light emitting device: A light emitting device includes an active layer, having a multiple quantum well structure, sandwiched between an n-type semiconductor layer and a p-type semiconductor layer. The active layer includes first and second well layers made of a nitride compound semiconductor containing In, where the second well layer emits light having...

20060237735 - High-efficiency light extraction structures and methods for solid-state lighting: A soft solder flowing into the recesses of a semiconductor thin film LED provides: (a) increased bonding strength and better mechanical durability, (b) improved heat dissipation, (c) enhanced light extraction when the LED film is bonded to a new carrier. Annealing localized islands of absorbing metal creates an ohmic contact....

20060237738 - Led lamps: A high power LED lamp has a GaN chip placed over an AlGaInP chip. A reflector is placed between the two chips. Each of the chips has trenches diverting light for output. The chip pair can be arranged to produce white light having a spectral distribution in the red to...

20060237737 - Light emitting diode and backlight module having light emitting diode: The present invention relates to a light emitting diode comprising a blue die and a fluorescent material layer. The blue die is used for generating blue light when being activated. The fluorescent material layer is used for generating yellow light when being activated. The light emitting diode further comprises a...

20060237739 - Light-emitting device and illuminator: A light-emitting device, having high light extraction efficiency, capable of obtaining diffused light is obtained. This light-emitting device comprises a light-emitting diode, a portion, formed on a plane substantially parallel to a light-emitting surface of the light-emitting diode, having a dielectric constant periodically modulated with respect to the in-plane direction...

20060237736 - Light-emitting diode and method for improving emitting directivity of light-emitting chip: A light-emitting diode (20) includes: a first electrode (202) with a supporting portion (201); a second electrode (203) opposite to the first electrode; a light-emitting chip (204) on the supporting portion, the light-emitting chip is electrically connected to the first electrode and the second electrode; and a cover (205) has...

20060237734 - Thin-layer light-emitting diode chip and method for the production thereof: A thin-layer LED chip (5) is claimed, comprising an epitaxial layer sequence (6) that is disposed on a carrier element (2) and contains an electromagnetic-radiation-generating active region (8), and a reflective layer (3) that is disposed on a principal surface of the epitaxial layer sequence (6) facing toward the carrier...

20060237741 - Light-emitting diode and method for production thereof: An LED (10) includes a compound semiconductor layer (13) that contains a light-emitting part and an alkali glass substrate (150) that contains at least 1 mass % of one element selected from sodium, calcium, barium and potassium and is transparent to light-emitting wavelength of the part. The substrate is fixed...

20060237740 - Mbe growth of an algan layer or algan multilayer structure: A method of growing an AlGaN semiconductor layer structure by Molecular Beam Epitaxy comprises supplying ammonia, gallium and aluminium to a growth chamber thereby to grow a first (Al,Ga)N layer by MBE over a substrate disposed in the growth chamber. The first (Al,Ga)N layer has a non-zero aluminium mole fraction....

20060237742 - Power control center with solid state device for controlling power transmission: An automotive power control center that includes a housing, a first conductor coupled to the housing, a second conductor, a control circuit, which is coupled to the housing, and a semiconductor. The second conductor is coupled to the housing and insulated from the first conductor. The solid-state device includes a...

20060237743 - Heterojunction bipolar transistor and method for fabricating the same: On a high-concentration n-type first sub-collector layer, a high-concentration n-type second sub-collector layer made of a material having a small bandgap, an i-type or low-concentration n-type collector layer, a high-concentration p-type base layer, an n-type emitter layer made of a material having a large bandgap, a high-concentration n-type emitter cap...

20060237744 - Formation of highly dislocation free compound semiconductor on a lattice mismatched substrate: A highly dislocation free compound semiconductor, e.g. AlxInyGa1-x-yN (0≦x, y≦1), is formed on a lattice mismatched substrate, e.g. Si, by first depositing a polycrystalline buffer layer on the substrate. A defective layer is then created at or near the interface of the substrate and the polycrystalline buffer layer, e.g. through...

20060237745 - Super lattice modification of overlying transistor: The invention provides a device having a substrate, a buffer region positioned upon the substrate, wherein the buffer region has an upper buffer region and a lower buffer region, a heterojunction region positioned upon the buffer region, and a superlattice positioned between the lower buffer region and the upper buffer...

20060237746 - Gesoi transistor with low junction current and low junction capacitance and method for making the same: A semiconductor device (101) is provided herein which comprises a substrate (103) comprising germanium. The substrate has source (107) and drain (109) regions defined therein. A barrier layer (111) comprising a first material that has a higher bandgap (Eg) than germanium is disposed at the boundary of at least one...

20060237747 - Heterojunction bipolar transistor and amplifier including the same: An N-type collector layer is partially formed on an N+-type collector contact layer. The N-type collector layer includes a second N-type collector layer that is partially formed on the N+-type collector contact layer and relatively hard to deplete, and a first N-type collector layer that is formed on the whole...

20060237748 - Semiconductor device and method of manufacturing the same: A semiconductor device according to an embodiment of the invention includes: at least a first power supply system and a second power supply system; an input/output circuit capable of controlling an current for an input or output signal; a control signal input circuit that is provided to the first power...

20060237749 - Nanoscopic wire-based devices and arrays: Electrical devices comprised of nanoscopic wires are described, along with methods of their manufacture and use. The nanoscopic wires can be nanotubes, preferably single-walled carbon nanotubes. They can be arranged in crossbar arrays using chemically patterned surfaces for direction, via chemical vapor deposition. Chemical vapor deposition also can be used...

20060237750 - Field effect transistor structures: An embodiment of the present invention provides a structure comprising a field effect transistor (FET) comprising: at least one source rail with at least one source finger; at least one drain rail with at least one drain finger; and at least one serpentine gate having a plurality of gate fingers,...

20060237751 - Image pickup device, image pickup unit and image pickup apparatus: An image pickup device wherein the range in the amount of incident light (dynamic range) for obtaining an appropriate image can be expanded, and shutter and aperture functions are provided. A light shielding element for light shielding a photoelectric conversion section and an actuator for driving the light shielding element...

20060237752 - Schottky barrier mosfet device and circuit: A Schottky barrier integrated circuit is disclosed, the circuit having at least one PMOS device or at least one NMOS device, at least one of the PMOS device or NMOS device having metal source-drain contacts forming Schottky barrier or Schottky-like contacts to the semiconductor substrate. The device provides a lower...

20060237753 - Semiconductor device and method for manufacturing the same: A field effect transistor according to the present invention includes a channel layer formed above a semi-insulating substrate, a Schottky layer formed above the channel layer, a gate electrode formed on the Schottky layer, Ohmic contact layers that are located above the Schottky layer with the gate electrode interposed therebetween...

20060237754 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a semiconductor substrate having a plurality of trenches, a plurality of element isolation regions formed by burying an element isolation insulating film in the trenches, a gate insulating film formed in an element formation region defined between the element isolation regions on the semiconductor substrate, and...

20060237755 - Method for automated testing of the modulation transfer function in image sensors: A method for automatically measuring the modulation transfer function of an imager is disclosed. A opaque mask is placed over selected columns and rows of the imager during fabrication. In the course of an automated process, photons are uniformly shone over the image sensor. The amount of the input signal...

20060237756 - Phase change memory devices and their methods of fabrication: In an embodiment, a phase change memory device includes a semiconductor substrate of a first conductivity type and a first interlayer insulating layer disposed on the semiconductor substrate. A hole penetrates the first interlayer insulating layer. A first and a second semiconductor pattern are sequentially stacked in a lower region...

20060237758 - Semiconductor device: A semiconductor device includes a plurality of first active areas arranged in a first area including a first sub area, a second sub area located adjacent to the first sub area in a first direction, and a third sub area adjacent to the first sub area in a second direction...

20060237757 - Semiconductor device and method for manufacturing the same: A semiconductor device includes: a semiconductor region; a plurality of bit line diffusion layers formed in an upper portion of the semiconductor region and each extending in a row direction; a plurality of bit line insulating films formed on the bit line diffusion layers; a plurality of gate insulting films...

20060237759 - Semiconductor device manufacturing method and semiconductor device: A technique is provided which makes it possible to achieve both of a reduction in contact resistance in a memory device and a reduction in contact resistance in a logic device even when oxidation is performed during formation of dielectric films of capacitors. Conductive barrier layers (82) are provided in...

20060237760 - Thin-film capacitative element and electronic circuit and electronic equipment including the same: A thin film capacitive element according to the present invention includes between a first electrode layer and a second electrode layer a dielectric layer formed of a dielectric material containing a bismuth layer structured compound having a composition represented by the stoichiometric compositional formula: (Bi2O2)2+ (Am−1BmO3m+1)2−, where a symbol m...

20060237763 - Electronic systems: The invention includes a method of forming a rugged semiconductor-containing surface. A first semiconductor layer is formed over a substrate, and a second semiconductor layer is formed over the first semiconductor layer. Subsequently, a third semiconductor layer is formed over the second semiconductor layer, and semiconductor-containing seeds are formed over...

20060237761 - Non-volatile memory, fabrication method thereof and operation method thereof: A method of fabrication a non-volatile memory is provided. A stacked structure is formed on a substrate, the stacked structure including a gate dielectric layer and a control gate. Then, a first dielectric layer, a second dielectric layer and a third dielectric layer are respectively formed on the top and...

20060237762 - Semiconductor device and method of manufacturing the semiconductor device: A semiconductor device has a stabilizing member that encloses an upper portion of a storage electrode to improve structural stability. A dielectric layer and a plate electrode are successively formed on the storage electrode including a stabilizing member. Since the stabilizing member includes a protruding portion to support the storage...

20060237764 - Lanthanide doped tiox dielectric films: A dielectric film containing lanthanide doped TiOx and a method of fabricating such a dielectric film produce a reliable dielectric layer having an equivalent oxide thickness thinner than attainable using SiO2. The lanthanide doped TiOx dielectric layer is arranged as a layered structure of one or more monolayers of the...

20060237765 - Eeprom and method of manufacturing the same: An EEPROM includes a substrate, a first semiconductor layer and a second semiconductor layer formed on the substrate. The first semiconductor layer is isolated from the second semiconductor layer by a trench. A first source and a first drain are located at two opposing sides of the first semiconductor layer....

20060237768 - Programmable array logic or memory with p-channel devices and asymmetrical tunnel barriers: Structures and methods for programmable array type logic and/or memory with p-channel devices and asymmetrical low tunnel barrier intergate insulators are provided. The programmable array type logic and/or memory devices include p-channel non-volatile memory which has a first source/drain region and a second source/drain region separated by a p-type channel...

20060237766 - Semiconductor device using solid phase epitaxy and method for fabricating the same: A semiconductor device includes an epitaxial layer using a solid phase epitaxy (SPE) process; a first metal layer on the epitaxial layer; a nitride-based barrier metal layer on the first metal layer; a second metal layer on the barrier metal layer; and a metal silicide layer formed between the epitaxial...

20060237767 - Semiconductor device with double barrier film: A semiconductor device comprising a first insulation layer, a second insulation layer, a first barrier film, a second barrier film, a diffusion layer. The device further comprises an upper contact hole, a lower contact hole, and a contact plug. The upper contact hole penetrates the second insulation layer and has...

20060237774 - Backgated finfet having different oxide thicknesses: A method of producing a backgated FinFET having different dielectric layer thickness on the front and back gate sides includes steps of introducing impurities into at least one side of a fin of a FinFET to enable formation of dielectric layers with different thicknesses. The impurity, which may be introduced...

20060237771 - Flash memory device having a graded composition, high dielectric constant gate insulator: A graded composition, high dielectric constant gate insulator is formed between a substrate and floating gate in a flash memory cell transistor. The gate insulator is comprised of amorphous germanium or a graded composition of germanium carbide and silicon carbide. If the composition of the gate insulator is closer to...

20060237769 - Floating gate isolation and method of making the same: The present invention relates to a method for forming a set of floating gates which are isolated from each other by means of slits, as well as semiconductor devices using the floating gate. The present invention provides a method for manufacturing an array of semiconductor devices on a substrate (10),...

20060237776 - High density stepped, non-planar flash memory: A first plurality of memory cells is in a first plane in a first column of the array. A second plurality of memory cells is in a second plane in the same column. The second plurality of memory cells are coupled to the first plurality of memory cells through a...

20060237775 - Memory device with high dielectric constant gate dielectrics and metal floating gates: A memory cell transistor includes a high dielectric constant tunnel insulator, a metal floating gate, and a high dielectric constant inter-gate insulator comprising a metal oxide formed over a substrate. The tunnel insulator and inter-gate insulator have dielectric constants that are greater than silicon dioxide. Each memory cell has a...

20060237772 - Method of manufacturing flash memory device: An embodiment of the present invention relates to a method of manufacturing a flash memory device. The method includes sequentially forming a tunnel oxide film, an oxide film, and a first conductive layer on a semiconductor substrate, infiltrating a first etchant between grains of the first conductive layer to form...

20060237773 - Semiconductor device with reconfigurable logic: A semiconductor device includes multiple transistors (70, 75, 80, 85), each of the transistors (70, 75, 80, 85) including a gate electrode (18) formed above a semiconductor substrate (30), source/drain regions (10, 12, 14, 16) formed on both sides of the gate electrode (18), and a charge storage layer (38)...

20060237770 - Semiconductor flash device: A flash memory device includes a floating gate made of a multi-layered structure. The floating gate includes a hetero-pn junction which serves as a quantum well to store charge in the floating gate, thus increasing the efficiency of the device, allowing the device to be operable using lower voltages and...

20060237777 - Multi-bit non-volatile memory device having a dual-gate and method of manufacturing the same, and method of multi-bit cell operation: The present invention relates to a multi-bit non-volatile memory device having a dual gate employing local charge trap and method of manufacturing the same, and an operating method for a multi-bit cell operation....

20060237778 - Non-volatile semiconductor memory cell and method of manufacturing the same: A non-volatile memory cell. The non-volatile memory cell comprises a substrate with a first conductive type, a gate structure, at least two source/drain regions with a second conductive type and a buried channel region with the second conductive type. The gate structure is located on the substrate, and the source/drain...

20060237779 - Semiconductor device and fabrication method therefor: A semiconductor device includes an ONO film (17) formed on a semiconductor substrate (15), a first gate (14), the first gate (14) formed on the ONO film (17), a source (10) and a drain (12) provided at both sides of the first gate (14) to face each other, and a...

20060237782 - Power semiconductor device with l-shaped source region: A power semiconductor device includes a substrate, a well region, a body region, a trench gate, a gate oxide layer, an L-shaped source region, an inter-layer dielectric layer and a metal layer. The body region is formed on the well region. The trench gate is formed at bilateral sides of...

20060237783 - Semiconductor device having a recess channel and method for fabricating the same: Provided is a semiconductor device having recess channel, comprising a semiconductor substrate having first and second trenches disposed to cross each other on both sides of an active region among adjoining regions between an active region and element-isolation films; a gate insulation film disposed on the semiconductor substrate of the...

20060237780 - Semiconductor device having screening electrode and method: In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a screening electrode spaced apart from a channel region....

20060237781 - Structure and method for forming trench gate fets with reduced gate to drain charge: a field effect transistor includes a trench extending into a semiconductor region. The trench has a gate dielectric lining the trench sidewalls and a gate electrode therein. A channel region in the semiconductor region extends along a sidewall of the trench. The gate dielectric has a non-uniform thickness such that...

20060237784 - Method and apparatus with varying gate oxide thickness: An integrated circuit having an enhanced on-off swing for pass gate transistors is provided. The integrated circuit includes a core region that includes core transistors and pass gate transistors. The core transistors have a gate oxide associated with a first thickness, the pass transistors having a gate oxide associated with...

20060237785 - Strained complementary metal oxide semiconductor (cmos) on rotated wafers and methods thereof: The present invention provides CMOS structures including at least one strained pFET that is located on a rotated semiconductor substrate to improve the device performance. Specifically, the present invention utilizes a Si-containing semiconductor substrate having a (100) crystal orientation in which the substrate is rotated by about 45° such that...

20060237786 - Power semiconductor device: A power semiconductor device according to the present invention comprises: a first conductive type base layer; a second conductive type base layer selectively formed on the first conductive type base layer; an insulation layer formed in the region on the first conductive type base layer on which the second conductive...

20060237787 - Semiconductor device and a method of manufacturing the same: In a technique to improve the high-frequency power gain of an LDMOS, the distance from the surface of a passivation film covering electrode pads to the rear surface of a silicon substrate is set into 200 μm or less, or a trench of 2 μm or more in thickness, in...

20060237788 - Semiconductor device and its fabrication method: A semiconductor device has a semiconductor substrate, a first MOSFET which has a first gate insulating film made of a high dielectric material formed above the semiconductor substrate and a first gate electrode formed above the first gate insulating film, an insulating film which is formed directly on sidewalls of...

20060237790 - Structure and method for manufacturing planar soi substrate with multiple orientations: The present invention provides a method of forming a substantially planar SOI substrate having multiple crystallographic orientations including the steps of providing a multiple orientation surface atop a single orientation layer, the multiple orientation surface comprising a first device region contacting and having a same crystal orientation as the single...

20060237789 - Thin film transistor (tft) and flat panel display including the tft: A Thin Film Transistor (TFT) that can reduce leakage current and can prevent crosstalk between adjacent TFTs includes: a substrate; a gate electrode disposed on the substrate; a source electrode and a drain electrode separated from each other and insulated from the gate electrode; and a semiconductor layer which is...

20060237791 - Ultra thin body fully-depleted soi mosfets: A method of creating ultra thin body fully-depleted SOI MOSFETs in which the SOI thickness changes with gate-length variations thereby minimizing the threshold voltage variations that are typically caused by SOI thickness and gate-length variations is provided. The method of present invention uses a replacement gate process in which nitrogen...

20060237792 - Electrostatic discharge protection device: An electrostatic discharge (ESD) protection device includes a first-type substrate, a second-type well formed in the substrate and a first-type well formed in the substrate. The second-type well includes a second-type+ region formed between first and second first-type+ regions. The first-type well is formed in the substrate adjacent a first...

20060237793 - Igbt with injection regions between mosfet cells: A cellular MOSgated device of planar or trench topology has base injection regions formed between pairs of cells to inject minority carriers to modulate the resistivity of the drift region....

20060237794 - Method for providing a programmable electrostatic discharge (esd) protection device: A method for providing a programmable electrostatic discharge (ESD) protection device is provided. The method includes providing a source diffusion in a substrate, providing a deeper body diffusion in the substrate, providing a gate at a space between the source diffusion and the body diffusion, and providing a variable structure...

20060237795 - Semiconductor device and a method of manufacturing the same: A method of manufacturing a semiconductor integrated circuit device having on the same substrate both a high breakdown voltage MISFET and a low breakdown voltage MISFET is provided. An element isolation trench is formed in advance so that the width thereof is larger than the sum of the thickness of...

20060237797 - Triple well structure and method for manufacturing the same: The present invention discloses a triple well structure, which includes a substrate of a first conductive type, a deep buried well of a second conductive type, a well of a first conductive type, a well ring of a second conductive type, and a well ring of a first conductive type....

20060237796 - Using metal/metal nitride bilayers as gate electrodes in self-aligned aggressively scaled cmos devices: The present invention is directed to CMOS structures that include at least one nMOS device located on one region of a semiconductor substrate; and at least one pMOS device located on another region of the semiconductor substrate. In accordance with the present invention, the at least one nMOS device includes...

20060237798 - Semiconductor chip with fuse unit: A semiconductor chip includes a logic circuit unit, at least one memory macro unit having a redundant memory cell which recovers a defect cell, electrode pad rows being arranged around the outside of the logic circuit unit and the memory macro unit, and the least one fuse unit group storing...

20060237799 - Carbon nanotube memory cells having flat bottom electrode contact surface: The present invention is directed to structures and methods of fabricating nanotube electromechanical memory cells having a bottom electrode with a substantially planar contact surface. The bottom electrode is configured so that during the operation of the memory cell the nanotube crossbar of the cell can make contact with a...

20060237800 - Semiconductor contact device: The invention provides an advanced metallization technique for fabricating a memory cell array on a substrate. The array is fabricated by forming discrete and self-aligned vias in a first layer disposed over the array to form contacts to each of the source and drain junction in the array. Further, self-aligned...

20060237801 - Compensating for induced strain in the channels of metal gate transistors: Strained channel field effect transistors may have a threshold voltage shift. This threshold voltage shift may be compensated for by adjusting channel doping. But this also adversely affects mobility. The threshold voltage shift may be compensated, without adversely affecting mobility, by tailoring the workfunction of a metal gate electrode used...

20060237802 - Method for improving sog process: A method for forming a memory device includes providing a substrate, providing a plurality of features on the substrate, and forming a silicon-rich dielectric layer over the features. An inter-layer dielectric (ILD) or inter-metal dielectric (IMD) layer may be formed by a spin-on-glass (SOG) process on the silicon-rich dielectric layer,...

20060237803 - Ultra-thin hf-doped-silicon oxynitride film for high performance cmos applications and method of manufacture: A semiconductor structure and method of forming the same, comprising forming a uniform buffer layer of diffusion-controlling stable material on top of a base gate dielectric layer, and then forming a uniform layer which contains a source of transitional metal atoms, and then annealing the structure to diffuse the transitional...

20060237804 - Replacement gate flow facilitating high yield and incorporation of etch stop layers and/or stressed films: The present invention relates to the deposition of a layer above a transistor structure, causing crystalline stress within the transistor, and resulting in increased performance. The stress layer may be formed above a plurality of transistors formed on a substrate, or above a plurality of selected transistors....

20060237805 - Sensor platform using a horizontally oriented nanotube element: Sensor platforms and methods of making them are described, and include platforms having horizontally oriented sensor elements comprising nanotubes or other nanostructures, such as nanowires. Under certain embodiments, a sensor element has an affinity for an analyte. Under certain embodiments, such a sensor element comprises one or more pristine nanotubes,...

20060237806 - Micromachined microphone and multisensor and method for producing same: A micromachined microphone is formed from a silicon or silicon-on-insulator (SOI) wafer. A fixed sensing electrode for the microphone is formed from a top silicon layer of the wafer. Various polysilicon microphone structures are formed above a front side of the top silicon layer by depositing at least one oxide...

20060237807 - Electro-optic transducer die including a temperature sensing pn junction diode: An electro-optic transducer die that includes both an optically emissive PN junction diode and a temperature sensing PN junction diode. Since the temperature sensing PN junction diode is in the very same die as the optically emissive PN junction diode, there is very little thermal resistance between the optically emissive...

20060237808 - Spin injection magnetic domain wall displacement device and element thereof: A spin injection magnetic domain wall displacement device has a plurality of spin injection magnetic domain wall displacement elements. Each element includes a magnetic domain wall displacement layer having a magnetic domain wall, and a first, second, and third magnetic layer groups each having a ferromagnetic layer. The first, second,...

20060237809 - Methods of making optoelectronic devices: The invention includes optoelectronic devices containing one or more layers of semiconductor-enriched insulator (with exemplary semiconductor-enriched insulator being silicon-enriched silicon oxide and silicon-enriched silicon nitride), and includes solar cells containing one or more layers of semiconductor-enriched insulator. The invention also includes methods of forming optoelectronic devices and solar cells....

20060237810 - Bonding interface for micro-device packaging: In one embodiment, a method for making a cover for a micro-device package includes forming a layer of silicon on a transparent substrate and selectively removing parts of the silicon layer to form a bonding ring and an alignment target....

20060237811 - Non-destructive, in-line characterization of semiconductor materials: A method for non-destructively determining parameters of a doped semiconductor material involves applying an excitation to a surface of the semiconductor material to photogenerate minority carriers in a region of the semiconductor material, presenting an electric field across the region of the semiconductor material, measuring photoluminescence produced by recombination of...

20060237812 - Electronic emitters with dopant gradient: Electron emitters and a method of fabricating emitters are disclosed, having a concentration gradient of impurities, such that the highest concentration of impurities is at the apex of the emitters and decreases toward the base of the emitters. The method comprises the steps of doping, patterning, etching, and oxidizing the...

20060237813 - Junction barrier schottky with low forward drop and improved reverse block voltage: This invention discloses a junction barrier Schottky device supported on a substrate that has a first conductivity type. The Schottky device includes a first diffusion region of a fist conductivity type for functioning as a forward barrier height reduction region. The Schottky device further includes a second diffusion region of...

20060237814 - Semiconductor device having surface mountable external contact areas and method for producing the same: A semiconductor device having surface-mountable external contact areas and a method for producing the same is disclosed. The surface-mountable external contacts are arranged as flat external contacts on the underside of the semiconductor device. In one embodiment, the semiconductor chip of the semiconductor device has a source contact area and...

20060237815 - High voltage integrated circuit device including high-voltage resistant diode: Provided is a high-voltage integrated circuit device including a high-voltage resistant diode. The device includes a low-voltage circuit region having a plurality of semiconductor devices, which operate with respect to a ground voltage, a high-voltage circuit region having a plurality of semiconductor devices, which operate with respect to a voltage...

20060237817 - Methods of forming asymmetric recesses and gate structures that fill such recesses and related methods of forming semiconductor devices that include such recesses and gate structures: In a method of forming an asymmetric recess, an asymmetric recessed gate structure filling the asymmetric recess, a method of forming the asymmetric recessed gate structure, a semiconductor device having the asymmetric recessed gate structure and a method of manufacturing the semiconductor device, a semiconductor substrate is etched to form...

20060237816 - Semiconductor device and manufacturing method for the same: In a semiconductor substrate on which are formed an N-type MOS transistor and a P-type MOS transistor, the gate electrode of the N-type MOS transistor comprises a tungsten film, which makes contact with a gate insulation film, and the gate electrode of the P-type MOS transistor comprises a tungsten film,...

20060237818 - Fuse structure of semiconductor device and method for fabricating same: Provided a double-wired fuse structure of a semiconductor device and a method for fabricating the same which is not affected electrically by fuse crack. The fuse structure of a semiconductor device comprises a fuse layer formed over a semiconductor substrate wherein a predetermined portion of the fuse layer is cut,...

20060237820 - Biasing device for low parasitic capacitance in integrated circuit applications: The present invention is directed to an apparatus and method for reducing a parasitic capacitance in an integrated circuit. The apparatus includes a substrate and a biasing device. The substrate has a circuit disposed thereon, wherein a first capacitance exists between the substrate and an element of the circuit. The...

20060237819 - Semiconductor device: A semiconductor device includes a capacitor with an MIM structure, by which the dimensional accuracy of the device is improved, and a stable capacitance value is given. The semiconductor device 100 includes: a semiconductor substrate 102; a capacitor forming region 130 in which an MIM capacitor is formed, which has...

20060237821 - Interconnects including members integral with bit lines, as well as metal nitride and metal silicide, and methods for fabricating interconnects and semiconductor device structures including the interconnects: An interconnect includes a member that is integral and lacks a discernable boundary with a bit line, as well as metal nitride and metal silicide between the member and an active-device region of a semiconductor substrate. The interconnect may extend adjacent to and be insulated from a stacked capacitor structure...

20060237822 - Semiconductor substrate: A semiconductor wafer having a high degree of thinness and exhibiting an enhanced strength state. A layer of tenacious reinforcement material is disposed over a back side of the wafer while in a rough state from backgrinding without prior, conventional polishing or plasma etching of the back side. The thin...

20060237823 - Shielding arrangement to protect a circuit from stray magnetic fields: A shielding arrangement for protecting a circuit containing magnetically sensitive materials from external stray magnetic fields. A shield of a material having a relatively high permeability is formed over the magnetically sensitive materials using thin film deposition techniques. Alternatively, a planar shield is affixed directly to a surface of semiconductor...

20060237825 - Device packages having a iii-nitride based power semiconductor device: A semiconductor device package includes a die pad, a substrate disposed on the die pad, and a III-nitride based semiconductor device disposed on the substrate. The device package may also include a second semiconductor device disposed on the die pad or the substrate, which device may be electrically connected to...

20060237824 - Lead frame for semiconductor package and method of manufacturing the same: A lead frame for a semiconductor package and a manufacturing method thereof are provided. In the lead frame, a Ni plating layer made of Ni or a Ni alloy is plated on a base metallic layer. A Ni—Pd plating layer made of a Ni—Pd based alloy and having a Ni...

20060237826 - Leadframe designs for plastic overmold packages: The specification describes a plastic overmolded package for high power devices that has a very low lead count, typically fewer than eight, and in a preferred embodiment, only two. The leads occupy essentially the same linear space as the multiple leads in a conventional package and thus have a wide-blade...

20060237827 - Thermal enhanced low profile package structure and method for fabricating the same: A thermal enhanced low profile package structure and a method for fabricating the same are provided. The package structure typically includes a metallization layer with an electronic component thereon which is between two provided dielectric layers. The metallization layer as well as the electronic component is embedded and packaged while...

20060237829 - Method and system for a semiconductor package with an air vent: Systems and methods for a structure for semiconductor packages where the effects that features on the package substrate have on the impedance of signal traces within the semiconductor package is substantially reduced. These systems and methods may allow a feature, or multiple features, to be placed anywhere on the semiconductor...

20060237830 - Semiconductor device and electronic device: This invention provides a high frequency power module which is incorporated into a mobile phone and which incorporates high frequency portion analogue signal processing ICs including low noise amplifiers which amplify an extremely weak signal therein. A semiconductor device includes a sealing body which is made of insulation resin, a...

20060237831 - Semiconductor device and electronic device: This invention provides a high frequency power module which is incorporated into a mobile phone and which incorporates high frequency portion analogue signal processing ICs including low noise amplifiers which amplify an extremely weak signal therein. A semiconductor device includes a sealing body which is made of insulation resin, a...

20060237832 - Standoffs for centralizing internals in packaging process: A semiconductor device, semiconductor die package, mold tooling, and methods of fabricating the device and packages are provided. In one embodiment, the semiconductor device comprises a pair of semiconductor dies mounted on opposing sides of a flexible tape substrate, the outer surfaces of the dies having one or more standoffs...

20060237828 - System and method for enhancing wafer chip scale packages: System and method for enhancing the performance of wafer chip scale packages (WCSP). A preferred embodiment comprises a parent electrical device 305 and a daughter electrical device 310 coupled to a bottom surface of the parent electrical device, wherein the bottom surface is also used to attach the parent electrical...

20060237833 - System having semiconductor component with multiple stacked dice: A system includes a semiconductor component having a base die and a secondary die flip chip mounted to the base die. The base die includes a set of stacking contacts for flip chip mounting the secondary die to the base die, and a set of interconnect contacts configured as an...

20060237835 - Electronic circuit device: An electronic circuit device has a high-density mount board (2), on which are disposed a microcomputer (3) and random access memory (7) which are connected to each other through an exclusive memory bus (12) for high-speed data transfer, a programmable device (8) which is a variable logic circuit represented by...

20060237834 - Method for forming an electric device comprising power switches around a logic circuit and related apparatus: A method for forming an electric device having power switches around a logic circuit including: forming a logic circuit on a substrate; forming a plurality of power switches around the logic circuit; and coupling first ends of the power switches to a voltage end, and coupling second ends of the...

20060237836 - Microelectronic assemblies having compliant layers: A compliant semiconductor chip package assembly includes a a semiconductor chip having a plurality of chip contacts, and a compliant layer having a top surface, a bottom surface and sloping peripheral edges, whereby the bottom surface of the compliant layer overlies a surface of the semiconductor chip. The assembly also...

20060237837 - Field effect transistor and method of manufacturing the same: There is provided a field effect transistor including: a first insulating film formed on a semiconductor substrate, and including at least a metal oxide having a crystallinity and different in a lattice distance of a crystal on an interface from the semiconductor substrate; a convex channel region formed above the...

20060237839 - Apparatus for conducting heat in a flip-chip assembly: An apparatus for thermally conducting heat from a semiconductor device, namely, a flip-chip assembly. In one embodiment, a heat sink, such as a diamond layer having openings therein, is provided over a surface of a semiconductor device. Conductive pads are formed in the openings to be partially contacting the diamond...

20060237838 - Thermal interconnect systems methods of production and uses thereof: Layered interface materials described herein include at least one pulse-plated thermally conductive material, such as an interconnect material, and at least one heat spreader component coupled to the at least one pulse-plated thermally conductive material. A plated layered interface material having a migration component is also described herein and includes...

20060237840 - Semiconductor package: A semiconductor package that includes a conductive can, a power semiconductor device electrically and mechanically attached to the inside surface of the can, and an IC semiconductor device copackaged with the power semiconductor device inside the can....

20060237841 - Semiconductor device and method for producing the same: A semiconductor device includes a tape carrier substrate having a flexible insulating film base, a plurality of conductor wirings provided on the film base, and wiring bumps respectively formed so as to cover an upper surface and both side surfaces of the conductor wirings, and a semiconductor chip mounted on...

20060237842 - Semiconductor device including an under electrode and a bump electrode: Making the relative size of the surface area of a bump electrode at a portion in contact with an under electrode larger than the surface area of a base of a hole increases the contact surface area between the lower surface of the bump electrode and a polyimide layer. As...

20060237843 - Bga-type multilayer circuit wiring board: Provided is a BGA-type multilayer circuit wiring board which is mounted on a printed wiring board directly via a solder ball with the electrode pad for solder ball connection formed thereon and in which the electric connection reliability of the filled via connected to the electrode pad for solder ball...

20060237844 - Semiconductor integrated circuit package having electrically disconnected solder balls for mounting: Integrated circuit packages that connect solder balls between solder ball pads of a die and substrate pads of a printed circuit board (PCB). The solder balls are electrically disconnected from any circuit of the die, i.e., “dummy” solder balls, and are used to temporarily hold the die in position with...

20060237845 - Semiconductor integrated circuit package having electrically disconnected solder balls for mounting: Integrated circuit packages that connect solder balls between solder ball pads of a die and substrate pads of a printed circuit board (PCB). The solder balls are electrically disconnected from any circuit of the die, i.e., “dummy” solder balls, and are used to temporarily hold the die in position with...

20060237846 - Doped nitride film, doped oxide film and other doped films and deposition rate improvement for rtcvd processes: When forming a silicon nitride film from a nitrogen precursor, using a silicon precursor combination rather than a single silane precursor advantageously increases the deposition rate. For example, adding silane during formation of a silicon nitride film made using BTBAS and ammonia improves (increases) the deposition rate while still yielding...

20060237847 - Integrated circuit interconnect: A method for forming an electrical interconnect overlying a buried contact region of a substrate is characterized by a deposition of a first polycrystalline silicon layer and the patterning and etching of same to form a via. The via is formed in the first polycrystalline silicon layer to expose the...

20060237848 - Semiconductor device having a leading wiring layer: A manufacturing method of a semiconductor device, comprising the steps of forming an insulation layer, which has an opening section in an area including an area on an electrode pad, on a top surface of the semiconductor substrate on which the electrode pad is formed; at least forming a first...

20060237849 - Electronic device, method of manufacture of the same, and sputtering target: In an electronic device comprising a first electrodes consisting of a metal oxide and a second electrode consisting of an aluminum alloy film directly contacted and electrically connected to the first electrode, the contact interface between the aluminum alloy film and the first electrode is constructed so that at least...

20060237851 - Semiconductor device and related method of manufacture: Disclosed are a semiconductor device and a related method of manufacture. The semiconductor device comprises a semiconductor substrate, a conductive structure including contact regions and gate structures formed on the semiconductor substrate, a protection layer formed on the gate structures, an insulation layer formed on the protection layer, and a...

20060237852 - Semiconductor device in which lsi chip is arranged on package substrate in flipped condition and substrate wiring designing method: In the LSI design stage, areas indicating the circuits that handle a minute signal are formed as wiring excluding area patterns. The coordinates of the wiring excluding area patterns in a state that the LSI chip is flipped are calculated, and the substrate design tool is caused to recognize such...

20060237850 - Semiconductor die edge reconditioning: An integrated circuit has a semiconductor substrate and an interconnect layer that mechanically relatively weak and susceptible to cracks and delamination. In the formation of the integrated circuit from a semiconductor wafer, a cut is made through the interconnect layer to form an edge of the interconnect layer. This cut...

20060237853 - Cobalt tungsten phosphate used to fill voids arising in a copper metallization process: A semiconductor device includes a substrate, at least one layer of functional devices formed on the substrate, a first dielectric layer formed over the functional device layer and a first trench/via located in the first dielectric layer. A copper conductor fills the first trench/via. An electromigration inhibiting barrier layer is...

20060237854 - Carrying structure of electronic components: A carrying structure of electronic components is proposed. The carrying structure includes at least one supporting board with at least one cavity disposed thereon, at least one adhesive layer formed on the supporting board, and at least one electronic component having an active face and a non-active face located in...

20060237855 - Substrate for producing a soldering connection to a second substrate: A substrate for producing a soldering connection to a second substrate is disclosed. Soldering pads are distributed on the substrate surface. Solder balls can be applied to these pads. A soldering pad has a top side area and side areas connected to a conductor track. A soldering mask with openings...

20060237856 - Microelectronic contact structure and method of making same: Spring contact elements are fabricated by depositing at least one layer of metallic material into openings defined on a sacrificial substrate. The openings may be within the surface of the substrate, or in one or more layers deposited on the surface of the sacrificial substrate. Each spring contact element has...

20060237857 - Hybrid carbon nanotube fet(cnfet)-fet static ram (sram) and method of making same: Hybrid carbon nanotube FET (CNFET), static ram (SRAM) and method of making same. A static ram memory cell has two cross-coupled semiconductor-type field effect transistors (FETs) and two nanotube FETs (NTFETs), each having a channel region made of at least one semiconductive nanotube, a first NTFET connected to the drain...

20060231822 - Flash memory devices and methods of fabricating the same: A flash memory device includes a common source region that is disposed in an active region at a side of a ground-selection gate line, being apart from the ground-selection gate line. A pair of source spacers crosses over both top edges of the common source region. A source line fills...

20060231823 - Structure for amorphous carbon based non-volatile memory: A memory device including at least one first memory element comprising a first layer of amorphous carbon over at least one second memory element comprising a second layer of amorphous carbon. The device also includes at least one first conductive layer common to the at least one first and the...

20060231824 - Resistance variable memory with temperature tolerant materials: A PCRAM memory device having a chalcogenide glass layer, preferably comprising antimony selenide having a stoichometric formula of about Sb2Se3, and a metal-chalcogenide layer and methods of forming such a memory device....

20060231825 - Use of quasi-one-dimensional transition metal ternary compounds and quasi-one-dimensional transition metal chacogenide compounds as electron emitters: The present invention pertains to the use of quasi-one-dimensional transition metal ternary compounds MxHyHaz (where M is a transition metal Mo, W, Ta, Nb; H is sulfur (S), selenium (Se), tellurium (Te); Ha is iodine (I)) and of doped quasi-one-dimensional transition metal ternary compounds MxHyHaz, (where M=Ta, Ti, Nb; H...

20060231826 - Step-embedded sige structure for pfet mobility enhancement: A device, and method for manufacturing the same, including a PFET having an embedded SiGe layer where a shallow portion of the SiGe layer is closer to the PFET channel and a deep portion of the SiGe layer is further from the PFET channel. Thus, the SiGe layer has a...

20060231830 - Display device and a method of manufacturing the same: In a display device having a plurality of organic electroluminescence devices arranged on a substrate, each of the devices including a lower electrode, an organic layer at least containing a light emitting layer, and an upper electrode in this order, the light emitting layer of at least some of the...

20060231827 - Functional organic thin film, organic thin-film transistor, pi-electron conjugated molecule-containing silicon compound, and methods of forming them: An organic thin film having both a chemical structure of an organic material that is a factor determining a characteristic of the thin film and a high-order structure of the thin film, for example, the crystallinity of molecules, namely, the orientation. A functional organic thin film composed of molecules the...

20060231831 - Light emitting display device and method of manufacturing the same: The present invention relates to a light emitting display device, such as an organic electroluminescent device, and a method for manufacturing the same. Particularly, the present invention relates to reducing electrical resistance between the scan lines and the cathode electrode layers so that scan line signals do not degrade significantly...

20060231828 - Light-emitting diode: The invention pertains to a light-emitting diode (LED) comprising layers of an anode, an acidic hole conducting-injecting material, a light-emitting polymer, and a cathode, characterized in that the hole conducting-injecting material comprises a poly(3,4-ethylenedioxythiophene poly(styrenesulfonate) (PEDOT), which is obtainable by at least partially neutralizing the PEDOT with an anion that...

20060231832 - Liquid crystalline organic compound, organic semiconductor structure, organic semiconductor device, and process for producing liquid crystalline organic compound: wherein, R1 and R2 are each independently a saturated or unsaturated hydrocarbon of a straight chain, a branched chain or a cyclic structure having 1 to 22 carbon atoms; R1 and R2 may be each independently bonded directly to Z1 without interposing Y1 or Y2 therebetween; and Y1 and Y2...

20060231829 - Tft gate dielectric with crosslinked polymer: A thin film transistor composed of a gate dielectric which includes a radiation-induced crosslinked polymer composed of polymerized one or more monomers, wherein the one or more monomers include an optionally substituted vinyl arylalcohol....

20060231834 - Bonding strength testing device: A bonding strength test device suits to perform a bonding strength test for at least one solder ball that fixed on a substrate. The bonding strength test device includes a fixed base and an impact apparatus. The impact apparatus has a first end and a second end corresponding to the...

20060231833 - High-frequency, high-signal-density, surface-mount technology footprint definitions: Methods for designing SMT connector footprints are disclosed. A circuit board may have disposed thereon an arrangement of SMT pads and corresponding vias. The arrangement of vias may differ from the arrangement of SMT pads. The arrangement of SMT pads may differ from the arrangement of contacts in a connector...

20060231835 - Semiconductor device including rom interface pad: A semiconductor device comprises a multilayer formed on a semiconductor substrate, the multilayer including a first circuit pattern, a second circuit pattern for testing the semiconductor device, the second circuit formed on a predetermined region of the multilayer, an inter-metal insulating layer formed on the second circuit pattern, a plurality...

20060231836 - Surge voltage protection diode and method of forming the same: To prevent the destruction of a semiconductor element due to negative resistance, and to reduce the dynamic resistance of a static electricity prevention diode, the ratio of the maximum electric field intensity during an avalanche and the average electric field in a strong electric field region, as well as the...

20060231840 - Active matrix substrate, method of making the substrate, and display device: An active matrix substrate includes base substrate, gate lines, data lines, thin-film transistors and pixel electrodes. The gate lines are formed on the base substrate. The data lines are formed over the gate lines. Each of the data lines crosses all of the gate lines with an insulating film interposed...

20060231838 - Liquid crystal display: A liquid crystal display includes an array of pixels. Each pixel is divided into a first sub-pixel and a second sub-pixel, and different data voltages are separately applied to (or evolved at) the two sub-pixels, thereby enhancing the lateral side visibility. Each sub-pixel includes a sub-pixel electrode (connected to the...

20060231839 - Method of treating inorganic oxide film, electronic device substrate, method of manufacturing electronic device substrate, liquid crystal panel, and electronic apparatus: A method of treating an inorganic oxide film includes: dipping an inorganic oxide film having a plurality of pores therein which is formed by an oblique deposition method into a treatment liquid containing alcohol; reducing pressure of a space where the treatment liquid is provided to infiltrate the treatment liquid...

20060231837 - Thin-film assembly and method for producing said assembly: A thin-film assembly (1) including a substrate (2) and at least one electronic thin-film component (8) applied on the substrate by thin-film technology, wherein a base electrode (4) is provided on the substrate, on which base electrode thin-film layers (21) forming part of the thin-film component are arranged together with...

20060231841 - Silicon carbide semiconductor device: A silicon carbide semiconductor device includes a semiconductor element disposed in a semiconductor substrate having a first conductive type silicon carbide layer and a silicon substrate. The device includes: a trench on the silicon carbide layer to reach the silicon substrate; and a conductive layer in the trench between the...

20060231842 - Display device: To improve an image quality of an organic EL display by utilizing characteristics of a dual emission type organic light emitting element. A display device includes a first substrate over which a plurality of organic light emitting elements are provided and a second substrate over which an organic light emitting...

20060231844 - Organic optoelectronic device: An organic optoelectronic device includes a substrate having an upper surface and a lower surface, at least one organic diode situated on the upper surface of the substrate, the organic diode including, an anode including a material of high work function situated over the upper surface of the substrate, an...

20060231843 - Phosphorescent light-emitting component comprising organic layers: The invention relates to a light emitting component with organic layers and emission of triplet exciton states (phosphorescent light) with increased efficiency, having a layer sequence with a hole injecting contact (anode), one or more hole injecting and transporting layers, a system of layers in the light emission zone, one...

20060231846 - Thin film transistor array panel for liquid crystal display: A black matrix having an opening at pixels of a matrix array in a display area, a common wire including common pads and common signal lines, and gate pads in a peripheral area, and an alignment key in outer area to align interlayer thin films are formed on an insulating...

20060231845 - White-light emitting semiconductor device: A white-light emitting semiconductor device includes a first light-emitting die, a second light-emitting die, a photostimulable luminescent substance, and a holding assembly. The first light-emitting die emits a first radiation having a first wavelength range. The second light-emitting die emits a second radiation having a second wavelength range, and a...

20060231847 - Multiple-wavelength light emitting diode and its light emitting chip structure: The present invention discloses a multiple-wavelength light emitting diode that includes a fluorescent layer with a predetermined wavelength disposed at the bottom of the light emitting diode, such that a light emitting chip can be fixed onto a carrier and connected in parallel with the circuit of the light emitting...

20060231848 - Light emitting diode package for enhancing light extraction: A light emitting diode package for enhancing light extraction includes a plurality of LED dies. A holder having a die pad on which the LED dies are seated and a plurality of pins is electrically connected to the plurality of LED dies respectively. A transparent molding covers the plurality of...

20060231849 - White light emitting diode component having two phosphors and related phosphor and formation method: A white light emitting diode component capable of emitting white light includes an LED chip capable of emitting luminescent light, a first phosphor for absorbing first luminescent light of the luminescent light and emitting first emission, and a second phosphor for absorbing second luminescent light of the luminescent light and...

20060231850 - Semiconductor laser diode having ridge portion and method of manufacturing the same: Provided is a semiconductor laser diode having a ridge portion and a method of manufacturing the semiconductor laser diode. The semiconductor laser diode includes: a first clad layer, an active layer formed on the first clad layer, a second clad layer formed on the active layer and having a stripe...

20060231851 - Red phosphor for led based lighting: Disclosed are phosphor compositions having the formula (RE1-yCey)Mg2-xLixSi3-xPxO12, where RE is at least one of Sc, Lu, Gd, Y, and Tb, 0.0001<x<0.1 and 0.001<y<0.1. When combined with at least one additional phosphor and subjected to radiation from a blue or UV LED, these phosphors can provide white light sources with...

20060231854 - Flip chip type nitride semiconductor light emitting device: The present invention relates to a flip chip type nitride semiconductor light emitting device having p-type and n-type nitride semiconductor layers, and an active layer in between. The invention also has an ohmic contact layer formed on the p-type nitride semiconductor layer, a light-transmitting conductive oxide layer formed on the...

20060231856 - Led device and optical detector therewith for bill validator: An LED device is provided which comprises a plastic encapsulant 7 formed with an integrated cylindrical lens 8 disposed opposite to an LED chip 5 to provide light from LED chip 5 with the wider directivity angular range in the vertical Y irradiative direction than that in the horizontal X...

20060231855 - Semiconductor device: A semiconductor device includes a semiconductor element, a light-blocking region enclosing the semiconductor element, a plurality of contacts disposed in a staggered arrangement in a first region of the light-blocking region, and a linear contact formed to extend along at least a first direction in a second region of the...

20060231853 - Semiconductor light-emitting device and its manufacturing method: In a light-emitting device and its manufacturing method, mounting by batch process with surface-mount technology, high light extraction efficiency, and low manufacturing cost are realized. The light-emitting device 1 comprises semiconductor layers (2, 3) of p-type and n-type nitride semiconductor, semiconductor-surface-electrodes (21, 31) to apply currents into each of the...

20060231852 - Semiconductor light-emitting device, method for manufacturing same and light-emitting apparatus using same: A nitride semiconductor light-emitting device includes a layered portion emitting light on a substrate. The layered portion includes an n-type semiconductor layer, an active layer, and a p-type semiconductor layer. The periphery of the layered portion is inclined, and the surface of the n-type semiconductor layer is exposed at the...

20060231857 - Method for making a semiconductor device including a memory cell with a negative differential resistance (ndr) device: A method for making a semiconductor device may include forming at least one memory cell comprising a negative differential resistance (NDR) device and a control gate coupled thereto. The NDR device may include a superlattice including a plurality of stacked groups of layers, with each group of layers of the...

20060231858 - Display device and manufacturing method of the display device: It is an object of the present invention to provide a technique to manufacture a highly reliable display device at a low cost with high yield. A display device according to the present invention includes a semiconductor layer including an impurity region of one conductivity type; a gate insulating layer,...

20060231859 - Heterojunction bipolar transistor: An n-type InP sub collector layer 2 heavily doped with silicon (Si), an InP collector layer 3, a p-type GaAs(0.51)Sb(0.49) base layer 4 heavily doped with carbon (C), an n-type In(1-y)Al(y)P emitter layer 7 doped with Si, an n-type InP cap layer 8 heavily doped with Si, and an n-type...

20060231861 - Field effect transistor and method of manufacturing the same: An FET includes a first semiconductor layer and a second semiconductor layer, the second semiconductor layer being formed on the first semiconductor layer and having a band gap energy greater than that of the first semiconductor layer. The first and second semiconductor layers are made of a Group III-V compound...

20060231860 - Polarization-doped field effect transistors (polfets) and materials and methods for making the same: Novel GaN/AlGaN metal-semiconductor field-effect transistor (MESFET) structures grown without any impurity doping in the channel. A high-mobility polarization-induced bulk channel charge is created by grading the channel region linearly from GaN to Al0.3Ga0.7N over a distance, e.g., 1000 Å. A polarization-doped field effect transistor (PolFET) was fabricated and tested under...

20060231862 - Ballistic semiconductor device: A ballistic semiconductor device of the present invention comprises a n-type emitter layer (102), a base layer (305) made of n-type InGaN, a n-type collector layer (307), an emitter barrier layer (103) interposed between the emitter layer (102) and the base layer (305) and having a band gap larger than...

20060231863 - Manufacturing process of a chip package structure: A manufacturing process of a chip package structure is provided. The manufacturing method uses fine pitch circuit processes, such as a TFT-LCD process or an IC process, to increase layout density and shorten electrical transmission pathways so that a higher electrical performance level is attained. First, a multi-layered interconnection structure...

20060231864 - Sealed nitride layer for integrated circuits: The present invention relates to an integrated circuit. The integrated circuit includes a substrate, at least one device region formed in the substrate, a patterned layer of oxide, a first and second layer of nitride and at least one metal contact region. The patterned layer of oxide is formed over...

20060231865 - Electromechanical three-trace junction devices: Three-trace electromechanical devices and methods of using same are described. The device of the present invention includes first and second electrically conductive elements with a nanotube ribbon (or other electromechanical elements) disposed therebetween. The nanotube ribbon is capable of maintaining its position after removing an electrical stimulus applied to at...

20060231866 - Method and circuit arrangement for setting an initial value on a charge-storage element: A method is provided for setting an initial value on a charge-storage element. A circuit includes at least one charge-storage element with at least one signal node coupled to at least one reset circuit that is associated with the charge-storage element. A diode can be included between the charge-storage element...

20060231867 - Semiconductor device and manufacturing method thereof: A semiconductor device has a semiconductor base, an anode electrode, and a cathode electrode. The semiconductor base includes a P type semiconductor substrate, an insulating film, an N− type semiconductor region formed on the insulating film, an N+ type semiconductor region, and a P+ type semiconductor region facing the N+...

20060231868 - Semiconductor device for high voltage ic: A semiconductor device includes: a plurality of transistors connected in series between a ground potential and a predetermined potential; an input terminal provided by a gate terminal of the first step transistor; a plurality of resistors connected in series between the ground potential and the predetermined potential; and an output...

20060231869 - Non-volatile memory device capable of preventing damage by plasma charge: A non-volatile memory device for preventing damage by plasma charges includes a gate electrode formed on a predetermined region of a semiconductor substrate, a source/drain region which is overlapped with the gate electrode and formed in a first well region of the semiconductor substrate, a first metal line coupled to...

20060231870 - Cmos image sensor and method of fabricating the same: A CMOS image sensor and a method of fabricating the same are provided. The image sensor includes a blocking layer protecting a photodiode at a diode region. The blocking layer is formed to cover a top of the diode region and extended to an active region so as to cover...

20060231871 - Semiconductor device