Active solid-state devices (e.g., transistors, solid-state diodes) inventions 09/06

20060208247 - Method and system for an integrated circuit supporting auto-sense of voltage for drive strength adjustment: Certain embodiments of the invention may be found in a method for integrated circuit supporting auto-sense of voltage for drive strength adjustment. The method may comprise detecting an input voltage received at an auto-sense pad integrated on a mobile multimedia processing (MMP) chip. The input voltage may be a power...

20060208248 - Nonvolatile nanochannel memory device using organic-inorganic complex mesoporous material: A memory device of the current invention includes a memory layer having nanochannels sandwiched between an upper electrode and a lower electrode, in which the memory layer is made of an organic-inorganic complex for use in formation of nanopores, and has metal nanoparticles or metal ions fed into the nanopores....

20060208249 - Programmable conductor memory cell structure and method therefor: In programmable conductor memory cells, metal ions precipitate out of a glass electrolyte element in response to an applied electric field in one direction only, causing a conductive pathway to grow from cathode to anode. The amount of conductive pathway growth, and therefore the programming, depends, in part, on the...

20060208250 - Semiconductor device based on si-ge with high stress liner for enhanced channel carrier mobility: The carrier mobility in transistor channel regions of Si—Ge devices is increased by employing a stressed liner. Embodiments include applying a high compressive or tensile stressed film overlying relaxed source/drain regions. Other embodiments include applying a high compressively or high tensilely stressed film, after post silicide spacer removal, over gate...

20060208252 - Molecular rectifiers: The present invention relates to molecules exhibiting rectifying properties. In particular, the present invention relates to a molecular rectifying assembly, comprising the general structure METAL1-CON1-BRIDGE-CON2-METAL2 in which CON1 and CON2 are a connecting group or connecting part and independently of each other are molecular groups bound to METAL1,2 in such...

20060208251 - Organic semiconductor device and producing method therefor: The invention provides an organic semiconductor device with a p-type organic semiconductor layer sandwiched between a source electrode and a drain electrode including an n-type organic semiconductor layer formed in an intermediate portion of the p-type organic semiconductor layer and a gate electrode embedded in the n-type organic semiconductor layer,...

20060208253 - Organic thin film transistor, flat display device including the same, and method of manufacturing the organic thin film transistor: An organic thin film transistor, a flat display device including the same, and a method of manufacturing the organic thin film transistor are disclosed. In one embodiment, the organic thin film transistor includes: i) a substrate, ii) a gate electrode disposed on the substrate, iii) a gate insulation film disposed...

20060208255 - Stressed organic semiconductor: A semiconductor device and method of manufacturing the semiconductor device. The semiconductor device includes: a substrate; an organic semiconductor material coupled to the substrate at an interface therebetween; and an actuator provided for use with the substrate and/or the organic semiconductor. The actuator applies a mechanical force to the substrate...

20060208254 - Techniques and systems for analyte detection: Techniques are used to detect and identify analytes. Techniques are used to fabricate and manufacture sensors to detect analytes. An analyte (810) is sensed by sensors (820) that output electrical signals in response to the analyte. The electrical signals may be preprocessed (830) by filtering and amplification. In one embodiment,...

20060208256 - Self-calibration in non-contact surface photovoltage measurement of depletion capacitance and dopant concentration: The surface photovoltage dopant concentration measurement of a semiconductor wafer is calibrated by biasing the semiconductor wafer into an avalanche breakdown condition in a surface depletion region; determining a contact potential difference value corresponding to an avalanche breakdown; determining small signal ac-surface photovoltage value corresponding to an avalanche breakdown; and...

20060208257 - Method for low-temperature, hetero-epitaxial growth of thin film csi on amorphous and multi-crystalline substrates and c-si devices on amorphous, multi-crystalline, and crystalline substrates: A crystalline, highly textured or biaxially textured, foreign (non-silicon) material, which is closely lattice-matched to silicon, is deposited on a glass or other amorphous or multi-crystalline substrate to provide a template for hetero-epitaxial growth of highly ordered crystalline silicon semiconductor layers on such substrates. This process enables crystalline silicon semiconductor...

20060208258 - Semiconductor device, and method of fabricating the same: A multi-layered gate electrode of a crystalline TFT is constructed as a clad structure formed by deposition of a first gate electrode, a second gate electrode and a third gate electrode, to thereby to enhance the thermal resistance of the gate electrode. Additionally, an n-channel TFT is formed by selective...

20060208259 - Cmos image sensors and methods for fabricating the same: CMOS image sensors and methods for fabricating the same are disclosed. A disclosed CMOS image sensor comprises: a semiconductor substrate; a photo diode; a microlens located over the photo diode; and a color filter layer located over the microlens....

20060208260 - Powdered fluorescent material and method for manufacturing the same, light-emitting device, and illumination apparatus: Powdered fluorescent material excited by visible light that emits visible light has particles with particle sizes of 20 μm or less in the content of below 2% by mass. The method for manufacturing a powdered fluorescent material comprises the steps of: sintering raw material powder of the fluorescent material; and...

20060208261 - Semiconductor device and manufacturing method thereof: A high voltage semiconductor device having a high current gain hFE is formed with a collector region (20) of a first conduction type, an emitter region (40) of the first conduction type, and a base region (30) of a second conduction type opposite to the first conduction type located between...

20060208262 - Light emitting device and illumination apparatus: A light-emitting device and illumination apparatus using the same are provided. The light-emitting device includes a semiconductor light-emitting element that emits blue-violet or blue light and a fluorescent material that absorbs the light emitted by the semiconductor light-emitting element and emits fluorescence of wavelengths different from the light, wherein the...

20060208263 - Light emitting device, method of manufacturing the same, and manufacturing apparatus therefor: A light emitting device having high definition, a high aperture ratio, and high reliability is provided. The present invention achieves high definition and a high aperture ratio with a full color flat panel display using red, green, and blue color emission light by intentionally forming laminate portions, wherein portions of...

20060208264 - Nitride semiconductor led improved in lighting efficiency and fabrication method thereof: A nitride semiconductor LED improved in lighting efficiency and a fabrication method thereof, in which an n-doped semiconductor layer is formed on a substrate. An active layer is formed on the n-doped semiconductor layer to expose at least a partial area of the n-doped semiconductor layer. A p-doped semiconductor layer...

20060208265 - Light emitting diode and light emitting diode array: A light emitting diode array comprises compound semiconductor layers epitaxially grown on a p-type GaAs conductive layer 11 formed on a semi-insulating GaAs substrate 30. The epitaxial layer is isolated and divided into a plurality of light emitting parts 1 which function as a light emitting diode. A Si-doped n-type...

20060208266 - Method for manufacturing an organic semiconductor device, as well as organic semiconductor device, electronic device, and electronic apparatus: A method for manufacturing an organic semiconductor device having a gate electrode, a source electrode, a drain electrode, an organic semiconductor layer, a gate insulation layer, and a substrate, including: forming, on the substrate, an underlayer that contains an organic polymer material having a liquid crystal core and is oriented...

20060208268 - Light emitting device: A light-emitting device can include a blue LED chip that is covered in a sealing resin composed of a filling resin mixed with a wavelength conversion material, such as a yellow fluorescent material. Light from the blue LED chip is mixed with a light from the yellow fluorescent material to...

20060208269 - Side-emitting led package having scattering area and backlight apparatus incorporating the led lens: The invention provides an LED package and a backlight device incorporating the LED lens. The LED package has a bottom surface and a light exiting surface cylindrically extended around a central axis of the package from the bottom surface. Also, a reflecting surface is positioned on an opposite side of...

20060208267 - Side-emitting solid-state semiconductor light emitting device: A side-emitting solid-state semiconductor light emitting device (light emitting diode) comprises a light emitting diode package and a lens, wherein the lens is mounted on the front surface of the light emitting diode package to receive the light emitted from the light emitting diode and redirect the received light by...

20060208270 - Borate phosphor materials for use in lighting applications: Boron containing phosphor compositions having the formulas (1) M3Ln2(BO3)4 doped with at least one activator selected from the group of Eu2+, Mn2+, Pb2+, Ce3+, Eu3+, Tb3+, and Bi3+ where M is at least one of Mg, Ca, Sr, Ba, or Zn, and Ln is at least one of Sc, Y,...

20060208271 - Light source apparatus and fabrication method thereof: A light source apparatus and a fabrication method thereof can prevent light interference between light emitting devices adjacent to each other by forming a groove in a sub-mount and bonding a light emitting device to the groove, enhance heat radiating effect as well as luminous efficiency by collecting light emitted...

20060208272 - Method for filling recessed micro-structures with metallization in the production of a microelectronic device: A method for filling recessed micro-structures at a surface of a semiconductor wafer with metallization is set forth. In accordance with the method, a metal layer is deposited into the micro-structures with a process, such as an electroplating process, that generates metal grains that are sufficiently small so as to...

20060208273 - Nitride micro light emitting diode with high brightness and method of manufacturing the same: The present invention relates to a nitride micro light emitting diode (LED) with high brightness and a method of manufacturing the same. The present invention provides a nitride micro LED with high brightness and a method of manufacturing the same, wherein a plurality of micro-sized luminous pillars 10 are formed...

20060208274 - Electrical fuse for silicon-on-insulator devices: An apparatus for providing an electrical fuse is provided. An electrical fuse is patterned from the active layer of a semiconductor-on-insulator (SOI) wafer. One shape of the electrical fuse may be a first and second portion electrically coupled via a third section. The third section is typically thinner than the...

20060208276 - Semiconductor device and method of producing the same, and power conversion apparatus incorporating this semiconductor device: The temperature of a bipolar semiconductor element using a wide-gap semiconductor is raised using heating means, such as a heater, to obtain a power semiconductor device being large in controllable current and low in loss. The temperature is set at a temperature higher than the temperature at which the decrement...

20060208275 - Transflective liquid crystal display panel and manufacturing method thereof: A transistor array panel comprises a substrate, a transparent electrode disposed on the substrate, a gate line disposed on the substrate, a gate insulating layer disposed on the transparent electrode and the gate line, a semiconductor layer disposed on the gate insulating layer, a data line and a drain electrode...

20060208277 - Bipolar transistor with a low saturation voltage: A bipolar transistor with a specific area resistance less than about 500 mOhms·mm2 comprises a first semiconductor region of a first conductivity type defining a collector region (2). A second semiconductor region of a second conductivity type defines a base region (3). A third semiconductor region of the first conductivity...

20060208278 - Two-wavelength semiconductor laser device and method of manufacturing the same: A two-wavelength semiconductor laser device includes a first conductive material substrate having thereon first and second regions separated from each other. A first semiconductor laser diode is formed on the first region. A non-active layer is formed on the second region and has the same layers as those of the...

20060208280 - Group iii nitride field effect transistors (fets) capable of withstanding high temperature reverse bias test conditions: Group III Nitride based field effect transistor (FETS) are provided having a power degradation of less than about 3.0 dB when operated at a drain-to-source voltage (VDS) of about 56 volts, a gate to source voltage (Vgs) of from about −8 to about −14 volts and a temperature of about...

20060208279 - Multi-layer structure for use in the fabrication of integrated circuit devices and methods for fabrication of same: A multi-layer structure for use in the fabrication of integrated circuit devices is adapted for the formation of enhancement mode high electron mobility transistors, depletion mode high electron mobility transistors, and power high electron mobility transistors. The structure has, on a substrate, a channel layer, spacer layer on the channel...

20060208281 - Contact in planar nrom technology: A method for fabricating a non-volatile memory array includes placing contacts over bit lines in a self-aligned manner. The placing includes forming self-aligned contact holes bounded by a second insulating material resistant to the removal of a first insulating material previously deposited over the bit lines, and depositing contact material,...

20060208282 - Memory cell arrays: A memory device includes memory cells, bit lines, active areas, and transistors formed in each active area and electrically coupling memory cells to corresponding bit lines. The memory cells can have an area of about 6F2, and the bit lines can be coupled to sense amplifiers in a folded bit...

20060208283 - Semiconductor device: A semiconductor device includes a plurality of first word lines which extend in a first direction, a plurality of second word lines which extend in a direction orthogonal to the first direction, a plurality of selection circuits which are provided at intersections of the first word lines and the second...

20060208284 - Method for manufacturing a microlens substrate and method for manufacturing a liquid crystal panel: Disclosed herein is a method for manufacturing a microlens substrate which is excellent in chemical resistance and light fastness to intense light irradiation, and is capable of forming a microlens substrate of a high accuracy of form. The method includes the steps of: forming a lens-shaped curve at a surface...

20060208285 - Image sensor with embedded photodiode region and fabrication method thereof: An image sensor in which a plurality of pixels having at least a photodiode, a reset transistor, and source follower transistor are formed, wherein each pixel comprises an electrical-charge transfer gate transistor between the photodiode and reset transistor, and a floating diffusion region constituting a node connecting the reset transistor...

20060208286 - Method for manufacturing semiconductor device and semiconductor device: A method of forming a crystal grain for use in a semiconductor manufacturing process, the method including the steps of forming an oxide silicon film on a glass substrate, etching at least one hole at a predetermined location in the oxide silicon film, forming an amorphous silicon film over the...

20060208287 - Lateral programmable polysilicon structure incorporating polysilicon blocking diode: A programmable element includes a diode and a programmable structure formed in a polysilicon layer isolated from a semiconductor substrate by a dielectric layer. The diode includes a first region and a second region of opposite conductivity types. The programmable structure includes a third region and a fourth region of...

20060208288 - Imaging with gate controlled charge storage: A pixel cell comprises a photo-conversion device for generating charge and a gate controlled charge storage region for storing photo-generated charge under control of a control gate. The charge storage region can be a single CCD stage having a buried channel to obtain efficient charge transfer and low charge loss....

20060208289 - Mos image sensor: A semiconductor image sensor includes: a semiconductor substrate having a number of pixels disposed in a matrix shape, the semiconductor substrate comprising a first region including a charge accumulation region of a photodiode and a floating diffusion and a second region including transistors, each having a gate electrode and source/drain...

20060208292 - Image pickup device and camera with expanded dynamic range: The image pickup device of the invention has a path deeper in a semiconductor substrate, than a region wherein a channel is formed, upon turning on a first MOS transistor, under a gate thereof. The path is arranged by forming a P-type layer for forming a potential barrier, within a...

20060208290 - Semiconductor light emitting devices and methods: A method for producing an optical output, including the following steps: providing first and second electrical signals; providing a bipolar light-emitting transistor device that includes collector, base, and emitter regions; providing a collector electrode coupled with the collector region and an emitter electrode coupled with the emitter region, and coupling...

20060208291 - Solid state image pickup device and camera: A solid state image pickup device which can prevent color mixture by using a layout of a capacitor region provided separately from a floating diffusion region and a camera using such a device are provided. A photodiode region is a rectangular region including a photodiode. A capacitor region includes a...

20060208293 - Color filter substrate for liquid crystal display device and method for fabricating the same: A method for fabricating a color filter substrate for a liquid crystal display device having a RGBW pixel structure, wherein a white sub-color filter layer is formed during a process of forming a planarization layer with a step, and a spacer pattern is formed on the white sub-color filter layer...

20060208294 - Method of manufacturing magnetic random access memory including middle oxide layer: In a magnetic random access memory (MRAM) having a transistor and a magnetic tunneling junction (MTJ) layer in a unit cell, the MTJ layer includes a lower magnetic layer, an oxidation preventing layer, a tunneling oxide layer, and an upper magnetic layer, which are sequentially stacked. The tunneling oxide layer...

20060208295 - Ferroelectric memory device: The present invention provides a ferroelectric memory device (101) having plural memory cells each composed of a memory cell transistor and a memory cell capacitor, in which the respective memory cell capacitor (101a) comprises a lower electrode (2) that is independent for each of the memory cell capacitors, a ferroelectric...

20060208296 - Novel structure and method to fabricate high performance mtj devices for mram applications: A high performance MTJ in an MRAM array is disclosed in which the bottom conductor has an amorphous Ta capping layer. A key feature is a surfactant layer comprised of oxygen that is formed on the Ta surface. The resulting smooth and flat Ta capping layer promotes a smooth and...

20060208297 - Polymer memory having a ferroelectric polymer memory material with cell sizes that are asymmetric: A polymer memory and its method of manufacture are provided. One multi-layer construction of the polymer memory has two sets of word lines and a set of bit lines between the word lines. The word lines of each set of word lines have center lines that are spaced by a...

20060208298 - Memory cell of dynamic random access memory and array structure thereof: A DRAM cell including a trench capacitor structure, a transistor and a stacked capacitor structure is provided. A first electrode of the trench capacitor structure is disposed in the substrate at the bottom of a trench. A second electrode of the trench capacitor structure is disposed in the trench. The...

20060208299 - Semiconductor device having stacked decoupling capacitors: A semiconductor device having transistors formed on different layers of a stack structure includes a stacked capacitor cluster, wherein a stacked capacitor of the stacked capacitor cluster includes an insulation layer of a transistor of the semiconductor device, and at least a first conduction layer and a second conduction layer...

20060208300 - Finfet-type semiconductor device and method for fabricating the same: A semiconductor device includes: a semiconductor substrate in which a trench is formed; a source region and a drain region each of which is buried in the trench and contains an impurity of the same conductive type; a semiconductor FIN buried in the trench and provided between the source and...

20060208305 - In-service reconfigurable dram and flash memory device: A memory cell that has both a DRAM cell and a non-volatile memory cell. The non-volatile memory cell might include a flash memory or an NROM cell. The memory cell is comprised of a vertical floating body transistor with dual gates, one on either side of a vertical pillar of...

20060208302 - Non-volatile memory device having charge trap layer and method of fabricating the same: A non-volatile memory device having a charge trap layer and a method of fabricating the same are provided. The non-volatile memory device includes a semiconductor substrate having an active region and a field region in contact with the active region. A trench isolation layer is formed within the semiconductor substrate...

20060208303 - Semiconductor device with floating trap type nonvolatile memory cell and method for manufacturing the same: The present invention discloses a semiconductor device having a floating trap type nonvolatile memory cell and a method for manufacturing the same. The method includes providing a semiconductor substrate having a nonvolatile memory region, a first region, and a second region. A triple layer composed of a tunnel oxide layer,...

20060208301 - Semiconductor memory device and method of driving a semiconductor memory device: A semiconductor memory device includes a semiconductor layer; a source layer provided in the semiconductor layer; a drain layer provided in the semiconductor layer; a body region provided in the semiconductor layer between the source layer and the drain layer; a gate insulation film provided on the body region; and...

20060208304 - Three-dimensional memory devices: Memory devices are disclosed. One example of a memory device may include two layers of memory arrays each containing at least four memory cells. In particular, the memory device includes two word lines commonly shared by the two layers of the memory arrays, with the word lines coupled with the...

20060208309 - Non-planar flash memory having shielding between floating gates: A first plurality of memory cells is formed on pillars in a first column of the array. A second plurality of memory cells is formed in a first set of trenches in the same column. The second plurality of memory cells is coupled to the first plurality of memory cells...

20060208306 - Single-poly eeprom: The single-poly EEPROM includes a first PMOS transistor serially connected to a second PMOS transistor. The first and second PMOS transistors are both formed on an N-well of a P type substrate. The first PMOS transistor includes a floating gate, a first P+ doped drain region and a first P+...

20060208307 - Split gate flash memory and manufacturing method thereof: A split gate flash memory is provided. Trenches are formed in the substrate to define active layers. The device isolation layers are formed in the trenches. The surface of the device isolation layers is lower than the surface of the active layers. The stacked gate structures each including a tunneling...

20060208308 - Use of selective epitaxial silicon growth in formation of floating gates: Apparatus utilizing epitaxial silicon growth on a base structure of a floating gate of a floating-gate memory cell to increase the available coupling area of the floating gate while reducing the spacing between adjacent memory cells. The epitaxial silicon growth facilitates a reduction in spacing between adjacent cells beyond the...

20060208310 - Method and apparatus for a flash memory device comprising a source local interconnect: A method for forming a flash memory device having a local interconnect connecting source regions of a plurality of transistors within a sector allows for a highly selective wet etch of a dielectric region overlying the source region. An embodiment of the method comprises the use of an etch-resistant layer...

20060208311 - Quantum circuit and quantum computer: The present invention realizes a quantum circuit and a quantum computer capable of performing multi-bit quantum computation. A quantum bit is represented by the polarization directions of light, a sequence of polarized light pulses representing a quantum bit string is sequentially supplied, and the amount of polarization rotation applied to...

20060208312 - Semiconductor storage device and manufacturing method therefor, semiconductor device, portable electronic equipment and ic card: A semiconductor storage device includes a field effect transistor which has a gate insulator, a gate electrode and a pair of source/drain diffusion regions on a semiconductor substrate. The device also includes a coating film made of a dielectric having a function of storing electric charge and formed on the...

20060208313 - Double gate fet and fabrication process: A method of fabricating a double gate FET on a silicon substrate includes the steps of sequentially epitaxially growing a lower gate layer of crystalline rare earth silicide material on the substrate, a lower gate insulating layer of crystalline rare earth insulating material, an active layer of crystalline semiconductor material,...

20060208314 - Semiconductor device and manufacturing method for semiconductor device: To provide a semiconductor device capable of reducing a gate capacitance, and preventing breakdown of a gate oxide film if a large amount of current flows. A semiconductor device according to an embodiment of the present invention includes: an epitaxial layer; a channel region formed on the epitaxial layer; a...

20060208315 - Semiconductor element and semiconductor memory device using the same: A field-effect semiconductor element implemented with a fewer number of elements and a reduced area and capable of storing data by itself without need for cooling at a cryogenic temperature, and a memory device employing the same. Gate-channel capacitance is set so small that whether or not a trap captures...

20060208316 - High performance tunneling-biased mosfet and a process for its manufacture: A semiconductor structure and a method for its manufacture are provided. In one example, the structure includes a well region doped with a first type dopant (e.g., a P-type or N-type dopant). A gate pedestal formed over the well region has two ends, one of which at least partially overlies...

20060208317 - Layout structure of semiconductor cells: A layout structure of semiconductor cells is described. The layout structure includes multiple semiconductor cells, wherein at least one pair of cells has an overlap member part between them, so that the area of the pair of cells is smaller than the sum of respective areas of the two cells....

20060208318 - Mos field effect semiconductor device and method for fabricating the same: A high-performance CMOS field effect semiconductor device using metal gate electrodes. An n-type gate electrode and a p-type gate electrode are formed by using a same metal and differ in nitrogen concentration. As a result, a high-performance CMOS field effect semiconductor device having the n-type gate electrode and the p-type...

20060208319 - Semiconductor memory device and method of manufacturing the same, a method of manufacturing a vertical misfet and a vertical misfet, and a method of manufacturing a semiconductor device and a semiconductor device: Vertical MISFETs are formed over drive MISFETs and transfer MISFETs. The vertical MISFETs comprise rectangular pillar laminated bodies each formed by laminating a lower semiconductor layer (drain), an intermediate semiconductor layer, and an upper semiconductor layer (source), and gate electrodes formed on corresponding side walls of the laminated bodies with...

20060208320 - Mis-type semiconductor device: A MIS-type semiconductor device is configured with a semiconductor substrate, and a p-type MIS transistor, and a n-type MIS transistor which is provided on the semiconductor substrate, the p-type MIS transistor including a gate electrode which is made of Ge and one element which is selected from the group consisting...

20060208321 - Selectable open circuit and anti-fuse element: An integrated circuit is provided with a semiconductor substrate that is doped with a set concentration of an oxidizable dopant of a type that segregates to the top surface of a suicide when the semiconductor substrate is reacted to form such a silicide. A gate dielectric is on the semiconductor...

20060208322 - Method and apparatus for removing adjacent conductive and non-conductive materials of a microelectronic substrate: A microelectronic substrate and method for removing adjacent conductive and nonconductive materials from a microelectronic substrate. In one embodiment, the microelectronic substrate includes a substrate material (such as borophosphosilicate glass) having an aperture with a conductive material (such as platinum) disposed in the aperture and a fill material (such as...

20060208323 - Dual gate dielectric thickness devices: A semiconductor device and a method of fabricating the semiconductor device, the semiconductor device including: one or more FETs of a first polarity and one or more FETs of a second and opposite polarity, at least one of the one or more FETs of the first polarity having a gate...

20060208324 - Linear device: A linear MISFET is resilient, flexible and capable of being fabricated into an integrated circuit in an arbitrary shape. Typically a structure includes a source region and drain region arranged in parallel. However, since a channel length of the MISFET for determining the electric characteristics thereof is determined by a...

20060208325 - Semiconductor device with gate insulating film and manufacturing method thereof: A MISFET includes: a p type substrate having a channel region with an impurity concentration C; an insulating film made of SiO2 and formed on the channel region; and an insulating film made of HfSiON and formed on the gate insulating film. When there is a postulated MISFET including a...

20060208327 - Acceleration sensor and method of manufacturing acceleration sensor: An acceleration sensor includes a semiconductor substrate, a sensing element formed on the semiconductor substrate, a bonding frame made of polysilicon which is formed on the semiconductor substrate and surrounds the sensing element, and a glass cap which is bonded to a top surface of the bonding frame made of...

20060208326 - Method of fabrication of ai/ge bonding in a wafer packaging environment and a product produced therefrom: A method of bonding of germanium to aluminum between two substrates to create a robust electrical and mechanical contact is disclosed. An aluminum-germanium bond has the following unique combination of attributes: (1) it can form a hermetic seal; (2) it can be used to create an electrically conductive path between...

20060208328 - Electrostatic micro switch, production method thereof, and apparatus provided with electrostatic micro switch: An electrostatic micro switch includes a fixed electrode disposed on a fixed substrate; a movable substrate elastically supported by the fixed substrate, the movable substrate including a movable electrode facing the fixed electrode. The movable substrate includes a semiconductor including a plurality of regions having different values of resistivity and...

20060208329 - Semiconductor device including semiconductor memory element and method for producing same: A wafer, in which a plurality of rectangular regions are defined on the face of the wafer by streets arranged in a lattice pattern, and a semiconductor memory element is disposed in each of the rectangular regions, is divided along the streets to separate the rectangular regions individually, thereby forming...

20060208330 - Method and structure to reduce optical crosstalk in a solid state imager: Methods and structures to reduce optical crosstalk in solid state imager arrays. Sections of pixel material layers that previously would have been etched away and disposed of as waste during fabrication are left as conserved sections. These conserved sections are used to amend the properties and performance of the imager...

20060208331 - Miniature optical element for wireless bonding in an electronic instrument: A method of manufacturing an optical element including the steps of: forming a through hole in a semiconductor element which has an optical section and an electrode electrically connected to the optical section; and forming a conductive layer extending from a first surface of the semiconductor element on which the...

20060208332 - Schottky diode and method of manufacture: A Schottky diode capable of sustaining a breakdown voltage of greater than about 250 volts and a method for its manufacture. An epitaxial layer disposed on a semiconductor substrate has a thickness of at least about 15 micrometers and an impurity concentration ranging from about 1×1014 atoms per cubic centimeter...

20060208333 - Image sensor: A buried oxide is provided in a substrate of a photodiode so as to be opposed to a cathode and is in contact with a lower end of a depletion layer. The buried oxide is polarized owing to charges forming the depletion layer and thus works as a capacitor. A...

20060208334 - Semiconductor device having super junction structure and method for manufacturing the same: A super junction type semiconductor device includes a first semiconductor layer of a first conductivity type, a super junction structure, and a second semiconductor layer of a second conductivity type. The thickness of the second semiconductor layer varies such that the thickness in the peripheral region is greater than that...

20060208337 - Enhancing strained device performance by use of multi narrow section layout: A semiconductor device having high tensile stress. The semiconductor device comprises a substrate having a source region and a drain region. Each of the source region and the drain region includes a plurality of separated source sections and drain sections, respectively. A shallow trench isolation (STI) region is formed between...

20060208335 - Films deposited at glancing incidence for multilevel metallization: Systems, devices and methods are provided to improve performance of integrated circuits by providing a low-k insulator. One aspect is an integrated circuit insulator structure that includes a vapor-deposited dielectric material. The dielectric material has a predetermined microstructure formed using a glancing angle deposition (GLAD) process. The microstructure includes columnar...

20060208336 - Semiconductor structure having a strained region and a method of fabricating same: A semiconductor structure including a highly strained selective epitaxial top layer suitable for use in fabricating a strained channel transistor. The top layer is deposited on the uppermost of a series of one or more lower layers. The lattice of each layer is mismatched with the lattice of its subjacent...

20060208338 - Nonvolatile memory devices and methods of forming the same: Methods of forming a memory device include forming a device isolation layer in a semiconductor substrate including a cell array region and a resistor region, the device isolation layer extending into the resistor region and defining an active region in the semiconductor substrate. A first conductive layer is formed on...

20060208339 - Semiconductor device and mim capacitor: An MIM capacitor comprises first and second conductor patterns embedded in a first interlayer insulation film so as to extend continuously in a mutually opposing relationship and forming a part of a comb-shaped capacitor pattern, and third and fourth conductor patterns formed in a second interlayer insulation film separated from...

20060208340 - Protection device for handling energy transients: A protection device for handling energy transients includes a plurality of basic unit Zener diodes connected in series to achieve a desired breakdown voltage. Each of the basic unit Zener diodes is formed in a first-type substrate. Each of the basic unit Zener diodes comprises a second-type well formed in...

20060208341 - Bonded substrate and method of making same: Ge/Si and other nonsilicon film heterostructures are formed by hydrogen-induced exfoliation of the Ge film which is wafer bonded to a cheaper substrate, such as Si. A thin, single-crystal layer of Ge is transferred to Si substrate. The bond at the interface of the Ge/Si heterostructures is covalent to ensure...

20060208342 - Silicon-on-nothing metal oxide semiconductor field effect transistor and method of manufacturing the same: The present invention relates to a SON MOSFET and method of manufacturing the same, in which a blister is formed within a silicon substrate, thus improving the disadvantages of a bulk structure and a Silicon-On-Insulator (SOI) structure at the same time. The SON MOSFET according to the present invention comprises...

20060208343 - Micromechanical strained semiconductor by wafer bonding: One aspect disclosed herein relates to a method for forming a strained semiconductor structure. In various embodiments of the method, a number of recesses are formed in a surface of a silicon substrate using a Local Oxidation of Silicon (LOCOS) process, and a silicon membrane is bonded to the substrate....

20060208346 - Flat-shaped battery: A flat-shaped battery according to the present invention includes: an outer can having an opening at its upper end; a gasket disposed at an inner edge of the opening; and a sealing plate that seals the opening together with the gasket. In this flat-shaped battery, the outer can houses a...

20060208344 - Lead frame panel and method of packaging semiconductor devices using the lead frame panel: A lead frame panel (40) includes a body (42) having an array of die support areas (44) for receiving respective semiconductor dies. The die support areas (44) are surrounded by leads (46). Adjacent rows of leads are coupled by half-etched connection bars (48), such that each half-etched portion of the...

20060208345 - Semiconductor chip and semiconductor device including the same: A semiconductor chip includes a plurality of pads; input/output circuits connected with the plurality of pads, respectively; a product data storage section configured to store a product data; and a setting section configured to set to an active state, each of the input circuits which is connected to one of...

20060208347 - Semiconductor device package: A semiconductor device package includes a semiconductor device mounted and electrically coupled to the upper surface of a substrate, a package body encapsulating the semiconductor device against a portion of the upper surface of the substrate; and a metal ring formed on the upper surface of the substrate and connected...

20060208348 - Stacked semiconductor package: In a stacked semiconductor package, since electric power is supplied to a second semiconductor package through a first semiconductor package, a power supply path becomes complicated and fluctuation of its inductance becomes large, whereby power bounce occurs to reduce signal quality and also prevent high speed signal communication. Therefore, according...

20060208349 - Semiconductor device and manufacturing method for the same: A semiconductor device and a manufacturing method for the same are provided wherein the reliability of connections of fine metal wires connecting a second semiconductor chip to a wiring board can be improved in the case wherein the second semiconductor chip, which is located above the lower, first semiconductor chip,...

20060208350 - Support elements for semiconductor devices with peripherally located bond pads: A support structure for a semiconductor device with peripherally disposed contacts includes a support substrate and at least one conductive column protruding from the support substrate. The at least one conductive column is configured to contact an outer connector on a peripheral edge of a semiconductor device that may be...

20060208351 - Semiconductor devices including peripherally located bond pads, intermediates thereof, and assemblies and packages including the semiconductor devices: A semiconductor device package includes outer connectors that are located along at least one peripheral edge thereof and that extend substantially across the height of the peripheral edge. Each outer connector is formed by forming a conductive via that extends substantially through a substrate blank and laterally across a street...

20060208352 - Strain silicon wafer with a crystal orientation (100) in flip chip bga package: A method and system is disclosed for better packaging semiconductor devices. In one example, a semiconductor device package comprises a package substrate, at least one die with an orientation of <100> placed on the substrate with electrical connections made between the package substrate and the die, and an underfill fillet...

20060208353 - Semiconductor cooling system and process for manufacturing the same: A cooling device for an element such as a microprocessor in a computer, and a process for manufacturing the cooling device. The cooling device provides an effective structure of cooling a microprocessor by providing a metallic filler layer and a metal plate layer spreading out heat generated from the microprocessor,...

20060208354 - Thermal interface structure and process for making the same: A thermal interface structure (10, 20) is provided for a highly conductive thermal interface between an electronic component and a cooling device for dissipating heat generated by the electronic component. The thermal interface structure includes a matrix (12, 22) and a plurality of carbon nanotubes (14, 24) incorporated in the...

20060208355 - routing configuration for high frequency signals in an integrated circuit package: An apparatus for routing a high-speed signal is disclosed, having a signal router and a plurality of projections extending therefrom. The projections are separated from each other by a distance between about 0.25 and 0.125 of λgo, wherein λgo is a guide wavelength at cut-off frequency of the first signal...

20060208356 - Wiring board and method of manufacturing the same: A wiring board includes an insulating layer in which a semiconductor chip is embedded, and a wiring structure connected to the semiconductor chip. A reinforcing member reinforcing the insulating layer is embedded in the insulating layer. This enables reduction in a thickness of the wiring board and a suppression of...

20060208359 - Double density method for wirebond interconnect: A method, comprising bonding a first wire to a single die bond pad to form a first bond, bonding the first wire to a bond post to form a second bond, bonding a second wire to the first bond, and coupling the second wire to the bond post....

20060208357 - Integrated device and electronic system: The present invention relates to an integrated device comprising an electronic circuit chip, a solder contact structure to provide contact to the electronic circuit chip and an elastic contact structure to provide contact to the electronic circuit chip, wherein the solder contact structure and the elastic contact structure are arranged...

20060208358 - Stacked package integrated circuit: The invention relates to an integrated circuit, electronic device, and method for assembling an integrated circuit package with at least one bottom module with a stacked die package comprising at least two dies within one single mold cap. To allow chip area reduction, the invention provides at least one memory...

20060208360 - Top via pattern for bond pad structure: Top via pattern for a bond pad structure has at least one first via group and at least one second via group adjacent to each other. The first via group has at least two line vias extending in a first direction. The second via group has at least two line...

20060208361 - Semiconductor chip: A semiconductor chip 100 includes a semiconductor substrate (not shown), and a stacked film 150 formed over the semiconductor substrate, which includes carbon-containing insulating films such as a first interlayer insulating film 106, and carbon-free insulating films such as an underlying layer 102 and a top cover film 124. The...

20060208362 - Carbon nanotubes with controlled diameter, length, and metallic contacts: Some embodiments of the present invention include fabricating carbon nanotube bundles with controlled length, diameter, and metallic contacts....

20060208363 - Three-dimensional package and method of forming same: An electronic device (60) including a first integrated circuit (IC) die (62) electrically connected to a first lead frame (64) and a second IC die (66) electrically connected to a second lead frame (68). The first lead frame (64) is electrically connected to the second lead frame (68) by at...

20060208365 - Flip-chip-on-film package structure: A flip-chip-on-film package structure includes a flexible substrate, a flip chip, and a first heat sink. The flexible substrate has an upper surface and a lower surface. The flip chip is mounted on the upper surface of the flexible substrate and electrically connected to the flexible substrate. The first heat...

20060208364 - Led device with flip chip structure: The present invention provides an LED device with a flip chip structure. The LED device comprises an insulating substrate, an LED flip chip, a molding compound, a first conductive element, and a second conductive element. The LED flip chip is electrically connected to the connection pads on the insulating substrate...

20060208366 - Microelectronic component assemblies with recessed wire bonds and methods of making same: The present disclosure suggests various microelectronic component assembly designs and methods for manufacturing microelectronic component assemblies. In one particular implementation, a microelectronic component assembly includes a microelectronic component, a substrate, and at least one bond wire. The substrate has a reduced-thickness base adjacent terminals of the microelectronic component and a...

20060202187 - Photonic device: Embodiments of methods, apparatuses, devices, or systems for forming a photonic device are described....

20060202188 - Nitride semiconductor light-emitting device, method of fabricating it, and semiconductor optical apparatus: A nitride semiconductor laser device has a nitride semiconductor substrate that includes a dislocation-concentrated region 102 and a wide low-dislocation region and that has the top surface thereof slanted at an angle in the range of 0.3° to 0.7° relative to the C plane and a nitride semiconductor layer laid...

20060202189 - Semiconductor device including a memory cell with a negative differential resistance (ndr) device: A semiconductor device may include at least one memory cell comprising a negative differential resistance (NDR) device and a control gate coupled thereto. The NDR device may include a superlattice including a plurality of stacked groups of layers, with each group of layers of the superlattice including a plurality of...

20060202190 - Aromatic amine derivative and organic electroluminescent element employing the same: The present invention relates to aromatic amine derivatives having a specific structure in which a substituted anthracene structure is bonded to an amine structure substituted with benzene rings having substituent groups; and organic electroluminescence devices comprising a cathode, an anode and one or plural organic thin film layers having at...

20060202193 - Bis-anthracenyl chiroptical compositions: where X is sulfur or selenium; where the R and R1 groups are alkyl or alkyl that together form a ring of carbon atoms; where An is the anion of a strong acid; and where the Z element is a chiral ring-completing system of atoms that changes chirality on tautomerization....

20060202198 - Integrated circuit, and method for the production of an integrated circuit: Embodiments of the invention relate to an integrated circuit comprising an organic semiconductor, particularly an organic field effect transistor (OFET) that is provided with a dielectric layer. The integrated circuit is produced by means of a polymer formulation consisting of a) 100 parts of at least one crosslinkable basic polymer,...

20060202192 - Memory device with improved switching speed and data retention: The present memory device includes first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the passive layer and the second electrode. In undertaking an operation on the memory device, ions moves into within and from within the active layer, and the...

20060202199 - Organic thin film transistor array panel and manufacturing method thereof: An organic thin film transistor array panel according to an embodiment of the present invention includes: a substrate; a data line disposed on the substrate; an insulating layer disposed on the data line and having a contact hole exposing the data line; a first electrode disposed on the insulating layer...

20060202200 - Organic thin film transistor array panel and manufacturing method thereof: An organic thin film transistor array panel includes a substrate, a data line disposed on the substrate, a gate line intersecting the data line and including a gate electrode, a gate insulating layer disposed on the gate line and having a contact hole exposing the data line, a first electrode...

20060202197 - Platinum complex and light-emitting device: In the general formula 1, two of the rings A, B, C, and D each independently represent an aromatic ring or an aromatic heterocyclic ring, while the other two rings each represent a nitrogen-containing heterocyclic ring; RA-D represent the substituents; each the rings A and B, the rings B and...

20060202194 - Red phosphorescene compounds and organic electroluminescence device using the same: Red phosphorescene compounds and organic electro-luminescence device using the same are disclosed. In an organic electroluminescence device including an anode, a hole injecting layer, a hole transport layer, a light emitting layer, an electron transport layer, an electron injecting layer, and a cathode serially deposited on one another, the organic...

20060202191 - Semiconductors containing perfluoroether acyl oligothiohpene compounds: Semiconductor devices are described that include a semiconductor layer that comprises a perfluoroether acyl oligothiophene compound, preferably an α,ω-bis-perfluoroether acyl oligothiophene compound. Additionally, methods of making semiconductor devices are described that include depositing a semiconductor layer that contains a perfluoroether acyl oligothiophene compound, preferably an α,ω-bis(2-perfluoroether acyl oligothiophene compound....

20060202195 - Siloxane-polymer dielectric compositions and related organic field-effect transistors: Dielectric compositions comprising siloxane and polymeric components, as can be used in a range of transistor and related device configurations....

20060202196 - Transistor: A thin film field effect transistor is disclosed that includes a gate electrode, a gate insulator film the on gate electrode, and a first organic electronic material film containing a first organic electronic material on the gate insulator film. A source electrode and a drain electrode are spaced apart from...

20060202201 - Wafer-level package having test terminal: A wafer-level package includes a semiconductor wafer having at least one semiconductor chip circuit forming region each including a semiconductor chip circuit each provided with test chip terminals and non test chip terminals, at least one external connection terminal, at least one redistribution trace provided on the semiconductor wafer, at...

20060202205 - Organic electroluminescent device and method of fabricating the same: An organic electroluminescent device includes first and second substrates facing and spaced apart from each other, the first and second substrates including a pixel region; a gate line on an inner surface of the first substrate; a data line crossing the gate line; a switching thin film transistor connected with...

20060202202 - Pixel structure, active matrix substrate, method of manufacturing active matrix substrate, electro-optical device, and electronic apparatus: A pixel structure includes pixel electrodes and switching elements which correspond to the pixel electrodes. The pixel electrodes and the switching elements are formed on the same substrate, and each pixel electrode is provided in a layer on the substrate, not on a semiconductor layer of the switching element....

20060202203 - Structure of tft electrode for preventing metal layer diffusion and manufacturing method therefor: The invention provides a TFT electrode structure and its manufacturing method that can prevent metal diffusion occurring in the fabrication of a TFT, and thereby reduce the risk of contamination of the chemical vapor deposition process due to metallic ion diffusion. The transparent pixel electrode is formed after the gate...

20060202204 - Thin film transistor, thin film transistor panel, and method of manufacturing the same: The present invention relates to a TFT, a TFT array panel, and a method of manufacturing the TFT array panel. A method of manufacturing the TFT array panel includes the steps of forming a first electrode and a second electrode that are separated from each other on a substrate, forming...

20060202206 - Semiconductor device and method for manufacturing the same: An object of the present invention is to provide a semiconductor device which has flexibility and resistance to a physical change such as bending and a method for manufacturing the semiconductor device. A semiconductor device of the present invention includes a plurality of transistors provided over a flexible substrate, each...

20060202207 - Image display device: On a cathode substrate 10, a bottom electrode 11, a tunneling insulator 12, and a top electrode 13 are prepared. On a lower layer of the top electrode 13, a top electrode bus line 16 is formed, and the top electrode 13 is reliably connected to the top electrode bus...

20060202208 - Silicon plate, producing method thereof, and solar cell: A polycrystalline silicon plate has grain boundary lines on a surface thereof, and at least one of the grain boundary lines is a quasi-linear grain boundary line (1). The silicon plate is used to produce a solar cell. The silicon plate is formed using a base substrate having an irregular...

20060202209 - Limiting net curvature in a wafer: A method and apparatus for limiting net curvature in a substrate is provided. A layer is formed on one side of a substrate to limit curvature that may be introduced in the substrate by formation of a thermal spreading layer on an opposing side of the substrate. For example, introduction...

20060202210 - Led mounting having increased heat dissipation: There is disclosed a system and method for increasing heat dissipation of LED displays by using the current PCB packaging mounted to a LCD panel support structure thereby eliminating the need for a metal core PCB. In one embodiment, reverse mounted LEDs having heat dissipation pads are used to optimize...

20060202211 - Method for fabricating light-emitting device utilizing substrate transfer by laser decomposition: A light-emitting device includes an element structure including at least two semiconductor layers having mutually different conductivity types. A transparent p-side electrode of ITO is formed on the element structure. A bonding pad is formed on a region of the p-side electrode. An n-side electrode made of Ti/Au is formed...

20060202212 - Semiconductor optical device: A semiconductor optical device comprises a lower cladding layer of a first conductive type, an upper cladding layer of a second conductive type, and an active layer. The lower cladding layer has a first region and a second region. The first region extends in a direction of a predetermined axis,...

20060202213 - Device mounting substrate and image display device: A method of repairing a defective one of devices mounted on substrate is provided. Devices are arrayed on a substrate and electrically connected to wiring lines connected to a drive circuit, to be thus mounted on the substrate. The devices mounted on the substrate are then subjected to an emission...

20060202214 - Organic thin film transistor and flat panel display device including the same: Provided are an organic thin film transistor providing smoother movement of holes between a source electrode or a drain electrode and a p-type organic semiconductor layer, and a flat panel display device including the organic thin film transistor. The organic thin film transistor includes a substrate, a gate electrode disposed...

20060202217 - Nitride semiconductor light emitting device and method of manufacturing the same: A nitride semiconductor light emitting device includes a substrate for growing a gallium nitride-based semiconductor material, an n-type nitride semiconductor layer on the substrate, an active layer on the n-type nitride semiconductor layer such that a predetermined portion of the n-type nitride semiconductor layer is exposed, a p-type nitride semiconductor...

20060202215 - Polarization-reversed iii-nitride light emitting device: A device structure includes a III-nitride wurtzite semiconductor light emitting region disposed between a p-type region and an n-type region. A bonded interface is disposed between two surfaces, one of the surfaces being a surface of the device structure. The bonded interface facilitates an orientation of the wurtzite c-axis in...

20060202216 - Semiconductor light emitting device, semiconductor light emitting apparatus, and method of manufacturing a semiconductor light emitting device: A semiconductor light emitting device comprises: a semiconductor multilayer structure; and an aluminum nitride layer. The semiconductor multilayer structure includes a light emitting layer that emits a light. The aluminum nitride layer is provided on a surface of the semiconductor multilayer structure. The aluminum nitride layer has asperities with an...

20060202218 - Light-emitting diode for decoration: A light emitting diode includes a light emitting body, a lead frame supplying power to the light emitting body and a light transmitting resin covering the light emitting body and part of the lead frame. The top surface of the light transmitting resin is formed as a plane at a...

20060202220 - Display device and method for manufacturing the same: A method for manufacturing a display device and a display device manufactured thereby are provided. The above method has the steps of forming a first resin material on a base substrate so as to surround a region in which light-emitting devices are provided, applying a second resin material in the...

20060202221 - Led: A LED comprises a base body. The base body carries a light generating element. A light guide body is provided in the emitting direction of the light generating element. According to the invention, the light guide body comprises diffractive groups of light guide elements to fix the emission angle of...

20060202222 - Package structure of organic electroluminescent devices: A package structure of organic electroluminescent device comprises at least one isolating wall and at least one squeeze-out channel provided under a package lid. The adhesive coating place and squeeze-out area as laminating are able to be defined in package process due to the isolating wall and squeeze-out channel provided,...

20060202219 - Semiconductor light emitting device and semiconductor light emitting apparatus: A semiconductor light emitting device comprises: a substrate; a semiconductor stacked structure; a first electrode; a second electrode; and a reflective film. The substrate has a top face and a rear face electrode forming portion opposed thereto, and is translucent to light in a first wavelength band. The rear face...

20060202223 - Increased light extraction from a nitride led: In a method for fabricating a flip-chip light emitting diode device, a submount wafer is populated with a plurality of the light emitting diode dies. Each device die is flip-chip bonded to the submount. Subsequent to the flip-chip bonding, a growth substrate is removed. The entire submount is immersed in...

20060202225 - Submount for use in flipchip-structured light emitting device including transistor: Disclosed herein is a submount to mount a light emitting diode in a flipchip-structured light emitting device. The submount including a transistor to mount a nitride semiconductor light emitting diode in a flipchip-structured light emitting device includes: a substrate made of a first conductive semiconductor material; a first region formed...

20060202224 - Substrate structure for light-emitting diode module: A substrate structure for light-emitting diode module includes a highly heat-radiating metal substrate, a plurality of isolating islands formed on a top surface of the metal substrate only at positions and/or paths for forming required conducting circuits, and a plurality of conduction islands separately formed on the isolating islands to...

20060202226 - Single or multi-color high efficiency light emitting diode (led) by growth over a patterned substrate: A single or multi-color light emitting diode (LED) with high extraction efficiency is comprised of a substrate, a buffer layer formed on the substrate, one or more patterned layers deposited on top of the buffer layer, and one or more active layers formed on or between the patterned layers, for...

20060202227 - Vertical type nitride semiconductor light emitting diode: Disclosed herein is a vertical type nitride semiconductor light emitting diode. The nitride semiconductor light emitting diode comprises an n-type nitride semiconductor layer, an active layer formed under the n-type nitride semiconductor layer, a p-type nitride semiconductor layer formed under the active layer, and an n-side electrode which comprises a...

20060202228 - Semiconductor device: A semiconductor device is provided which comprises a heat-radiative support plate 5; and first and second semiconductor elements 1 and 2 mounted and layered on support plate 5 for alternate switching of first and second semiconductor elements 1 and 2. The arrangement of piling and securing first and second semiconductor...

20060202229 - Semiconductor device and method of manufacturing such a device: The invention relates to a semiconductor device with a substrate (11) and a semiconductor body (12) with a heterojunction bipolar, in particular npn, transistor with an emitter region (1), a base region (2) and a collector region (3), which are provided with, respectively, a first, a second and a third...

20060202230 - Semiconductor integrated circuit and semiconductor integrated circuit manufacturing method: An SOI structure semiconductor integrated circuit is disclosed that reduces the number of power supply wires setting substrate potential of a semiconductor element and reduces power consumption. With an SOI structure semiconductor integrated circuit, a first circuit block 51 does not include a critical path and a second circuit block...

20060202231 - Semiconductor integrated circuit device, and apparatus and program for designing same: Disclosed are a design method and apparatus in which information regarding a cell is input, the cell having taps in a substrate surface, for supplying the potentials of respective ones of wells in which active elements are formed, and source diffusion regions in the substrate surface, conductivity types thereof being...

20060202232 - Memory control unit and memory system: A memory control unit includes fuses that are selectively blown to set a manufacturer's identification code (ID), and a further fuse that is selectively blown to designate the memory control unit as a general-purpose unit or a custom unit. When designated as a custom unit, the memory control unit uses...

20060202233 - Semiconductor device and manufacturing method thereof: A semiconductor device is disclosed. The semiconductor device includes a semiconductor layer having a channel region, a strain generating layer to cause strain in the channel region by applying a stress to the channel region, a gate insulating film formed on the channel region, and a gate electrode formed on...

20060202234 - Semiconductor device and manufacturing method thereof: A semiconductor device includes a field effect transistor and a strain generating layer to apply a stress to a channel region of the field effect transistor. The strain generating layer contains at least one of oxygen and nitrogen of 1.0×1018 cm−3 to 5.0×1019 cm−3, or alternatively, the strain generating layer...

20060202235 - Solid-state imaging apparatus in which a plurality of pixels each including a photoelectric converter and a signal scanning circuit are arranged two-dimensionally: A solid-state imaging apparatus includes a semiconductor substrate, a photoelectric converter which is formed in a surface region of the semiconductor substrate and converts light into signal charges, and reading electrodes which read out the signal charges and supply the signal charges to a signal sensor. At least some of...

20060202236 - Thin film transistor, liquid crystal display device and method for fabricating thereof: A thin film transistor including: an active layer on a substrate, the active layer having at least two unit channels; and source and drain electrodes on the active layer, wherein an interval D between each of the channels is larger than a unit channel width W....

20060202237 - Metal gate semiconductor device and manufacturing method: A method for manufacturing a metal gate includes providing a substrate including a gate electrode located on the substrate. A plurality of layers is formed, including a first layer located on the substrate and the gate electrode and a second layer adjacent the first layer. The layers are etched to...

20060202238 - Lateral junction field effect transistor and method of manufacturing the same: A lateral junction field effect transistor includes a first gate electrode layer arranged in a third semiconductor layer between source/drain region layers, having a lower surface extending on the second semiconductor layer, and doped with p-type impurities more heavily than the second semiconductor layer, and a second gate electrode layer...

20060202241 - D/a converter circuit, semiconductor device incorporating the d/a converter circuit, and manufacturing method of them: D/A conversion having higher accuracy is provided by improving relative accuracy of the resistance value of resistors which configure a resistor string. A manufacturing method of a D/A converter circuit of the invention comprises the steps of: forming a resistor string 11 which includes a plurality of resistors R0 to...

20060202239 - Methods for providing gate conductors on semiconductors and semiconductors formed thereby: A method of providing a gate conductor on a semiconductor is provided. The method includes defining an organic polymer plating mandrel on the semiconductor, activating one or more sites of the organic polymer plating mandrel, binding a seed layer to the activated sites, and plating the dummy gate on the...

20060202240 - Semiconductor device: Provided is a semiconductor device which includes a conductive bonding pad formed on a semiconductor substrate of the first conduction type via an insulating film and a diffusion layer of the second conduction type formed on a surface of the semiconductor substrate under the bonding pad. Characteristics do not deteriorate...

20060202242 - Solid-state imaging device: A MOS solid-state imaging device is provided in which withstand voltage and 1/f noise of a MOS transistor are improved. In the MOS solid-state imaging device whose unit pixel has at least a photoelectric converting portion and a plurality of field effect transistors, the thickness of gate insulating film in...

20060202243 - Metamorphic avalanche photodetector: A metamorphic avalanche photodetector includes a substrate, and an active structure supported on the substrate. The active structure has a metamorphic absorption structure that absorbs light and responsively produces primary charge carriers, and an avalanche multiplication structure that receives the primary charge carriers from the metamorphic absorption structure and responsively...

20060202244 - Magnetic random access memory with stacked memory cells having oppositely-directed hard-axis biasing: A magnetic random access memory (MRAM) has memory stacks arranged in the X-Y plane on the MRAM substrate, with each memory stack having two memory cells stacked along the Z axis and each memory cell having an associated biasing layer. Each biasing layer reduces the switching field of its associated...

20060202245 - Phase-change memory device and manufacturing process thereof: A phase-change memory device, wherein memory cells form a memory array arranged in rows and columns. The memory cells are formed by a MOS selection device and a phase-change region connected to the selection device. The selection device is formed by first and second conductive regions which extend in a...

20060202246 - Semiconductor device and manufacturing method thereof: A semiconductor device includes: an channel layer formed on a semiconductor substrate; a drain electrode and a source electrode both formed on the channel layer apart from each other; a surface passivation film formed on the channel layer so as to cover the channel layer except for the drain electrode...

20060202247 - Sram cell structure and manufacturing method thereof: A static random access memory (SRAM) cell structure at least comprising a substrate, a transistor, an upper electrode and a capacitor dielectric layer. A device isolation structure is set up in the substrate to define an active region. The active region has an opening. The transistor is set up over...

20060202248 - Sram cell structure and manufacturing method thereof: A static random access memory (SRAM) cell structure at least comprising a substrate, a transistor, an upper electrode and a capacitor dielectric layer. A device isolation structure is set up in the substrate to define an active region. The active region has an opening. The transistor is set up over...

20060202249 - Simplified buried plate structure and process for semiconductor-on-insulator chip: A structure is provided herein which includes an array of trench capacitors having at least portions disposed below a buried oxide layer of an SOI substrate. Each trench capacitor shares a common unitary buried capacitor plate which includes at least a portion of a first unitary semiconductor region disposed below...

20060202250 - Storage capacitor, array of storage capacitors and memory cell array: A storage capacitor, suitable for use in a DRAM cell, is at least partially formed above a substrate surface and includes: a storage electrode at least partially formed above the substrate surface, a dielectric layer formed adjacent the storage electrode, and a counter electrode formed adjacent the dielectric layer, the...

20060202253 - Flash memory cell transistor and method for fabricating the same: A flash memory cell transistor and a method for fabricating the same compensates a work function difference of a pMOS and a nMOS with a triple gate insulating film by using electron density trapped in a pMOS gate insulating film. The flash memory cell transistor comprises a p-well region and...

20060202252 - Non-volatile memory cells, memory arrays including the same and methods of operating cells and arrays: Memory cells comprising: a semiconductor substrate having a source region and a drain region disposed below a surface of the substrate and separated by a channel region; a tunnel dielectric structure disposed above the channel region, the tunnel dielectric structure comprising at least one layer having a small hole-tunneling-barrier height;...

20060202251 - Scalable high performance non-volatile memory cells using multi-mechanism carrier transport: The device comprises a plurality of select gates that are formed over a substrate. In one embodiment, the select gates are formed vertically on the sidewalls of trenches. The substrate includes a plurality of diffusion regions that are each formed between a pair of planar select gates. In a vertical...

20060202256 - Flash memory cell arrays having dual control gates per memory cell charge storage element: A flash NAND type EEPROM system with individual ones of an array of charge storage elements, such as floating gates, being capacitively coupled with at least two control gate lines. The control gate lines are preferably positioned between floating gates to be coupled with sidewalls of floating gates. The memory...

20060202254 - Multi-level flash memory cell capable of fast programming: A semiconductor device and a method of forming the same. The semiconductor device comprises a gate structure comprising a tunnel oxide over a substrate; a floating gate over the tunnel oxide; a dielectric over the floating gate; and a control gate over the dielectric. The semiconductor device further comprises: spacers...

20060202257 - Nonvolatile semiconductor memory device: A nonvolatile semiconductor memory device including a memory cell and a selection transistor, and the memory cell includes a floating gate formed on a semiconductor substrate via a first gate insulation film, a pair of first diffusion layers positioned on the opposite sides of the floating gate and formed in...

20060202255 - Split gate non-volatile memory devices and methods of forming same: Non-volatile memory devices and methods for fabricating non-volatile memory devices are disclosed. More specifically, split gate memory devices are provided having frameworks that provide increased floating gate coupling ratios, thereby enabling enhanced programming and erasing efficiency and performance....

20060202258 - Technique for fabricating logic elements using multiple gate layers: Various techniques are described which utilize multiple poly-silicon layers in the design and fabrication of various logic elements that are used in semiconductor devices. According to a specific implementation of the present invention, logic gate cell sizes and memory array cell sizes may be reduced by fabricating various transistor gates...

20060202259 - Semiconductor device and method of fabricating the same: A semiconductor device includes a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film, a source/drain diffusion layer formed in the semiconductor substrate at both sides of the gate electrode, and a channel region formed in the semiconductor substrate...

20060202260 - Semiconductor memory device and method of manufacturing the same: A semiconductor memory device includes: a laminated body which has a floating-gate-forming groove and includes a semiconductor support layer, an impurity diffusion layer, an ion-implantation-damage protection film, and an interlayer insulating film; a floating-gate-insulating film; a floating gate disposed on the floating-gate-insulating film so as to be buried in the...

20060202261 - Non-volatile memory cells, memory arrays including the same and methods of operating cells and arrays: Memory cells comprising: a semiconductor substrate having a source region and a drain region disposed below a surface of the substrate and separated by a channel region; a tunnel dielectric structure disposed above the channel region, the tunnel dielectric structure comprising at least one layer having a small hole-tunneling-barrier height;...

20060202262 - Semiconductor device and method for manufacturing the same: A semiconductor device and a method for manufacturing the same are provided. A gate insulating film is formed under a vacuum condition to prevent deterioration of reliability of the device due to degradation of a gate insulating material and to have stable operating characteristics. The semiconductor device includes an element...

20060202264 - Enhancing schottky breakdown voltage (bv) without affecting an integrated mosfet-schottky device layout: This invention discloses a semiconductor power device that includes an active cell area having a plurality of power transistor cells and a junction barrier Schottky (JBS) area. The semiconductor power device includes the JBS area that further includes a plurality of Schottky diodes each having a PN junction disposed on...

20060202263 - Nonvolatile semiconductor memory device and method of fabricating the same: In an example embodiment, a semiconductor substrate has a plurality of active regions separated by a plurality of trenches. A gate insulation film fills at least a portion of the trenches, and a conductive gate film is formed over the gate insulation film. In an example embodiment, the gate insulation...

20060202265 - Process insensitive esd protection device: Methods and apparatus for ESD protection of LDMOS devices are provided. The apparatus comprises two LDMOS devices, with source, drain and gate contacts parallel coupled. One is the protected device and the other is the protecting device. Each has source region, drain region, gate, first body well region containing the...

20060202266 - Field effect transistor with metal source/drain regions: A semiconductor device comprising a gate electrode formed on a gate dielectric layer formed on a semiconductor film. A pair of source/drain regions are formed adjacent the channel region on opposite sides of the gate electrode. The source and drain regions each comprise a semiconductor portion adjacent to and in...

20060202267 - Methods of optimization of implant conditions to minimize channeling and structures formed thereby: Methods of forming a microelectronic structure are described. Those methods comprise implanting a first concentration of a species into an active area with a first energy, wherein the species pre-damages a portion of the active area, and then implanting a second concentration of the species into the active area with...

20060202268 - Soi semiconductor device and method of manufacturing thereof: An SOI semiconductor device has a substrate, an insulation film, a silicon film, a gate insulation film, a gate electrode, a pair of first diffusion regions, a first region, and a second diffusion region. The insulation film is formed on the substrate. The silicon film is formed on the insulation...

20060202269 - Wireless chip and electronic app