Active solid-state devices (e.g., transistors, solid-state diodes) inventions 06/06

20060138392 - Mild methods for generating patterned silicon surfaces: The invention provides methods for making self-assembling monolayers on silicon surfaces using mild conditions....

20060138393 - Ge precursor, gst thin layer formed using the same, phase-change memory device including the gst thin layer, and method of manufacturing the gst thin layer: Provided are a Ge precursor for low temperature deposition containing Ge, N, and Si, a GST thin layer doped with N and Si formed using the same, a memory device including the GST thin layer doped with N and Si, and a method of manufacturing the GST thin layer. The...

20060138394 - Structure having pores, device using the same, and manufacturing methods therefor: A minute structure is provided in which electroconductive paths are only formed in nanoholes, and a material is filled in the nanoholes, which are disposed in a specific area, by using the electroconductive paths. The minute structure comprising pores comprises a) a substrate, b) a plurality of electroconductive layers formed...

20060138395 - Semiconductor photoelectric surface and its manufacturing method, and photodetecting tube using semiconductor photoelectric surface: A semiconductor photocathode of the present invention is provided with: a support substrate 10; a photoelectric surface 30 which is formed of a plurality of semiconductor layers layered on this support substrate 10 and which emits photoelectrons from a photoelectron emitting surface 341 in response to the incidence of light...

20060138396 - Quantum-dot infrared photodetector: A quantum-dot infrared photodetector comprises a semiconductor substrate; a buffer layer formed on the semiconductor substrate; an undoped first obstructing layer formed on the buffer layer; a first quantum-dot layer formed on the first barrier layer; a heavily doped first contact layer formed on the first quantum-dot layer; a second...

20060138397 - Manipulation of conductive and magnetic phases in an electron trapping semiconducting: A semiconductor strip array that can be configured to exhibit distinct electrical and/or magnetic phase characteristics according to the many-body effects phenomenon in electron gases is disclosed. The strip array can be incorporated into a MOSFET architecture and utilized in amplifier and memory cell applications. Significantly, the strip array can...

20060138398 - Semiconductor device and fabrication method thereof: A semiconductor device includes a gate electrode formed on a silicon substrate via a gate insulation film in correspondence to a channel region, source and drain regions of a p-type diffusion region formed in the silicon substrate at respective outer sides of sidewall insulation films of the gate electrode, and...

20060138409 - (4,5,9,10-tetrahydro-pyren-2-yl)-carbamic acid 4-(2-methylsulfanyl-alkyl)-3,5-dinitro-benzyl ester, method of synthesizing thereof, and molecular electronic device using the same: A new compound derivative that can be used to form a unit molecular film as a rectifier in a molecular electronic device, a new rectifying compound (4,5,9,10-tetrahydro-pyren-2-yl)-carbamic acid 4-(2-methylsulfanyl-alkyl)-3,5-dinitro-benzyl ester and its derivative (4,5,9,10-Tetrahydro-pyren-2-yl)-carbamic acid 4-(2-methylsulfanyl-alkyl)-3,5-dinitro-benzyl ester, and methods of synthesizing the compounds are provided....

20060138401 - Electronic devices comprising conductive members that connect electrodes to other conductive members within a substrate and processes for forming the electronic devices: An electronic device includes a substrate including a pixel driving circuit, a first conductive member, and a second conductive member. The first and second conductive members are spaced apart, the first conductive member is connected to the pixel driving circuit, and the second conductive member can be part of a...

20060138407 - Method for manufacturing semiconductor device having super junction construction: A semiconductor device includes a body region, a drift region having a first part and a second part, and a trench gate electrode. The body region is disposed on the drift region. The first and second parts extend in an extending direction so that the second part is adjacent to...

20060138408 - Multifunctional linker molecules for tuning electronic charge transport through organic-inorganic composite structures and uses thereof: in which X is the central body of the molecule, FUNC1 and FUNC2 independently of each other are molecular groups introducing a dipole moment and/or capable of forming intermolecular and/or intramolecular hydrogen bonding networks, and CON1and CON2 independently of each other are molecular groups binding to nanostructured units comprising metal...

20060138400 - Novel compounds capable of forming photoconvertible organic thin film and articles having organic thin film: The present invention relates to a compound which is flexibly amenable to the alteration, without impairing its photosensitivity, of its structural moiety which affects film forming ability and the resulting surface properties, the compound being capable of undergoing surface alteration by irradiation with relatively low energy wavelength, and of forming...

20060138406 - Ofet structures with both n- and p-type channels: The present invention provides a dual organic field-effect transistor (OFET) structure and a method of fabricating the structure. The dual OFET structure includes an n-type organic semiconductor layer and a p-type organic semiconductor layer in contact with each other along an interface and forming a stack. The dual OFET structure...

20060138402 - Organic electronic device and method to manufacture same: An organic electronic device to emit or receive radiation includes a cathode, a first layer including a salt, a second layer including an active organic material, and an anode. A method to manufacture an organic electronic device to emit or receive radiation includes depositing a cathode, depositing a first layer...

20060138403 - Organic electronic devices including pixels: An organic electronic device includes a pixel. The pixel includes a first transistor and a capacitive electronic component. In one embodiment, the first transistor is an under-gated TFT, and a first portion of a first conductive member is a gate electrode of the first transistor. A second portion of the...

20060138404 - Organic-inorganic composite insulating material for electronic element, method of producing same and field-effect transistor comprising same: A method of producing an organic-inorganic composite insulating material for electronic element comprises subjecting a mixture of an organic polymer or its solution and a metal alkoxide or its solution as a starting material to sol-gel reaction of the metal alkoxide in the presence of the organic polymer....

20060138399 - Removing solution: The present invention provides a resist-removing solution for low-k film and a cleaning solution for via holes or capacitors, the solutions comprising hydrogen fluoride (HF) and at least one member selected from the group consisting of organic acids and organic solvents. The invention also provides a method of removing resist...

20060138405 - Thin film transistor, flat panel display including the thin film transistor, and method for manufacturing the thin film transistor and the flat panel display: A thin film transistor having a transformed region that provides the same result as patterning a semiconductor layer, a flat panel display having the thin film transistor and a method for manufacturing the thin film transistor and the flat panel display are disclosed. The thin film structure includes a gate...

20060138410 - Method for measuring information about a substrate, and a substrate for use in a lithographic apparatus: A method for measuring information provided by a substrate is disclosed. The substrate includes a feature that has been created by a lithographic apparatus. The method includes projecting a beam of light onto a marker disposed above and/or near the feature on the substrate, and detecting information provided by the...

20060138411 - Semiconductor wafer with a test structure, and method: The invention proposes a semiconductor wafer with a test structure for detecting parasitic contact structures on the semiconductor wafer, in which a first interconnect plane (A) contains interconnects (1) running parallel to one another and a second interconnect (2) that is arranged between the latter. The two first interconnects (1)...

20060138412 - Cmos image sensor and fabricating method thereof: A CMOS image sensor and fabricating method thereof are provided, in which a microlens is additionally formed on a planarizing layer prior to a color filter forming step and by which transmission efficiency of light incident on a photodiode enhances performance of the image sensor. The CMOS image sensor includes...

20060138413 - Method of manufacturing semiconductor device: Disclosed is a method of manufacturing a semiconductor device, comprising forming a gate electrode on a main surface of a semiconductor substrate via a gate insulating film, laminating sequentially a first insulating film with oxidation resistance and a silicon film on the main surface of the semiconductor substrate on which...

20060138424 - Contact portion of semiconductor device, and thin film transistor array panel for display device including the contact portion: A method for manufacturing a semiconductor device including forming a first wire on a substrate, forming a lower film on the first wire, forming a photosensitive pattern on the lower film using a photosensitive material, forming contact holes for exposing the first wire by etching the lower film using the...

20060138420 - Display, array substrate, and display manufacturing method: Each pixel of a display includes a first thin film transistor whose source is connected to a first power supply terminal, a second thin film transistor which is different in conduction type from the first thin film transistor and whose source and drain are connected to the drain of the...

20060138419 - Liquid crystal display and panel therefor: A thin film transistor array panel according to an embodiment of the present invention includes: a gate line; a data line intersecting the gate line; a thin film transistor connected to the gate line and the data line; a pixel electrode connected to the thin film transistor; and a shielding...

20060138417 - Liquid crystal display device and fabricating method thereof: A thin film transistor substrate and a fabricating method thereof for simplifying a process are disclosed. In a liquid crystal display device according to the present invention, a gate line is provided on a substrate. A data line crosses the gate line with having a gate insulating film therebetween to...

20060138416 - Liquid crystal display device and method of fabricating the same: A display device includes a substrate having a display region and a driver region; a gate line and a data line crossing each other to define a pixel region in the display region, the pixel region having a pixel electrode; an insulation layer between the gate line and the data...

20060138418 - Organic light emitting display and method of fabricating the same: An organic light emitting display (OLED) and a method of fabricating the same are provided. The method includes forming the OLED having upper and lower substrates that emit different colors from each other and coupling the upper and lower substrates together....

20060138421 - Photoelectric conversion element and display device including the same: A photoelectric conversion element includes a semiconductor layer including a pair of p+ regions in which p-type impurities are doped, and a p− region which is disposed between the p+ regions and has a lower p-type impurity concentration than the p+ regions. A gate electrode is formed over the p−...

20060138415 - Pixel structure, thin film transistor and fabricating method thereof: A method of fabricating a pixel structure is disclosed. A substrate having a color filter layer thereon and a leveling layer further covers the color filter layer is provided. A first metal layer is formed over the leveling layer. The first metal layer is patterned to define a source/drain. A...

20060138414 - Thin film transistor panel for multi-domain liquid crystal display: A thin film transistor array panel is provided, which includes: an insulating substrate; a plurality of first signal lines formed on the insulating substrate; a plurality of second signal lines formed on the insulating substrate and intersecting the first wire in an insulating manner; a pixel electrode formed in a...

20060138422 - Thin film transistor substrate of horizontal electric field type liquid crystal display device and fabricating method thereof: A thin film transistor substrate of horizontal electric field type includes: a gate line and a first common line formed on a substrate to be in parallel to each other; a data line crossing the gate line and the first common line with a gate insulating film therebetween to define...

20060138423 - Thin-film transistor, thin-film transistor sheet and their manufacturing method: Disclosed are a process of manufacturing a thin-film transisitor sheet and a thin-sheet transistor sheet manufactured by the process, the process comprising providing a gate busline on a substrate, providing, on the surface of the substrate on the gate busline side, an insulation layer capable of receiving a fluid electrode...

20060138425 - Methods of forming semiconductor constructions: Thin film transistor based three-dimensional CMOS inverters utilizing a common gate bridged between a PFET device and an NFET device. One or both of the NFET and PFET devices can have an active region extending into both a strained crystalline lattice and a relaxed crystalline lattice. The relaxed crystalline lattice...

20060138427 - Hybrid circuit and electronic device using same: There is disclosed a hybrid circuit in which a circuit formed of TFTs in integrated with an RF filter. The TFTs are fabricated on a quartz substrate. A ceramic filter forming the RF filter is fabricated on another substrate. Terminals extend through the quartz substrate. The TFTs are connected with...

20060138426 - Liquid crystal display device and fabricating method thereof: A liquid crystal display device according to an embodiment of the present invention includes: a gate line formed on a substrate; a data line to provide a pixel area by crossing the gate line with a gate insulating film therebetween; a common line formed in parallel to the gate line;...

20060138428 - Liquid crystal display device and fabricating method thereof, and thin film patterning method applied thereto: A liquid crystal display device, including: a gate line on a substrate; a data line crossing the gate line with a gate insulating film therebetween to define a pixel area; a thin film transistor connected to the gate line and the data line; a semiconductor pattern which forms a channel...

20060138429 - Liquid crystal display device and method for fabricating the same: A liquid crystal display device according to an embodiment of the present invention a includes: a gate line on a substrate; a data line crossing the gate line to define a pixel area; a thin film transistor connected to the gate line and the data line; a semiconductor pattern extended...

20060138430 - Heteroisomer boron carbide devices: Semiconductor devices formed using boron carbide heteroisomer junctions or interfaces are provided. The boron carbide heteroisomer junction devices can be incorporated into diodes and transistors....

20060138431 - Light emitting device structure having nitride bulk single crystal layer: The object of this invention is to provide a high-output type nitride light emitting device. The nitride light emitting device comprises an n-type nitride semiconductor layer, a p-type nitride semiconductor layer and an active layer therebetween, wherein the light emitting device comprises a gallium-containing nitride semiconductor layer prepared by crystallization...

20060138433 - Optical combiner/decombiner with reduced insertion loss: A photonic integrated circuit that includes a plurality of active and passive components on a substrate where one of the components is an optical combiner/decombiner having at least one free space coupler region and a plurality of longitudinal ridge waveguides each extending in the circuit from a first region of...

20060138432 - Semiconductor light emitting device and method of manufacturing the same: Provided is a nitride semiconductor light emitting diode and a method of manufacturing the same. The method includes sequentially forming a first semiconductor layer, an active layer, and a second semiconductor layer on a substrate, in-situ depositing a mask layer on a region of the surface of the second semiconductor...

20060138434 - Semiconductor optical devices: A semiconductor optical device (e.g. a resonant cavity device in this form of an LED or a laser) comprises a single substrate arranged for emitting light (O) for incidence on a sample or other element and also responsive to light (D), e.g. of a different wavelenght, received back from this...

20060138435 - Multiple component solid state white light: A white light emitting lamp is disclosed comprising a solid state ultra violet (UV) emitter that emits light in the UV wavelength spectrum. A conversion material is arranged to absorb at least some of the light emitting from the UV emitter and re-emit light at one or more different wavelengths...

20060138439 - High radiance led chip and a method for producing same: The invention concerns a light-emitting diode chip comprising a radiation-emitting active region and a window layer. To increase the luminous efficiency, the cross-sectional area of the radiation-emitting active region is smaller than the cross-sectional area of the window layer available for the decoupling of light. The invention is further directed...

20060138437 - Lens and led using the lens to achieve homogeneous illumination: A lens and an LED using the lens to achieve homogeneous illumination include a region. The region around the optical axis of a lens is designed to be concave and form a divergent surface. The upper surface of the lens is a continuous curved surface to diverge the high-intensity light...

20060138436 - Light emitting diode package and process of making the same: A light emitting diode (LED) package and process of making the same includes a silicon-on-insulator (SOI) substrate that is composed of two silicon based materials and an insulation layer interposed therebetween. The two silicon based materials of silicon-on-insulator substrate are etched to form a reflective cavity and an insulation trench,...

20060138440 - Light-emitting diode lamp and light-emitting diode display device: The light-emitting diode lamp has a light-emitting diode chip mounted on a cup-shaped mounting portion of a lead frame. The mounting portion is formed at one end of a lead portion of the lead frame. The light-emitting diode chip and the mounting portion are embedded in a convex shape lens...

20060138438 - Method for manufacturing color element film-equipped substrate, color element film-equipped substrate, electro-optical device, and electronic device: A method for manufacturing a color element film-equipped substrate includes: forming a bank, in which a first layer and a photo-curing second layer are laminated over a base, and parts of the first layer and the second layer are removed after exposing and developing the first layer and the second...

20060138442 - Diode housing: A housing accommodating a semiconductor chip is set out. The housing and chip may be used for sending and/or receiving radiation. Popular applications of the housing may be in light emitting diodes. The housing includes a conductor strip that is punched into two electrically isolated portions. The housing further includes...

20060138441 - Light source module and method for production thereof: A light source module having a plurality of LEDs connected to a metal carrier (4) by means of an insulating layer (3). In order to afford protection against mechanical effects and in order to form a reflector, the LEDs are surrounded by a frame (10), which is segmented into a...

20060138443 - Encapsulation and packaging of ultraviolet and deep-ultraviolet light emitting diodes: Disclosed are the materials and methods used to package and encapsulate UV and DUV LEDs. These LEDs have emission wavelengths in the range from around 360 nm to around 200 nm. The UV/DUV LED die or its flip-chip bonded subassembly are disposed in a low thermal resistance packaging house. Either...

20060138444 - Flip-chip bonding structure of light-emitting element using metal column: A flip-chip bonding structure of a light-emitting element is provided. The structure improves a heat emission efficiency by using a metal column having a high thermal conductivity instead of a solder bump. The structure includes a light-emitting element, a sub-mount, and a metal column. The metal column connects the light-emitting...

20060138445 - Gan-based and zno-based led: Light emitting diodes (LEDs) with various electrode structures which preferably provide increased performance. In some embodiments the LEDs are GaN-based and in some embodiments the LEDs are ZnO-based, with a sapphire substrate or a ZnO substrate. In some embodiments the LEDs are hybrid GaN-based ZnO based LEDs....

20060138446 - Algainn based optical device and fabrication method thereof: The present invention relates to an AlGaInN based optical device fabricated by a new p-type AlGalnN:Mg growth method and method for manufacturing the same, including a p-type nitride semiconductor layer that is grown using both NH3 and a hydrazine based source as a nitrogen precursor, thereby an additional subsequent annealing...

20060138448 - Compound semiconductor and compound semiconductor device using the same: A back electrode 6 is formed in the back of a Si single crystal substrate 2 of a compound semiconductor in which an n-type 3C-SiC single crystal buffer layer 3 having a thickness of 0.05-2 μm, a carrier concentration of 1016-1021/cm3, a hexagonal InwGaxAl1-w-xN single crystal buffer layer 4 (0≦w<1,...

20060138449 - Gallium nitride based light-emitting device: A manufacturing method and a thus produced light-emitting structure for a white colored light-emitting device (LED) and the LED itself are disclosed. The white colored LED includes a resonant cavity structure, producing and mixing lights which may mix into a white colored light in the resonant cavity structure, so that...

20060138447 - Light emitting diode: The invention relates to a light emitting diode having at least one (semi)conductive electroluminescent active layer which comprises at least two different electroluminescent functionalities, wherein the emission spectrum of the diode exhibits at least two intensity maxima. The invention further relates to a detector which comprises a light emitting diode...

20060138450 - Schottky diode with a vertical barrier: A Schottky diode with a vertical barrier extending perpendicularly to the surface of a semiconductor chip having a vertical central metal conductor in contact on the one hand with the substrate of the semiconductor chip with an interposed interface forming a Schottky barrier, and on the other hand with radially-extending...

20060138451 - Structure having light modulating film and light control device using the same: A structure includes a substrate and a light modulating film formed on top of the substrate. The light modulating film is made of polycrystalline PLZT containing Pb, Zr, Ti, and La as constituent elements. The film has a La concentration in the range of 5 at % to 30 at...

20060138452 - Power semiconductor module: A power semiconductor module (1) with a housing (2) and at least one semiconductor chip (3, 3′) located in it is devised. At least one semiconductor chip (3, 3′) has a first main electrode side (31) and a second main electrode side (32) opposite the first main electrode side, the...

20060138453 - Organic photosensitive optoelectronic device having a phenanthroline exciton blocking layer: An organic photosensitive optoelectronic device, having an anode, a cathode, and an organic blocking layer between the anode and the cathode is described, wherein the blocking layer comprises a phenanthroline derivative, and at least partially blocks at least one of excitons, electrons, and holes....

20060138454 - Semiconductor device using a nitride semiconductor: A semiconductor device includes: a first semiconductor layer represented by a composition formula AlxGa1-xN (0≦x≦1); a first conductivity type or non-doped second semiconductor layer represented by a composition formula AlyGa1-yN (0≦y≦1, x<y) and formed on the first semiconductor layer; a second conductivity type third semiconductor layer represented by a composition...

20060138456 - Insulating gate algan/gan hemt: AlGaN/GaN HEMTs are disclosed having a thin AlGaN layer to reduce trapping and also having additional layers to reduce gate leakage and increase the maximum drive current. One HEMT according to the present invention comprises a high resistivity semiconductor layer with a barrier semiconductor layer on it. The barrier layer...

20060138457 - Nitride-based semiconductor device of reduced current leakage: A high electron mobility transistor is disclosed which has a double-layered main semiconductor region formed on a silicon substrate via a multilayered buffer region. The multilayered buffer region is in the form of alternations of an aluminum nitride layer and a gallium nitride layer. The main semiconductor region, buffer region,...

20060138455 - Silicon carbide on diamond substrates and related devices and methods: A high power, wide-bandgap device is disclosed that exhibits reduced junction temperature and higher power density during operation and improved reliability at a rated power density. The device includes a diamond substrate for providing a heat sink with a thermal conductivity greater than silicon carbide, a single crystal silicon carbide...

20060138458 - Semiconductor device and method of manufacturing the same: This invention is intended to provide an HBT capable of achieving, if the HBT is a collector-up HBT, the constriction of the emitter layer disposed directly under an external base layer, and reduction in base-emitter junction capacity, or if the HBT is an emitter-up HBT, reduction in base-collector junction capacity....

20060138460 - Semiconductor device and radio communication device: A technology which allows a reduction in the thermal resistance of a semiconductor device and the miniaturization thereof is provided. The semiconductor device has a plurality of unit transistors Q, transistor formation regions 3a, 3b, and 3e each having a first number (seven) of the unit transistors Q, and transistor...

20060138459 - Semiconductor device, manufacturing method of the same and electronic device: The HBT according to the present invention is obtained by successively forming, over the main surface of a substrate made of a compound semiconductor, a sub-collector layer, a collector layer, a base layer, an emitter layer, a collector electrode electrically connected to the collector layer, a base electrode electrically connected...

20060138461 - Electrode wiring substrate and display device: An electrode-wiring substrate includes first routing wires (108) made of gate material for forming gate electrode wires (105) and second routing wires (110) made of source material for forming source electrode wires (106). The first routing wires (108) and the second routing wires (110) are arranged alternately so as not...

20060138462 - Method of making a semiconductor device: Disclosed is a method of making a semiconductor device in which a main pattern is formed through a photolithography process over a low-density pattern area having a relatively small number of patterns to be formed in certain areas as compared to the other areas. According to the method at least...

20060138463 - Semiconductor integrated circuit devices including sram cells and flash memory cells and methods of fabricating the same: Semiconductor integrated circuit devices having SRAM cells and flash memory cells are provided. The devices include an integrated circuit substrate having an SRAM cell region, a flash memory cell region and a logic circuit region. An isolation layer is provided in a predetermined region of the substrate. The isolation layer...

20060138464 - Standard cell, standard cell library, semiconductor device, and placing method of the same: Of a plurality of standard cells in which an N-well region and a P-well region are vertically formed, some standard cells have a border line between the N-well region and the P-well region which is set to be a low height (first height), and other standard cells have a border...

20060138465 - 3-d column select circuit layout in semiconductor memory devices: A column select circuit in a Static Random Access Memory (SRAM) having a three-dimensional layout can include a lower CMOS layer in a substrate and an upper NMOS layer above the lower layer. An intermediate PMOS layer is located between the upper NMOS layer and the lower CMOS layer....

20060138466 - Layout of semiconductor memory device and method of controlling capacitance of dummy cell: Provided are a layout of a semiconductor memory device capable of minimizing an occupation area of a dummy cell array and a method of controlling capacitance of a dummy cell to be same with that of the memory cell. The layout includes a dummy cell connected to one side of...

20060138467 - Method of forming a small contact in phase-change memory and a memory cell produced by the method: A method of fabricating a phase-change memory cell is described. The cross-sectional area of a contact with a phase-change memory element within the cell is controlled by a width and an exposed length of a bottom electrode. The method allows the formation of very small phase-change memory cells....

20060138469 - Semiconductor device and fabricating method thereof: A semiconductor device and fabricating method thereof can prevent an electrical characteristic degradation of the semiconductor device when a boarderless type contact is formed. The device may include a transistor on a semiconductor substrate, an oxynitride layer on the semiconductor sustrate,an insulating interlayer on the oxynitride layer, a metal line...

20060138468 - Semiconductor device with increased channel length and method for fabricating the same: A semiconductor device with an increased channel length and a method for fabricating the same are provided. The semiconductor device includes: a substrate with an active region including a planar active region and a prominence active region formed on the planar active region; a gate insulation layer formed over the...

20060138470 - Cmos image sensor and method for fabricating the same: A CMOS image sensor and a method for fabricating the same are disclosed, in which a dark current is prevented from being generated between a device isolation film and a photodiode region to improve characteristics of the image sensor....

20060138471 - Cmos image sensor and method for fabricating the same: A CMOS image sensor and a method for fabricating the same are disclosed, in which a dead zone and a dark current are simultaneously reduced by selective epitaxial growth. The CMOS image sensor includes a first conductive type semiconductor substrate, a second conductive type impurity ion area, a gate electrode,...

20060138472 - Cmos image sensor: A CMOS image sensor includes a photo sensing device for generating photo charges, a floating diffusion region for storing the photo charges generated by the photo sensing device therein, a transfer transistor connected between the photo sensing device and the floating diffusion region for transferring the photo charges generated by...

20060138473 - Semiconductor device and manufacturing method thereof: A semiconductor device having a plurality of phase change devices rewritably storing data, comprising: an insulating film deposited on a semiconductor substrate using an insulating material having sufficient adhesion to a chalcogenide-based phase change material; a chalcogenide film formed by embedding the chalcogenide-based phase change material in a hole formed...

20060138474 - Recess gate and method for fabricating semiconductor device with the same: A recess gate and a method for fabricating a semiconductor device with the same are provided. The recess gate includes: a substrate; a recess formed with a predetermined depth in a predetermined portion of the substrate; a gate insulation layer formed over the substrate with the recess; a gate polysilicon...

20060138477 - Asymmetric recessed gate mosfet and method for manufacturing the same: Disclosed are an asymmetric recessed gate MOSFET, and a method for manufacturing the same. The asymmetric recessed gate MOSFET comprises: recess regions formed at a predetermined depth in a semiconductor; recessed gate electrodes formed at a predetermined height on a semiconductor substrate by gap-filling the recess regions, and misaligned with...

20060138476 - Dc amplifier and semiconductor integrated circuit therefor: A rectangular parallelepiped projecting portion 21 having a height of HB and a width of WB is formed on a silicon substrate, and a gate oxide film is formed on a part of the top surface and the side surface of the projecting portion 21. A source and a drain...

20060138475 - Method of manufacturing a semiconductor device and semiconductor device obtained by means of such a method: The invention relates to a method of manufacturing a semiconductor device (10) with a substrate (1) and a semiconductor body (2) comprising a first (N-MOS)PET (3) with a first channel region (3A) and a first gate electrode (3B) which includes a first conductor and which is separated from the channel...

20060138478 - Semiconductor device and method of forming same: A semiconductor device includes a gate pattern disposed on a semiconductor substrate, a gate spacer disposed on both sidewalls of the gate pattern, and a fixed charge layer disposed in the semiconductor substrate below the gate spacer. Elements generating fixed charges are injected into the fixed charge layer. A layer...

20060138479 - Tensile strained substrate: An exemplary embodiment relates to a method for forming a metal oxide semiconductor field effect transistor (MOSFET). The method includes providing a substrate having a gate formed above the substrate and performing at least one of the following depositing steps: depositing a spacer layer and forming a spacer around a...

20060138480 - A cmos imager with cu wiring and method of eliminating high reflectivity interfaces therefrom: An image sensor and method of fabrication wherein the sensor includes Copper (Cu) metallization levels allowing for incorporation of a thinner interlevel dielectric stack to result in a pixel array exhibiting increased light sensitivity. The image sensor includes structures having a minimum thickness of barrier layer metal that traverses the...

20060138484 - Cmos image sensor and method for fabricating the same: A CMOS image sensor includes a first conductive type semiconductor substrate having an active region and a device isolation region, a device isolation film formed in the device isolation region of the semiconductor substrate, a second conductive type diffusion region formed in the active region of the semiconductor substrate, and...

20060138483 - Cmos image sensor and method for manufacturing the same: A CMOS image sensor includes a semiconductor substrate with a first conductive type including a photodiode region and a transistor region, a gate electrode formed on the transistor region of the substrate, a first impurity region with a second conductive type formed in a portion of the semiconductor substrate between...

20060138482 - Cmos image sensor and method of fabricating the same: A CMOS image sensor and method for fabricating the same, wherein the CMOS image sensor has minimized dark current at the boundary area between a photodiode and an isolation layer. The present invention includes a first-conductivity-type doping area formed in the device isolation area of the substrate, the first-conductivity-type doping...

20060138481 - Solid-state imaging device and method for manufacturing the same: A solid-state imaging device includes a semiconductor substrate (1) with a photodetector portion (15). The photodetector portion (15) includes a p-type first impurity region (surface inversion layer) (6) formed in the semiconductor substrate (1) and an n-type second impurity region (photoelectric conversion region) (4) formed below the surface inversion layer...

20060138489 - Active pixel sensor with coupled gate transfer transistor: A complementary metal-oxide semiconductor (CMOS) active pixel sensor includes a photodiode, a transfer transistor with a coupled gate, a reset transistor and a signal transfer circuit, where the photodiode generates electric charges in response to incident light, the transfer transistor transfers the electric charges integrated in the photodiode to a...

20060138485 - Cmos image sensor and method for fabricating the same: A CMOS image sensor that includes a semiconductor substrate with a plurality of photodiodes arranged at fixed intervals on the semiconductor substrate. A light-shielding layer partially overlaping the plurality of photodiodes and an insulating interlayer are formed on an entire surface of the semiconductor substrate including the plurality of photodiodes....

20060138486 - Cmos image sensor and method for fabricating the same: A CMOS image sensor and a method for fabricating the same forms a trench-shaped transfer gate that serves to better transfer electrons generated by light incident on photodiodes, thus obtaining improved transfer characteristics. The CMOS image sensor includes a semiconductor substrate having at least one active region defined by a...

20060138487 - Cmos image sensor and method for fabricating the same: A CMOS image sensor and a method for fabricating the same are disclosed, in which color filter layers are formed after microlenses are formed, to simplify process steps and maximize transmission efficiency of light, thereby improving performance of the image sensor. The CMOS image sensor includes a plurality of photodiodes...

20060138490 - Cmos image sensor and method for fabricating the same: A method for fabricating a CMOS image sensor includes forming a photodiode region, a gate electrode, an interlayer dielectric layer, a metal line, and a passivation layer on a semiconductor substrate having a pixel array region and a peripheral circuit region, forming a color filter layer having a plurality of...

20060138492 - Cmos image sensor and method for fabricating the same: A CMOS image sensor and a method for fabricating the same are disclosed, in which an impurity ion area is formed in a semiconductor substrate to form a transfer path for optical charges. Dead zone and dark current characteristics are thereby simultaneously improved. The CMOS image sensor includes a first...

20060138493 - Cmos image sensor and method for fabricating the same: A CMOS image sensor includes a first conductive type semiconductor substrate defined by a photodiode area and a transistor area, a trench formed in the semiconductor substrate corresponding to a transfer transistor of the transistor area, a gate electrode of the transfer transistor, formed in the trench, a second conductive...

20060138488 - Image sensor test patterns for evaluating light-accumulating characteristics of image sensors and methods of testing same: An image sensor test pattern provides time efficient optical testing of CMOS image senors at a single luminous intensity. These test patterns include at least first and second arrays of pixels having different light-accumulating characteristics. The different light-accumulating characteristics may be achieved multiple different ways. In some cases, the photodiodes...

20060138495 - Method and apparatus for collecting photons in a solid state imaging sensor: A photon collector has a reflecting metal layer to increase photon collection efficiency in a solid state imaging sensor. The reflecting metal layer reflects incident light internally to a photosensor. A plurality of photon collectors is formed in a wafer substrate over an array of photosensors. The photon collector is...

20060138491 - Method for fabricating cmos image sensor: A CMOS image sensor and a method for fabricating the same are disclosed, in which transfer characteristics are improved. The method includes forming a photodiode region and a second conductive type ion region on a surface of a first conductive type substrate by implanting a second conductive type impurity ion...

20060138494 - Photodiode in cmos image sensor and fabricating method thereof: A photodiode in a CMOS image sensor and fabricating method thereof are disclosed, by which the charge accumulation capacity is enhanced by enlarging a size of a photodiode area. The sensor includes a first epitaxial layer on a semiconductor substrate, a first photodiode area in the first epitaxial layer, a...

20060138497 - Cmos image sensor and method for fabricating the same: A CMOS image sensor and a method for fabricating the same are disclosed, in which double microlenses are formed using materials having different refractive indexes to improve concentration efficiency of light, thereby improving the characteristics of the image sensor....

20060138500 - Cmos image sensor and method for fabricating the same: A CMOS image sensor and method for fabricating the same improve image characteristics by eliminating the thickness of a planarization layer. The CMOS image sensor includes a semiconductor substrate; a plurality of active devices, provided in a predetermined surface of the semiconductor substrate, for generating electrical charges according to an...

20060138498 - Cmos image sensor and method for manufacturing the same: Disclosed are a CMOS image sensor capable of improving the focusing capability of light and a method for manufacturing the same. The CMOS image sensor includes a plurality of first micro-lenses formed in the upper part of the planarization layer, each of the first micro-lenses arranged over a corresponding photodiode,...

20060138496 - Semiconductor device: A semiconductor device comprising: a first light shielded region including a first semiconductor element, the first light shielded region being defined by a first light shielding wall provided in the periphery thereof; a second light shielded region including a second semiconductor element, the second light shielded region being defined by...

20060138499 - Solid-state image sensor, method of manufacturing the same, and camera: A solid-state image sensor of the present invention is a solid-state image sensor in which pixel cells are arranged on a semiconductor substrate, wherein each of the pixel cells includes: a photoelectric conversion unit that performs photoelectric conversion of incident light; and a microlens formed above the photoelectric conversion unit,...

20060138507 - Ferroelectric film, method of manufacturing ferroelectric film, ferroelectric capacitor, and ferroelectric memory: A ferroelectric film having a ferroelectric shown by a general formula (Pb1-dBid)(B1-aXa)O3, B including at least one of Zr and Ti, X including at least one of Nb and Ta, “a” being in a range of “0.05≦a≦0.4”, and “d” being in a range of “0<d<1”....

20060138503 - Ferroelectric memory: A ferroelectric memory comprises a first transistor connected between N1 and N2 nodes, a second transistor connected between the N2 node and an N3 node, a first transistor connected between P1 and P2 nodes, a second transistor connected between the P2 node and a P3 node, a first wiring formed...

20060138502 - Field-effect transistor with spin-dependent transmission characteristics and non-volatile memory using same: When a gate voltage VGS is applied, the Schottky barrier width due to the metallic spin band in the ferromagnetic source is decreased, and up-spin electrons from the metallic spin band are tunnel-injected into the channel region. However, down-spin electrons from the nonmagnetic contact (3b) are not injected because of...

20060138508 - Insulating film and electronic device: An insulating film comprising: a first barrier layer;a well layer provided; and a second barrier layer is proposed. The first barrier layer consists of a material having a first bandgap and a first relative permittivity. The well layer is provided on the first. barrier layer, and consists of a material...

20060138504 - Nonvolatile ferroelectric memory device: A nonvolatile ferroelectric memory device is provided so as to control read/write operations of a nonvolatile memory cell using a channel resistance of the memory cell which is differentiated by polarity states of a ferroelectric material. In the memory device, an insulating layer is formed on a bottom word line,...

20060138501 - Semi-conductor dielectric component with a praseodymium oxide dielectric: A semiconductor component having a silicon-bearing layer and a praseodymium oxide layer, wherein arranged between the silicon-bearing layer and the praseodymium oxide layer is a mixed oxide layer containing silicon, praseodymium and oxygen. The layer is of a thickness of a maximum of 5 nanometers. A production process for such...

20060138506 - Semiconductor memory device and method for manufacturing the same: A semiconductor memory device includes a substrate having a semiconductor element formed thereon, an interlayer dielectric layer formed above the substrate, a plug formed in the interlayer dielectric layer, an adhesion layer formed in a region including a region above the plug, and a ferroelectric capacitor formed above the adhesion...

20060138505 - Tunneling magnetoresistance device with high magnetoimpedance (mi) effect: A tunneling magnetoresistance device with high magnetoimpedance effect, comprising: a first ferromagnetic layer, a second ferromagnetic layer, and a tunnel barrier layer which is located between the first ferromagnetic layer and the second ferromagnetic layer. Wherein an alternating current is applied to the tunneling magnetoresistance device, the tunneling magnetoresistance device...

20060138509 - Magnetic random access memory with lower switching field through indirect exchange coupling: A magnetic random access memory with lower switching field through indirect exchange coupling. The memory includes a first antiferromagnetic layer, a pinned layer formed on the first antiferromagnetic layer, a tunnel barrier layer formed on the pinned layer, a ferromagnetic free layer formed on the tunnel barrier layer, a metal...

20060138510 - Method for forming a stroage cell capacitor compatible with high dielectric constant materials: An integrated circuit structure includes a digit line and an electrode adapted to be part of a storage cell capacitor and includes a barrier layer interposed between a conductive plug and an oxidation resistant layer. An insulative layer protects sidewalls of the barrier layer during deposition and anneal of a...

20060138511 - Methods of manufacturing a capacitor including a cavity containing a buried layer: Capacitors include an integrated circuit (semiconductor) substrate and an interlayer dielectric disposed on the integrated circuit substrate and including a metal plug therein. A lower electrode is disposed on the interlayer dielectric and contacting the metal plug. The lower electrode includes a cavity therein and a buried layer in the...

20060138513 - Capacitors for semiconductor memory devices and methods of forming the same: A capacitor of a semiconductor memory device, and methods of forming the same, are disclosed. A pad interlayer insulating layer is disposed on a semiconductor substrate of an active region. Landing pads and a central landing pad are disposed in peripheral portions and a central portion of the active region,...

20060138512 - Semiconductor storage device: A semiconductor storage device is provided, which inhibits shorts between cells to improve operational reliability and contributes to high-speed operation. An active region (7) where DRAM cells are formed is defined by an isolation trench (40) formed in a silicon substrate (1). The isolation trench (40) has an isolation insulating...

20060138514 - Capacitor for a semiconductor device and manufacturing method thereof: Disclosed is a capacitor for a semiconductor device, comprising: a lower electrode formed over a predetermined lower structure on a semiconductor substrate; an aluminum oxynitride film formed over the lower electrode and having a low leakage current characteristic; a yttrium oxynitride film formed over the aluminum oxynitride film and having...

20060138516 - Method of forming dram device having capacitor and dram device so formed: In a method of forming a DRAM device having a capacitor and a DRAM device so formed, an interlayer dielectric having at least one layer is formed on a semiconductor substrate. The interlayer dielectric layer and a predetermined portion of the semiconductor substrate are sequentially etched to form a storage...

20060138515 - Semiconductor device and fabricating method of the same: Openings are formed by lithography and subsequent dry etching at the portions of a first protective film which correspond to connecting holes of second plugs which will be described later, namely at the portions thereof which align with first plugs, wherein the openings have a diameter greater than that of...

20060138517 - Capacitor structure and fabricating method thereof: Disclosed are a vertical-type capacitor and a formation method thereof. The capacitor includes a first electrode wall and a second electrode wall perpendicular to a semiconductor substrate, and at least one dielectric layer on the substrate to insulate the first electrode wall from the second electrode wall. The first electrode...

20060138518 - Semiconductor device with silicon-germanium gate electrode and method for manufacturing thereof: A semiconductor includes a gate electrode having a SiGe film on a a gate dielectric film that is on a silicon substrate. The gate dielectric film includes an underlying interfacial layer on the substrate and a high-k dielectric film having higher dielectric constant than the underlying interfacial layer. The gate...

20060138519 - Float gate memory device: A float gate memory device comprises a bottom word line, a float channel layer formed on the bottom word line and kept at a floating state, a float gate, and a top word line formed on the float gate in parallel with the bottom word line. In the float gate...

20060138520 - Nonvolatile ferroelectric memory device: A nonvolatile ferroelectric memory device is provided so as to control read/write operations of a nonvolatile memory cell using a channel resistance of the memory cell which is differentiated by polarity states of a ferroelectric material. In the memory device, an insulating layer is formed on a bottom word line,...

20060138521 - Charge trap insulator memory device: A charge trap insulator memory device comprises a plurality of memory cells connected serially, a first switching device, and a second switching device. In the plurality of memory cells, data applied through a bit line depending on potentials applied to a top word line and a bottom word line are...

20060138524 - Flash memory cell and method for manufacturing the same: An active region and a trench region are formed on a semiconductor substrate. The trench region is filled with a dielectric material to form an isolation layer. Oxide and polysilicon layers are formed on the semiconductor substrate. A second polysilicon layer, a second oxide layer, and a first polysilicon layer...

20060138522 - Flash memory devices comprising pillar patterns and methods of fabricating the same: Flash memory devices include pillar patterns formed between selected pairs of floating gates and control gate extensions that penetrate between selected pairs of floating gates are provided. Methods of fabricating the flash memory devices are also provided....

20060138525 - Method of fabricating a floating gate for a nonvolatile memory: A method of fabricating a gate structure (such as a floating gate) of a nonvolatile (e.g., flash) memory is described. After a polysilicon layer and a mask layer (e.g., silicon nitride) are formed on a semiconductor substrate, the silicon nitride layer is patterned and the polysilicon layer is partially etched....

20060138526 - Semiconductor device and method of manufacturing the same: Disclosed is a semiconductor device comprising a first conductive film serving as a floating gate and formed on a semiconductor film via a first gate insulating film, a second conductive film serving as a control gate and formed on the first conductive film via a second gate insulating film, and...

20060138523 - Semiconductor memory device and method of manufacturing the semiconductor memory device: Example embodiments of the present invention disclose a non-volatile semiconductor memory device, which may include a dielectric layer having an enhanced dielectric constant. A tunnel oxide layer pattern and a floating gate may be sequentially formed on a substrate. A dielectric layer pattern including metal oxide doped with Group III...

20060138527 - Semiconductor devices, and electronic systems comprising semiconductor devices: The invention includes non-volatile memory and logic devices associated with crystalline Si/Ge. The devices can include TFT constructions. The non-volatile devices include a floating gate or floating plate over the Si/Ge, and a pair of source/drain regions. The source/drain regions can extend into the Si/Ge. The memory or logic devices...

20060138528 - Charge trap insulator memory device: A charge trap insulator memory device comprises a bottom word line, a P-type float channel formed at the bottom word line and kept at a floating state, a charge trap insulator formed on the P-type float channel, a top word line formed on the charge trap insulator in parallel with...

20060138529 - Method and apparatus for operating a non-volatile memory array: A string of memory cells with a charge trapping structure coupled in series is read, by measuring current that flows between the body region of the selected memory cell and the contact region of the selected memory cell. The charge storage state of the charge trapping structure affects the measured...

20060138530 - Non-volatile memory cell having a silicon-oxide-nitride-oxide-silicon gate structure and fabrication method of such cell: A non-volatile memory cell able to be written in a first direction and read in a second direction is described. The memory cell includes one or two charge trapping regions located near either the source or the drain, or both the source and the drain. During a programming operation, electrons...

20060138531 - Method for fabricating vertical cmos image sensor: A method of fabricating a vertical CMOS image sensor is disclosed, to improve the integration with the decrease in size of pixel by minimizing the lateral diffusion, in which phosphorous and arsenic ions are implanted while controlling the dose and energy, the method including forming a first photodiode in a...

20060138532 - Semiconductor device and manufacturing method of the same: In a semiconductor device having a package structure in which lead terminals connected to electrodes on both of the upper and lower surfaces of a semiconductor chip are exposed from both of the upper and lower surfaces and side surfaces of a sealing body formed of resin, electrodes of the...

20060138534 - Nonvolatile memory device, method for fabricating the same, and method for programming/erasing data in the same: A nonvolatile memory device, a method for fabricating the same, and a method for programming/erasing data in the same are provided. At least one of a plurality of device isolation films is filled with polysilicon and used as an acceleration line. The nonvolatile memory device includes a semiconductor substrate defined...

20060138535 - Semiconductor device having trench gate structure and manufacturing method thereof: A vertical MOSFET includes a base region formed on a drain region and a source region formed in the base region. A trench is formed to extend from the surface of the source region and penetrate the source region and has depth to reach a portion near the drain region....

20060138533 - Vertical trench transistor: A vertical trench transistor has a first electrode, a second electrode and also a semiconductor body arranged between the first and second electrodes, there being formed in the semiconductor body a plurality of transistor cells comprising source region, body region, drift region and gate electrode and also contact holes for...

20060138537 - Method for manufacturing a high integration density power mos device: A process for the realization of a high integration density power MOS device includes the following steps of: providing a doped semiconductor substrate with a first type of conductivity; forming, on the substrate, a semiconductor layer with lower conductivity; forming, on the semiconductor layer, a dielectric layer of thickness comprised...

20060138538 - P-channel power mis field effect transistor and switching circuit: In a P-channel power MIS field effect transistor formed on a silicon surface having substantially a (110) plane, a gate insulation film is used which provides a gate-to-source breakdown voltage of 10 V or more, and planarizes the silicon surface, or contains Kr, Ar, or Xe....

20060138536 - Semiconductor device and method of manufacturing the same: A semiconductor substrate of a first conduction type is provided for serving as a common drain to a plurality of power MISFET cells. A middle semiconductor layer is formed on the semiconductor substrate and has a lower impurity concentration than that of the semiconductor substrate. Pillar regions are formed on...

20060138539 - Process for treating a semiconductor wafer with a gaseous medium, and semiconductor wafer treated by this process: A process for treating a semiconductor wafer with a gaseous medium containing hydrogen fluoride and at least one oxidizing agent which oxidizes the surface of the semiconductor wafer, involves flowing the gaseous medium onto the surface of the semiconductor wafer at a relative velocity in the range from 40 mm/s...

20060138541 - Semiconductor device and method of manufacturing same: A high-speed, low-power-consumption semiconductor device has a thin-film Si layer with a source/drain formed therein. The thin-film Si layer is curved from a region directly below a gate electrode toward a region near the source/drain. The curved thin-film Si layer develops strains in a channel region disposed directly below the...

20060138542 - Semiconductor on insulator substrate and devices formed therefrom: A semiconductor on insulator (SOI) device is comprised of a layer of a dielectric material having a perovskite lattice, such as a rare earth scandate. The dielectric material is selected to have an effective lattice constant that enables growth of semiconductor material having a diamond lattice directly on the dielectric....

20060138540 - Semiconductor wafer having a semiconductor layer and an electrically insulating layer beneath it, and process for producing it: The invention relates to a semiconductor wafer, which, at its surface comprises a semiconductor surface layer with a thickness in the range from 3 nm to 200 nm having no hole defects, and which comprises an adjoining electrically insulating layer beneath the semiconductor surface layer....

20060138543 - Silicon-on-sapphire semiconductor device with shallow lightly-doped drain: A semiconductor device is created in a doped silicon layer at most one-tenth of a micrometer thick formed on and having an interface with a sapphire substrate. An oppositely doped source region is formed in the silicon layer. A gate electrode is formed above part of the silicon layer. A...

20060138544 - Esd protection structure for i/o pad subject to both positive and negative voltages: An ESD protection circuit is disclosed for an n-channel MOS transistor formed in an inner p-well of a triple-well process and connected to an I/O pad that may experience both positive and negative voltages according to the present invention. A first switch connects the p-well containing the n-channel MOS transistor...

20060138545 - Protective circuit for protecting chip from misoperation: A protective circuit for a chip includes an input terminal for receiving a power supply voltage, an output terminal for outputting a working voltage to the chip, a first BJT and a second BJT. A base of the first BJT is connected to the input terminal and an emitter of...

20060138546 - Voltage regulator: A voltage regulator having a MOS transistor driver is disclosed. The voltage regulator comprises a p-channel MOS transistor at a voltage input terminal Vin and a p-channel MOS transistor at a voltage output terminal Vout. A drain of the input side p-channel MOS transistor is connected to the voltage input...

20060138547 - Reduced finger end mosfet breakdown voltage (bv) for electrostatic discharge (esd) protection: The present invention relates to electro static discharge (ESD) protection circuitry. Multiple techniques are presented to adjust one or more ends of one or more fingers of an ESD protection device so that the ends of the fingers have a reduced initial trigger or breakdown voltage as compared to other...

20060138549 - High-voltage transistor and fabricating method thereof: A high-voltage transistor having a low on-resistance and fabricating method thereof are provided. The high-voltage transistor includes a substrate; a shallow-trench isolation layer provided to an upper part of the substrate to a prescribed depth to define an active area; an extended drain region enclosing the shallow-trench isolation layer; a...

20060138548 - Strained silicon, gate engineered fermi-fets: A field effect transistor includes a strained silicon channel in a substrate, source/drain regions in the substrate at opposite ends of the strained silicon channel, a gate insulating layer on the strained silicon channel, and a gate on the gate insulating layer. The doping of the strained silicon channel, the...

20060138552 - Nonplanar transistors with metal gate electrodes: A semiconductor device comprising a semiconductor body having a top surface and a first and second laterally opposite sidewalls as formed on an insulating substrate is claimed. A gate dielectric is formed on the top surface of the semiconductor body and on the first and second laterally opposite sidewalls of...

20060138553 - Nonplanar transistors with metal gate electrodes: A semiconductor device comprising a semiconductor body having a top surface and a first and second laterally opposite sidewalls as formed on an insulating substrate is claimed. A gate dielectric is formed on the top surface of the semiconductor body and on the first and second laterally opposite sidewalls of...

20060138550 - Semiconductor device with multiple gate dielectric layers and method for fabricating the same: Disclosed are a semiconductor device with dual gate dielectric layers and a method for fabricating the same. The semiconductor device includes: a silicon substrate divided into a cell region where NMOS transistors are formed and a peripheral region where NMOS and PMOS transistors are formed; a targeted silicon oxide layer...

20060138551 - Semiconductor device, manufacturing method thereof, and cmos integrated circuit device: A semiconductor device includes a semiconductor substrate. A gate electrode is formed on the semiconductor substrate via a gate insulating film. A source region and a drain region of a first conductivity type are formed on the first side and the second side of the gate electrode, respectively, in the...

20060138554 - Semiconductor device and fabricating method for the same: The present invention is intended to provide a semiconductor device having a gate electrode free from increasing of resistance of the gate electrode, from decreasing of capacitance of the insulation film due to depletion, and from penetrating of impurity. The semiconductor device comprises a silicon layer, a gate insulating film...

20060138556 - Gate dielectric and method: A MOSFET structure with high-k gate dielectric layer and silicon or metal gates, amorphizing treatment of the high-k gate dielectric layer as with a plasma or ion implantation....

20060138557 - Novel cmos device: A method comprising providing a substrate having an NMOS device adjacent a PMOS device and forming a first stress layer over the NMOS and PMOS devices, wherein the first stress layer comprises a first tensile-stress layer or a compression-stress layer. An etch stop layer is formed over the first stress...

20060138555 - Semiconductor device and method of fabricating the same: According to one aspect of the invention, there is provided a semiconductor device fabrication method comprising: forming a gate insulating film on a semiconductor substrate; forming a film containing a predetermined semiconductor material and germanium on the gate insulating film; oxidizing the film to form a first film having a...

20060138558 - Semiconductor memory device and method of fabricating the same: A semiconductor memory device includes: a semiconductor device base having an insulating substrate and a semiconductor layer overlying it; a cell array formed on the semiconductor device base with memory cells disposed in such a manner that each of source and drain regions is shared by adjacent two memory cells...

20060138559 - Flash memories having at least one resistance pattern on gate pattern and methods of fabricating the same: Flash memories and methods of manufacturing the same provide at least one resistance pattern on a gate pattern, and are capable of increasing a process margin in the semiconductor fabrication process. Gate patterns and bit line patterns are sequentially formed in a cell array region and a peripheral circuit region...

20060138560 - Metal oxide semiconductor transistor and method for manufacturing the same: A metal oxide semiconductor (MOS) transistor includes a source region having at least one source contact; a drain region having at least one drain contact; and a gate provided between the source region and the drain region, wherein the number of source contacts included in the source region is different...

20060138561 - Semiconductor device having raised cell landing pad and method of fabricating the same: A semiconductor device and method of manufacturing the same having pad extending parts, the semiconductor device includes an isolation layer that defines an active region and a gate electrode which traverses the active region. A source region is provided in the active region at one side of the gate electrode,...

20060138562 - Semiconductor device and method for fabricating the same: A semiconductor device includes: a gate electrode formed on a silicon substrate; source/drain regions formed at both sides of the gate electrode in the silicon substrate; and a silicide layer formed on the source/drain regions. The silicide layer includes a first silicide layer mainly made of a metal silicide having...

20060138564 - Electrical node of transistor and method of forming the same: According to example embodiments of the present invention, there are provided an electrical node of a transistor and a method of forming the same, which may reduce or minimize current leakage between the electrical node and a semiconductor substrate when a buried contact hole exposing at least the side of...

20060138563 - Nand flash memory device: A memory device capable of enlarging an interval between a source selection transistor and a memory cell adjacent to the source selection transistor, enlarging an interval between a drain selection transistor and a memory cell adjacent to the drain selection transistor, or enlarging the intervals between the source selection transistor...

20060138565 - Power metal oxide semiconductor transistor layout with lower output resistance and high current limit: A power metal oxide semiconductor transistor layout is disclosed. The power metal oxide semiconductor transistor layout uses network of conductive lead line as a connection or a network connection to connect source and drain regions thereby achieves advantages of a high uniformity of current, low Rds_on, much less power loss,...

20060138566 - Doped nitride film, doped oxide film and other doped films: Adding at least one non-silicon precursor (such as a germanium precursor, a carbon precursor, etc.) during formation of a silicon nitride, silicon oxide, silicon oxynitride or silicon carbide film improves the deposition rate and/or makes possible tuning of properties of the film, such as tuning of the stress of the...

20060138567 - Semiconductor device and fabricating method thereof: A semiconductor device and fabricating method thereof in which a lightly doped drain junction is graded using a diffusion property of dopant implanted in heavily doped source/drain region are disclosed. An example semiconductor device includes a gate electrode having a gate insulating layer underneath and disposed on a semiconductor substrate;...

20060138568 - Semiconductor integrated circuit device and a methodof manufacturing the same: A MISFET capable of a high speed operation includes a metal silicide layer in a high concentration region aligned with a gate side wall layer on a self-alignment basis. A MISFET which can be driven at a high voltage includes an LDD portion having a width greater than the width...

20060138569 - Semiconductor device and manufacturing method thereof: A semiconductor device according to a exemplary embodiment of the present invention includes a reverse spacer exposing a part of an epitaxial silicon layer on a silicon substrate, a gate oxide layer on at least the epitaxial silicon layer and a gate polysilicon layer on the gate oxide layer and...

20060138571 - Method of forming double gate dielectric layers and semiconductor device having the same: A method of forming double gate dielectric layers composed of an underlying oxide layer and an overlying oxy-nitride layer is provided to prevent degradation of gate dielectric properties due to plasma-induced charges. In the method, the oxide layer is thermally grown on a silicon substrate under oxygen gas atmosphere to...

20060138570 - Semiconductor device and fabricating method thereof: A semiconductor device and semiconductor device fabricating method may enhance device reliability by forming a chemical oxide buffer layer prior to forming a high-k gate oxide layer. The semiconductor device includes a semiconductor substrate; a chemical oxide buffer layer on the semiconductor substrate; a high-k gate oxide layer on the...

20060138572 - Semiconductor device and method for manufacturing the same: A gate insulating film on a silicon substrate of includes a SiO2 film and a high-k film. The high-k film contains a transition metal, aluminum, silicon, and oxygen. The concentration of silicon in the high-k film is higher than the concentrations of the transition metal and aluminum in the vicinity...

20060138573 - Bi-directional released-beam sensor: An acceleration sensor includes a semiconductor substrate, a first layer formed on the substrate, a first aperture within the first layer, and a beam coupled at a first end to the substrate and suspended above the first layer for a portion of the length thereof. The beam includes a first...

20060138574 - Capacitive sensor: A pressure-sensitive capacitive sensor is provided that can easily remove noises delivered from a human body. The capacitive sensor includes a sensor unit having a first substrate where a plurality of vertical wiring lines is formed and a second substrate where a plurality of horizontal wiring lines is formed, the...

20060138575 - Semiconductor nanowire fluid sensor and method for fabricating the same: Nanowire fluid sensors are provided. The fluid sensors comprise a first electrode, a second electrode, and at least one nanowire between the first electrode and the second electrode. Each nanowire is connected at a first end to the first electrode and at a second end to the second electrode. Methods...

20060138576 - Self-aligned conductive lines for fet-based magnetic random access memory devices and method of forming the same: A conductive line structure for a field effect transistor (FET) based magnetic random access memory (MRAM) device includes a lateral metal strap conductively coupled to a lower metallization line. A magnetic tunnel junction (MTJ) stack is formed on the metal strap, and a metal shield is formed over the MTJ...

20060138578 - Cmos image sensor and method for fabricating the same: A CMOS image sensor and a method for fabricating the same in which characteristics of the image sensor are not affected even if a profile of microlenses is varied, so as to obtain a more reliable device. The CMOS image sensor of the present invention includes color filter layers formed...

20060138577 - Photoelectric conversion device and method for producing photoelectric conversion device: A photoelectric conversion device according to the present invention has a plurality of photoreceiving portions provided in a substrate, an interlayer film overlying the photoreceiving portion, a large refraction index region which is provided so as to correspond to the photoreceiving portion and has a higher refractive index than the...

20060138579 - Image sensor package, solid state imaging device, and fabrication methods thereof: An image sensor package and a solid state imaging device. The image sensor package includes an image sensor having an image sensor and connection pads on a wafer. A transparent plate is attached to the upper surface of the image sensor chip via an adhesive. The connection pads include connectors,...

20060138580 - Photo-detecting device and related method of formation: A photo-detecting device includes a buried doping layer of a first conductivity type and disposed at an upper portion of a silicon substrate. A first silicon epitaxial layer of first conductivity type is disposed on the buried doping layer, and a second silicon epitaxial layer of second conductivity type is...

20060138581 - Split transfer gate for dark current suppression in an imager pixel: A pixel with a photosensor and a transfer transistor having a split transfer gate. A first section of the transfer gate is connectable to a first voltage source while a second section of the transfer gate is connectable to a second voltage source. Thus, during a charge integration period of...

20060138582 - Digital temperature sensing device using temperature depending characteristic of contact resistance: A digital temperature sensing device uses temperature depending characteristic of contact resistance of a MOS transistor and a self-refresh driving device adjusts its self-refresh period depending on temperature using the digital temperature sensing device. The self-refresh driving device includes a first reference voltage generating unit for generating a reference voltage...

20060138583 - Method and structure for implanting bonded substrates for electrical conductivity: A partially completed multi-layered substrate, e.g., silicon on silicon. The substrate has a thickness of material from a first substrate. The thickness of material comprises a first face region. The substrate has a second substrate having a second face region. Preferably, the first face region of the thickness of material...

20060138584 - Semiconductor device: A semiconductor device includes a substrate including a high-voltage transistor area provided with a high-voltage transistor and a low-voltage transistor area provided with a low-voltage transistor; a LOCOS layer provided as a device isolation layer of the high-voltage transistor area; and a shallow-trench isolation layer provided as a device isolation...

20060138586 - Dielectric isolation type semiconductor device and method for manufacturing the same: A dielectric isolation type semiconductor device and a manufacturing method therefor achieve high dielectric resistance while preventing the dielectric strength of the semiconductor device from being limited depending on the thickness of a dielectric layer and the thickness of a first semiconductor layer. A semiconductor substrate (1) and an n−...

20060138585 - Semiconductor device and method for fabricating the same: A semiconductor device capable of preventing a bridge generation during performing an etching process to form a plurality of gate structures on a substrate divided into an active region and a field region and an electrical short between a contact plug and the individual gate structure in the field region...

20060138587 - Semiconductor device and manufacturing method thereof: An semiconductor device and a manufacturing method minimizes the inductor area in a high frequency device by forming an inductor with a vertical spiral geometry. Accordingly, the device can be highly integrated. In addition, the inductor area overlapped with various devices on a substrate can be minimized so as to...

20060138588 - Self-configuring component by means of arcing: A component with an internal conductor is so configured that it is ruptured at a predetermined position while forming an arc, if predetermined current/voltage conditions occur at the terminals of the component. The component includes a circuit element which is so arranged that an arc formed at the predetermined position...

20060138589 - Semiconductor device with a fuse part and method of manufacturing the same: The present invention provides a semiconductor device with a fuse part and a method of forming the same. The method includes forming a selective metal layer on a via hole which is connected to a metal line in a semiconductor device, forming a fuse metal layer on the selective metal...

20060138593 - Capacitor of semiconductor device and manufacturing method thereof: In a capacitor of a semiconductor device, a bottom electrode is formed on a substrate and has an uneven top surface. An interlayer insulation layer is formed on the substrate and has a via hole exposing the top surface of the bottom electrode. A dielectric layer is formed unevenly on...

20060138590 - Electronic parts and method for manufacture thereof: An electronic device having an element body comprising an internal electrode layer, wherein the internal electrode layer includes an alloy, the alloy contains a nickel (Ni) element and at least one kind of element selected from ruthenium (Ru), rhodium (Rh), rhenium (Re) and platinum (Pt), and a content of each...

20060138592 - Method of forming on-chip decoupling capacitor with bottom electrode layer having surface roughness: On-chip decoupling capacitor structures, and methods of fabricating such decoupling capacitors are disclosed. On-chip decoupling capacitors help to reduce or prevent L di/dt voltage droop on the power grid for high surge current conditions. The inclusion of one or more decoupling capacitors on a chip, in close proximity to the...

20060138594 - Method of improved high k dielectric - polysilicon interface for cmos devices: Methods for forming dielectric layers over polysilicon substrates, useful in the construction of capacitors and other semiconductor circuit components are provided. A self-limiting nitric oxide (NO) anneal of a polysilicon layer such as an HSG polysilicon capacitor electrode, at less than 800° C., is utilized to grow a thin oxide...

20060138591 - Power core devices and methods of making thereof: The present invention relates to a device comprising a power core wherein said power core comprises: at least one embedded singulated capacitor layer containing at least one embedded singulated capacitor; and at least one planar capacitor laminate; wherein said planar capacitor laminate serves as a low inductance path to supply...

20060138595 - Semiconductor device and method of manufacturing the same: Disclosed is a semiconductor device comprising a semiconductor substrate, a capacitor structure formed above the semiconductor substrate and comprising a first electrode, a second electrode provided below the first electrode, a third electrode provided below the second electrode, a first dielectric film provided between the first electrode and the second...

20060138596 -