|
FREE patent keyword monitoring and additional FREE benefits. |
![]() |
|
|
USPTO Class 257 | Browse by Industry: Previous - Next | All 05/2006 | Recent | 08: Jun | May | Apr | Mar | Feb | Jan | | 07: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | | 06: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | Active solid-state devices (e.g., transistors, solid-state diodes) inventions 05/06Recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.Listing format for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 05/25/2006 > 123 patent applications in 90 patent subcategories. 20060108572 - Stacked module systems and methods: The present invention provides methods for constructing stacked circuit modules and precursor assemblies with flexible circuitry. Using the methods of the present invention, a single set of flexible circuitry whether articulated as one or two flex circuits may be employed with CSP devices of a variety of configurations either with... 20060108573 - Single crystalline gallium nitride thick film having reduced bending deformation: The present invention relates to a freestanding, thick, single crystalline gallium nitride (GaN) film having significantly reduced bending deformation. The inventive GaN film having a crystal tilt angle of C-axis to the <0001> direction per surface distance of 0.0022 °/mm exhibits little bending deformation even at a thickness of 1... 20060108574 - Optoelectronic transmitter integrated circuit and method of fabricating the same using selective growth process: Provided are an optoelectronic (OE) transmitter integrated circuit (IC) and method of fabricating the same using a selective growth process. In the OE transmitter IC, a driving circuit, which includes a double heterojunction bipolar transistor (DHBT) and amplifies received electric signals to drive an electroabsorption (EA) modulator, and the EA... 20060108575 - Method of fabricating static random access memory: A method of fabricating a static random access memory device includes selectively removing an insulating film and growing a single crystalline silicon layer using selective epitaxy growth, the single crystalline silicon layer being grown in a portion from which the insulating film is removed; recessing the insulating film; and depositing... 20060108576 - Layer system comprising a silicon layer and a passivation layer, method for production a passivation layer on a silicon layer and the use of said system and method: A layer system is described including a silicon layer and a passivation layer which is applied at least regionally to the silicon layer's surface, the passivation layer having a first, at least largely inorganic partial layer and a second partial layer, the second partial layer being made of an organic... 20060108579 - Low-voltage organic transistors on flexible substrates using high-gate dielectric insulators by room temperature process: A transistor device includes a transparent substrate. A high K dielectric is formed on the transparent substrate and transferred onto a flexible substrate. An organic transistor is formed on the high K dielectric.... 20060108577 - Nanocrystal protective layer for crossbar molecular electronic devices: A molecular device is provided. The molecular device comprises a junction formed by a pair of crossed electrodes where a first electrode is crossed by a second electrode at a non-zero angle and at least one connector species including at least one switchable moiety and connecting the pair of crossed... 20060108580 - Organic el device: Provided is an organic EL device, including: a transparent substrate having a front surface and a rear surface; a first electrode layer, an organic layer including a light emitting layer and a second electrode layer that are formed in order on the front surface of the transparent substrate; and a... 20060108582 - Organic field-effect transistor and method of making same based on polymerizable self-assembled monolayers: An organic field-effect transistor and a method of making the same include a self-assembled monolayer (SAM) of bifunctional molecules disposed between a pair of electrodes as a channel material. The pair of electrodes and the SAM of bifunctional molecules are formed above an insulating layer, in which each of the... 20060108578 - Organic photoelectric device with improved electron transport efficiency: An opto-electronic device, such as an OLED or organic solar cell, having an electrode structure for use as a cathode. The electrode structure includes an electrically conductive layer and an inorganic layer, wherein the inorganic layer is made of at least one oxide-based alkali or alkaline earth metal intercalation compound.... 20060108581 - Organic thin film transistor, method of manufacturing the same, and flat panel display device with the organic thin film transistor: An organic thin film transistor that has good adhesiveness and good contact resistance as well as allows ohmic contact between an organic semiconductor layer and a source electrode and a drain electrode, and its manufacturing method. There is also provided a flat panel display device using the organic thin film... 20060108583 - System and method for removing film from planar substrate peripheries: A system for removing film from a planar substrate includes a shuttle which transports a film-coated substrate through a film removal station to a rotation station. At the rotation station, the substrate is removed from the shuttle and rotated to a new orientation. After being repositioned on the shuttle, the... 20060108584 - Display device: A display device including a first substrate, a first subpixel electrode, a second subpixel electrode corresponding to the first substrate, a second substrate and a common electrode formed on the second substrate is provided. The first subpixel electrode and the second subpixel electrode are formed on the first substrate. The... 20060108585 - Thin film transistors and fabrication methods thereof: Thin film transistors and fabrication methods thereof. A gate is formed overlying a portion of a substrate. A gate-insulating layer is formed overlying the gate. A vanadium oxide layer is formed between the gate and the substrate and/or the gate and the gate-insulating layer. A semiconductor layer is formed on... 20060108588 - Display device and electronic device: The invention provides a display device and an electronic device, each of which has one of a structure in which a substrate provided with a light emitting element which performs bottom light emission and a substrate provided with a light emitting element which performs top light emission are attached, and... 20060108586 - Display panels with anti-newton ring structures: A display panel with an anti-Newton ring structure is disclosed. The display panel includes a substrate with an array region and a display region defined thereon. A buffer layer is disposed on the substrate and at least one transistor is formed in the array region. The display panel further includes... 20060108587 - Thin film transistor array panel and manufacturing method thereof: A thin film transistor array panel is provided, which includes a substrate, a plurality of gate line formed on the substrate, a plurality of common electrodes having a transparent conductive layer on the substrate, a gate insulating layer covering the gate lines and the common electrodes, a plurality of semiconductor... 20060108589 - Semiconductor device: A semiconductor device (1) includes an n-type silicon carbide substrate (2) of a high impurity concentration, an n-type silicon carbide layer (3) of a low impurity concentration disposed on the substrate, a first n-type silicon carbide region (4) of a first impurity concentration disposed on the surface of the n-type... 20060108590 - Group iii-v nitride series semiconductor substrate and assessment method therefor: The group III-V nitride series semiconductor substrate has good-product yield when the band-edge peak light-emission intensity ratio α=N1/N2 is α<1, where N1 is a band-edge peak light-emission intensity at an arbitrary photoluminescence measurement position on the front side of the substrate, and N2 is a band-edge peak light-emission intensity on... 20060108591 - Method and apparatus for electroluminescence: Methods and apparatuses for causing electroluminescence with charge trapping structures are disclosed. Various embodiments relate to methods and apparatuses for causing electroluminescence with charge carriers of one type provided to the charge trapping structure by a forward biased p-n structure or a reverse biased p-n structure.... 20060108592 - Organic electroluminescent apparatus: A red color filter layer is provided under an organic EL device. A green color filter layer, a blue color filter layer, and a region without a color filter layer are provided in this order under an organic EL device. Orange light from the organic EL device is transmitted through... 20060108593 - Gan-based compound semiconductor light emitting device: A GaN-based compound semiconductor light emitting device is provided. The semiconductor light emitting device includes a substrate; an n-type semiconductor layer formed on the substrate; an active layer formed on a first region of the n-type semiconductor layer; a p-type semiconductor layer formed on the active layer; a p-type electrode... 20060108594 - Led device and method for manufacturing the same: An LED device can include LED chips mounted with high density and encapsulated with a resin. The device may not be substantially affected by fluctuations in thermal stress generated in the encapsulating resin and can have reduced fluctuations in characteristics such as output power and a color tone and can... 20060108595 - Led fabrication via ion implant isolation: A semiconductor light emitting diode includes a semiconductor substrate, an epitaxial layer of n-type Group III nitride on the substrate, a p-type epitaxial layer of Group III nitride on the n-type epitaxial layer and forming a p-n junction with the n-type layer, and a resistive gallium nitride region on the... 20060108596 - Nitride semiconductor device and method of manufacturing the same: A P-type electrode material is provided on a top surface of a P-type contact layer. The P-type electrode material is formed with an AuGa film, an Au film, a Pt film, and an Au film. The AuGa film is provided on the P-type contact layer. The Au film is provided... 20060108597 - Light-emitting device and vehicle lamp: A light-emitting device in which a light-emitting element, such as an LED, and an electrostatic protection element for protecting the light-emitting element from electrostatic breakdown are connected in parallel. The light-emitting device is configured such that a connection wire member of the light-emitting element and a connection wire member of... 20060108598 - Gallium nitride-based light-emitting device: A light-emitting gallium nitride-based III-V group compound semiconductor device with enhanced brightness includes a substrate, a first-type conductive semiconductor layer, a light-emitting layer, a second-type conductive semiconductor layer, a transparent conductive layer, and two electrodes. During the manufacturing process of chips, a single or a pair of diamond scribing tool... 20060108599 - Triple well structure and method for manufacturing the same: The present invention discloses a triple well structure, which includes a substrate of a first conductive type, a deep buried well of a second conductive type, a well of a first conductive type, a well ring of a second conductive type, and a well ring of a first conductive type.... 20060108600 - Semiconductor device and method for manufacturing the same: The present application provides a semiconductor device including a first-conductivity type semiconductor substrate, a pillar structure portion formed on the first-conductivity type semiconductor substrate and formed of five semiconductor pillar layers arranged in one direction parallel to a main surface of the first-conductivity type semiconductor substrate, and isolation insulating portions... 20060108601 - Insulating substrate and semiconductor device: An insulating substrate includes a metal base as a base member, an insulating layer which is a room temperature, aerosol deposited shock solidification film formed on the metal base, and a circuit pattern which is a cold sprayed thermal spray coating formed on the insulating layer. A semiconductor device incorporates... 20060108602 - Field effect transistor and method of manufacturing the same: A field effect transistor includes an i-type first semiconductor layer and a second semiconductor layer that is formed on the first semiconductor layer and the band gap energy of that is higher in magnitude than that of the first semiconductor layer. The first semiconductor layer and second semiconductor layer are... 20060108603 - Group iii nitride compound semiconductor light emitting device: In a group III nitride compound semiconductor light emitting device comprising an n-type semiconductor layer, a p-type semiconductor layer having a superlattice structure in which a first layer comprising at least Al and a second layer having a different composition from that of the first layer are laminated repetitively, and... 20060108604 - Bipolar transistor and a method of fabricating said transistor: The invention proposes a bipolar transistor comprising a substrate, emitter, base, and collector layers and, if appropriate, contact layers. The base layer is formed from a GaAsSb material. The transistor also has at least one transition layer formed from a GaInP material between the emitter layer and the base layer.... 20060108605 - Schottky barrier diode and integrated circuit using the same: A Schottky barrier diode includes a first semiconductor layer and a second semiconductor layer successively formed above a substrate; and a high-resistance region formed in the first semiconductor layer and the second semiconductor layer and having higher resistance than the first semiconductor layer and the second semiconductor layer. A Schottky... 20060108606 - Cap layers and/or passivation layers for nitride-based transistors, transistor structures and methods of fabricating same: High electron mobility transistors are provided that include a non-uniform aluminum concentration AlGaN based cap layer having a high aluminum concentration adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. High electron mobility transistors are provided that include... 20060108607 - Integrated circuit component and mounting method thereof: Disclosed are an integrated circuit component capable of simply mounting at low cost a chip part which adjusts impedance of wiring patterns as well as capable of effectively reducing switching noise from an integrated circuit, and a method for mounting the chip part. The integrated circuit component of the present... 20060108609 - Barrier dielectric stack for seam protection: The present invention provides a semiconducting device including a gate dielectric atop a semiconducting substrate, the semiconducting substrate containing source and drain regions adjacent the gate dielectric; a gate conductor atop the gate dielectric; a conformal dielectric passivation stack positioned on at least the gate conductor sidewalls, the conformal dielectric... 20060108608 - Hetero bipolar transistor: The invention relates to a heterobipolar transistor, comprising an emitter which includes a first semiconductor layer (8) made of a first semiconductor material and a second semiconductor layer (9) made of a second semiconductor material, a band gap value of the first semiconductor material being smaller than a band gap... 20060108610 - Method of manufacturing a thin dielectric layer using a heat treatment and a semiconductor device formed using the method: In a method for forming a semiconductor device and a semiconductor device formed in accordance with the method, a thin dielectric layer is provided between a lower conductive layer and an upper conductive layer. In one embodiment, the thin dielectric layer comprises an inter-gate dielectric layer, the lower conductive layer... 20060108611 - Image sensing device and method of: A two-dimensional, temporally modulated electromagnetic wavefield, preferably in the ultraviolet, visible or infrared spectral range, can be locally detected and demodulated with one or more sensing elements. Each sensing element consists of a resistive, transparent electrode (E) on top of an insulated layer (O) that is produced over a semiconducting... 20060108612 - Packaging: A packaging (10) containing a product (11). The product (11) may be a solar powered light device (110). The packaging (10) includes a switch (23) that is operable to activate the product (11) while the product (11) is still within the packaging (10) so that a user may observe operation... 20060108613 - Cmos image sensor: Provided is a CMOS image sensor including a pinned photodiode and a transfer transistor. The CMOS image sensor includes: a substrate; a gate electrode disposed on the substrate and electrically isolated from the substrate by a gate insulating layer; a first floating region disposed in the substrate of one side... 20060108614 - Cmos image sensor: A complementary metal-oxide semiconductor (CMOS) image sensor comprises a photodiode region generating electrical charges in response to incident light thereon. The CMOS image sensor further comprises a first floating diffusion layer adapted to receive the electrical charges from the photodiode region in response to a global transfer signal and a... 20060108615 - Liquid crystal display apparatus and driving method thereof: This invention relates to a liquid crystal display device that minimizes picture quality deterioration caused by signal distortion. The present invention selects an area within an image, which has a rapidly increasing or decreasing gamma voltage, identifies a border delineating two different intensity regions within the area, computes an average... 20060108616 - High-voltage metal-oxide-semiconductor transistor: A high-voltage metal-oxide-semiconductor (HV MOS) transistor is provided to form the decoder in a source driver of a display apparatus for substantially saving the layout area. The HV MOS transistor includes two doped regions with a first conductivity type disposed in a semiconductor substrate, and a gate region having a... 20060108617 - Solid-state image pickup device and manufacturing method for the same: A solid-state image pickup device includes, in a substrate, a plurality of photoelectric conversion regions for subjecting incoming light to photoelectric conversion, a reading gate for reading a signal charge from the photoelectric conversion regions, and a transfer register (vertical register) for transferring the signal charge read by the reading... 20060108618 - Cmos image sensor having buried channel mos transistors: A CMOS image sensor having buried channel MOS transistors is disclosed. The CMOS image sensor includes a photo converting device and a source follower transistor. The photo converting device generates a current signal and changes a voltage of a floating node in response to energy of an incident light. The... 20060108621 - Capacitor insulating film, method for fabricating the same, capacitor element, method for fabricating the same, semiconductor memory device, and method for fabricating the same: A capacitor insulating film is composed of a ferroelectric film formed on a substrate and containing an element functioning as a crystal nucleus which allows the growth of a crystal in a random crystal orientation.... 20060108622 - Ferroelectric integrated circuit devices having an oxygen penetration path and methods for manufacturing the same: Ferroelectric integrated circuit devices, such as memory devices, are formed on an integrated circuit substrate. Ferroelectric capacitor(s) are on the integrated circuit substrate and a further structure on the integrated circuit substrate overlies at least a part of the ferroelectric capacitor(s). The further structure includes at least one layer providing... 20060108619 - Ferromagnetic iv group based semiconductor, ferromagnetic iii-v group based compound semiconductor, or ferromagnetic ii-iv group based compound semiconductor, and method for adjusting their ferromagnetic characteristics: Disclosed is a ferromagnetic group IV-based semiconductor or a ferromagnetic group III-V-based or group II-VI-based compound semiconductor, comprising a group IV-based semiconductor or a group III-V-based or group II-VI-based compound semiconductor, which contains at least one rare-earth metal element selected from the group consisting of Ce, Pr, Nd, Pm, Sm,... 20060108623 - Oxidative top electrode deposition process, and microelectronic device structure: A method of preventing oxygen deficiency in a ferroelectric or high ε film material having a top electrode layer deposited thereon. Process conditions are employed that either enable the top electrode layer to be formed without oxygen abstraction from the ferroelectric or high ε film material in the vicinity and... 20060108620 - Reduced power magnetoresistive random access memory elements: Low power magnetoresistive random access memory elements and methods for fabricating the same are provided. In one embodiment, a magnetoresistive random access device has an array of memory elements. Each element comprises a fixed magnetic portion, a tunnel barrier portion, and a free SAF structure. The array has a finite... 20060108625 - Methods of programming non-volatile memory devices including transition metal oxide layer as data storage material layer and devices so operated: A method of programming a non-volatile memory device including a transition metal oxide layer includes applying a first electric pulse to the transition metal oxide layer for a first period to reduce a resistance of the transition metal oxide layer and applying a second electric pulse to the transition metal... 20060108624 - Semiconductor device: A semiconductor device comprises a capacitor including a bottom electrode, a top electrode, and a dielectric film, the bottom electrode comprising a first conductive film containing iridium, a second conductive film provided between the dielectric film and the first conductive film and formed of a noble metal film, a third... 20060108627 - Nand flash memory devices including multi-layer memory cell transistor structures and methods of fabricating the same: An integrated circuit memory device on a multi-layer substrate includes first and second selection transistors, a first plurality of serially connected memory cell transistors on a first substrate layer, and a second plurality of serially connected memory cell transistors on a second substrate layer. The first plurality of serially connected... 20060108633 - Electrically erasable programmable read only memory (eeprom) cells and methods of fabricating the same: Electrically erasable programmable read only memory (EEPROM) cells and methods of fabricating the same are provided. An EEPROM cell includes an isolation layer formed at a semiconductor substrate to define an active region. A source region, a buried N+ region and a drain region are serially disposed at the active... 20060108631 - Fabrication of conductive lines interconnecting conductive gates in nonvolatile memories, and non-volatile memory structures: In a nonvolatile memory, the select gates (144S) are formed from one conductive layer (e.g. polysilicon or polyside), and the wordlines (144) interconnecting the select gates are made from a different conductive layer (e.g. metal). The wordlines overlie an interlevel dielectric (310) formed over control gates (134). The dielectric thickness... 20060108629 - Multi-bit non-volatile memory device, method of operating the same, and method of fabricating the same: A multi-bit non-volatile memory device and methods of operating and fabricating the same may be provided. The memory device may include a channel region formed in a semiconductor substrate, and a source and drain that form a Schottky contact with the channel region. Also, a central gate electrode may be... 20060108628 - Multi-level split-gate flash memory: A multi-level split-gate flash memory is provided. The flash memory includes a substrate, a memory row, a dummy select gate, a source region and a drain region. The memory cell row includes a plurality of serially connected memory cells with each memory cell having a stacked gate structure and a... 20060108632 - Reducing delays in word line selection: Delays in selecting word lines of a NAND memory device are reduced by respectively connecting conductive straps to word lines of a subset of the word lines of the memory device.... 20060108630 - Semiconductor memory and method for manufacturing the same: A semiconductor memory has plural cell transistors that are arranged in a matrix. The cell transistor comprises a P type silicon substrate, a control gate CG and a pair of electrically isolated floating gates. Plural projections are formed in the silicon substrate, and a pair of N type diffusion regions... 20060108634 - Semiconductor apparatus and method for manufacturing the same: A semiconductor apparatus comprises a gate electrode, a gate insulating layer, a drift region of a first conductivity type formed over a semiconductor substrate of the first conductivity type, a base region of a second conductivity type formed over the drift region, a source region of the first conductivity type... 20060108635 - Trenched mosfets with part of the device formed on a (110) crystal plane: This invention discloses an improved MOSFET devices manufactured with a trenched gate by forming part of the trench on a (110) crystal orientation of a semiconductor substrate. The trench is covering with a dielectric oxide layer along the sidewalls and the bottom surface or the termination of the trench formed... 20060108636 - Amorphous oxide and field effect transistor: A novel amorphous oxide applicable, for example, to an active layer of a TFT is provided. The amorphous oxide comprises microcrystals.... 20060108637 - Esd protection apparatus for an electrical device: An ESD protection apparatus for an electrical device with a circuit structure having an internal terminal, which is connected to an external terminal of the electrical device via a conductive connection, has a gas-filled cavity, through which the conductive connection extends at least partly, and a reference electrode in the... 20060108640 - Semiconductor integrated circuit: A semiconductor integrated circuit comprising: a pair of MOS transistors which are formed in a same well on a semiconductor substrate and arranged adjacent to each other with a distance such that charge exchange between capacitances of respective drain diffusion layers is possible; and a wiring structure which is formed... 20060108639 - Transistor, method of manufacturing transistor, and method of operating transistor: A transistor in which a physical property of its channel is changed according to an applied voltage, and methods of manufacturing and operating the same are provided. The transistor may include a first conductive layer on a substrate, a phase change layer and a second conductive layer which are sequentially... 20060108643 - Cmos on hybrid substrate with different crystal orientations using silicon-to-silicon direct wafer bonding: A method in which semiconductor-to-semiconductor direct wafer bonding is employed to provide a hybrid substrate having semiconductor layers of different crystallographic orientations that are separated by a conductive interface is provided. Also provided are the hybrid substrate produced by the method as well as using the direct bonding method to... 20060108641 - Device having a laterally graded well structure and a method for its manufacture: Provided are a device and method for its manufacture. In one example, the device includes a semiconductor substrate that includes a well region formed using a first-type dopant. First and second doped regions are formed in the well region using a second-type dopant, and the first and second doped regions... 20060108644 - Self-aligned double gate device and method for forming same: In a method of forming a double gate device, a buried insulating layer having a thickness of less than about 30 nm is formed on a first substrate. A second substrate is formed on the buried insulating layer. A pad layer is formed over the second substrate. A mask layer... 20060108646 - Nrom semiconductor memory device and fabrication method: This invention relates to a method for producing an NROM semiconductor memory device and a corresponding NROM semiconductor memory device. The inventive production method comprises the following steps: a plurality of spaced-apart U-shaped MOSFETS are provided along rows in a first direction and along gaps in a second direction inside... 20060108648 - Memory with self-aligned trenches for narrow gap isolation regions: Self-aligned trench filling is used to isolate devices in high-density integrated circuits. A deep, narrow trench isolation region is formed in a substrate between devices. The trench region includes two trench portions. A first trench portion, located above a second trench portion, is filled with a deposited dielectric. The second... 20060108647 - Self-aligned trench filling for narrow gap isolation regions: Self-aligned trench filling is used to isolate devices in high-density integrated circuits. A deep, narrow trench isolation region is formed in a substrate between devices. The trench region includes two trench portions. A first trench portion, located above a second trench portion, is filled with a deposited dielectric. The second... 20060108650 - Method of enlarging contact area of a gate electrode, semiconductor device having a surface-enlarged gate electrode, and method of manufacturing the same: A highly integrated semiconductor device operates at a high speed due to low resistance at the gate electrode and minimal parasitic capacitance between the gate electrode and substrate. A gate pattern is formed on a substrate, and an insulating layer is formed over the substrate including over the gate pattern.... 20060108651 - Lowered source/drain transistors: A novel transistor structure and method for fabrication the same. The novel transistor structure comprises first and second source/drain (S/D) regions whose top surfaces are lower than a top surface of the channel region of the transistor structure. The method for fabricating the transistor structure starts out with a planar... 20060108652 - Microelectromechanical systems, and methods for encapsulating and fabricating same: There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a MEMS device, and technique of fabricating or manufacturing a MEMS device, having mechanical structures encapsulated in a chamber prior to final packaging. The material that encapsulates the mechanical structures, when deposited, includes... 20060108653 - Preventing substrate deformation: A substrate prevented from being deformed due to thermal stress or deposition stress includes a deformation preventing layer arranged on one surface of the substrate. The substrate can include a thin film transistor arranged on one surface of the substrate and the deformation preventing layer, arranged on the another surface... 20060108654 - Hall sensor and method for the operation thereof: The invention relates to a Hall sensor on a semiconductor substrate (1), in which a Hall plate (2) is formed from a zone (33, 32) of one conduction type; in which a zone (33, 32) adjoining the Hall plate (2), which zone (33, 32) is separated from said Hall plate... 20060108655 - Mram layer having domain wall traps: A common pinned layer is shared by multiple memory cells in an MRAM device. The common pinned layer includes a plurality of domain wall traps that prevent the formation of domain walls within a region of the common pinned layer corresponding to a given memory cell. Therefore, the memory cells... 20060108656 - Optical device: An optical device according to the present invention includes a device substrate, a translucent member, an optical element chip and a conductive portion. On a surface of the device substrate, an opening is provided so as to extend substantially in the vertical direction with respect to a surface of the... 20060108657 - Photodiode detector: The photodiode includes a substrate of a first semiconductor material and an isolating layer of a second semiconductor material. The second semiconductor material is of opposite doping character or type to the first semiconductor material. The isolating layer of the second semiconductor material is implanted with one or more wells... 20060108658 - Functional device and method for producing the same, and image pickup device and method for producing the same: A method of producing a functional device comprising an electrode layer provided as an upper layer of a layer containing an organic material, the layer being as a functional layer, wherein a step of patterning the electrode layer comprises a high speed etching step of etching the electrode layer at... 20060108659 - Schottky barrier diode and diode array: A Schottky barrier diode includes a first semiconductor layer and a second semiconductor layer successively formed above a semiconductor substrate with a buffer layer formed between the first and second semiconductor layers and the semiconductor substrate. A Schottky electrode and an ohmic electrode spaced from each other are formed on... 20060108660 - Amplifier circuit, control method of the same, and amplifier circuit module: An amplifier circuit includes an amplifier having an amplifying device composed of GaN or a GaN compound semiconductor used for an active region, and a distortion compensation circuit that is connected to the amplifier, has an attenuation characteristic, and has a negative phase distortion.... 20060108661 - Semiconductor device having sti without divot and its manufacture: The method of manufacturing a semiconductor device has the steps of: etching a semiconductor substrate to form an isolation trench by using as a mask a pattern including a first silicon nitride film and having a window; depositing a second silicon nitride film covering an inner surface of the isolation... 20060108662 - An electrically programmable fuse for silicon-on-insulator (soi) technology: A fuse structure and method of forming the same is described, wherein the body of the fuse is formed from a crystalline semiconductor body on an insulator, preferably of a silicon-on-insulator wafer, surrounded by a fill-in dielectric. The fill-in dielectric is preferably a material that minimizes stresses on the crystalline... 20060108663 - Surface mount inductor with integrated componentry: Disclosed are inductor systems with reduced volume for use in larger electronic circuits. Embodiments of the invention are disclosed for a surface mount inductor system that includes an inductor having a niche for receiving an IC component interposed between the inductor and PCB. Preferably, the assembly is encapsulated to form... 20060108664 - Pre-matching of distributed and push-pull power transistors: Pre-matching of distributed push-pull and power transistors enabling the effective use of high-power and high-frequency transistor arrays. In accordance with the invention, a pre-matching element is connected between stages of multi-transistor arrays. The pre-matching element serves to transform the impedance at a connecting point between stages toward an impedance level... 20060108665 - Semiconductor device, manufacturing method of the same, and electronic device: The invention is directed to improve characteristics of an HBT (Hetero-junction Bipolar Transistor). An HBT has a collector layer, a base layer, and an emitter layer formed in order on a main surface of a substrate made of a compound semiconductor and a collector electrode, a base electrode, and an... 20060108666 - Semiconductor device and method of fabricating the same: A conductor layer is formed on one surface of a semiconductor substrate having a functional element formed therein, with an insulating layer interposed therebetween, and a through hole is then formed at a predetermined position in the semiconductor substrate. Furthermore, a support sheet is attached to the other surface of... 20060108667 - Method for manufacturing a small pin on integrated circuits or other devices: A method of forming a device comprises forming a structure with a side wall. A side wall spacer is formed on the side wall. The side wall spacer is etched according to a pattern to define the width of the side wall spacer. The width is sub-lithographic, including for example... 20060108668 - Tamper resistant packaging and approach: A tamper-resistant packaging approach protects non-volatile memory. According to an example embodiment of the present invention, an array of magnetic memory elements (130-132) in an integrated circuit (100) are protected from magnetic flux (122) by a package (106) including a magnet (120). Flux from the magnet is directed away from... 20060108670 - Leadframe designs for integrated circuit plastic packages: The specification describes a plastic cavity package design for high power transistor packages in which the leadframe is formed of a composite of materials. This allows the portions of the leadframe that require strength to be formed of a high strength material, e.g. steel, while the paddle portion of the... 20060108669 - Light emitting element: A light emitting element includes: a box-shaped case formed by an insulation material and having a space inside; a lead frame formed by a conductive material and fixed to the case; and a light emitting chip fixed to the lead frame. On the lead frame, a rise portion is formed... 20060108672 - Die bonded device and method for transistor packages: The specification describes a technique for die bonding that is tailored to air cavity plastic packages for high power devices. The die bonding method is simple and effective, and eliminates the step of placement of solder preforms in the die bonding operation. According to the invention the die that are... 20060108671 - Semiconductor package including die interposed between cup-shaped lead frame and lead frame having mesas and valleys: A semiconductor package includes a die that is interposed, flip-chip style, between an upper lead frame and a lower lead frame. The lower lead frame has contacts that are aligned with terminals on the bottom surface of the die. The upper lead frame contacts a terminal on the top side... 20060108673 - Method for forming an encapsulated device and structure: In one embodiment, an electronic device package (1) includes a leadframe (2) with a flag (3). An electronic chip (8) is attached to the flag (3) with a die attach layer (9). A trench (16) having curved sidewalls is formed in the flag (3) in proximity to the electronic chip... 20060108674 - Package structure of memory card and packaging method for the structure: A package structure of a memory card includes a substrate. The substrate has connection pads on a first surface and conductive lead structures respectively coupled with the connection pads and extending to a second surface of the substrate. At least one chip is disposed over the substrate at the first... 20060108675 - Apparatus and methods for encapsulating microelectromechanical (mem) devices on a wafer scale: Apparatus and methods are provided for enabling wafer-scale encapsulation of microelectromechanical (MEM) devices (e.g., resonators, filters) to protect the MEMs from the ambient and to provide either a controlled ambient or a reduced pressure. In particular, methods for wafer-scale encapsulation of MEM devices are provided, which enable encapsulation of MEM... 20060108677 - Multi-chip package and method of fabricating the same: A lower chip is fixed to a surface of an interposer by flip-chip bonding with an under fill acting as an adhesive applied to the surface. A lifted pad having a height of approximately 10 μm is provided on the surface of the interposer. A bonding wire connects the lifted... 20060108676 - Multi-chip package using an interposer: A method and apparatus for multi-chip packages that are closely coupled using an interposer is disclosed. A top single chip or multi-chip encapsulated package with bottom side contacts is formed and tested. A bottom single chip or multi-chip package substrate having bottom contacts is formed. Then a hollow center interposer... 20060108678 - Probe arrays and method for making: Embodiments of invention are directed to the formation of microprobes (i.e. compliant electrical or electronic contact elements) on a temporary substrate, dicing individual probe arrays, and then transferring the arrays to space transformers or other permanent substrates. Some embodiments of the invention transfer probes to permanent substrates prior to separating... 20060108679 - Method for testing a chip with a package and for mounting the package on a board: The invention relates to the fabrication and testing of a chip with a package (2) having connecting pins (1) as well as to mounting the package (2) on a board (5), whereby in order to combine the advantages of a package (2) with inline connecting pins (1) with the advantages... 20060108680 - Multi-layer printed circuit board wiring layout and method for manufacturing the same: A multi-layer printed circuit board (PCB) includes a first wire layer, a middle layer above the first wire layer, a second wire layer above the middle layer, and a slanting via formed in the middle layer and the second wire layer. The manufacturing method includes the steps of providing a... 20060108681 - Semiconductor component package: A semiconductor component package and method of fabrication are disclosed. The package employs a heat dissipating element embedded within the protective material over the component. The heat dissipating element is preferably made by stamping, and is formed from an essentially uniform thickness heat conducting sheet. The element is formed so... 20060108683 - Semiconductor device, radiographic imaging apparatus, and method for manufacturing the same: A semiconductor device or a radiographic imaging apparatus includes a substrate and a supporting member, the substrate having a semiconductor element or a conversion element and being bonded to the supporting member with a laminating member. The semiconductor device or the radiographic imaging apparatus further includes at least one cushioning... 20060108684 - Power module, phase leg, and three-phase inverter: A power module includes a substrate that includes an upper layer, an electrical insulator and a thermal coupling layer. The upper layer includes an electrically conductive pattern and is configured for receiving power devices. The electrical insulator is disposed between the upper layer and the thermal coupling layer. The thermal... 20060108685 - Integrated circuit package and assembly thereof: An integrated circuit (IC) package and IC assembly. The IC assembly comprises the IC package, an insulating substrate and an adhesive film. The IC package comprises a chip body and a plurality of bumps. The bumps are disposed on a first surface of the chip body, each bump having a... 20060108686 - Semiconductor device for fingerprint recognition: A semiconductor device is disclosed that performs fingerprint recognition on the electrostatic-capacity principle. A finger sweeping across a fingerprint recognition area of a semiconductor chip provides positive fingerprint recognition operations with improved reliability. The semiconductor device includes the semiconductor chip having a sensor unit that performs fingerprint recognition, and a... 20060108687 - Using zeolites to improve the mechanical strength of low-k interlayer dielectrics: A method for impregnating the pores of a zeolite low-k dielectric layer with a polymer, and forming an interconnect structure therein, thus mechanically strengthening the dielectric layer and preventing metal deposits within the pores.... 20060108688 - Large grained polycrystalline silicon and method of making same: A silicon structure includes a selective nucleating single phase epitaxial (SNSPE) template polysilicon layer containing crystallization catalyst residue, and a hot wire chemical vapor deposited (HWCVD) epitaxial polysilicon layer epitaxially grown on said template layer. The silicon structure may satisfy at least one of the following: 1) a thickness of... 20060108692 - Bit line structure and method for the production thereof: A bit line structure and associated fabrication method are provided for a semiconductor element or circuit arrangement. The bit line structure contains a surface bit line and a buried bit line. The buried bit line is formed in an upper section of a trench and is connected to an associated... 20060108690 - Circuit board with reduced simultaneous switching noise: A circuit board with reduced simultaneous switching noise. The circuit board comprises a first conductor plane with a first fixed potential, a dielectric layer, at least a build-up via and a second conductor plane with a second fixed potential. The dielectric layer is formed on the first conductor plane. The... 20060108689 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device in a MLM process to reduce compression stress of a metal line or a HDP oxide film, and to reduce compression stress in a subsequent metal line thermal treatment process. It is thus possible to reduce generation of a crack caused by compression... 20060108691 - Semiconductor device and manufacturing method of the same: The first pad electrode layer is disposed on the surface of the semiconductor substrate with the first insulating film between them. Then, the second insulating film with the first via hole partially exposing the first pad electrode layer is formed over the first pad electrode layer. The plug is formed... 20060108693 - Solder for fabricating solder bumps and pumping process: A bumping process including following steps is disclosed. First, a wafer is provided, wherein the wafer has an active surface and bonding pads disposed on the active surface. Next, solder material is provided for forming solder posts on the bonding pads, wherein the solder material for forming the solder posts... 20060108694 - Circuit layout structure and method: A symmetrical circuit layout structure includes a number of signal wires, a ground wire and a dielectric layer. The signal wires include a first portion placed on a first plane and a second portion placed on a second plane. The ground wire includes a first portion placed above the first... 20060108695 - Semiconductor device and manufacturing method of the same: The invention is directed to a semiconductor device having a penetrating electrode and a manufacturing method thereof in which reliability and a yield of the semiconductor device are enhanced. A semiconductor substrate is etched to form a via hole from a back surface of the semiconductor substrate to a pad... 20060108696 - Structure for reducing stress-induced voiding in an interconnect of integrated circuits: A structure for reducing stress-induced voiding in an interconnect of an integrated circuit, the interconnect having a first portion and at least a second portion narrower than the first portion. The structure comprises at least one interior slot disposed in the first portion in proximity to the intersection of the... 20060108697 - Multi-chips semiconductor device assemblies and methods for fabricating the same: Multi-chip semiconductor device assemblies and methods for fabricating such assemblies are provided. An exemplary assembly comprises a first chip having a first surface and comprising a plurality of conductive pads disposed at the first surface and a plurality of circuits. Each of the pads is electrically coupled to one of... 20060108698 - Microelectronic assemblies and methods of making microelectronic assemblies: A microelectronic subassembly includes a substrate having a first surface, and one or more microelectronic elements positioned above the first surface of the substrate, each microelectronic element having a contact bearing face confronting the first surface of the substrate and a back surface remote therefrom. The subassembly includes a substantially... 20060108699 - Electronic part and method for manufacturing the same: A method for manufacturing an electronic part, including: cutting a wiring substrate, which contains a base substrate, a wiring pattern provided on a first surface of the base substrate, and a reinforcing member provided on a second surface of the base substrate, along a line intersecting with an outer circumference... 20060108700 - Semiconductor device, method and apparatus for fabricating the same: A semiconductor device has at least one semiconductor element, at least one radiator plate thermally connected with said semiconductor element, and a molded resin covering and sealing said semiconductor device and said radiator, wherein an outer main surface of the radiator plate and at least a part of the side... 05/18/2006 > 149 patent applications in 91 patent subcategories.20060102887 - Protection of active layers of memory cells during processing of other elements: A method of fabricating an electronic structure by providing a conductive layer, providing a dielectric layer over the conductive layer, providing first and second openings through the dielectric layer, providing first and second conductive bodies in the first and second openings respectively and in contact with the conductive layer, providing... 20060102888 - Semiconductor substrate and method of fabricating the same: A semiconductor substrate and a method of fabricating the same are provided. The semiconductor substrate includes: a Si substrate; a SiO2 layer having a predetermined width formed on the Si substrate; a SiGe layer having a first end portion and a second end portion at both sides and formed on... 20060102889 - Tri-gated molecular field effect transistor and method of fabricating the same: Provided is a tri-gated molecular field effect transistor (FET) and a method of fabricating the same. The tri-gated molecular field effect transistor includes a gate electrode formed on a substrate and having grooves in a source region, a drain region and a channel region, and at least one molecule inserted... 20060102890 - Dendrimer and electronic device element employing the same: An object of the invention is to provide a novel dendrimer serving as an organic semiconductor material which is isotropic and which exhibits remarkably high carrier conductivity. Another object of the invention is to provide an electronic device employing the dendrimer. These objects are attained by a dendrimer having a... 20060102894 - Electronic device, method of manufacturing an electronic device, and electronic apparatus: An electronic device including: a pair of electrodes; an organic semiconductor layer; and an organic film formed of organic compounds including nonconjugated organic compounds coupled to at least one of surfaces of the pair of electrodes.... 20060102891 - Organic photovoltaic component and method for production thereof: The invention relates to an organic photovoltaic component, in particular an organic solar cell, in which one or more layers is (are) structured.... 20060102896 - Organic thin film transistor: Organic TFTs having uniform characteristics and a flat panel display having the organic TFT, wherein the organic TFTs include an organic semiconductor layer formed by spin coating are disclosed. One embodiment of the organic TFT includes: a substrate, a gate electrode disposed on the substrate, a gate insulating film covering... 20060102897 - Organic thin film transistor and flat panel display including the same: An organic thin film transistor comprising an organic semiconductor layer that does not cause a coffee stain effect and can prevent an imperfect contact with source and drain electrodes, and a flat panel display apparatus comprising the organic thin film transistor are provided. The organic thin film transistor comprises a... 20060102895 - Precursor compositions for forming tantalum-containing films, and tantalum-containing barrier films and copper-metallized semiconductor device structures: Tantalum compositions of Formulae I-V hereof are disclosed, having utility as precursors for forming tantalum-containing films. The tantalum compositions are amenable to usage involving chemical vapor deposition and atomic layer deposition processes, to form semiconductor device structures, including a dielectric layer, a barrier layer overlying the dielectric layer, and copper... 20060102893 - Semiconductors containing trans-1,2-bis(acenyl)ethylene compoounds: Semiconductor devices are described that include a semiconductor layer that contains a trans-1,2-bis(acenyl)ethylene compound. The acenyl group is selected from 2-naphtyl, 2-anthracenyl, or 2-tetracenyl. Additionally, methods of making semiconductor devices are described that include depositing a semiconductor layer that contains a trans-1,2-bis(acenyl)ethylene compound.... 20060102892 - Switching element: The present invention provides a switching element in which an organic bistable material is disposed between two electrodes, this element having a high ratio of ON current to OFF current, a high threshold voltage, and a small spread. A switching element in which an organic bistable material layer comprising an... 20060102900 - Flat panel display and its method of fabrication: A flat panel display device which can prevent line defects and voltage drops using a conductive substrate formed of metal foil as a power supply layer includes: a conductive substrate; a first insulating layer formed on one side of the substrate and having a contact hole exposing a part of... 20060102899 - Liquid crystal display device and method of fabricating the same: A liquid crystal display device, including: a gate line with a double conductive layer structure on a substrate; a data line crossing the gate line with an interlayer insulating film in between to define a pixel area; a pixel electrode formed of the double conductive layer structure in the pixel... 20060102898 - Vva-mode liquid crystal display: A VVA-mode LCD having improved transmittance and response speed includes upper and lower substrates positioned to face each other with a predetermined distance between them; a liquid crystal layer having negative anisotropy of dielectric constant interposed between the upper and lower substrates; a color resin layer formed on the inner... 20060102901 - Systems and methods for creating crystallographic-orientation controlled poly-silicon films: In accordance with one aspect, the present invention provides a method for providing polycrystalline films having a controlled microstructure as well as a crystallographic texture. The methods provide elongated grains or single-crystal islands of a specified crystallographic orientation. In particular, a method of processing a film on a substrate includes... 20060102902 - Thin film transistor array panel: A thin film transistor array panel is provided, which includes: a substrate including a plurality of pixel areas; a semiconductor layer formed on the substrate and including a plurality of pairs of first and second semiconductor portions in respective pixel areas; a first insulating layer formed on the semiconductor layer;... 20060102906 - Electro-optical device and electronic apparatus: An electro-optical device includes a pair of substrates that are disposed to face each other with a predetermined gap therebetween, one substrate of the pair of substrates extending from the other substrate on at least one side in plan view, display electrodes that are provided on one substrate, a circuit... 20060102905 - Liquid crystal display device and method of fabricating the same: A poly-silicon liquid crystal display device with an improved aperture ratio and a simplified method of fabricating the same are disclosed. A liquid crystal display device according to the present invention includes first and second substrates; a gate line on the first substrate; a data line crossing the gate line... 20060102904 - Pixel structure and manufacturing method thereof: A pixel structure controlled by a scan line and a data line on a substrate is provided. The pixel structure comprises a thin film transistor, a resistance wire, a first pixel electrode, and a second pixel electrode, which are disposed on the substrate. Additionally, the thin film transistor is electrically... 20060102903 - Thin film transistor array panel and liquid crystal display including the panel: A gate wire including a gate line extending in a transverse direction and a gate electrode connected to the gate line is form on an insulating substrate. A storage capacitor wire including a storage capacitor electrode line extending in the transverse direction and a storage electrode connected to the storage... 20060102907 - Thin film transistor array panel and method for manufacturing the same: The present invention provides a thin film transistor array panel comprising an insulating substrate; a gate line formed on the insulating substrate; a gate insulating layer formed on the gate line; a drain electrode and a data line having a source electrode formed on the gate insulating layer, the drain... 20060102908 - Semiconductor device: A semiconductor device includes an SiC substrate, an SiC layer of a first conductivity type disposed on the upper surface of the SiC substrate, a first SiC region of a second conductivity type disposed on the SiC layer, a second SiC region of the first conductivity type disposed on a... 20060102909 - Light-emitting diode structure: A gallium-nitride based light-emitting diode structure includes a digital penetration layer to raise its reverse withstanding voltage and electrostatic discharge. The digital penetration layer is formed by alternate stacking layers of AlxInyGa1-x-yNzP1-z/AlpInqGa1-p-qNrP1-r, wherein 0≦x,y,z,p,q,r≦1, and AlxInyGa1-x-yNzP1-z has an energy gap greater than that of AlpInqGa1-p-qNrP1-r. The AlxInyGa1-x-yNrP1-z layers have increasing... 20060102910 - Method for manufacturing light emitting device: An object of the present invention is to provide a new light emitting element with little initial deterioration, and a display device in which initial deterioration is reduced and variation in deterioration over time is reduced by a new method for driving a display device having the light emitting element.... 20060102912 - Light emitting device: There is provided a light emitting device having a plurality of luminous elements emitting with different colors respectively being improved in a luminous intensity deviation and a color deviation without deterioration of a luminous efficiency. In the light emitting device having a plurality of luminous elements respectively emitting with different... 20060102911 - Organic light emitting display and method of fabricating the same: An organic light emitting display including a pixel electrode arranged on a substrate, an organic layer arranged on the pixel electrode and including at least a hole injection layer, a hole acceleration layer, a hole transport layer, and an emission layer, and an opposite electrode arranged on the organic layer.... 20060102913 - Full color oled and method of fabricating the same: A full color organic light emitting display device (OLED) and a method of fabricating the same are provided. The OLED includes an element substrate and an encapsulating substrate. The element substrate includes a color filter layer or a color conversion layer, as well as an organic layer with an emission... 20060102916 - Ii-vi/iii-v layered construction on inp substrate: A layered construction is provided comprising an InP substrate and alternating layers of II-VI and III-V materials. The alternating layers of II-VI and III-V materials are typically lattice-matched or pseudomorphic to the InP substrate. Typically the II-VI material is selected from the group consisting of ZnSe, CdSe, BeSe, MgSe, ZnTe,... 20060102915 - Wavelenght converted light emitting apparatus using phosphor and manufacturing method thereof: Disclosed herein is a wavelength converted light emitting apparatus comprising a substrate, a light emitting diode, and a phosphor layer. The substrate is formed at its upper surface with first and second conductive patterns. At a partial region of the first conductive pattern and at the second conductive pattern are... 20060102914 - Wide emitting lens for led useful for backlighting: Lenses and certain fabrication techniques are described. A wide-emitting lens refracts light emitted by an LED die to cause a peak intensity to occur within 50-80 degrees off the center axis and an intensity along the center axis to be between 5% and 33% of the peak intensity. The lens... 20060102919 - Display device and electronic appliance using the same: The present invention provides a display device including a nonvolatile memory circuit to which data can be added without increasing the number of manufacturing steps, and an electronic appliance using the display device. A display device of the present invention has a memory circuit that includes a memory element with... 20060102921 - High-brightness gallium-nitride based light emitting diode structure: A GaN-based LED structure is provided so that the brightness and lighting efficiency of the GaN-based LED are enhanced effectively. The greatest difference between the GaN-based LEDs according to the invention and the prior arts lies in the addition of a thin layer on top of the traditional structure. The... 20060102918 - Package structure of a surface mount device light emitting diode: A surface mount device (SMD) light emitting diode (LED) package structure is disclosed. The structure includes a cup-structure substrate, a lead frame, an LED chip, a set of conducting wires, and a transparent or semi-transparent seal. The inner or outer surface of the cup-structure substrate includes a plurality of indentations... 20060102917 - Semiconductor light emitting device, method for producing the same and reflector for semiconductor light emitting device: A semiconductor light emitting device comprises a metallic support plate 1; a light-reflective reflector 3 mounted on the support plate 1 and formed with a hole 3a; a semiconductor light emitting element 2 mounted on the support plate 1 within the hole 3a of the reflector 3, and a plastic... 20060102920 - Thin film electrode for forming ohmic contact in light emitting diodes and laser diodes using nickel-based solid solution for manufacturing high performance gallium nitride-based optical devices, and method for fabricating the same: Disclosed herein is a technique for forming a high quality ohmic contact utilizable in the fabrication of short-wavelength light emitting diodes (LEDs) emitting blue and green visible light and ultraviolet light, and laser diodes (LDs) using a gallium nitride (GaN) semiconductor. The ohmic contact is formed by depositing a nickel... 20060102922 - Led heat dissipation support: A light emitting diode chip carrier to improve heat dissipation by providing a thicker heat dissipation area between two supports that carry the light-emitting chip; and heat absorption and dissipation results by the metallic material help absorb the heat generated by the acting light emitting chip for the LED to... 20060102923 - Optical element housing package: In a package for housing an optical element, if the size of an optical element chip and of a metal cap increase, the flatness of a flange of the metal cap can be maintained when the metal cap is bonded by seam welding to the package body, and the optical... 20060102926 - Compound semiconductor device and the fabricating method of the same: A GaN layer functions as an electron transit layer and is formed to exhibit, at least at a portion thereof, A/B ratio of 0.2 or less obtained by a photoluminescence measurement, where “A” is the light-emission intensity in the 500-600 nm band, and “B” is the light-emission intensity at the... 20060102924 - Diboride single crystal substrate, semiconductor device using this and its manufacturing method: Disclosed are a diboride single crystal substrate which has a cleavage plane as same as that of a nitride compound semiconductor and is electrically conductive; a semiconductor laser diode and a semiconductor device using such a substrate and methods of their manufacture wherein the substrate is a single crystal substrate... 20060102925 - Light emitting diode structure and manufacturing method thereof: A LED structure including an epitaxy substrate, a semiconductor layer, a first bonding pad and a second bonding pad, is provided. The epitaxy substrate has a through hole and the semiconductor layer is disposed on the epitaxy substrate. The semiconductor layer includes a first type doped semiconductor layer, a light-emitting... 20060102927 - Switching element, line-switching device and logic circuit: A switching element for ON/OFF switching includes a pair of electrodes provided on a substrate separately from each other, a phase change film contacting the electrodes and having its resistance varied in accordance with the history of heating, and a heating mechanism for heating the phase change film.... 20060102928 - Method of manufacturing semiconductor device and the semiconductor device manufactured by the method: The method of manufacturing the semiconductor device that includes a high voltage MOS transistor with high operating voltage under both high and low gate voltages with low-cost is disclosed. When manufacturing the high voltage MOS transistor, a portion of a gate insulation film is removed to form an opening that... 20060102929 - Field-effect transistor: A field plate portion (5) overhanging a drain side in a visored shape is formed in a gate electrode (2). A multilayered film including a SiN film (21) and a SiO2 film (22) is formed beneath the field plate portion (5). The SiN film (21) is formed so that a... 20060102930 - High-brightness gallium-nitride based light emitting diode structure: A GaN-based LED structure is provided so that the brightness and lighting efficiency of the GaN-based LED are enhanced effectively. The greatest difference between the GaN-based LEDs according to the invention and the prior arts lies in the addition of a thin layer on top of the p-type contact layer... 20060102931 - Field effect transistor having a carrier exclusion layer: A field-effect transistor comprises a substrate, a channel layer over the substrate, a gate insulator, a gate separated from the channel layer by the gate insulator, and a carrier exclusion layer between the channel layer and the gate insulator, wherein the conduction band energy of the carrier exclusion layer is... 20060102932 - Field effect transistor: A semiconductor structure a structure with an enhancement mode transistor device disposed in a first region and depletion mode transistor device disposed in a laterally displaced second region. The structure has a channel layer for the depletion mode and enhancement mode transistor devices. An enhancement mode transistor device InGaP etch... 20060102933 - Iii-v group compound semiconductor light emitting device and manufacturing method thereof: A light emitting device including a III-V group compound semiconductor includes a first stacked body and a second stacked body. The first stacked body includes a III-V group compound semiconductor stacked body, and a reflection layer, a first diffusion suppressing layer and a first metal layer formed on one main... 20060102934 - Semiconductor integrated circuit device: In a low power consumption mode in which prior data is retained upon power shutdown, the return speed thereof is increased. While use of an existent data retaining flip-flop may be considered, this is not preferred since it increases area overhead such as enlargement of the size of a cell.... 20060102935 - Transistor-based biosensors having gate electrodes coated with receptor molecules: A device and method are presented for detecting analyte molecules in a medium. At least one FET (Field Effect Transistor) is provided being formed by at least one pair of source-drain electrodes and at least one gate electrode. The gate electrode is coated with a layer of receptor molecules that... 20060102936 - Lead frame for a semiconductor device: A lead frame (100) for a semiconductor device is formed by applying nickel plating (102), palladium plating (103), and gold flash plating (104) substantially entirely to lead frame body (101) such as copper thin plate in this order, and further applying silver plating (105) selectively to part of an inner... 20060102937 - Dielectric line and production method therefor: A dielectric line having a sufficient ensured strength and being suitable for mass production and a production method therefor are provided. The production method is a method for manufacturing a dielectric line having a dielectric strip which is provided between two conductive plates approximately parallel to each other and which... 20060102938 - Cmos image sensor providing uniform pixel exposure and method of fabricating same: An CMOS image sensor includes a photodiode region generating electrical charges in response to incident light received thereat. In one example, the CMOS image sensor further includes first and second transfer gates adapted to prevent or substantially prevent the electrical charges from overflowing into a floating diffusion region or a... 20060102939 - A cmos imager photodiode with enhanced capacitance: A pixel sensor cell having a semiconductor substrate having a surface; a photosensitive element formed in a substrate having a non-laterally disposed charge collection region entirely isolated from a physical boundary including the substrate surface. The photosensitive element comprises a trench having sidewalls formed in the substrate of a first... 20060102940 - Semiconductor device having a photodetector and method for fabricating the same: The present invention is directed to a semiconductor device having a photodetector and a method of fabricating the same. The photodetector includes a visible ray absorbing pattern disposed on a top and/or bottom surface of an interconnection formed at a light shielding area between adjacent photodetectors, which prevents obliquely incident... 20060102944 - Ferroelectric capacitor and method of manufacturing the same: A ferroelectric capacitor and a method of manufacturing the same are provided, wherein the ferroelectric capacitor of a semiconductor device, which sequentially includes a lower electrode, a ferroelectric layer, and an upper electrode on a conductive layer connected to a transistor formed on a semiconductor substrate, includes an oxidation preventing... 20060102942 - Ferroelectric memory and method for manufacturing the same: The ferroelectric memory includes a ferroelectric capacitor structure having a ferroelectric layer and formed on a first insulating film, a first barrier film formed to cover the ferroelectric capacitor structure and the first insulating film, a second insulating film formed on the first barrier film, a first buried contact formed... 20060102941 - Semiconductor device: Disclosed is a semiconductor device comprising a semiconductor substrate, a capacitor provided above the semiconductor substrate and including a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode, the bottom electrode comprising a first conductive film containing iridium, a second conductive... 20060102943 - Structure and manufacturing method of semiconductor memory device: A semiconductor memory device having a cross point structure includes a plurality of upper electrodes arranged to extend in one direction, and a plurality of lower electrodes arranged to extend in another direction at a right angle to the one direction of the upper electrodes. Memory materials are provided between... 20060102946 - Dynamic memory cell and method of manufacturing the same: A memory device has a plurality of memory cells, wherein each memory cell has a trench capacitor formed in a semiconductor substrate and an access transistor for it. Each access transistor has a first contact region connected to an internal electrode of the trench capacitor, a second contact region to... 20060102945 - Structure and method for accurate deep trench resistance measurement: A test structure for implementing resistance measurement of a deep trench formed in a semiconductor device includes a pair of deep trenches formed within a semiconductor substrate. The pair of deep trenches has a dielectric material formed on side and bottom surfaces thereof, and includes a conductive fill material therein.... 20060102947 - Integration of silicon carbide into dram cell to improve retention characteristics: A DRAM memory cell and a method of making a DRAM memory cell are provided. The DRAM memory cell includes a semiconductor substrate, including a trench formed therein and a buried plate region, at least a first doped region and a second doped region provided on a sidewall of the... 20060102948 - Method of fabricating flash memory: A method of fabricating a flash memory is provided. The method includes forming a mask layer with first openings on the substrate. A tunneling dielectric layer is formed at bottom in the first openings. Strips of conductive spacers are formed on sidewalls of the first openings, and source/drain regions are... 20060102949 - Strapping word lines of nand memory devices: Conductive straps are connected to a subset of word lines of a memory device. Alternatively, first conductive straps are respectively connected only to first portions of first word lines of a memory device, and second conductive straps are respectively connected only to second portions of second word lines of the... 20060102950 - Semiconductor device including nonvolatile memory and method for fabricating the same: A semiconductor device including a nonvolatile memory and the fabrication method of the same is described formed on a semiconductor substrate. According to the semiconductor device, a second gate electrode film is used for a gate electrode film of a logic circuit, and for a control gate electrode film of... 20060102951 - Nonvolatile memory device and method for manufacturing the same: The present invention discloses a nonvolatile memory device which can improve the data storage capacity without increasing the surface area of the device, and a method for manufacturing the same. The nonvolatile memory device comprises: a gate of a stack type structure formed on an active region of a semiconductor... 20060102952 - Non-volatile memory devices with charge storage insulators and methods of fabricating such devices: A non-volatile memory device comprises a cell region defined at a substrate and a plurality of device isolation layers formed in the cell region to define a plurality of active regions. A charge storage insulator covers substantially the entire top surface of the cell region. A plurality of gate lines... 20060102953 - Semiconductor apparatus and method of manufacturing the same: A semiconductor apparatus includes a semiconductor substrate of a first conductivity type, a base region of a second conductivity type formed on a principal surface of the semiconductor substrate, a trench formed in a periphery of the base region, and an endless source region of the first conductivity type formed... 20060102954 - Organic thin film transistor array panel and manufacturing method thereof: A method of manufacturing a thin film transistor array panel is provided, the method includes: forming a gate line on a substrate; forming a gate insulating layer on the gate line; depositing an ITO layer at a temperature of about 20-35° C.; etching the ITO layer to form a data... 20060102955 - Semiconductor device employing an extension spacer and a method of forming the same: A semiconductor device formed on a semiconductor substrate and a method of forming the same. In one embodiment, the semiconductor device includes a gate over the semiconductor substrate and a dielectric liner on a sidewall of the gate. The semiconductor device also includes an extension spacer adjacent and extending laterally... 20060102956 - Etch-stop layers for patterning block structures for reducing thermal protrusion: The present invention provides a thin-film structure that includes an etch-stop layer having a first side and a second side, a patterned compensation layer for dissipating thermal energy, and an etch-vulnerable layer, where the etch-stop layer substantially impedes etching. The patterned compensation layer is adjacent the first side of the... 20060102957 - Ser immune cell structure: A semiconductor chip is provided, which includes a memory device formed in a deep NWELL region. The memory device includes a memory cell. The memory cell includes a first storage node and a second storage node. The memory cell also includes a first resistor and a second resistor electrically connected... 20060102958 - Systems and methods for voltage distribution via multiple epitaxial layers: Systems and methods for voltage distribution via multiple epitaxial layers. In accordance with a first embodiment of the present invention, an integrated circuit comprises a wafer substrate of a connectivity type. A first epitaxial layer of a connectivity type is disposed upon a second epitaxial layer of an opposite connectivity... 20060102959 - Semiconductor integrated circuit devices having single crystalline thin film transistors and methods of fabricating the same: Semiconductor integrated circuit devices having single crystalline thin film transistors and methods of fabricating the same are provided. The semiconductor integrated circuit devices include an interlayer insulating layer formed on a semiconductor substrate and a single crystalline semiconductor plug penetrating the interlayer insulating layer. A single crystalline semiconductor body pattern... 20060102961 - Semiconductor device: At an element formation surface side of a p-type Si substrate, a digital circuit and an analog circuit are provided. The analog circuit includes a p-type well and n-type wells formed at the element formation surface side of the p-type Si substrate. The analog circuit includes a deep n-type well... 20060102960 - Systems and methods for voltage distribution via epitaxial layers: Systems and methods for voltage distribution via epitaxial layers. In accordance with a first embodiment of the present invention, an integrated circuit comprises an epitaxial layer of a connectivity type disposed upon a wafer substrate of an opposite connectivity type.... 20060102962 - Semiconductor device and manufacturing method therefor: A method of manufacturing a semiconductor device comprises forming a gate insulation film on a semiconductor substrate; forming a first gate electrode and a second gate electrode on the gate insulation film, the area of the second gate electrode on the surface of the semiconductor substrate being larger than that... 20060102963 - Passive device and method for forming the same: An integrated circuit includes an active device, having a metal gate electrode, disposed on a substrate. A passive device, made of a semiconductor material, is disposed adjacent to the active device above the substrate. A dielectric layer is interposed between the passive device and the substrate for separating the same.... 20060102964 - Passive device and method for forming the same: An integrated circuit includes an active device, having a metal gate electrode, disposed on a substrate. A passive device, made of a semiconductor material, is disposed adjacent to the active device above the substrate. A dielectric layer is interposed between the passive device and the substrate for separating the same.... 20060102966 - Printable non-volatile passive memory element and method of making thereof: Passive memory devices comprising a support having at least one conductive surface or surface layer and having on at least one side of the support a passive memory element, the passive memory element comprising a first electrode system, an insulating system and a second electrode system, wherein the first electrode... 20060102965 - Semiconductor device: There is provided a semiconductor device which includes a projecting semiconductor layer provided on a substrate and having a first side surface and a second side surface opposed to the first side surface, a first gate insulating film provided on the semiconductor layer, a first gate electrode provided on the... 20060102967 - Semiconductor integrated circuit: A multi-storage nonvolatile memory of high density, high speed and high reliability has a memory transistor and switch transistor |