Active solid-state devices (e.g., transistors, solid-state diodes) inventions 04/06

20060086931 - Electro- and electroless plating of metal in the manufacture of pcram devices: Non-volatile, resistance variable memory devices, integrated circuit elements, and methods of forming such devices are provided. According to one embodiment of a method of the invention, a memory device can be fabricated by depositing a chalcogenide material onto a first (lower) electrode, sputter depositing a thin diffusion layer of a...

20060086932 - Nitride based semiconductor device: The present invention provides a nitride based semiconductor device comprising an active layer having a quantum well layer and a quantum barrier layer, wherein the device includes an electron emitting layer formed of at least two repeats of a first nitride semiconductor layer and a second nitride semiconductor layer having...

20060086933 - Vertical organic transistor: A vertical organic transistor comprises a substrate, a first electrode positioned over the substrate, a first semiconductor layer formed over the first electrode, a second electrode formed on the first semiconductor layer and shaped into a prescribed pattern, a second semiconductor layer formed over the second electrode and the first...

20060086935 - Semiconductor device and manufacturing method thereof: The present invention has an object to provide an active-matrix liquid crystal display device that realizes the improvement in productivity as well as in yield. In the present invention, a laminate film comprising the conductive film comprising metallic material and the second amorphous semiconductor film containing an impurity element of...

20060086934 - Semiconductor device formed on insulating layer and method of manufacturing the same: In a semiconductor device having an SOI structure and a method of manufacturing the same, influence by a parasitic transistor can be prevented, and no disadvantage is caused in connection with a manufacturing process. In this semiconductor device, an upper side portion of a semiconductor layer is rounded. Thereby, concentration...

20060086936 - Method of forming a transistor having a dual layer dielectric: Embodiments of methods, apparatuses, components, and/or systems for forming transistor having a dual layer dielectric are described....

20060086938 - Flat panel display and method of fabricating the same: A flat panel display, and method of fabricating the same, including a substrate having a display portion and a pad that is arranged on the substrate and is electrically coupled with the display portion. The pad includes a pad electrode arranged on the substrate, a passivation layer arranged on the...

20060086937 - Tft array substrate, liquid crystal display device, manufacturing methods of tft array substrate and liquid crystal display device, and electronic device: A TFT array substrate includes a thin film transistor section in which a gate electrode is formed on a substrate, and a semiconductor layer is formed on the gate electrode via a gate insulation layer. The semiconductor layer of this TFT array substrate has a shape formed by dropping a...

20060086939 - Solderable top metal for sic device: A silicon carbide device includes at least one power electrode on a surface thereof, a solderable contract formed on the power electrode, and at least one passivation layer that surrounds the solderable contact but is spaced from the solderable contract, thereby forming a gap....

20060086940 - Package structure of multi-chips light-emitting module: The present invention pertains to a package structure of multi-chips light-emitting module, wherein via the packaging technology of semiconductor, a plurality of light emitting diode chips are installed on the disposing portion of a lead frame, and the chips and the lead frame are interconnected with bond wires, and then...

20060086941 - Superluminescent diode including active layer formed of various sized quantum dots and method of manufacturing the same: The present invention provides a superluminescent diode, which has a wide wavelength bandwidth and a high optical power, and a method of manufacturing the same. The superluminescent diode includes an active layer having a chirped quantum dot (CQD) structure formed over the substrate, wherein the active layer emits lights of...

20060086942 - High-brightness gallium-nitride based light emitting diode structure: A GaN-based LED structure is provided so that the brightness and luminous efficiency of the GaN-based LED are enhanced effectively. The greatest difference between the GaN-based LEDs according to the invention and the prior arts lies in the addition of a masking buffer layer on top of the p-type contact...

20060086943 - Light emitting diode covered with a reflective layer and method for fabricating the same: A light emitting diode (LED) covered with a reflective layer by imprinting process is provided. The imprinting process includes coating a plastic layer on a mold to form an imprinting substrate; coating a reflective layer on the plastic layer and modifying the shape of the reflective layer to fit the...

20060086944 - Light emitting module: The light emitting module includes a substrate, a light emitting element and a driving circuit chip. The light emitting element is attached to the substrate and has a plurality of first contacts on a top surface thereof. The driving circuit chip is attached onto the substrate and has a plurality...

20060086945 - Package structure for optical-electrical semiconductor: A package structure for an optical-electrical semiconductor is described. The package structure has a thermal conductive structure for heat transfer and is integrally formed in one piece to improve the structural strength thereof, while the thermal conductive structure prevent over-heating of the LED device for greater longevity. The package structure...

20060086946 - Method and apparatus for mixing light emitted by a plurality of solid-state light emitters: In one embodiment, light emitted by a plurality of solid-state light emitters is mixed by mounting the plurality of solid-state light emitters on a transparent to translucent substrate so that they primarily emit light away from the substrate. The light emitters are then covered with a transparent to translucent encapsulant;...

20060086947 - Securing a transistor outline can within an optical component: The present invention relates to affixing components of optical packages. The optical packages can include an optical component, such as a TO-Can. The TO-Can can house an optical transmitter and/or an optical receiver. Another optical component of the optical package can be a barrel for aligning the TO-Can with an...

20060086948 - Semiconductor device and semiconductor device manufacturing method: A technique is provided which enables formation of nitride semiconductor layers with excellent flatness and excellent crystallinity on a gallium nitride substrate (GaN substrate), while improving the producibility of the semiconductor device using the GaN substrate. A gallium nitride substrate is prepared which has an upper surface having an off-angle...

20060086949 - Semiconductor structure and method of making same: A semiconductor structure includes a substrate having a surface and being made of a material that provides atypical surface properties to the surface, a bonding layer on the surface of the substrate, and a further layer molecularly bonded to the bonding layer. A method for fabricating such a semiconductor structure...

20060086950 - Method for making a passivated semiconductor substrate: The present invention is related to a method for making a passivated semiconductor substrate comprising the steps of providing a substrate surface comprising or consisting of mono-crystalline semiconductor material other than silicon and forming a silicon layer on the substrate surface, such that the silicon layer is substantially lattice matched...

20060086951 - Semiconductor memory device for storing data in memory cells as complementary information: A twin-cell type semiconductor memory device in which the area of a chip can be reduced. In the twin-cell type semiconductor memory device for storing data in at least one pair of memory cells as complementary information, memory cells are arranged at each of a plurality of word lines at...

20060086952 - Capacitor and method of manufacturing the same: A capacitor and method of manufacturing the same include an insulating interlayer, a lower electrode, a protection structure, a dielectric layer and an upper electrode. The insulating interlayer may include a conductive pattern formed on a substrate. The lower electrode may be electrically connected to the conductive pattern. The protection...

20060086954 - Multi-layer film stack for extinction of substrate reflections during patterning: A method including introducing a dielectric layer over a substrate between an interconnection line and the substrate, the dielectric layer comprising a plurality of alternating material layers; and patterning an interconnection to the substrate. An apparatus comprising a substrate comprising a plurality of devices formed thereon; and an interlayer dielectric...

20060086953 - Twin-ono-type sonos memory: A twin-ONO-type SONOS memory includes a semiconductor substrate having a source region, a drain region and a channel region between the source and drain regions, twin silicon oxide-silicon nitride-silicon oxide (ONO) dielectric layers, a first ONO dielectric layer being on the channel region and the source region and as second...

20060086955 - Solid-state image sensor and method for fabricating the same: A solid-state image sensor in which a plurality of unit pixel portions, each including a light receiving area which generates electric charges by light irradiation and a transistor which outputs an electric signal in accordance with the light receiving area, are arranged in a two-dimensional array, in which: each of...

20060086956 - Solid-state imaging device: A solid-state imaging device includes a photoelectric conversion section which is provided for each pixel and which converts light incident on a first surface of a substrate into signal charges, a circuit region which reads signal charges accumulated by the photoelectric conversion section, a multilayer film including an insulating film...

20060086957 - Cmos image sensor using reflection grating and method for manufacturing the same: A CMOS image sensor having a reflection grating adapted to reflect and refract light not parallel to an optical axis is disclosed. The CMOS image sensor includes at least one photodiode, a photo-shielding film, a first interlayer insulation film, a color filter, a second interlayer insulation film, and at least...

20060086959 - Semiconductor device: There is provided a semiconductor device including a semiconductor substrate which has an element region in which a diffusion layer for a source or a drain is formed, and a trench for a capacitor, a capacitor dielectric film which is formed on inner surfaces of the trench, a storage electrode...

20060086958 - Wire structure, semiconductor device, mram, and manufacturing method of semiconductor device: The present invention provides a wire structure where reduction in the amount of current that can be made to flow through the wire can be suppressed (a current comprising a large current density can be made to flow), even in the case where the wire is downsized. A wire structure...

20060086961 - Semiconductor device having a stacked capacitor: A capacitor formed in a deep-hole has a bottom electrode, a capacitor insulator film and a top electrode. The bottom electrode includes a sidewall conductive film formed on the sidewall of a top portion of the deep-hole, and an inner conductive film formed on the sidewall conductive film and the...

20060086960 - Semiconductor memory and method for manufacturing the same: A capacitor of a semiconductor memory of the present invention includes: a lower electrode which covers the surface of a storage node hole from the bottom to at least one of the sidewalls up to a level lower than the top surface of a second interlayer insulating film; a capacitive...

20060086964 - Capacitor device and method of manufacturing the same: A method of manufacturing a capacitor device of the present invention, includes the steps of, forming an insulating layer on a substrate, forming a recess portion in the insulating layer by an imprinting process, forming a lower electrode by filling a metal layer in the recess portion in the insulating...

20060086962 - Stacked capacitor and method for preparing the same: The present invention discloses a stacked capacitor having interdigital electrodes and method for preparing the same. The stacked capacitor comprises a first interdigital electrode, a second interdigital electrode and a dielectric material sandwiched between the first interdigital electrode and the second interdigital electrode. The first and the second interdigital electrodes...

20060086963 - Stacked capacitor and method for preparing the same: The present invention discloses a stacked capacitor having interdigital electrodes and method for preparing the same. The stacked capacitor comprises a first interdigital electrode, a second interdigital electrode and a dielectric material sandwiched between the first interdigital electrode and the second interdigital electrode. The first and the second interdigital electrodes...

20060086965 - Semiconductor device: An embodiment of the invention provides a semiconductor device having a capacitor including a first electrode, a second electrode and an insulator. The semiconductor device includes first layers and second layers laminated alternately. The first layers each includes lines of the first electrode and lines of the second electrode arranged...

20060086966 - Memory device comprising single transistor having functions of ram and rom and methods for operating and manufacturing the same: A memory device including a single transistor having functions of RAM and ROM and methods for operating and manufacturing the same are provided. The memory device includes a single transistor formed on a substrate. The transistor may be a memory transistor having a gate with a nonvolatile memory element, or...

20060086967 - Nonvolatile memory device and method for fabricating the same: A structure of non-volatile memory has a plurality of buried bit lines in a substrate, extending along a first direction. Selection gate structure lines are located between the buried bit lines. A plurality of stack dielectric films on the both sides of the selection gate structure lines serving as a...

20060086968 - Method of fabricating nand-type flash eeprom without field oxide isolation: Methods are described for fabricating NAND-type EEPROMs without field oxide isolation. P+ implantations are employed to isolate adjacent memory cells....

20060086969 - Floating gate transistors: A floating gate MOS transistor comprises one or more control gates, an active channel, and at least one floating gate disposed between the control gate(s) and the active channel. First and second non-linear resistances couple the floating gate to first and second control voltage sources respectively, the non-linear resistances forming...

20060086970 - Non-volatile memory cell structure with charge trapping layers and method of fabricating the same: In a non-volatile memory device and a method for forming such a device, at least one edge of the charge trapping layer is recessed. In this manner, the threshold voltage of the device during a programming operation and the threshold voltage of the device during an erase operation are maintained...

20060086971 - Semiconductor device and method for fabricating the same: A semiconductor device includes a memory section formed at a semiconductor substrate and including a first transistor having an ONO film that can store charges between the semiconductor substrate and a memory electrode and a first STI region for isolating the first transistor, and a CMOS section formed at the...

20060086972 - Semiconductor device and method of manufacturing same: A semiconductor device comprises: a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type provided on the first semiconductor region; a trench formed in the second semiconductor region; a thick gate insulating film selectively provided in a center area of a bottom...

20060086973 - Semiconductor integrated circuit and a semiconductor device: A semiconductor integrated circuit that has a quick response to changes in source/drain electrode voltage having an LDMOS transistor. The transistor has a second conduction type first well region formed in a first conduction type semiconductor substrate; a first conduction type second well region formed in the first well region;...

20060086974 - Integrated circuit with multi-length power transistor segments: A monolithic power integrated circuit fabricated on a semiconductor die includes a control circuit and a first output high voltage field-effect transistor (HVFET) having source and drain segments substantially equal to a first length. A second output HVFET has source and drain segments substantially equal to a second length. At...

20060086975 - Device junction structure: A semiconductor device includes a gate structure having a plurality of gate layers, which are layered upon a gate dielectric. A pair of thin spacers is formed on corresponding sidewalls of the gate structure. Each thin spacer is at most 25 nanometers (nm) wide. Length of the gate structure is...

20060086979 - Metal wiring, method of manufacturing the same, tft substrate having the same, method of manufacturing tft substrate and display device having the same: A TFT substrate includes a transparent substrate, a scan line, a data line, a switching device and a pixel electrode. The scan line is formed on the transparent substrate. The data line is formed on the transparent substrate such that the data line is electrically insulated from the scan line....

20060086976 - Method of forming a component having dielectric sub-layers: Embodiments of methods, apparatuses, devices, and/or systems for forming a component having dielectric sub-layers are described....

20060086977 - Nonplanar device with thinned lower body portion and method of fabrication: A nonplanar semiconductor device having a semiconductor body formed on an insulating layer of a substrate. The semiconductor body has a top surface opposite a bottom surface formed on the insulating layer and a pair of laterally opposite sidewalls wherein the distance between the laterally opposite sidewalls at the top...

20060086981 - Power converter: The power converter for solving the above-described problem has a module section and a drive section for operating the module section. The drive section has a drive circuit. The drive circuit is provided so as to correspond to the first semiconductor element which is one of the semiconductor elements comprising...

20060086980 - Semiconductor device, sram and manufacturing method of semiconductor device: A semiconductor device according to the present invention is provided with an SOI substrate, an active region, a first insulating film (complete separation insulating film), a second insulating film (partial separation insulating film), and a contact portion. Here, the active region is formed within the surface of the SOI layer....

20060086978 - Thin film transistor, electro-optical device and electronic apparatus: A thin film transistor includes a semiconductor layer formed over a substrate, and an electrode member formed over the substrate by a liquid phase method. The electrode member includes a base layer composed of a metal material and an outer surface layer deposited on at least one surface of the...

20060086982 - Semiconductor device and manufacturing method thereof: In order to increase an aperture ratio, a part of or all of a gate electrode that overlaps with channel formation regions (213, 214) of a pixel TFT is caused to overlap with second wirings (source line or drain line) (154, 157). Additionally, a first interlayer insulating film (149) and...

20060086983 - Electrostatic protective element of semiconductor integrated circuit: An electrostatic protective element of the present invention comprises: a second-conductive-type and lightly-doped first diffusion layer to be a collector, which is formed to be in contact with a first conductive type semiconductor substrate; a first-conductive-type second diffusion layer to be a base, which is formed on the first diffusion...

20060086984 - Method of assessing potential for charging damage in integrated circuit designs and structures for preventing charging damage: Disclosed is a method and circuit for preventing charging damage in an integrated circuit design, for example, a design having silicon over insulator (SOI) transistors. The method/circuit prevents damage from charging during processing to the gate of IC devices by assigning regions to the IC design such that the devices...

20060086985 - Semiconductor device: A semiconductor device includes first integrated circuit comprising first to third MOSFET having same channel type, and first to third MOSFETs including gate electrode and gate sidewall insulating film on sidewall of gate electrode, and distance between gate electrodes of first and second MOSFETs, and distance between gate electrodes of...

20060086986 - Storage device with charge trapping structure and methods: A storage device includes a first semiconducting layer having a p-dopant and a second semiconducting layer having an n-dopant, disposed on the first semiconducting layer forming a junction between the first and the second semiconducting layers. The storage device also includes a charge trapping structure disposed on the second semiconducting...

20060086987 - Method for manufacturing a semiconductor device with reduced floating body effect: A semiconductor device includes a substrate, a first device situated on the substrate, the first device including a source and a drain each situated extending a first depth within the substrate, and a second device situated on the substrate, the second device including a source and a drain each situated...

20060086988 - Semiconductor integrated circuit and fabrication method thereof: A semiconductor integrated circuit fabrication method according to this invention includes: a step of forming a pair of first device forming regions and a pair of second device forming regions in a surface layer portion of a semiconductor substrate by surrounding each of the regions by device isolation; a step...

20060086990 - Semiconductor device and fabrication method therefor: A semiconductor device has a semiconductor substrate of a first conductivity type, a first well region of the first conductivity type which is formed to extend from the surface of the semiconductor substrate toward the inside thereof, a pair of second well regions of a second conductivity which are formed...

20060086989 - Semiconductor devices with reduced impact from alien particles: An improved semiconductor device is disclosed with a NMOS transistor formed on a P-Well in a deep N-well, a PMOS transistor formed on a N-Well in the deep N-well, a first voltage coupled to a source node of the PMOS, and a second voltage higher than the first voltage coupled...

20060086991 - Semiconductor component and method for producing the same: A method for producing a semiconductor component has the following step: the front side (101) of the semiconductor body (100) is irradiated with high-energy particles using the terminal electrode (40) as a mask, in order to produce recombination centres (80A, 80B) in the semiconductor body (100) for the recombination of...

20060086992 - High voltage transistor and methods of manufacturing the same: In a HV transistor having a high breakdown voltage and a method of manufacturing the same, a first insulation pattern is formed on a semiconductor substrate by oxidizing a portion of the substrate, and a second insulation pattern is formed such that at least a portion of the first insulation...

20060086993 - Semiconductor device and manufacturing method thereof: A semiconductor device includes a Si substrate, a gate insulating film formed on the Si substrate, the gate insulating film being formed of an oxide film containing at least one selected from the group of Zr, Hf, Ti and a lanthanoid series metal, and having a single local minimal value...

20060086994 - Nanoelectromechanical components: A nanotube device is disclosed which includes a nanotube with a longitudinal and a lateral extension, a structure for supporting at least a first part of the nanotube, and a first device for exerting a force upon the nanotube in a first direction defined by its lateral extension. At least...

20060086995 - Temperature-compensated micro-electromechanical device, and method of temperature compensation in a micro-electromechanical device: A micro-electromechanical device includes a semiconductor body, in which at least one first microstructure and one second microstructure of reference are integrated. The first microstructure and the second microstructure are arranged in the body so as to undergo equal strains as a result of thermal expansions of the body. Furthermore,...

20060086996 - Solid state imaging device: A solid state imaging device, includes: a sensor cell array having a plurality of sensor cells arranged in a matrix on a substrate, each sensor cell including: a photoelectric transducer provided in the substrate and generating photo-generated electric charges according to an incident light; a transfer gate formed on the...

20060086997 - Schottky barrier diode: A buffer layer made of i-GaAs not doped with impurities, and an n+ GaAs layer doped with a high-concentration of n-type impurities are stacked in the order named on a semi-insulating GaAs substrate. An n− GaAs layer doped with a low-concentration of n-type impurities is partially located on the n+...

20060086998 - Semiconductor apparatus and method of manufacturing the same: The semiconductor apparatus is disclosed that includes a partial SOI substrate including an oxide film; a lateral first MOSFET section having a planar gate structure and formed in the portion of the partial SOI substrate where there is an oxide film; a vertical second MOSFET section having a trench gate...

20060086999 - Semiconductor device: In a semiconductor device in which a control circuit region and a power transistor region are formed, a first dummy region is formed between a ground side transistor composing a push-pull circuit and the control circuit region while a second dummy region is formed between the ground side transistor and...

20060087000 - Semiconductor device and manufacturing method thereof: A semiconductor device has a semiconductor layer of silicon which has a plurality of element formation regions, and a trench isolation region for isolating the plurality of element formation regions from each other. The trench isolation region is formed by filling a trench formed in an upper part of the...

20060087001 - Programmable semiconductor device: A programmable device (eFuse), includes: a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having a first end (12a), a second end (12b), a fuse link (11) between the ends, and an upper surface S. The semiconductor material...

20060087002 - Semiconductor device: On a silicon substrate 120 of a semiconductor device, a field oxide film 101 is provided. On the field oxide film 101, two fuses 104 are provided. Directly below the fuses 104 in the silicon substrate 120, an n-type well 102 is provided. Besides the n-type well 102, a p-type...

20060087003 - Design and layout techniques for low parasitic capacitance in analog circuit applications: A semiconductor device that reduces the parasitic capacitance between a conductive trace and a substrate, and a method of fabricating the same. The semiconductor device includes a substrate, an insulator layer disposed upon the substrate, a conductive trace disposed upon the insulator layer, and an element disposed between the substrate...

20060087004 - Semiconductor device including metal-insulator-metal capacitor arrangement: A semiconductor device has a semiconductor substrate, a multi-layered wiring construction formed over the semiconductor device, and a metal-insulator-metal (MIM) capacitor arrangement established in the multi-layered wiring construction. The MIM capacitor arrangement includes first, second, third, fourth, fifth, and sixth electrode structures, which are arranged in order in parallel with...

20060087005 - Deposited semiconductor structure to minimize n-type dopant diffusion and method of making: In deposited silicon, n-type dopants such as phosphorus and arsenic tend to seek the surface of the silicon, rising as the layer is deposited. When a second undoped or p-doped silicon layer is deposited on n-doped silicon with no n-type dopant provided, a first thickness of this second silicon layer...

20060087006 - Physical quantity sensor and manufacturing method therefor: A physical quantity sensor includes a pair of physical quantity sensor chips that are inclined with respect to the bottom of an exterior mold package whose side surfaces are each inclined in a thickness direction by an angle ranging from 0° to 5° and are formed in proximity to the...

20060087008 - Wafer dividing apparatus: A wafer dividing apparatus for dividing along dividing lines a wafer whose strength is reduced, along the dividing lines, comprising a tape holding means for holding a protective tape affixed to one surface side of the wafer; and a wafer dividing means comprising a first suction-holding member and a second...

20060087007 - Wafer treating apparatus and method: A wafer treating apparatus includes a support for supporting a plate-like base, a heating mechanism for heating the base placed on the support, a first coating mechanism for coating a fixing composition on a surface of the base placed on the support, a loading mechanism for loading a wafer on...

20060087009 - Cavity-down multiple-chip package: A cavity-down multiple-chip package mainly comprises a heat spreader, a circuit substrate with an opening, a chip, and at least one electronic element; wherein an upper surface of the circuit substrate defines at least one element mounting area; the heat spreader is disposed on said upper surface of the circuit...

20060087010 - Ic substrate and manufacturing method thereof and semiconductor element package thereby: The present invention pertains to an IC substrate, a manufacturing method thereof and a semiconductor element packaged thereby, wherein a plurality of patterned through-trenches on a metallic board are filled with an insulating material or other materials of different electric conductivity in order to separate the metallic board into a...

20060087011 - Wired circuit board: A wired circuit board having terminals that can provide reliable placement of molten metals on the terminals, to connect between the terminals and the external terminals with a high degree of precision. An insulating base layer 3 is formed on a supporting board 2, and a conductive pattern 4 is...

20060087014 - Bolster plate assembly for processor module assembly: Systems, methodologies, methods of manufacture, and other embodiments associated with semiconductor/processor module assemblies are described. One exemplary system embodiment includes a bolster plate assembly for a semiconductor module assembly that includes a bolster plate and a leaf spring pre-loaded onto the bolster plate. The example system may also include the...

20060087013 - Stacked multiple integrated circuit die package assembly: An electronic package assembly is formed with a plurality of integrated circuit dies stacked in layers. At least one first die is placed on a substrate. Each subsequent layer of the stack contains at least one die. Each die on each layer has a size and shape such that, when...

20060087012 - System to control effective series resistance of power delivery circuit: According to some embodiments, a system includes an integrated circuit package to support an integrated circuit die. The integrated circuit package may include a plurality of conductive contacts, and an element having a plurality of resistive portions, each of the plurality of resistive portions being coupled to a respective one...

20060087015 - Thermally enhanced molded package for semiconductors: Integrated circuit packaging with improved thermal transmission from the integrated circuit heat source to the exterior of the packaging. Improved packaging employs a compressive interposer which allows for greater manufacturability of the packaged integrated circuit parts. Additionally different shaped compressive interposers are described....

20060087016 - Ic (integrated circuit) card: An IC card according to the present invention reduces or prevents a deterioration or damage on an electronic device to which the IC card is mounted. A buffer section made of a thermoplastic resin formed by a plastic injection molding is provided at the outer peripheral face of a memory...

20060087017 - Image sensor package: An image sensor package includes a chip carrier, an image sensor chip, a transparent cover, and an O-ring. The chip carrier has a plurality of inner leads. The image sensor chip has an active surface including a sensing area and a plurality of bonding pads thereon. The bonding pads are...

20060087018 - Multi-chip image sensor module: A multi-chip image sensor module includes a flexible module board, an image sensor chip, a transparent cover, and at least an IC chip. The flexible module board has a first die-attached portion, a second die-attached portion, at least one bent portion, and at least one bonding portion where the bent...

20060087019 - Multi-layer integrated semiconductor structure having an electrical shielding portion: A multi-layer integrated semiconductor structure is provided, which includes at least a first semiconductor structure and a second semiconductor structure coupled together via an interface. The interface includes at least a first portion adapted to provide a communication interface between the first semiconductor structure and the second semiconductor structure and...

20060087021 - Multilayer semiconductor device: The present invention is applied to a multilayer semiconductor device including a plurality of layered semiconductor chips. At least one of the plurality of layered semiconductor chips comprises a pad that is not connected to any external circuit terminal of the multilayer semiconductor device. The multilayer semiconductor device further comprises...

20060087020 - Semiconductor device and method for producing the same: In a semiconductor device, circuit boards are connected electrically to each other by via-conductors that penetrate sheet members, semiconductor elements arranged between substrates are contained in element-containing portions formed on the sheet members, and a low-elastic material whose elastic modulus is lower than the elastic modulus of the thermosetting resin...

20060087022 - Image sensor assembly and method for fabricating the same: An assembly device of an image sensor chip is disclosed. A flexible circuit has a die-attached portion, a plurality of bendable portions, and a plurality of bonding portions where the bendable portions extend from the die-attached portion and are connected to the corresponding bonding portions. A plurality of inner leads...

20060087023 - Functional coating of an scfm preform: The invention relates to a power semiconductor module having at least one semiconductor chip (11) made of a semiconductor material and having a first and a second main electrode (12, 13), a first and a second main connection (91, 92) and a contact lamina (2) in electrical contact with the...

20060087024 - Method and system for an improved power distribution network for use with a semiconductor device: Systems and methods for a structure for a power distribution network intended to distribute power from a PCB to a semiconductor device on a package. These improved power distribution networks may reduce current crowding in the BGA balls of a package and may serve to more equitably distribute current through...

20060087025 - Method of manufacturing a substrate with concave portions, a substrate with concave portions, a microlens substrate, a transmission screen, and a rear projection: A method of manufacturing a substrate 6 provided with a plurality of concave portions 61 is disclosed. The substrate 6 is used for manufacturing a microlens substrate provided with a plurality of microlenses as convex lenses which are to be formed using the plurality of concave portions 61. The method...

20060087026 - Audio amplifier assembly: An audio amplifier assembly that includes a semiconductor package having a semiconductor power die tuned for class D amplifier applications and a conductive clip used for low inductance integration into the amplifier circuit....

20060087027 - Semiconductor device capsule: A semiconductor device capsule (30) comprising a semiconductor assembly (32) mounted between opposed poles (34,36). At least one of the poles (34,36) includes slots (38) around the locality of the or each chip or group of chips (46) within the semiconductor assembly (32) to define a contact body portion (37)...

20060087028 - Method and system for a pad structure for use with a semiconductor package: Systems and methods for substrate layers used in attaching devices to a semiconductor package are disclosed. A novel pad structure may be employed on a substrate layer which has pads, each pad having a common electrical potential. Multiple pad openings may be employed on a single pad, allowing the attachment...

20060087029 - Semiconductor device and method of producing the same: A semiconductor device includes a semiconductor chip having a surface provided with connecting electrodes, a stacked structure made up of alternately stacked dielectric and wiring layers and provided on the surface of the semiconductor chip, a passive element provided in the stacked structure and electrically connected to the wiring layers;...

20060087030 - Array capacitor with resistive structure: An apparatus comprises a first plurality of contacts disposed on a first side of the apparatus, adapted to engage with a first corresponding plurality of contacts on an external integrated circuit package. The apparatus further comprises a plurality of capacitive storage structures selectively coupled to the first plurality of contacts,...

20060087031 - Assembly and method: An assembly comprises a substrate, such as a printed circuit board, with an electrically insulating layer provided thereon. The electrically insulating layer defines at least one opening, said opening being formed in a shape of an indicium relating to an aspect of the assembly....

20060087032 - Compliant interconnects for semiconductors and micromachines: A compliant interconnect is described that is useful for coupling semiconductor dies to other components. In one embodiment, the interconnect includes a base to couple to a first component and an arch extending from and integral with the base to couple to a second component. The interconnect may be formed...

20060087034 - Bumping process and structure thereof: A bumping process includes the steps of: firstly, providing a wafer; forming a first photo-resist layer on a active surface of the wafer and forming at least a first opening on the first photo-resist layer; next, forming a first copper pillar in the first opening; next, forming a second photo-resist...

20060087033 - Molded high density electronic packaging structure for high performance applications: A thermally enhanced ball grid array package is disclosed. The package includes a base layer element and a flip chip die mounted on the base layer element. The die has a first surface electrically coupled to the base layer element, a second surface opposite to the first surface, and lateral...

20060087035 - Solder wall structure in flip-chip technologies: A structure and method for forming the same. The semiconductor structure includes a first semiconductor chip and N solder bumps in direct physical contact with the first semiconductor chip, wherein N is a positive integer. The semiconductor structure also includes a first solder wall on a perimeter of the first...

20060087036 - Chip-size package structure and method of the same: The method includes a step of picking and placing standard good dice on a base for obtaining an appropriate and wider distance between dice than the original distance of dice on a wafer. The method of the chip-size package comprises the steps of separating dice on a wafer and picking...

20060087038 - Packaged device and method of forming same: A method of packaging an integrated circuit die (12) includes the steps of loading an array of soft conductive balls into recesses formed in a platen and locating the platen in a first part of a mold cavity. A second part of the mold is pressed against the balls to...

20060087037 - Substrate structure with embedded chip of semiconductor package and method for fabricating the same: A substrate structure with embedded chips of a semiconductor package and a method for fabricating the same are proposed. First of all, a carrier structure having a first carrier plate and a second carrier plate being directly formed on the first carrier plate is provided. The second carrier plate is...

20060087039 - Ubm structure for improving reliability and performance: A novel under-bump metallization (UBM) structure for providing electrical communication is described. The UBM structure includes a plurality of metallic layers, which are deposited onto a bonding pad of a semiconductor device, such as a semiconductor chip. The UBM structure may be provided as an interface between the bonding pad...

20060087040 - Semiconductor device and method of manufacturing the same: A semiconductor device includes: an insulating film formed above a semiconductor substrate; a pad formed on the insulating film; a passivation film formed on the insulating film and the pad, the passivation film being provided with a first opening positioned on the pad; a first bulge member formed on the...

20060087041 - Semiconductor device: A semiconductor device is disclosed that includes a substrate, a first wiring structure arranged on the substrate which first wiring structure includes a first insulating layer and a first wiring layer arranged within the first insulating layer, a second wiring structure arranged on the first wiring structure which second wiring...

20060087042 - Semiconductor device and manufacturing method of the same: The invention is directed to a semiconductor device having a penetrating electrode and a manufacturing method thereof in which reliability and a yield of the semiconductor device are enhanced. A refractory metal layer is formed on a pad electrode formed on a semiconductor substrate with a first insulation film therebetween....

20060087043 - Semiconductor device having semiconductor chip on base through solder layer and method for manufacturing the same: A semiconductor device includes: a base member; a solder layer; and a semiconductor chip disposed on the base member through the solder layer. The chip has an in-plane temperature distribution when the chip is operated. The chip has an allowable maximum temperature as a temperature limit of operation. The in-plane...

20060087044 - Electronic component, and system carrier and panel for producing an electronic component: An electronic component has a first semiconductor chip and a second semiconductor chip that is arranged on a plastic compound in which the first semiconductor chip is embedded. The semiconductor chips are connected to one another by rewiring layers and vias which extend between the rewiring layers, the vias being...

20060087045 - Substrate having a built-in chip and external connection terminals on both sides and a method for manufacturing the same: A disclosed substrate having a built-in semiconductor chip includes the built-in semiconductor chip, a resin member having the built-in semiconductor chip contained therein and external connection terminals. The resin member contains a resin and 60 to 90% by weight of spherical filler....

20060081830 - Air gaps between conductive lines for reduced rc delay of integrated circuits: Methods of forming air gaps or porous dielectric materials between interconnects of integrated circuits and structures thereof. Air gaps or highly porous dielectric material having a dielectric constant of close to or equal to 1.0 are formed in a first region but not a second region of an interconnect layer....

20060081831 - Light emitting device using nitride semiconductor and fabrication method of the same: A nitride based 3-5 group compound semiconductor light emitting device comprising: a substrate; a buffer layer formed above the substrate; a first In-doped GaN layer formed above the buffer layer; an InxGa1−xN/InyGa1−yN super lattice structure layer formed above the first In-doped GaN layer; a first electrode contact layer formed above...

20060081832 - Light-emitting element with porous light-emitting layers: The invention relates to a light-emitting element with porous light-emitting layers. The light-emitting element comprises: a substrate, a first conductive cladding layer, a second conductive cladding layer and at least one porous light-emitting layer. The porous light-emitting layer is formed between the first conductive cladding layer and the second conductive...

20060081833 - Package structure of light-emitting device: A package structure of light-emitting device comprises a substrate. Two lines are formed on the substrate. An insulating layer is formed between two lines. A plurality of light-emitting sources are formed on the substrate for generating the light. Each light-emitting source has a positive electrode and a negative electrode. A...

20060081834 - Semiconductor luminescent device and manufacturing method thereof: A first principal plane faces a second principal plane of a p-type Ga N compound semiconductor that is in contact with an MQW luminescent layer. On the surface of the first principal plane, a first region made up of the p-type Ga N compound semiconductor including at least Ni is...

20060081835 - Scaffold-organized clusters and electronic devices made using such clusters: A method for forming arrays of metal, alloy, semiconductor or magnetic nanoparticles is described. An embodiment of the method comprises placing a scaffold on a substrate, the scaffold comprising, for example, polynucleotides and/or polypeptides, and coupling the nanoparticles to the scaffold. Methods of producing arrays in predetermined patterns and electronic...

20060081836 - Semiconductor device and method of manufacturing the same: In a field effect semiconductor device for high frequency power amplification, it is difficult to achieve size reduction and increased efficiency simultaneously while ensuring voltage withstanding. A further improvement in efficiency is attained by using a strained Si channel for LDMOS at an output stage for high frequency power amplification....

20060081837 - Ultra-thin, high quality strained silicon-on-insulator formed by elastic strain transfer: A method of forming a semiconductor structure comprising a first strained semiconductor layer over an insulating layer is provided in which the first strained semiconductor layer is relatively thin (less than about 500 Å) and has a low defect density (stacking faults and threading defects). The method of the present...

20060081838 - Functional molecular element and functional molecular device: A functional molecular element whose functions can be controlled by an electric field based on a new principle. A Lewis base molecule (14) with positive permittivity anisotropy or a dipole moment in the major axis direction of the molecule is disposed, via a metal ion (3) that can act as...

20060081841 - Gelable composition: A composition including a polymer and a liquid, wherein the polymer exhibits lower solubility in the liquid at room temperature but exhibits greater solubility in the liquid at an elevated temperature, wherein the composition gels when the elevated temperature is lowered to a first lower temperature without agitation, wherein the...

20060081839 - Oligothiophene-arylene derivatives and organic thin film transistors using the same: An oligothiophene-arylene derivative wherein an arylene having n-type semiconductor characteristics is introduced into an oligothiophene having p-type semiconductor characteristics, thereby simultaneously exhibiting both p-type and n-type semiconductor characteristics. Further, an organic thin film transistor using the oligothiophene-arylene derivative....

20060081840 - Organic electronic device and method for producing the same: A main object of the present invention is to provide an organic electronic device which has a high charge injection property by lowering a charge injection barrier between an electrode and an organic layer, and a layer having a charge injection function of which can be formed by a wet...

20060081842 - Monitor pattern of semiconductor device and method of manufacturing semiconductor device: A plurality of diffused resistors and a plurality of wirings (resistive elements) are alternately disposed along a virtual line, and those diffused resistors and wirings are connected in series by contact vias. In the same wiring layer as that of the wirings, a dummy pattern is formed so as to...

20060081843 - Semiconductor article and method for manufacturing the same: Method for manufacturing a semiconductor article, in that a silicide layer is applied, an impurity which acts as a dopant in a semiconductor region is introduced into the silicide layer, the silicide layer being located at least partially beneath the monocrystalline semiconductor region adjacent to the silicide layer, so that...

20060081844 - Display device: The invention provides a technique to manufacture a display device with high image quality and reliability at low cost with high yield. According to the invention, a spacer is provided over a pixel electrode layer in a pixel region. Moreover, a surface of an insulating layer which functions as a...

20060081845 - Organic electro-luminescence display device and method of fabricating the same: The present invention relates to an organic electro-luminescence display device and a method of fabricating the same capable of improving an emission efficiency and of reducing a deterioration of picture quality. An organic electro-luminescence display device, including a display area and a non-display area, according to the present invention includes:...

20060081846 - Semiconductor device and method of manufacturing the same: The present invention improves the aperture ratio of a pixel of a reflection-type display device or a reflection type display device without increasing the number of masks and without using a blackmask. A pixel electrode (167) is arranged so as to partially overlap a source wiring (137) for shielding the...

20060081847 - Methods for fabricating a wafer structure having a strained silicon utility layer: Methods for fabricating a wafer structure having a strained silicon utility layer are described. In an embodiment, the method includes providing a prototype wafer having at least a support substrate and a strained silicon model layer upon the support substrate, and then providing a relaxed silicon-germanium layer on the strained...

20060081850 - Display device and driving method thereof: A display device that employs fewer IC chips and lends itself to cost-efficient manufacturing is presented. The device includes: a plurality of pixel rows including first and second pixels alternately arranged; a plurality of first and second gate lines disposed above and below the pixel rows and applying first and...

20060081853 - Display panel and method of manufacturing the same: A display panel and a method for manufacturing the display device having the display pixel, includes forming a first substrate with pixel areas and a second substrate facing the first substrate. The second substrate includes a color filter layer having a first region and a second region that is arranged...

20060081854 - Organic electro luminescence device and fabrication method thereof: An organic electro luminescence device and a fabrication method thereof are provided. An array element is formed on a first substrate and an electro luminescent diode is formed on a second substrate. The array element and the electro luminescent diode are electrically connected together by a spacer. A separator divides...

20060081849 - Organic thin film transistor array and manufacturing method thereof: An organic thin film transistor array panel is provided, which includes: a substrate; a data line formed on the substrate and including a source electrode; a drain electrode formed on the substrate and separated from the data line; an organic semiconductor disposed on the source electrode and the drain electrode;...

20060081852 - Semiconductor device and manufacturing method thereof: To obtain a semiconductor device containing TFTs of different, suitable properties as display pixel TFTs and high-voltage, driver-circuit TFTs, the semiconductor device of the present invention includes: first and second islands-shaped polycrystalline silicon (p-Si) layers provided above an insulating substrate and having relatively large grain sizes; a third islands-shaped p-Si...

20060081851 - Semiconductor memory device: A semiconductor memory device includes a semiconductor substrate, a semiconductor layer, a source/drain layer, first and second insulating films, and first and second gate electrodes. The semiconductor layer of one conductivity type is formed on a principal surface of the semiconductor substrate. The source/drain layer is formed on the principal...

20060081848 - Solid state imaging device and method for producing the same: On a light shielding film 7, an anti-oxidation layer 9 covering at least the light shielding film 7 is formed. The anti-oxidation layer 9 is formed under a condition which does not oxidize a surface of the light shielding film 7. The anti-oxidation layer 9 is formed of a high...

20060081855 - Thin film transistor and method of forming thin film transistor: The thin film transistor has a non-transparent structure besides and insulated with the gate. Hence, the light transmitted from the substrate is blocked and the light current induced in the thin film transistor is negligible. The method uses a mask with a slit pattern to form a non-uniform photoresist. Hence,...

20060081856 - Novel wide bandgap material and method of making: A wide bandgap semiconductor material comprised of Silicon carbide containing a predetermined portion of germanium....

20060081857 - Light emitting device having circuit protection unit: A light emitting device having a circuit protection unit is provided. The circuit protection unit has a low-resistance layer and a potential barrier layer, wherein a barrier potential exists at the interface between the low-resistance layer and the potential barrier layer. The circuit protection unit is electrically connected with the...

20060081858 - Light emitting device with omnidirectional reflectors: A light emitting device includes a semiconductor structure having lateral side faces, and including a light-generating layer, and two omnidirectional reflectors disposed respectively at two sides of the light-generating layer. Each of the omnidirectional reflectors exhibits a periodic variation indielectric constant in such a manner so as to introduce an...

20060081859 - Light emitting semiconductor bonding structure and method of manufacturing the same: Disclosed is a light emitting semiconductor bonding structure and its manufacturing method. The light emitting semiconductor bonding structure includes a structure formed by bonding a substrate onto a light emitting semiconductor. The substrate is a structure containing electric circuits. The ohmic contact N electrode layer and P electrode layer are...

20060081861 - Gallium-nitride based multi-quantum well light-emitting diode n-type contact layer structure: A structure for the n-type contact layer in the GaN-based MQW LEDs is provided. Instead of using Si-doped GaN as commonly found in conventional GaN-based MQW LEDs, the n-type contact layer provided by the present invention achieves high doping density (>1×1019 cm−3) and low resistivity through a superlattice structure combining...

20060081860 - Group iii nitride semiconductor light-emitting element and method of manufacturing the same: A Group III nitride semiconductor light-emitting element includes a crack-preventing layer 15 of n-type GaN provided between a n-type contact layer 4A and a n-type clad layer 5A, wherein the crack-preventing layer 15 has a dopant concentration lower than that of the n-type contact layer 4A....

20060081862 - Device and method for emitting output light using quantum dots and non-quantum fluorescent material: A device and method for emitting output light utilizes both quantum dots and non-quantum fluorescent material to convert at least some of the original light emitted from a light source of the device to longer wavelength light to change the color characteristics of the output light. The device can be...

20060081863 - Dipolar side-emitting led lens and led module incorporating the same: The present invention relates to a dipolar LED and a dipolar LED module incorporating the same, in which an upper hemisphere-shaped base houses an LED chip therein and adapted to radiate light from the LED chip to the outside, and a pair of reflecting surfaces placed at opposed top portions...

20060081864 - Encapsulating composition for led: An organopolysiloxane composition which cures to a resinous solid has high strength, transparency, and resistance to thermal- and photo-degradation, and is especially suited for encapsulating LEDs. The composition contains specific addition curable organopolysiloxanes having D, T, and Q units, and a proportion of silicon-bonded aromatic groups....

20060081865 - Light-emitting diode: A light-emitting diode capable of making its light emission more uniform without too high a concentration current and of improving the efficiency of outgoing light and its life. In the light-emitting diode, the n-side electrode has an n-side connecting portion and an n-side extending portion, which extends in the longitudinal...

20060081869 - Flip-chip electrode light-emitting element formed by multilayer coatings: A flip-chip electrode light-emitting element formed by multilayer coatings where a translucent conducting layer and a highly reflective metal layer acts as flip-chip electrode for enhancing the LED luminous efficiency. The flip-chip electrode light-emitting element includes a translucent substrate, a semiconductor die structure attached on the translucent substrate and made...

20060081870 - Method of forming a lamination film pattern and improved lamination film pattern: In a method of forming an electrically conductive lamination pattern, an insulating film is formed on a surface of a chromium-containing bottom layer, before an aluminum-containing top layer is formed over the insulating film, so that the insulating film separates the aluminum-containing top layer from the chromium-containing bottom layer. A...

20060081866 - Optical semiconductor apparatus: An optical semiconductor apparatus has an eyelet having a through hole, an insulating member provided in the through hole, a semiconductor optical element, and a submount on which the semiconductor optical element is mounted. The insulating member supports a plurality of lead terminals. The submount has a first portion supported...

20060081867 - Reflective electrode and compound semiconductor light emitting device including the same: Provided are a reflective electrode and a compound semiconductor light emitting device having the reflective electrode, such as LED or LD is provided. The reflective electrode formed on a p-type compound semiconductor layer of a compound semiconductor light emitting device, comprising a first electrode layer formed one of a Ag...

20060081868 - Semiconductor device: A semiconductor device with high reliability, low voltage, and high luminance is provided by preventing detachment of an electrode by way of obtaining good adhesion of the electrode, even in cases where a face-down mounting of a semiconductor laser is performed, and further, an insulating film and a protective film...

20060081871 - Multiple light-emitting diode arrangement: A radiation-emitting semiconductor component comprising a plurality of semiconductor bodies (10, 20, 30) which each have an active zone (11, 21, 31) and during operation emit light having in each case a different central wavelength (λ10, λ20, λ30) and an assigned spectral bandwidth (Δλ10, Δλ20, Δλ30), so that the mixing...

20060081872 - Compound semiconductor, method for producing the same, semiconductor light-emitting device and method for fabricating the same: An inventive method includes the steps of: growing a first p-type semiconductor layer of a compound semiconductor containing phosphorus on a substrate; and growing a second p-type semiconductor layer of a compound semiconductor containing arsenic on the first p-type semiconductor layer. While the first p-type semiconductor layer is grown, magnesium...

20060081873 - High temperature light-emitting diodes: A heterostructure semiconductor device capable of emitting electromagnetic radiation and having a junction with opposite conductivity type materials on either side thereof supported on a substrate with an active layer therebetween comprising zinc oxide and having a band gap energy that is less than that of either of the opposite...

20060081874 - Starved source diffusion for avalanche photodiode: Starved source diffusion methods for forming avalanche photodiodes (APDs) are provided for controlling the edge effect. The edge effect is controlled by reducing edge gain near the edges of an APD active region. This is accomplished by creating a sloped diffusion front near the edges of the active region. The...

20060081875 - Transistor with a strained region and method of manufacture: A transistor structure comprises a channel region overlying a substrate region. The substrate region comprises a first semiconductor material with a first lattice constant. The channel region comprises a second semiconductor material with a second lattice constant. The source and drain regions are oppositely adjacent the channel region and the...

20060081876 - Process for fabricating a heterostructure-channel insulated-gate field-effect transistor, and the corresponding transistor: The insulated-gate field-effect transistor includes a substrate surmounted by a layer of silicon-germanium alloy, the ratio of the germanium concentration to the silicon concentration of which increases towards the surface of the substrate. The transistor is formed on the active zone in the silicon-germanium alloy layer and lies between two...

20060081877 - Semiconductor epitaxial wafer and field effect rtansistor: A semiconductor epitaxial wafer has, on a sapphire substrate, an AlN buffer layer formed of undoped AlN, a GaN buffer layer formed of 2 μm-thick undoped GaN, and measurement electrodes formed thereon....

20060081879 - Semiconductor device and a manufacturing method thereof, and semiconductor module: The present invention provides a semiconductor device which comprises active components, passive components, wiring lines and electrodes and are satisfactory in terms of mechanical strength, miniaturization and thermal stability. In the semiconductor device, openings are formed just below active components. These openings are filled with conductor layers. Conductor layers are...

20060081878 - Transistor circuit: The transistor circuit 1 includes a plurality of transistor cells 10 each having a transistor 11, a base ballast resistor 12, a capacitor 13, and an inductor 14. The transistors 11 have the respective collectors commonly connected to a collector terminal 1c of the transistor circuit 1 and the respective...

20060081880 - Organic field effect transistor and method for producing the same: wherein R1 and R3 each denotes a group for forming an aromatic ring or a heteroaromatic ring which may have a substituent, together with a group to be bonded to R1 or R3; R2 and R4 each denotes a hydrogen atom, an alkyl group, an alkoxy group, an ester group...

20060081881 - Circuit wiring laying-out apparatus, method of laying-out a circuit, signal-bearing medium embodying a program of laying-out wiring, wiring layout, and method of using a wiring layout: A circuit wiring laying-out apparatus includes a wiring device that moves automatically a wiring in a first region to a second region, to make uniform a number of wirings in the circuit....

20060081882 - High performance field effect transistors comprising carbon nanotubes fabricated using solution based processing: The present invention is directed toward field effect transistors (FETs) and thin film transistors (TFTs) comprising carbon nanotubes (CNTs) and to methods of making such devices using solution-based processing techniques, wherein the CNTs within such devices have been fractionated so as to be concentrated in semiconducting CNTs. Additionally, the relatively...

20060081884 - Semiconductor constructions: The invention includes semiconductor structures having buried silicide-containing bitlines. Vertical surround gate transistor structures can be formed over the bitlines. The surround gate transistor structures can be incorporated into memory devices, such as, for example, DRAM devices. The invention can be utilized for forming 4F2 DRAM devices....

20060081883 - Three-dimensional memory system-on-a-chip: The present invention provides a three-dimensional memory (3D-M) system-on-a-chip (SoC). It takes full advantage of the difference in the number of interconnect levels between the embedded processor (eP) and embedded memory (eM) in an SoC chip. The un-used interconnect space on top of the eM block is converted into 3D-M....

20060081885 - Field effect transistor with electroplated metal gate: Disclosed is a method for making a metal gate for a FET, wherein the metal gate comprises at least some material deposited by electroplating as well as an FET device comprising a metal gate that is at least partially plated. Further disclosed is a method for making a metal gate...

20060081886 - Method, system and apparatus for gating configurations and improved contacts in nanowire-based electronic devices: Methods, systems, and apparatuses for electronic devices having improved gate structures are described. An electronic device includes at least one nanowire. A gate contact is positioned along at least a portion of a length of the at least one nanowire. A dielectric material layer is between the gate contact and...

20060081887 - Solid state image sensor devices having non-planar transistors: CMOS image sensor devices are provided, wherein active pixel sensors are designed with non-planar transistors having vertical gate electrodes and channels, which minimize the effects of image lag and dark current....

20060081888 - Solid-state image sensor: A solid-state image sensor capable of suppressing mixture of charge between adjacent charge transfer paths (charge transfer regions), and suppressing reduction of a transfer efficiency of charge is provided. In the solid-state image sensor, the charge transfer region includes a first region with a first channel width, and a second...

20060081889 - Device and method for managing radiation: A device and method for managing terahertz and/or microwave radiation are provided. The device can comprise one or more field effect transistors (FETs) that each include at least one channel contact to a central region of the device channel of the FET. The frequency of the radiation managed by the...

20060081890 - Cmos image sensor and method of manufacturing the same: An image sensor includes a substrate with an epitaxial layer deposited thereon, a plurality of photodiodes buried in the epitaxial layer, and a plurality of field oxide films interposed between the photodiodes for insulating the photodiodes. Each of the field oxide films includes a trench formed on the epitaxial layer,...

20060081891 - Nonvolatile semiconductor memory capable of storing data of two bits or more per cell: A nonvolatile semiconductor memory includes a gate insulating layer, a control gate layer, a first silicide layer, charge accumulating layers, memory gate layers and second silicide layers. The gate insulating layer is formed on a first region of a semiconductor substrate. The control gate layer is formed on the gate...

20060081892 - Mos capacitor type semiconductor device and crystal oscillation device using the same: A compact semiconductor device forming a capacitive element for high frequencies that allows good capacitance change to be achieved is provided. AMOS capacitor type semiconductor device includes a gate electrode formed on a surface of a substrate through a gate insulating film, source/drain regions provided to have the gate electrode...

20060081893 - Semiconductor device and method of manufacturing the same: A semiconductor device comprises an n-type MIS transistor comprising a first gate insulating film and a first gate electrode including an MSix film formed on the first gate insulating film, where M represents a metal element selected from tungsten and molybdenum and x is greater than 1, i.e., x>1; and...

20060081894 - Recessed drain extensions in transistor device: A method of forming an integrated circuit transistor (50). The method provides a first semiconductor region (52) and forms (110) a gate structure (54x) in a fixed position relative to the first semiconductor region. The gate structure has a first sidewall and a second sidewall (59x). The method also forms...

20060081896 - Semiconductor device and method for forming the same: The present invention disclosed herein is a semiconductor device and a method for forming the same. The semiconductor device includes a first semiconductor pattern defining an active region, second semiconductor patterns placed on the first semiconductor pattern apart from each other, an insulated gate electrode spaced apart from the second...

20060081895 - Semiconductor device having fin transistor and planar transistor and associated methods of manufacture: Disclosed is a fin transistor and a planar transistor and a method of forming the same. The fin transistor and the planar transistor are formed to have gate electrodes with similar thicknesses by selectively recessing a semiconductor substrate in a planar region where the planar transistor is formed....

20060081897 - Gan-based semiconductor integrated circuit: A GaN-based semiconductor integrated circuit comprising a plurality of types of GaN-based semiconductor devices integrated on a single substrate, and one of the plurality of types of GaN-based semiconductor devices includes a Schottky diode. The Schottky diode includes a GaN-based semiconductor layer, a first anode and a second anode, wherein...

20060081899 - Detection arrangement for modular use in a combined transmission/emission tomography unit: A detection arrangement is for modular use for a combined transmission/emission tomography unit, for measuring transmission x-radiation and emission γ-radiation inside a detector. The detection arrangement includes at least three absorption layers of different thickness, arranged one above another in the radiation direction, for detecting absorption events in which case...

20060081898 - Enhanced color image sensor device and method of making the same: A semiconductor device including a substrate having a plurality of image sensing elements formed therein, a plurality of spaced apart color filters overlying the substrate and a light blocking material interposed between adjacent spaced apart color filters....

20060081900 - Pixel cell having a grated interface: A pixel cell having a photosensor within a silicon substrate; and an oxide layer provided over the photosensor, the oxide layer having a grated interface with said silicon substrate, and a method of fabricating the pixel cell having a grated interface....

20060081902 - Ferroelectric memory and method of manufacturing the same: A method of manufacturing a ferroelectric memory includes: (a) stacking a lower electrode layer, a ferroelectric layer, and an upper electrode layer on a base in that order to form a ferroelectric laminate; (b) patterning the ferroelectric laminate to form a ferroelectric capacitor; (c) forming a first barrier film which...

20060081901 - Ferroelectric memory, multivalent data recording method and multivalent data reading method: A ferroelectric memory device includes a gate electrode formed on a semiconductor body via a ferroelectric film, first and second diffusion regions being formed in the semiconductor body at respective sides of a channel region, wherein the ferroelectric film comprises a first region located in the vicinity of the first...

20060081903 - Semiconductor device and method of fabricating the same: An n channel type power MOS field effect transistor has silica particles buried in a bottom portion of a trench and a gate electrode buried in another portion of the trench. The gate electrode is in contact with the silica particles. A gap of the silica particles is not filled...

20060081904 - On-chip capacitor: An on-chip capacitor having a plurality of capacitor layers Each capacitor layer comprising a pair of frames, such that a first frame of the pair is electrically connected to first frames on each other capacitor layer and a second frame of the pair is electrically connected to second frames on...

20060081905 - Dielectric multilayer of microelectronic device and method of fabricating the same: A dielectric multilayer suitable for improving a performance of a microelectronic device and a method of fabricating the dielectric multilayer are provided. The dielectric multilayer of the microelectronic device comprises a composite layer which is formed of oxides of two or more different elements and in which a laminar structure...

20060081907 - Nonvolatile semiconductor memory device having grooves isolating the floating electrodes of memory cells and method of manufacturing the nonvolatile semiconductor memory device: A plurality of nonvolatile memory elements formed on element regions respectively isolated by element isolation regions on a main surface of a first conductive type semiconductor substrate, the nonvolatile semiconductor memory elements comprising a gate insulating film formed on the main surface of the semiconductor substrate, a plurality of floating...

20060081906 - Semiconductor device and method of manufacturing the same: Disclosed herein is a semiconductor device and method of manufacturing the same. A step between a memory cell formed in a cell region and a transistor formed in a peripheral circuit region is minimized, and the height of a gate in the memory cell is minimized. Accordingly, subsequent processes are...

20060081908 - Flash gate stack notch to improve coupling ratio: A semiconductor flash memory device with increased gate coupling ratio and a method of preparing this flash memory device. The semiconductor flash memory device includes a notched floating polysilicon gate. The notches are at the interface between the floating polysilicon layer and the tunneling dielectric layer. The notches reduce the...

20060081911 - Method of forming a non-volatile electron storage memory and the resulting device: The invention provides a method of forming an electron memory storage device and the resulting device. The device comprises a gate structure which, in form, comprises a first gate insulating layer formed over a semiconductor substrate, a self-forming electron trapping layer of noble metal nano-crystals formed over the first gate...

20060081910 - Non-volatile electrically alterable memory cell for storing multiple data and an array thereof: A memory cell that includes a control gate disposed laterally between two floating gates where each floating gate is capable of holding data. Each floating gate in a memory cell may be erased and programmed by applying a combination of voltages to diffusion regions, the control gate, and a well....

20060081909 - Semiconductor device and manufacturing method therefor: A semiconductor device comprises a semiconductor substrate, diffusion layer regions formed in the semiconductor substrate, a gate insulating film formed on the semiconductor substrate, gate electrodes formed on the gate insulating film, a silicon nitride film covering the gate electrodes, an interlayer insulating film formed over the semiconductor substrate so...

20060081912 - Electronic memory component with protection against light attack: In order to further develop an electronic memory component (100 or 100′), comprising at least one memory cell matrix (10) which is embedded in and/or let into at least one doped receiving substrate (20), in such a way that a light incidence taking the form of a so-called light attack...

20060081914 - Semiconductor device and manufacturing method thereof: A plurality of first wiring structures of a first width are arranged periodically at first intervals. A second wiring structure is formed next to one of the first wiring structures. The lower part of the second wiring structure has a second width substantially equal to the sum of n times...

20060081913 - Semiconductor memory devices including electrode contact structures having reduced contact resistance and methods of fabricating the same: A semiconductor memory device includes a semiconductor substrate having an active region therein, an insulating layer on the substrate, and a lower electrode conductive pad extending through the insulating layer. The lower electrode conductive pad electrically contacts the active region at a lower surface of the lower electrode conductive pad....

20060081916 - Methods of forming gate structures for semiconductor devices and related structures: Methods of forming a semiconductor device may include forming a tunnel oxide layer on a semiconductor substrate, forming a gate structure on the tunnel oxide layer, forming a leakage barrier oxide, and forming an insulating spacer. More particularly, the tunnel oxide layer may be between the gate structure and the...

20060081915 - Nonvolatile semiconductor memory device and method for fabricating the same: The nonvolatile semiconductor memory device comprises a channel region formed in a semiconductor substrate, a gate electrode formed over the channel region with a charge retaining insulating film interposed therebetween, a first pair of source/drain regions arranged in a first direction with the channel region formed therebetween, and a second...

20060081917 - Method for forming a hard mask for gate electrode patterning and corresponding device: A method for forming a hard mask for gate electrode patterning in a semiconductor device is disclosed. The method includes providing a polysilicon layer to be etched and forming over the polysilicon layer, a nitride hardmask with a relatively high etch rate to hydrofluoric acid, as compared to the etch...

20060081921 - Integrated circuit device having non-linear active area pillars: An integrated circuit device having non-linear active area pillars. More specifically, pillars are formed in a substrate such that sidewalls are exposed. The sidewalls of the pillars and the top surface of the pillars are covered with a gate oxide and a conductive layer to form a channel through the...

20060081919 - Semiconductor device: A semiconductor device comprising: a first-conductivity-type base layer; a second-conductivity-type emitter layer formed on a first main surface of said first-conductivity-type base layer; a collector electrode formed in contact with a surface of said second-conductivity-type emitter layer; a second-conductivity-type base layer formed on a second main surface of said first-conductivity-type...

20060081920 - Semiconductor device and method of manufacturing the same: A semiconductor device includes: a semiconductor substrate of the first-type; a semiconductor region of the first-type formed on the substrate; a gate electrode a part of which is present within a trench selectively formed in part of the semiconductor region, and an extended top-end to have a wide width via...

20060081918 - Trenc