|Semiconductor device manufacturing: process patents - Monitor Patents|
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Semiconductor device manufacturing: processBelow are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 08/07/2014 > 83 patent applications in 61 patent subcategories.
20140220707 - Method for manufacturing and magnetic devices having double tunnel barriers: A dual tunnel barrier magnetic element has a free magnetic layer positioned between first and second tunnel barriers and an electrode over the second tunnel barrier. A two step etch process allows for forming an encapsulation material on a side wall of the electrode and the second tunnel barrier subsequent... Agent: Everspin Technologies, Inc.
20140220708 - Mr enhancing layer (mrel) for spintronic devices: The performance of an MR device has been improved by inserting one or more Magneto-Resistance Enhancing Layers (MRELs) into approximately the center of one or more of the magnetic layers such as an inner pinned (AP1) layer, spin injection layer (SIL), field generation layer (FGL), and a free layer. An... Agent: Headway Technologies, Inc.
20140220709 - Controlling cd and cd uniformity with trim time and temperature on a wafer by wafer basis: Exemplary embodiments are directed to controlling CD uniformity of a wafer by controlling trim time on temperature in a plasma processing system. The plasma processing system has a wafer support assembly including a plurality of independently controllable temperature control zones across a chuck and a controller that controls each temperature... Agent: Lam Research Corporation
20140220710 - System for non radial temperature control for rotating substrates: Embodiments of the present invention provide apparatus and method for reducing non uniformity during thermal processing. One embodiment provides an apparatus for processing a substrate comprising a chamber body defining a processing volume, a substrate support disposed in the processing volume, wherein the substrate support is configured to rotate the... Agent: Applied Materials, Inc.
20140220711 - Apparatus, method and program for manufacturing nitride film: A nitride film manufacturing apparatus forms a nitride film on a substrate provided in a chamber by a plasma CVD technique. Specifically, the nitride film manufacturing apparatus includes a controller for calculating a first period for applying first high-frequency power having a relatively high frequency and a second period for... Agent: Spp Technologies Co., Ltd.
20140220713 - Arrayed imaging systems having improved alignment and associated methods: Arrayed imaging systems include an array of detectors formed with a common base and a first array of layered optical elements, each one of the layered optical elements being optically connected with a detector in the array of detectors.... Agent: Omnivision Technologies Inc.
20140220712 - Imaging device, semiconductor manufacturing apparatus, and semiconductor manufacturing method: There are provided a susceptor having a recessed wafer mounting section, in which a semiconductor wafer is mounted and which is configured to include a circular bottom portion and a side wall portion, on an upper surface, a reaction chamber in which the susceptor is provided, an imaging unit that... Agent:
20140220714 - Method for manufacturing semiconductor light-emitting element: The invention is directed to the provision of a method for manufacturing a semiconductor light-emitting element that eliminates the need for preparing a plurality of different fluorescent sheets. The method for manufacturing the semiconductor light-emitting element containing an LED die includes the steps of arranging the LED die on a... Agent: Citizen Electronics Co., Ltd.
20140220715 - Thin-film deposition mask, method of fabricating the same, and method of fabricating an organic light emitting display apparatus using the same: A thin-film deposition mask includes a mask body, the mask body having a first surface and a second surface that is an opposite surface of the first surface, the mask body having a plurality of deposition holes therein, and a spacer near the deposition holes, the spacer protruding from the... Agent:
20140220717 - Method for manufacturing light emitting diode package: A method for manufacturing an LED package includes the steps: providing a lead frame including many pairs of first and second electrodes, the first electrodes and second electrodes each including a main body, an extension electrode, and a supporting branch, the first electrodes in a column and the second electrodes... Agent: Advanced Optoelectronic Technology, Inc.
20140220716 - Method of attaching a light emitting device to a support substrate: A method according to embodiments of the invention includes providing a wafer of semiconductor light emitting devices, each semiconductor light emitting device including a light emitting layer sandwiched between an n-type region and a p-type region. A wafer of support substrates is provided, each support substrate including a body. The... Agent: Koninklijke Philips N.v.
20140220718 - Method for manufacturing light emitting diode package having a voltage stabilizing module consisting of two doping layers: A method for manufacturing an LED (light emitting diode) package comprises following steps: providing an electrically insulated base, the base having a first surface and a second surface opposite thereto; an annular voltage stabilizing module is formed on the first surface; a first electrode is formed on the first surface,... Agent: Advanced Optoelectronic Technology, Inc.
20140220719 - Light emitting device and manufacturing method thereof: Disclosed is a light emission element including, on a substrate having an insulative surface, a first electrode connected with a thin film transistor and an insulator covering the end of the first electrode, a layer containing an organic compound in contact with the first electrode, a second electrode in contact... Agent: Semiconductor Energy Laboratory Co., Ltd.
20140220722 - Method and apparatus for manufacturing organic el device: Provided are a method and an apparatus for manufacturing an organic EL device, which makes it possible to manufacture organic EL devices capable of suppressing quality degradation. The method for manufacturing an organic EL device, in which constituent layers of an organic EL element are formed by deposition over a... Agent: Nitto Denko Corporation
20140220720 - Ovjp for printing graded/stepped organic layers: An emissive layer deposited in graded manner using a plurality of nozzles is disclosed. A mixtures ejected from the plurality of nozzles may contain varying concentrations of host-to-dopant material. The nozzles, as disclosed, may be arranged in a sequential manner such that the order of the sequence is based on... Agent: Universal Display Corporation
20140220721 - White light emitting organic electroluminescent element with mixing region between two light emitting layers: Provided is a white light-emitting organic EL element wherein a flexible plastic substrate is used, but the resistance to negative effects caused by the flexibility is excellent; a removal of a light emitting layer interface caused by folding the element and a contact failure do not tend to occur; and... Agent: Konica Minolta Inc
20140220723 - Methods and structures for using diamond in the production of mems: A MEMS device with movable MEMS structure and electrodes is produced by fabricating electrodes and shielding the electrodes with diamond buttons during subsequent fabrication steps, such as the etching of sacrificial oxide using vapor HF. In some embodiments, the diamond buttons are removed after the movable MEMS structure is released.... Agent: Analog Devices, Inc.
20140220725 - Integrated die-level cameras and methods of manufacturing the same: An integrated die-level camera system and method of making the camera system include a first die-level camera formed at least partially in a die. A second die level camera is also formed at least partially in the die. Baffling is formed to block stray light between the first and second... Agent: Omnivision Technologies, Inc.
20140220724 - Methods for producing complex films, and films produced thereby: A method for producing a film, the method comprising melting a layer of precursor particles on a substrate until at least a portion of the melted particles are planarized and merged to produce the film. The invention is also directed to a method for producing a photovoltaic film, the method... Agent: Ut-battelle, LLC
20140220726 - Solar cell having silicon nano-particle emitter: A silicon solar cell having a silicon substrate includes p-type and n-type emitters on a surface of the substrate, the emitters being doped nano-particles of silicon. To reduce high interface recombination at the substrate surface, the nano-particle emitters are preferably formed over a thin interfacial tunnel oxide layer on the... Agent: Sunpower Corporation
20140220727 - Methods of making photovoltaic devices: A method of making a photovoltaic device is presented. The method includes disposing an absorber layer on a window layer. The method further includes treating at least a portion of the absorber layer with a first solution including a first metal salt to form a first component, wherein the first... Agent: First Solar, Inc.
20140220729 - Method of producing cigs film, and method of producing cigs solar cell by using same: A CIGS film production method is provided which ensures that a CIGS film having a higher conversion efficiency can be produced at lower costs at higher reproducibility even for production of a large-area device. A CIGS solar cell production method is also provided for producing a CIGS solar cell including... Agent: Nitto Denko Corporation
20140220728 - Methods of forming semiconductor films including i2-ii-iv-vi4 and i2-(ii,iv)-iv-vi4 semiconductor films and electronic devices including the semiconductor films: Embodiments of the present invention generally include methods for forming semiconductor films having nominal I2-II-IV-VI4 stoichiometry, such as CZTS or CZTSSe, using a solution of including sources of the I, II, IV, and VI elements in a liquid solvent. Precursors may be mixed in the solvent to form the solution.... Agent:
20140220730 - Photoelectric conversion device and fabrication method thereof: In a thin film photoelectric conversion device fabricated by addition of a catalyst element with the use of a solid phase growth method, defects such as a short circuit or leakage of current are suppressed. A catalyst material which promotes crystallization of silicon is selectively added to a second silicon... Agent: Semiconductor Energy Laboratory Co., Ltd.
20140220731 - Binder-free process for preparing photoanode of flexible dye-sensitized solar cell: The present invention provides a binder-free process for preparing a photoanode of flexible dye-sensitized solar cell, comprising: (a) preparing a TiO2 suspension fluid comprising TiO2, acetylacetone and anhydrous ethanol; (b) preparing a charge solution comprising iodine, ketone and deionized water; (c) mixing said TiO2 suspension fluid and said charge solution... Agent: National Cheng Kung University
20140220732 - Conductive paste for front electrode of semiconductor device and method of manufacturing thereof: The present invention provides a conductive paste characterized by a crystal-based corrosion binder being combined with a glass frit and mixed with a metallic powder and an organic carrier. Methods for preparing each components of the conductive paste are disclosed including several embodiments of prepare Pb—Te—O-based crystal corrosion binder characterized... Agent: Soltrium Technology, Ltd. Shenzhen
20140220733 - Antimony and germanium complexes useful for cvd/ald of metal thin films: Antimony, germanium and tellurium precursors useful for CVD/ALD of corresponding metal-containing thin films are described, along with compositions including such precursors, methods of making such precursors, and films and microelectronic device products manufactured using such precursors, as well as corresponding manufacturing methods. The precursors of the invention are useful for... Agent: Advanced Technology Materials, Inc.
20140220734 - Method for controlling concentration of donor in ga2o3-based single crystal: A method for controlling the concentration of a donor in a Ga2O3-based single crystal includes: a step in which a Group IV element is implanted as a donor impurity in a Ga2O3-based single crystal by ion implantation process to form, in the Ga2O3-based single crystal, a donor impurity implantation region... Agent:
20140220735 - Method and apparatus for a wafer seal ring: A wafer seal ring may be formed on a wafer having a pattern structure with a pattern density. The wafer seal ring pattern structure may include a plurality of lines having a width and a spacing that may be approximately equal to a width and a spacing of die bond... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140220736 - Power module package and method for fabricating the same: Disclosed herein are a power module package and a method for manufacturing the same. The power module package includes: first and second lead frames arranged to face each other, both or either of the first and second frames being made of aluminum; anodized layers formed on portions of the lead... Agent: Samsung Electro-mechanics Co., Ltd.
20140220737 - Flip-chip hybridization of microelectronic components using suspended fusible resistive connection elements: A method of forming a hybridized device comprising forming a first microelectronic component provided, on a surface, with metal balls, and a second microelectronic component provided, on a surface, with connection elements corresponding to said metal balls, and hybridizing the first and second components to attach the metal balls of... Agent: Commissariat A L'energie Atomique Et Aux Energies Alternatives
20140220738 - Lead frame array package with flip chip die attach: A small form factor near chip scale package is provided that includes input/output contacts not only along the periphery of the package, but also along the package bottom area. Embodiments provide these additional contacts through use of an array lead frame coupled to under die signal contacts through the use... Agent: Freescale Semiconductor Inc.
20140220740 - Method of manufacturing semiconductor device, semiconductor device and multilayer wafer structure: Grooves are formed on the front surfaces of first and second semiconductor wafers each including an aggregate of a plurality of semiconductor chips. The grooves each extend on a dicing line set between the semiconductor chips and to have a larger width than the dicing line. Thereafter the first and... Agent: Renesas Electronics Corporation
20140220739 - Semiconductor device manufacturing method: A semiconductor device includes: a semiconductor substrate; a heat sink mounted on an upper surface of the semiconductor substrate; wirings formed on a lower surface of the semiconductor substrate; and the like. The heat sink is mounted on the upper surface of the semiconductor substrate, and a planar size thereof... Agent: Semiconductor Components Industries, LLC.
20140220741 - Stacked structures and methods of forming stacked structures: A stacked structure includes a first die bonded over a second die. The first die has a first die area defined over a first surface. At least one first protective structure is formed over the first surface, around the first die area. At least one side of the first protective... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.
20140220742 - Method for forming a thin semiconductor device: A method for forming a thin semiconductor device is disclosed. In one embodiment, a lead frame is provided over a carrier. At least one semiconductor chip is provided on the lead frame and the at least one semiconductor chip is enclosed with an encapsulating material. The thickness of the at... Agent: Infineon Technologies Ag
20140220743 - Power module package and method for manufacturing the same: Disclosed herein is a power module package including an external connection terminal, a substrate in which a fastening unit allowing one end of the external connection terminal to be insertedly fastened thereinto is formed to penetrate in a thickness direction thereof, and a semiconductor chip mounted on one surface of... Agent: Samsung Electro-mechanics Co., Ltd.
20140220745 - Laminating system: It is an object of the invention to improve the production efficiency in sealing a thin film integrated circuit and to prevent the damage and break. Further, it is another object of the invention to prevent a thin film integrated circuit from being damaged in shipment and to make it... Agent: Semiconductor Energy Laboratory Co., Ltd.
20140220744 - Method of making wire bond vias and microelectronic package having wire bond vias: Microelectronic components and methods forming such microelectronic components are disclosed herein. The microelectronic components may include a plurality of electrically conductive vias in the form of wire bonds extending from a bonding surface of a substrate, such as surfaces of electrically conductive elements at a surface of the substrate.... Agent: Invensas Corporation
20140220746 - Fully isolated ligbt and methods for forming the same: A method includes growing an epitaxy semiconductor layer over a semiconductor substrate. The epitaxy semiconductor layer is of a first conductivity type. A Lateral Insulated Gate Bipolar Transistor (LIGBT) is formed at a front surface of the epitaxy semiconductor layer. After the LIGBT is formed, a backside thinning is performed... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140220747 - Tft-lcd array substrate and manufacturing method thereof: An embodiment of the invention relates to a TFT-LCD array substrate comprising a substrate, a gate line and a data line formed on the substrate, a pixel electrode and a thin film transistor formed in a pixel region defined by the gate line and the data line, wherein the thin... Agent: Boe Technology Group Co., Ltd.
20140220748 - Method for fabricating complementary tunneling field effect transistor based on standard cmos ic process: Disclosed herein is a method for fabricating a complementary tunneling field effect transistor based on a standard CMOS IC process, which belongs to the field of logic devices and circuits of field effect transistors in ultra large scaled integrated (ULSI) circuits. In the method, an intrinsic channel and body region... Agent:
20140220749 - A vertical mosfet transistor with a vertical capacitor region: Consistent with an example embodiment, a method of may be provided to manufacture a vertical capacitor region that comprises a plurality of said trenches, wherein the portions of the semiconductor region in between said trenches comprise an impurity. This allows for the trenches to be placed in closer vicinity to... Agent: Nxp B.v.
20140220750 - Semiconductor memory device and method of fabricating the same: Provided are a semiconductor device and a method of fabricating the same. The method may include forming an electrode structure including insulating layers and electrode layers alternatingly stacked on a substrate, forming a channel hole to penetrate the electrode structure, forming a data storage layer on a sidewall of the... Agent:
20140220753 - Apparatus and method for finfets: A FinFET comprises an isolation region formed in a substrate, a cloak-shaped active region formed over the substrate, wherein the cloak-shaped active region has an upper portion protruding above a top surface of the isolation region. In addition, the FinFET comprises a gate electrode wrapping the channel of the cloak-shaped... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140220751 - Methods for forming semiconductor regions in trenches: A method includes recessing a portion of a semiconductor substrate between opposite isolation regions to form a recess. After the step of recessing, the portion of the semiconductor substrate includes a top surface. The top surface includes a flat surface, and a slant surface having a (111) surface plane. The... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140220752 - Semiconductor device and method of fabricating the same: A method of fabricating a semiconductor device is described. The method of fabricating a semiconductor device comprises providing a fin formed to protrude from a substrate and a plurality of gate electrodes formed on the fin to intersect the fin; forming first recesses in the fin on at least one... Agent: Samsung Electronics Co., Ltd.
20140220754 - Semiconductor device and method of forming the same: A method of forming a semiconductor device includes forming first sacrificial patterns on a substrate, the first sacrificial patterns spaced apart from each other, forming a capping layer on the first sacrificial patterns, forming a gap insulating layer spaced apart from a lower portion of the capping layer between the... Agent: Samsung Electronics Co., Ltd.
20140220755 - Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same: Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140220756 - Methods of forming semiconductor devices by forming a semiconductor layer above source/drain regions prior to removing a gate cap layer: One example of a method disclosed herein for forming a gate electrode in a field effect transistor comprises forming a gate structure above a semiconductor substrate, the gate structure comprising a gate electrode and a gate cap layer positioned above the gate electrode, forming sidewall spacers adjacent the sidewalls of... Agent: Globalfoundries Inc.
20140220757 - Pinch-off control of gate edge dislocation: A method of manufacturing a semiconductor device includes providing a substrate having a gate stack, and performing a pre-amorphous implantation (PAI) process to form an amorphized region on the substrate. The method also includes performing an annealing process to recrystallize the amorphized region after the stress film is formed. The... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140220758 - Method for producing a semiconductor device with a vertical dielectric layer: A method for producing a semiconductor device is disclosed. The method includes providing a semiconductor body having a first surface, and a second surface opposite the first surface, producing a first trench having a bottom and sidewalls and extending from the first surface into the semiconductor body, forming a dielectric... Agent: Infineon Technologies Austria Ag
20140220760 - Integration of shallow trench isolation and through-substrate vias into integrated circuit designs: A method of manufacturing an IC, comprising providing a substrate having a first side and a second opposite side, forming a STI opening in the first side of the substrate and forming a partial TSV opening in the first side of the substrate and extending the partial TSV opening. The... Agent: Lsi Corporation
20140220759 - Methods for fabricating integrated circuits having gate to active and gate to gate interconnects: Methods are provided for fabricating an integrated circuit that includes gate to active contacts. One method includes forming a dummy gate structure including a dummy gate electrode having sidewalls and overlying a semiconductor substrate and first and second sidewall spacers on the sidewalls of the dummy gate electrode. The method... Agent: Globalfoundries Inc.
20140220761 - Reduction of polysilicon residue in a trench for polysilicon trench filling processes: A method of fabricating a semiconductor device includes forming at least one trench from a top side of a semiconductor layer, wherein the trench is lined with a trench dielectric liner and filled by a first polysilicon layer. The surface of the trench dielectric liner is etched, wherein dips in... Agent: Texas Instruments Incorporated
20140220762 - Method of manufacturing isolation structure: A method of manufacturing an isolation structure includes forming a laminate structure on a substrate. A plurality trenches is formed in the laminate structure. Subsequently a pre-processing is effected to form a hydrophilic thin film having oxygen ions on the inner wall of the trenches. Spin-on-dielectric (SOD) materials are filled... Agent: Inotera Memories, Inc.
20140220763 - Memory devices and formation methods: A method includes forming an electrical insulator material over an integrated circuit having a metal-containing conductive interconnect and activating a dopant in a semiconductor material of a substrate to provide a doped region. The doped region provides a junction of opposite conductivity types. After activating the dopant, the substrate is... Agent: Micron Technology, Inc.
20140220765 - Method for separating support substrate from solid-phase bonded wafer and method for manufacturing semiconductor device: A method is disclosed for separating a support substrate from a solid-phase bonded wafer which includes a Si wafer and support substrate solid-phase bonded to back surface of the Si wafer. The method includes a step of irradiating the Si wafer with laser light with a wavelength which passes through... Agent: Fuji Electric Co., Ltd.
20140220764 - Thin film wafer transfer and structure for electronic devices: A method for wafer transfer includes forming a spreading layer, including graphene, on a single crystalline SiC substrate. A semiconductor layer including one or more layers is formed on and is lattice matched to the crystalline SiC layer. The semiconductor layer is transferred to a handle substrate, and the spreading... Agent: International Business Machines Corporation
20140220766 - Planar semiconductor growth on iii-v material: A semiconductor structure includes a III-V monocrystalline layer and a germanium surface layer. An interlayer is formed directly between the III-V monocrystalline layer and the germanium surface layer from a material selected to provide stronger nucleation bonding between the interlayer and the germanium surface layer than nucleation bonding that would... Agent: International Business Machines Corporation
20140220767 - Double-pattern gate formation processing with critical dimension control: Fabricating of one or more semiconductor devices with critical gate dimension control is facilitated by: providing a multilayer stack structure over a substrate; etching through the multilayer stack structure, with critical gate dimension control, to define multiple gate lines; providing a protective layer over the multiple gate lines; and patterning... Agent: Globalfoundries Inc.
20140220768 - Method of laser irradiation, laser irradiation apparatus, and method of manufacturing a semiconductor device: If an optical path length of an optical system is reduced and a length of a laser light on an irradiation surface is increased, there occurs curvature of field which is a phenomenon that a convergent position deviates depending on an incident angle or incident position of a laser light... Agent: Semiconductor Energy Laboratory Co., Ltd.
20140220769 - Integrated circuits including ild structure, systems, and fabrication methods thereof: A method of forming an integrated circuit comprises forming a gate of a transistor over a substrate. The method further comprises forming a connecting line over the substrate, the connecting line being coupled with an active area of the transistor. The method also comprises forming a dielectric layer surrounding the... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140220770 - Methods of fabricating semiconductor devices and structures thereof: Methods of fabricating semiconductor devices and structures thereof are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes forming a gate material stack over a substrate having a first region and a second region. The gate material stack includes a semiconductive gate material. A thickness is altered... Agent: Infineon Technologies Ag
20140220772 - Doping control of metal nitride films: Described are methods for controlling the doping of metal nitride films such as TaN, TiN and MnN. The temperature during deposition of the metal nitride film may be controlled to provide a film density that permits a desired amount of doping. Dopants may include Ru, Cu, Co, Mn, Mo, Al,... Agent:
20140220771 - Worm memory device and process of manufacturing the same: A process of manufacturing a Write-Once-Read-Many-times memory, at least includes the following steps: (A) providing a substrate as a lower electrode; (B) depositing a first oxide layer on the substrate; (C) depositing at least one or more silicon/germanium (Si/Ge) layers on the first oxide layer; (D) depositing a second oxide... Agent: National Tsing Hua University
20140220773 - Fabrication of graphene nanoribbons and nanowires: In some embodiments, the present disclosure pertains to methods of preparing graphene nanoribbons from a graphene film associated with a meniscus, where the method comprises patterning the graphene film while the meniscus acts as a mask above a region of the graphene film, and where the patterning results in formation... Agent: William Marsh Rice University
20140220774 - Method of forming external terminals of a package and apparatus for performing the same: A method of forming external terminals of a package is provided in which a package substrate may be fixed, an edge portion of the package substrate may be supported to prevent the edge portion of the package substrate from being upwardly bent, a mask having openings may be arranged on... Agent: Samsung Electronics Co., Ltd
20140220775 - Methods for fabricating integrated circuits having embedded electrical interconnects: A method for fabricating integrated circuits includes providing a substrate including a protecting layer over an oxide layer and etching a recess through the protecting layer and into the oxide layer. A barrier material is deposited over the substrate to form a barrier layer including a first region in the... Agent: Globalfoundries, Inc.
20140220776 - Multi-direction design for bump pad structures: An integrated circuit structure includes a semiconductor chip having a first region and a second region; a dielectric layer formed on the first region and the second region of the semiconductor chip; a first elongated under-bump metallization (UBM) connector formed in the dielectric layer and on the first region of... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140220777 - Processing system for combined metal deposition and reflow anneal for forming interconnect structures: An interconnect conductive metal used in forming an interconnect structure can be formed using a method in which deposition of a metal liner and a reflow anneal are performed in a same multi-chambered processing system without exposing the structure to air between the steps of deposition and reflow annealing. In... Agent: International Business Machines Corporation
20140220778 - Planarization method and planarization apparatus: According to one embodiment, a planarization method and a planarization apparatus are provided. In the planarization method, a work surface of a work piece is planarized by bringing the work surface of the work piece containing a silicon oxide film and a surface of a solid plate onto which hydrogen... Agent: Kabushiki Kaisha Toshiba
20140220779 - Surface selective polishing compositions: The disclosure provides polishing compositions that show a high polishing rate ratio of a silicon nitride (SiN) surface to a silicon oxide surface, and/or of a SiN surface to a polycrystalline silicon (Poly Si) surface. Such compositions comprise, in certain aspects, of colloidal silica, and one or more water soluble... Agent:
20140220780 - Resist technique: The present disclosure provides various methods for removing a resist layer from a wafer. An exemplary method includes performing an etching process to remove a resist layer from a wafer. During the etching process, a first heating process is performed to effect a first graded thermal profile in the resist... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140220781 - Driving substrate and display device: A driving substrate includes: a protective layer including an etching surface; and a film layer including one or more convex portions on a surface thereof. The film layer is in contact with a rear surface of the protective layer. The one or more convex portions each have a surface being... Agent: Sony Corporation
20140220782 - Methods of forming hole patterns of semiconductor devices: A double patterning method of forming a plurality of hole patterns having a small pitch using etch selectivities includes forming a patterning mask pattern defining a preliminary hole exposing an upper surface of a buffer mask layer, an inner spacer exposing the upper surface of the buffer mask layer on... Agent: Samsung Electronics Co., Ltd.
20140220783 - Pattern-forming method and resist underlayer film-forming composition: A pattern-forming method includes providing a resist underlayer film on a substrate using a resist underlayer film-forming composition. The resist underlayer film-forming composition includes a first polymer having a glass transition temperature of 0 to 180° C. A silicon-based oxide film is provided on a surface of the resist underlayer... Agent: Jsr Corporation
20140220784 - Plasma processing apparatus and plasma processing method: A plasma processing apparatus having a dielectric member that surrounds a circular chamber having a long shape and communicating with an opening portion having a long and linear shape, a gas supply pipe for introducing gas into an inside of the circular chamber, a coil provided in a vicinity of... Agent: Panasonic Corporation
20140220785 - Plasma etching method: A plasma etching method that can improve an etching selection ratio of a film to be etched to a film different from the film to be etched compared with the related art is provided. The present invention provides a plasma etching method for selectively etching a film to be etched... Agent: Hitachi High-technologies Corporation
20140220786 - Methods for optical proximity correction in the design and fabrication of integrated circuits: A method of manufacturing an optical lithography mask includes providing a patterned layout design comprising a plurality of polygons, correcting the patterned layout design using optical proximity correction (OPC) by adjusting widths and lengths of one or more of the plurality of polygons, to generate a corrected patterned layout design,... Agent: Globalfoundries, Inc.
20140220787 - Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium: A method of manufacturing a semiconductor device includes forming a thin film containing a specific element, oxygen, carbon, and nitrogen by performing a cycle a predetermined number of times. The cycle includes supplying a specific element-containing gas, supplying a carbon-containing gas, supplying an oxidizing gas, and supplying a nitriding gas.... Agent: Hitachi Kokusai Electric Inc.
20140220788 - Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium: The present disclosure suppresses oxidation of a base film on a substrate surface during the formation of an oxide film. A method of manufacturing a semiconductor device according to the present disclosure includes forming an initial layer including a predetermined element and having a thickness of several atomic layers on... Agent: Hitachi Kokusai Electric Inc.
20140220789 - Method of manufacturing semiconductor device, semiconductor device and substrate processing apparatus: An oxide film capable of suppressing reflection of a lens is formed under a low temperature. A method of manufacturing a semiconductor device includes forming a metal-containing oxide film on a substrate by performing a cycle a predetermined number of times, the cycle comprising: (a) supplying a metal-containing source to... Agent: Hitachi Kokusai Electric Inc.07/31/2014 > 83 patent applications in 61 patent subcategories.
07/24/2014 > 101 patent applications in 75 patent subcategories.
20140206106 - Magnetic memory and method of manufacturing the same: A magnetic memory according to an embodiment includes: at least one memory cell comprising a magnetoresistive element as a memory element, and first and second electrodes that energize the magnetoresistive element. The magnetoresistive element includes: a first magnetic layer having a variable magnetization direction perpendicular to a film plane; a... Agent: Kabushiki Kaisha Toshiba
20140206107 - Semiconductor ferroelectric device, manufacturing method for the same, and electronic device: A manufacturing method for a semiconductor device, the method including forming a thin film transistor by forming a polysilicon thin film on an insulating substrate, forming a gate electrode via a gate insulating film, and forming source/drain regions and a channel region by ion implantation in the polysilicon thin film... Agent: Gold Charm Limited
20140206104 - Strain induced reduction of switching current in spin-transfer torque switching devices: Partial perpendicular magnetic anisotropy (PPMA) type magnetic random access memory cells are constructed using processes and structural configurations that induce a directed static strain/stress on an MTJ to increase the perpendicular magnetic anisotropy. Consequently, reduced switching current of the MTJ results. The directed static strain/stress on the MTJ is induced... Agent: Qualcomm Incorporated
20140206105 - Transformer signal coupling for flip-chip integration: Methods for transformer signal coupling and impedance matching for flip-chip circuit assemblies are presented. In one embodiment, a method for providing an inductive coupling between dies may include fabricating a first inductor on a first die using a passive process, fabricating a second inductor on a second die using a... Agent: Qualcomm Incorporated
20140206108 - Heat treatment apparatus and heat treatment method for heating substrate by irradiating substrate with flash of light: A flash heating part in a heat treatment apparatus includes 30 built-in flash lamps, and irradiates a semiconductor wafer held by a holder in a chamber with a flash of light. Thirty switching elements are provided in a one-to-one correspondence with the 30 flash lamps. Each of the switching elements... Agent: Dainippon Screen Mfg. Co., Ltd.
20140206109 - Method of manufacturing and testing a chip package: A method of producing and testing a chip package is described. The chip package to be produced includes a semiconductor chip containing an integrated circuit and a reinforcing structure attached to the semiconductor chip. Further, the chip package has a lower main face and an upper main face opposite to... Agent: Infineon Technologies Ag
20140206110 - Etchant and etching process: A system and method of etching a semiconductor device are provided. Etching solution is sampled and analyzed by a monitoring unit to determine a concentration of components within the etching solution, such as an oxidant concentration. Then, based upon such measurement, a makeup amount of the components may be added... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140206112 - Method for reducing charge in critical dimension-scanning electron microscope metrology: Methods and compositions are provided for reducing or eliminating charge buildup during scanning electron microscopy (SEM) metrology of a critical dimension (CD) in a structure produced by lithography. An under layer is utilized that comprises silicon in the construction of the structure. When the lithography structure comprising the silicon-comprising under... Agent: The Research Foundation For The State University Of New York
20140206111 - Semiconductor device manufacturing method: To improve the performance of a semiconductor device, a semiconductor device manufacturing method includes an exposing process of performing pattern exposure of a resist film formed on a substrate by using EUV light reflected from a front surface of an EUV mask as a reflective mask. In this exposing process,... Agent: Renesas Electronics Corporation
20140206113 - Semiconductor test structures: A method performed using a resistive device, where the resistive device includes a substrate with an active region separated from a gate electrode by a dielectric and electrical contacts along a longest dimension of the gate electrode, the method comprising, performing one or more processes to form the resistive device,... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140206114 - Contact resistance test structure and method suitable for three-dimensional integrated circuits: A contact resistance test structure, a method for fabricating the contact resistance test structure and a method for measuring a contact resistance while using the contact resistance test structure are all predicated upon two parallel conductor lines (or multiples thereof) that are contacted by one perpendicular conductor line absent a... Agent: International Business Machines Corporation
20140206115 - Optoelectronic semiconductor device and the manufacturing method thereof: The present application provides a method of manufacturing an optoelectronic semiconductor device, comprising the steps of: providing a substrate; forming an optoelectronic system on the substrate; forming a barrier layer on the optoelectronic system; forming an electrode on the barrier layer; and annealing the optoelectronic semiconductor device; wherein the optoelectronic... Agent: Epistar Corporation
20140206117 - Method for manufacturing display device: An IZO layer (113) is formed on an a-ITO layer (112), and resist patterns (202R, 202G) having different film thicknesses are formed in at least sub-pixels (71R, 71G). The a-ITO layer (112) and the IZO layer (113) are etched by utilizing (i) a reduction in thickness of the resist patterns... Agent: Sharp Kabushiki Kaisha
20140206116 - Semiconductor light emitting device and method of manufacturing the same: There are provided a semiconductor light emitting device and a method of manufacturing the same. A method of manufacturing a plurality of light emitting nanostructures of a semiconductor light emitting device includes: forming a plurality of first conductivity type semiconductor cores on a first type semiconductor seed layer, each first... Agent: Samsung Electronics Co., Ltd.
20140206118 - Coupled asymmetric quantum confinement structures: Implementations and techniques for coupled asymmetric quantum confinement structures are generally disclosed.... Agent: University Of Seoul Industry Cooperation Foundation
20140206119 - Method for fabricating organic light emitting display device and inkjet print device used therein: A method for fabricating an organic light emitting display device includes forming a first electrode on a substrate; forming a pixel-defining film having an opening exposing the first electrode; forming an ink non-reactive solvent portion by discharging of an ink non-reactive solvent at the opening and forming an organic light... Agent: Samsung Display Co., Ltd.
20140206120 - Light emitting diode and method for fabricating the same: The disclosed light emitting diode includes a substrate provided, at a surface thereof, with protrusions, a buffer layer formed over the entirety of the surface of the substrate, a first semiconductor layer formed over the buffer layer, an active layer formed on a portion of the first semiconductor layer, a... Agent:
20140206121 - Electroluminescent devices for lighting applications: A second organic layer is deposited over and in direct contact with the first organic layer. The second organic layer includes an organic emitting material of the second organic layer. A second electrode is then deposited over the second organic layer. The device may include other layers.... Agent: Universal Display Corporation
20140206122 - Open cavity plastic package: A method for manufacturing open cavity integrated circuit packages, the method comprising: placing a wire-bound integrated circuit in a mold; forcing a pin to contact a die of the wire-bound integrated circuit by applying a force between the pin and the mold; injecting plastic into the mold; allowing the plastic... Agent:
20140206123 - Dual layer microelectromechanical systems device and method of manufacturing same: Exemplary microelectromechanical system (MEMS) devices, and methods for fabricating such are disclosed. An exemplary method includes providing a silicon-on-insulator (SOI) substrate, wherein the SOI substrate includes a first silicon layer separated from a second silicon layer by an insulator layer; processing the first silicon layer to form a first structure... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140206124 - Pressure sensor and method of packaging same: A method of packaging a pressure sensor die includes providing a lead frame having a die pad and lead fingers that surround the die pad. A tape is attached to a first side of the lead frame. A pressure sensor die is attached to the die pad on a second... Agent: Freescale Semiconductor, Inc.
20140206125 - Method for producing a solar cell: In a method for producing a solar cell having a substrate made of crystalline silicon, on a surface of the Si substrate, a locally defined n-doped emitter region is produced by full-surface cold coating of the surface using a P-containing coating, followed by a local laser beam-doping of P atoms... Agent:
20140206126 - Methods of growing heteroepitaxial single crystal or large grained semiconductor films on glass substrates and devices thereon: A method is disclosed for making semiconductor films from a eutectic alloy comprising a metal and a semiconductor. Through heterogeneous nucleation said film is deposited at a deposition temperature on relatively inexpensive buffered substrates, such as glass. Specifically said film is vapor deposited at a fixed temperature in said deposition... Agent: Solar-tectic LLC
20140206127 - Cmos image sensor white pixel performance: A method includes forming a photodiode in a substrate and forming source and drain regions in the substrate. A first rapid thermal anneal (RTA) process is performed to anneal the source and drain regions in the substrate. After forming the source and drain regions, a thermal oxide layer is grown... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140206128 - Method for producing solid-state imaging device: The solid-state imaging device in which pixel electrodes, a photoelectric conversion portion having an organic film generating electric charge in response to incident light, a transparent counter electrode, and a sealing layer are formed on a substrate is produced by the method including causing a metal mask to come into... Agent: Fujifilm Corporation
20140206129 - Method of manufacturing see-through thin film solar cells: A method of manufacturing see-through thin film solar cells includes the steps of: placing a patterned photo mask above a first substrate which has a photoelectric conversion film formed on the surface thereof; and ablating the photoelectric conversion film via a laser beam passing through the patterned photo mask to... Agent:
20140206130 - Avalanche photodiodes and methods of fabricating the same: Provided are an avalanche photodiode and a method of fabricating the same. The method of fabricating the avalanche photodiode includes sequentially forming a compound semiconductor absorption layer, a compound semiconductor grading layer, a charge sheet layer, a compound semiconductor amplification layer, a selective wet etch layer, and a p-type conductive... Agent: Electronics And Telecommunications Research Institute
20140206131 - Method for fabricating an interlayer: The present invention relates to a method for fabricating an interlayer, and particularly relates to a method for fabricating an interlayer PCBM which is difficult to be dissolved in organic solvents. The solubility of the interlayer (PCBM) in organic solvents is decreased by polymerization of the interlayer (PCBM). Therefore, the... Agent: National Taiwan University
20140206134 - Low temperature deposition of phase change memory materials: A system and method for forming a phase change memory material on a substrate, in which the substrate is contacted with precursors for a phase change memory chalcogenide alloy under conditions producing deposition of the chalcogenide alloy on the substrate, at temperature below 350° C., with the contacting being carried... Agent: Advanced Technology Materials, Inc.
20140206133 - Method for manufacturing semiconductor device: To reduce defects in an oxide semiconductor film in a semiconductor device. To improve electrical characteristics of and reliability in the semiconductor device including an oxide semiconductor film. A method for manufacturing a semiconductor device includes the steps of forming a gate electrode and a gate insulating film over a... Agent: Semiconductor Energy Laboratory Co., Ltd.
20140206136 - Antimony compounds useful for deposition of antimony-containing materials: Precursors for use in depositing antimony-containing films on substrates such as wafers or other microelectronic device substrates, as well as associated processes of making and using such precursors, and source packages of such precursors. The precursors are useful for deposition of Ge2Sb2Te5 chalcogenide thin films in the manufacture of nonvolatile... Agent: Advanced Technology Materials, Inc.
20140206138 - Complementary metal oxide heterojunction memory devices and methods for cycling robustness and data retention: A memory device is disclosed. The memory device comprises a first metal layer and a first metal oxide layer coupled to the first metal layer. The first metal layer is also coupled to a second metal oxide, which in turn is couple to a second metal layer. The formation of... Agent: 4ds, Inc.
20140206137 - Deposition system for thin film formation: A process for depositing a thin film material on a substrate is disclosed, comprising simultaneously directing a series of gas flows from the output face of a delivery head of a thin film deposition system toward the surface of a substrate, and wherein the series of gas flows comprises at... Agent:
20140206139 - Methods for fabricating a thin film transistor and an array substrate: The present invention provides methods for fabricating a thin film transistor and an array substrate, which are applicable in the field of display device fabrication, and solve the problem of performing patterning process too many times during the fabrications of a thin film transistor and an array substrate. The method... Agent:
20140206140 - Method of forming wafer-level molded structure for package assembly: A method of forming an integrated circuit structure is provided. In an embodiment, the method includes bonding top dies onto a bottom wafer and then molding a first molding material onto and in between the top dies and the bottom wafer. The bottom wafer, the top dies, and the first... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140206142 - Flip-chip wafer level package and methods thereof: An electronic package includes a flip-chip component having a first die coupled to a flip-chip substrate, second die stacked on the first die, an encapsulation compound formed around the first die and the second die, a set of through encapsulant vias (TEVs) providing a set of electrical connections from a... Agent:
20140206141 - Methods and arrangements relating to semiconductor packages including multi-memory dies: Embodiments provide a method comprising providing a multi-memory die that comprises multiple individual memory dies. Each of the individual memory dies is defined as an individual memory die within a wafer of semiconductor material during production of memory dies. The multi-memory die is created by singulating the wafer of semiconductor... Agent: Marvell World Trade Ltd.
20140206143 - Chip stack with electrically insulating walls: A method of forming a chip stack is provided and includes arraying solder pads along a plane of a major surface of a substrate forming walls of electrically insulating material between adjacent ones of the solder pads.... Agent: International Business Machines Corporation
20140206145 - Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods: Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods are disclosed. A system in accordance with a particular embodiment includes a first semiconductor substrate having a first substrate material, and a penetrating structure carried by the first semiconductor substrate. The system further includes... Agent: Micron Technology, Inc.
20140206144 - Semiconductor device and manufacturing method thereof: In one embodiment, a semiconductor device includes a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip. The first and second semiconductor chips are electrically connected via first bump connection parts. Stopper projections and bonding projections are provided at least one of the first and... Agent: Kabushiki Kaisha Toshiba
20140206146 - Fabrication method of semiconductor package having electrical connecting structures: A semiconductor package having electrical connecting structures includes: a conductive layer having a die pad and traces surrounding the die pad; a chip; bonding wires; an encapsulant with a plurality of cavities having a depth greater than the thickness of the die pad and traces for embedding the die pad... Agent: Siliconware Precision Industries Co., Ltd.
20140206147 - Stacked microelectronic assembly with tsvs formed in stages and carrier above chip: A microelectronic assembly is provided which includes a first element consisting essentially of at least one of semiconductor or inorganic dielectric material having a surface facing and attached to a major surface of a microelectronic element at which a plurality of conductive pads are exposed, the microelectronic element having active... Agent: Tessera, Inc.
20140206148 - Semiconductor-encapsulating adhesive, semiconductor-encapsulating film-form adhesive, method for producing semiconductor device, and semiconductor device: The present invention relates to a semiconductor-encapsulating adhesive, a semiconductor-encapsulating film-form adhesive, a method for producing a semiconductor device, and a semiconductor device. The present invention provides a semiconductor-encapsulating adhesive comprising (a) an epoxy resin, and (b) a compound formed of an organic acid reactive with an epoxy resin and... Agent: Hitachi Chemical Company, Ltd.
20140206149 - Preform including a groove extending to an edge of the preform: Embodiments include but are not limited to apparatuses and systems including a die or a preform including at least one groove configured to extend from at least one via of the die to an edge of the die. Other embodiments may be described and claimed.... Agent: Triquint Semiconductor, Inc.
20140206150 - Apparatus and method for manufacturing an integrated circuit: The present invention relates to an apparatus for manufacturing an integrated circuit (10) having a thick film metal layer (14). A layer of metal paste (14) is applied via an application means (24) onto a heat-conducting substrate (12). The metal paste (14) includes metal particles of a predetermined size. An... Agent: Koninklijke Philips N.v.
20140206151 - Method for producing a semiconductor module arrangement: A method for producing a semiconductor module arrangement includes providing a semiconductor module and a printed circuit board. The semiconductor module has a circuit mount populated with a semiconductor chip, an adjustment device in a first relative position with respect to the circuit mount, and a plurality of electrical connections... Agent:
20140206153 - Method for fabricating solder columns for a column grid array package: A method for fabricating an electronic device package having a column grid array is disclosed. A column grid array package includes a substrate, an integrated circuit located on a first side of the substrate, and a set of solder columns located on a second side of the substrate. The column... Agent: Bae Systems Information And Electronic Systems Integration Inc.
20140206152 - Single layer bga substrate process: The present disclosure provides semiconductor packaging techniques that form a substrate using metal and insulating materials. The substrate includes a first surface that is bonded to a semiconductor device and a second surface that is bonded to a printed circuit board. The substrate is formed using several techniques that minimize... Agent: Marvell World Trade Ltd.
20140206154 - Semiconductor device comprising a passive component of capacitors and process for fabrication: A semiconductor device includes a wafer having a frontside and a backside. The wafer is formed from at least one integrated circuit chip having an electrical connection frontside co-planar with the wafer frontside and a backside co-planar with the wafer backside. A passive component including at least one conductive plate... Agent: Stmicroelectronics (grenoble 2) Sas
20140206155 - Semiconductor device and manufacturing method thereof: The reliability of a semiconductor device including a MOSFET formed over an SOI substrate is improved. A manufacturing method of the semiconductor device is simplified. A semiconductor device with n-channel MOSFETsQn formed over an SOI substrate SB includes an n+-type semiconductor region formed as a diffusion layer over an upper... Agent: Renesas Electronics Corporation
20140206156 - Finfet device and method of manufacturing same: A semiconductor device and method for fabricating a semiconductor device is disclosed. An exemplary semiconductor device includes a substrate including a fin structure disposed over the substrate. The fin structure includes one or more fins. The semiconductor device further includes an insulation material disposed on the substrate. The semiconductor device... Agent: Taiwan Semiconductor Manufacturing Company Ltd.
20140206157 - Method of forming a semiconductor structure including a vertical nanowire: A method comprises providing a semiconductor structure comprising a substrate and a nanowire above the substrate. The nanowire comprises a first semiconductor material and extends in a vertical direction of the substrate. A material layer is formed above the substrate. The material layer annularly encloses the nanowire. A first part... Agent: Globalfoundries Inc.
20140206159 - Method for manufacturing compound semiconductor device: A compound semiconductor device includes: a compound semiconductor multilayer structure; a gate insulating film on the compound semiconductor multilayer structure; and a gate electrode, wherein the gate electrode includes a gate base portion on the gate insulating film and a gate umbrella portion, and a surface of the gate umbrella... Agent: Fujitsu Limited
20140206158 - Method for manufacturing semiconductor device: A semiconductor device includes: a semiconductor layer disposed above a substrate; an insulating film formed by oxidizing a portion of the semiconductor layer; and an electrode disposed on the insulating film, wherein the insulating film includes gallium oxide, or gallium oxide and indium oxide.... Agent: Fujitsu Limited
20140206160 - Method of forming a gated diode structure for eliminating rie damage from cap removal: A method of fabricating a semiconductor structure provided with a plurality of gated-diodes having a silicided anode (p-doped region) and cathode (n-doped region) and a high-K gate stack made of non-silicided gate material, the gated-diodes being adjacent to FETs, each of which having a silicided source, a silicided drain and... Agent:
20140206161 - Method of fabricating a semiconductor device having a capping layer: A method of semiconductor device fabrication includes forming a first dummy gate structure in a first region of a semiconductor substrate and forming a second dummy gate structure in a second region of the semiconductor substrate. A protective layer (e.g., oxide and/or silicon nitride hard mask) is formed on the... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140206163 - Electronic component, a semiconductor wafer and a method for producing an electronic component: An electronic component includes a semiconductor substrate defined by a generally planar first face, a generally planar second face and side faces extending between the generally planar second face and the generally planar first face. The semiconductor substrate has a curved contour between the generally planar second face and the... Agent: Infineon Technologies Ag
20140206162 - Manufacturing method of power mosfet using a hard mask as a stop layer between sequential cmp steps: A manufacturing method of a power MOSFET employs a hard mask film over a portion of the wafer surface as a polishing stopper, between two successive polishing steps. After embedded epitaxial growth is performed in a state where a hard mask film for forming trenches is present in at least... Agent: Renesas Electronics Corporation
20140206164 - Chemical mechanical polish in the growth of semiconductor regions: A method includes performing a first planarization step to remove portions of a semiconductor region over isolation regions. The first planarization step has a first selectivity, with the first selectivity being a ratio of a first removal rate of the semiconductor region to a second removal rate of the isolation... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140206165 - Self-aligned trench mosfet and method of manufacture: A trench metal-oxide-semiconductor field effect transistor (MOSFET), in accordance with one embodiment, includes a drain region, a plurality of gate regions disposed above the drain region, a plurality of gate insulator regions each disposed about a periphery of a respective one of the plurality of gate regions, a plurality of... Agent: Vishay-siliconix
20140206166 - Finfet device and method of manufacturing same: A semiconductor device and method for fabricating a semiconductor device is disclosed. An exemplary semiconductor device includes a substrate including a fin structure including one or more fins disposed on the substrate. The semiconductor device further includes a dielectric layer disposed on a central portion of the fin structure and... Agent: Taiwan Semiconductor Manufacturing Company Ltd.
20140206167 - Contact structure of semiconductor device: A method of fabricating a semiconductor device comprises epitaxially-growing a strained material in a cavity of a substrate comprising a major surface and the cavity, the cavity being below the major surface. A lattice constant of the strained material is different from a lattice constant of the substrate. The method... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140206168 - Methods for producing near zero channel length field drift ldmos: Adverse tradeoff between BVDSS and Rdson in LDMOS devices employing a drift space adjacent the drain, is avoided by providing a lightly doped region of a first conductivity type (CT) separating the first CT drift space from an opposite CT WELL region in which the first CT source is located,... Agent:
20140206169 - Methods of fabricating semiconductor device using nitridation of isolation layers: A method of forming a semiconductor device can include providing a plasma nitrided exposed top surface including an active region and an isolation region. The exposed top surface including the active region and the isolation region can be subjected to etching to form a deeper recess in the active region... Agent: Samsung Electronics Co., Ltd.
20140206170 - Method of fabricating mos device: Provided is a method of fabricating a MOS device including the following steps. At least one gate structure is formed on a substrate, wherein the gate structure includes a gate conductive layer and a hard mask layer disposed on the gate conductive layer. A first implant process is performed to... Agent: United Microelectronics Corp.
20140206171 - Memory cells, integrated devices, and methods of forming memory cells: Some embodiments include integrated devices, such as memory cells. The devices may include chalcogenide material, an electrically conductive material over the chalcogenide material, and a thermal sink between the electrically conductive material and the chalcogenide material. The thermal sink may be of a composition that includes an element in common... Agent: Micron Technology, Inc.
20140206172 - Alignment mark and method of manufacturing the same: An alignment mark includes a plurality of mark units. Each mark unit includes a first element and a plurality of second elements. Each second element includes opposite first and second end portions. The plurality of second elements are arranged along a direction. The first element extends adjacent to the first... Agent: Nanya Technology Corporation
20140206173 - Method for processing semiconductors using a combination of electron beam and optical lithography: Forming an alignment mark on a semiconductor structure using an optical lithography to form a metal alignment mark on a substrate of the structure, using the formed metal alignment mark to form a first feature of a semiconductor device being formed on the substrate using optical lithography, and using the... Agent: Raytheon Company
20140206174 - Method of making semiconductor device: A method for fabricating a semiconductor device includes the following steps. First, a semiconductor substrate is provided, and a first region, a second region and a third region are defined thereon. Then, a first well having a first conductive type is formed in the semiconductor substrate of the first region... Agent: United Microelectronics Corp.
20140206175 - Methods of forming semiconductor structures including bodies of semiconductor material: Semiconductor structures that include bodies of a semiconductor material spaced apart from an underlying substrate. The bodies may be physically separated from the substrate by at least one of a dielectric material, an open volume and a conductive material. The bodies may be electrically coupled by one or more conductive... Agent: Micron Technology, Inc.
20140206176 - Method for low temperature bonding and bonded structure: A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperature chemical bonding of materials such as silicon, silicon nitride and... Agent: Ziptronix, Inc.
20140206177 - Wafer processing method: A wafer processing method divides a wafer into individual devices along crossing streets formed on the front side of the wafer. The wafer has a substrate and a functional layer formed on the substrate, the individual devices being formed from the functional layer and partitioned by the streets. In a... Agent: Disco Corporation
20140206179 - Method and system for junction termination in gan materials using conductivity modulation: A semiconductor structure includes a GaN substrate having a first surface and a second surface opposing the first surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a first GaN epitaxial layer of the first conductivity type coupled... Agent: Avogy, Inc.
20140206178 - Method of laser separation of the epitaxial film or of the epitaxial film layer from the growth substrate of the epitaxial semiconductor structure (variations): The present invention proposes variations of the laser separation method allowing separating homoepitaxial films from the substrates made from the same crystalline material as the epitaxial film This new method of laser separation is based on using the selective doping of the substrate and epitaxial film with fine donor and... Agent:
20140206180 - Thin film formation method: A thin film formation method to form an amorphous silicon film containing an impurity on a surface of an object to be processed in a process chamber that allows vacuum exhaust includes supplying a silane-based gas composed of silicon and hydrogen into the process chamber in a state that the... Agent: Tokyo Electron Limited
20140206182 - Methods and devices for forming nanostructure monolayers and devices including such monolayers: Methods are provided for forming a nanostructure array. An example method includes providing a first layer, providing nanostructures dispersed in a solution comprising a liquid form of a spin-on-dielectric, wherein the nanostructures comprise a silsesquioxane ligand coating, disposing the solution on the first layer, whereby the nanostructures form a monolayer... Agent: Sandisk Corporation
20140206181 - Three dimensional fet devices having different device widths: A method of manufacturing a three dimensional FET device structure includes: providing a substrate having a semiconductor layer on an insulator layer; forming three dimensional fins in the semiconductor layer; applying a masking material to a first fin while exposing a second fin; applying a hydrogen atmosphere to the substrate... Agent: International Business Machines Corporation
20140206183 - Semiconductor constructions, methods of forming transistor gates, and methods of forming nand cell units: Some embodiments include methods of forming charge storage transistor gates and standard FET gates in which common processing is utilized for fabrication of at least some portions of the different types of gates. FET and charge storage transistor gate stacks may be formed. The gate stacks may each include a... Agent: Micron Technology, Inc.
20140206184 - Interposer having molded low cte dielectric: A method for making an interconnection component is disclosed, including forming a plurality of metal posts extending away from a reference surface. Each post is formed having a pair of opposed end surface and an edge surface extending therebetween. A dielectric layer is formed contacting the edge surfaces and filling... Agent: Tessera, Inc.
20140206185 - Ball placement in a photo-patterned template for fine pitch interconnect: A photo-patternable polymer film is deposited on a substrate, wherein the substrate includes metal pads. Ultraviolet light is transmitted through a photomask on the deposited photopatternable polymer film to generate cavities in Depositing a film on a substrate, wherein the substrate includes metal pads the deposited polymer film and expose... Agent:
20140206186 - Method of manufacturing a semiconductor device: A method of manufacturing a semiconductor device includes forming a plurality of conductive lines separated from one another in a first direction via a slender hole and extending in a second direction perpendicular to the first direction, forming a first insulation layer filling the slender hole between the plurality of... Agent: Samsung Electronics Co., Ltd.
20140206187 - Method for manufacturing semiconductor device: A method for manufacturing semiconductor device includes preparing a structure including a substrate, an insulating layer on the substrate and having a recess, a barrier film on the insulating layer, and a copper film on the barrier such that the copper film is filling the recess with the barrier between... Agent: Tokyo Electron Limited
20140206188 - Method of forming a metal silicide layer: A method for forming a metal silicide layer is disclosed. The method includes the steps of: forming a first metal layer with a thickness less than 10 nm on a silicon substrate; forming a second metal layer with a thickness more than 10 nm on the first metal layer; annealing... Agent: Industrial Technology Research Institute
20140206189 - Tin film forming method and storage medium: A TiN film forming method repeatedly performs for a plurality of substrates to be processed, a step of loading each substrate into a processing chamber, supplying a Ti-containing gas and a nitriding gas into the processing chamber, and forming a TiN film on a surface of the substrate by generating... Agent: Tokyo Electron Limited
20140206190 - Silicide formation in high-aspect ratio structures: Embodiments of the present invention include methods of forming a silicide layer on a semiconductor substrate. In an exemplary embodiment, a metal layer may first be deposited above a semiconductor substrate using a chemical vapor deposition process with a metal amidinate precursor and then the semiconductor substrate may be annealed,... Agent: International Business Machines Corporation
20140206191 - Etchant and etching process: A system and method for manufacturing semiconductor devices is provided. An embodiment comprises using an etchant to remove a portion of a substrate to form an opening with a 45° angle with a major surface of the substrate. The etchant comprises a base, a surfactant, and an oxidant. The oxidant... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140206193 - High resolution printing technique: A pattern having exceptionally small features is printed on a partially fabricated integrated circuit during integrated circuit fabrication. The pattern is printed using an array of probes, each probe having: 1) a photocatalytic nanodot at its tip; and 2) an individually controlled light source. The surface of the partially fabricated... Agent: Micron Technology, Inc.
20140206192 - Method for etching atomic layer of graphine: This present disclosure relates to an atomic layer etching method for graphene, including adsorbing reactive radicals onto a surface of the graphene and irradiating an energy source to the graphene on which the reactive radicals are adsorbed.... Agent: Research & Business Foundation Sungkyunkwan University
20140206194 - Method for manufacturing a semiconductor device: A method for manufacturing a semiconductor device includes forming an etch-target layer over a semiconductor substrate having a lower structure, forming a first mask pattern over the etch-target layer, forming a spacer material layer with a uniform thickness over the etch-target layer including the first mask pattern, forming a second... Agent: Sk Hynix Inc.
20140206195 - Process for removing carbon material from substrates: A method of removing carbon materials, preferably amorphous carbon, from a substrate includes dispensing a liquid sulfuric acid composition including sulfuric acid and/or its desiccating species and precursors and having a water/sulfuric acid molar ratio of no greater than 5:1 onto an material coated substrate in an amount effective to... Agent: Tel Fsi, Inc.
20140206196 - Dry etching method: There is provided according to the present invention a dry etching method for a laminated film, the laminated film being formed on a substrate and having a laminated structure in which silicon layers and insulating layers are laminated together with a hole or groove defined therein in a direction perpendicular... Agent: Central Glass Company, Limited
20140206197 - Method of fabricating fin fet and method of fabricating device: In fin FET fabrication, side walls of a semiconductor fin formed on a substrate have certain roughness. Using such fins having roughness may induce variations in characteristics between transistors due to their shapes or the like. An object of the present invention is to provide a fin FET fabrication method... Agent: Canon Anelva Corporation
20140206198 - Deposit removal method: One embodiment of the deposit removal method includes: preparing a substrate having a pattern on which a deposit is deposited, the pattern being formed by etching; exposing the substrate to a first atmosphere containing hydrogen fluoride gas; exposing the substrate to oxygen plasma while heating after the step of exposing... Agent: Tokyo Electron Limited
20140206199 - Etching method of multilayer film: In an etching method of a multilayer film including a first oxide film and a second oxide film, a high frequency power in etching an organic film is set to be higher than those in etching a first and second oxide films, and high frequency bias powers in the etching... Agent:
20140206200 - Process for increasing the hydrophilicity of silicon surfaces following hf treatment: A method for performing an oxide removal process is described. The method includes providing a substrate having an oxide layer, and preparing a patterned mask layer on the oxide layer, wherein the patterned mask layer has a pattern exposing at least a portion of the oxide layer. An HF treatment... Agent: Tel Fsi, Inc.
20140206201 - Hardmask surface treatment: Compositions suitable for forming oxymetal hardmask layers are provided. Methods of forming oxymetal hardmask layers using such compositions are also provided, where the surface of the oxymetal hardmask layer formed has a water contact angle substantially matched to that of subsequently applied organic coatings.... Agent: Rohm And Haas Electronic Materials LLC
20140206202 - Manufacturing method of semiconductor device and semiconductor manufacturing apparatus: A manufacturing method of a semiconductor device according to the present invention comprises cleaning a semiconductor substrate. A first chemical liquid for forming a water-repellent protection film and a second chemical liquid coating the first chemical liquid are supplied on a surface of the semiconductor substrate. Alternatively, the semiconductor substrate... Agent: Kabushiki Kaisha Toshiba
20140206203 - Methods of forming a poruous insulator, and related methods of forming semiconductor device structures: Semiconductor devices with porous insulative materials are disclosed. The porous insulative materials may include a consolidated material with voids dispersed therethrough. The voids may be defined by shells of microcapsules. The voids impart the dielectric materials with reduced dielectric constants and, thus, increased electrical insulation properties.... Agent: Micron Technology, Inc.
20140206204 - Substrate processing apparatus, method of manufacturing semiconductor device, and non-transitory computer-readable recording medium: Provided is a substrate processing apparatus including a reaction chamber configured to heat a substrate; a transfer chamber configured to transfer the heated substrate; a refrigerant flow path installed in the reaction chamber; a refrigerant flow path installed in the reaction chamber; a refrigerant supply unit installed in the refrigerant... Agent: Hitachi Kokusai Electric Inc.07/17/2014 > 75 patent applications in 56 patent subcategories.
20140199784 - Method and apparatus for making a semiconductor device: Disclosed is an apparatus and method for yield enhancement of making a semiconductor device. The apparatus for yield enhancement of making a semiconductor device comprises: a semiconductor device comprising an epitaxial layer in which a defect is included, and a photo-resistor on the epitaxial layer and covering the defect; an... Agent: Epistar Corporation
20140199788 - Floating substrate monitoring and control device, and method for the same: Disclosed is a process tunnel (102) through which substrates (140) may be transported in a floating condition between two gas bearings (124, 134). To monitor the transport of the substrates through the process tunnel, the upper and lower walls (120, 130) of the tunnel are fitted with at least one... Agent: Levitech B.v.
20140199785 - Multizone control of lamps in a conical lamphead using pyrometers: A method and apparatus for processing a semiconductor substrate is described. The apparatus is a process chamber having an optically transparent upper dome and lower dome. Vacuum is maintained in the process chamber during processing. The upper dome is thermally controlled by flowing a thermal control fluid along the upper... Agent:
20140199786 - Rapid conductive cooling using a secondary process plane: In one embodiment, a substrate processing apparatus includes a chamber having an interior volume with an upper portion and a lower portion, a cooling source disposed in the upper portion of the interior volume, a heating source opposing the cooling source, a magnetically movable substrate support that moves between the... Agent: Applied Materials, Inc.
20140199787 - Semiconductor mask blanks with a compatible stop layer: Provided is a method for creating a mask blank that includes a stop layer. The stop layer is optically compatible and process compatible with other layers included as part of the mask blanks. Such blanks may include EUV, phase-shifting, or OMOG masks. The stop layer includes molybdenum, silicon, and nitride... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140199789 - Fabricating method of customized mask and fabricating method of semiconductor device using customized mask: A fabricating method of a customized mask includes forming first patterns in a mold structure, forming second patterns in the mold structure using initial masks, the mold structure having the first patterns formed therein, measuring overlap failure between the first patterns and the second patterns, and fabricating customized masks by... Agent:
20140199790 - Resin coating device, and resin coating method: A translucent member 41 that has been trial-coated with a resin 8 for measurement of a light emission characteristic is placed on a translucent member placement portion 53, an excitation light that excites a phosphor is emitted from a light source unit 42 disposed above, the resin 8 coated on... Agent: Panasonic Corporation
20140199791 - Method and system for universal target based inspection and metrology: Universal target based inspection drive metrology includes designing a plurality of universal metrology targets measurable with an inspection tool and measurable with a metrology tool, identifying a plurality of inspectable features within at least one die of a wafer using design data, disposing the plurality of universal targets within the... Agent: Kla-tencor Corporation
20140199792 - Defect pattern evaluation method, defect pattern evaluation apparatus, and recording media: According to a defect pattern evaluation method of an embodiment, defects are detected by performing optical defect inspection on a pattern on a substrate. Then, the defects are classified according to a type of a pattern layout using a pattern layout corresponding to coordinates of the defects. Further, a computer... Agent: Kabushiki Kaisha Toshiba
20140199793 - Semiconductor device and a method of manufacturing the same: A semiconductor device is manufactured by forming at least one epitaxial structure over a substrate. A portion of the substrate is cut and lifted to expose a partial surface of the epitaxial structure. A first electrode is then formed on the exposed partial surface to result in a vertical semiconductor... Agent: Phostek Inc.
20140199794 - Organic light emitting diode display and method for manufacturing the same: An organic light emitting diode (OLED) display and a manufacturing method thereof, the OLED display includes: a substrate main body; a polycrystalline silicon layer pattern including a polycrystalline active layer formed on the substrate main body and a first capacitor electrode; a gate insulating layer pattern formed on the polycrystalline... Agent: Samsung Display Co., Ltd.
20140199795 - Sealing member, sealing method, and method for producing optical semiconductor device: A sealing member includes an elongated releasing film, and a plurality of sealing resin layers composed of a sealing resin, the plurality of sealing resin layers being laminated on the releasing film so that the plurality of sealing resin layers are arranged in a row along the longitudinal direction of... Agent: Nitto Denko Corporation
20140199796 - Semiconductor light emitting device and method of manufacturing the same: A method of manufacturing a semiconductor light emitting device includes forming a plurality of semiconductor light emitting devices on a substrate, the semiconductor light emitting devices having at least one electrode pad formed on upper surfaces thereof; forming a conductive bump by forming a bump core on the electrode pad... Agent: Samsung Electronics Co., Ltd.
20140199797 - Organic light-emitting display and method of manufacturing the same: An organic light-emitting display and a method of manufacturing the organic light-emitting display are disclosed. In one embodiment, the organic light-emitting display includes: i) a pixel electrode disposed on a substrate, ii) an opposite electrode disposed opposite to the pixel electrode, iii) an organic emission layer disposed between the pixel... Agent: Samsung Display Co., Ltd.
20140199798 - Quantum cascade laser manufacturing method: A quantum cascade laser manufacturing method includes: a step of pressing a mother stamper against a resin film having flexibility to make a resin stamper 201 having a second groove pattern P2; a step of making a wafer with an active layer formed on a semiconductor substrate; a step of... Agent: Hamamatsu Photonics K.k.
20140199799 - Method and structure for adding mass with stress isolation to mems structures: A method and structure for adding mass with stress isolation to MEMS. The structure has a thickness of silicon material coupled to at least one flexible element. The thickness of silicon material can be configured to move in one or more spatial directions about the flexible element(s) according to a... Agent: Mcube Inc.
20140199800 - Luminescent materials that emit light in the visible range or the near infrared range and methods of forming thereof: Luminescent materials and methods of forming such materials are described herein. A method of forming a luminescent material includes: (1) providing a source of A and X, wherein A is selected from at least one of elements of Group 1, and X is selected from at least one of elements... Agent: Omnipv, Inc.
20140199801 - Manufacturing method of solid-state imaging apparatus: A color filter 5 is formed above a semiconductor substrate SB, in an area above a predetermined light receiving portion among a plurality of light receiving portions 1. A sacrificial layer 8 is formed on upper and side of the first color filter 5. Color filters 6 and 7 are... Agent: Canon Kabushiki Kaisha
20140199802 - Manufacturing method of solid-state imaging apparatus: To realize simplification of a process of forming hollow portions in a solid-state imaging apparatus, a plurality of light receiving portions is formed on a semiconductor substrate, and color filter layers as hollow portion forming layers are formed above the semiconductor substrate (FIG. 1A). A sealable layer for opening boundary... Agent: Canon Kabushiki Kaisha
20140199804 - Semiconductor device having a bonding pad and shield structure and method of manufacturing the same: A method of fabricating a semiconductor device includes providing a device substrate having a front side and a back side corresponding to a front side and a back side of the semiconductor device, forming, on the front side of the device substrate, a metal feature, forming, on the back side... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140199803 - Solid state image pickup apparatus and method for manufacturing the same: When forming a hollow portion between each color filter, in order to realize the formation of the hollow portions with a narrower width, a plurality of light receiving portions are formed on the upper surface of a semiconductor substrate, a plurality of color filters corresponding to each of the light... Agent: Canon Kabushiki Kaisha
20140199806 - Dielectric structures in solar cells: A dielectric, structure and a method of forming a dielectric structure for a rear surface of a silicon solar cell are provided. The method comprises forming a first dielectric layer over the rear surface of the silicon solar cell, and then depositing a layer of metal such as aluminum over... Agent:
20140199805 - Tio2 aerogel-based photovoltaic electrodes and solar cells: A photoelectrode is disclosed having a conductive lead and a titania aerogel in electrical contact with the lead. The aerogel is coated with a photosensitive dye. The photoelectrode may be made by forming a film of a titania aerogel paste on a conductive substrate and coating the film with a... Agent: The Government Of The United States Of America, As Represented By The Secretary Of The Navy
20140199808 - Deposition mask, producing method therefor and forming method for thin film pattern: A deposition mask for forming a thin film pattern having a predetermined shape on a substrate by deposition, includes a resin film that transmits visible light and has an opening pattern penetrating through the resin film and having the same shape and dimension as those of the thin film pattern... Agent: V Technology Co., Ltd.
20140199807 - Thin film transistors formed by organic semiconductors using a hybrid patterning regime: The present disclosure describes a process strategy for forming bottom gate/bottom contact organic TFTs in CMOS technology by using a hybrid deposition/patterning regime. To this end, gate electrodes, gate dielectric materials and drain and source electrodes are formed on the basis of lithography processes, while the organic semiconductor materials are... Agent: Stmicroelectronics S.r.l.
20140199809 - Semiconductor device and manufacturing method thereof: An object is to reduce to reduce variation in threshold voltage to stabilize electric characteristics of thin film transistors each using an oxide semiconductor layer. An object is to reduce an off current. The thin film transistor using an oxide semiconductor layer is formed by stacking an oxide semiconductor layer... Agent: Semiconductor Energy Laboratory Co., Ltd.
20140199810 - Methods for forming semiconductor devices using sacrificial layers: A fabricating method for a semiconductor device is provided. The fabricating method includes providing a first wafer, forming a sacrificial layer on the first wafer, forming a release layer on the sacrificial layer, forming an adhesive layer on the release layer, and placing a second wafer on the adhesive layer... Agent: Samsung Electronics Co., Ltd.
20140199811 - Stackable microelectronic package structures: A microelectronic assembly includes a first microelectronic package having a substrate with first and second opposed surfaces and substrate contacts thereon. The first package further includes first and second microelectronic elements, each having element contacts electrically connected with the substrate contacts and being spaced apart from one another on the... Agent: Invensas Corporation
20140199812 - Bump structural designs to minimize package defects: A method of forming a chip package includes providing a chip with a plurality of first copper post bumps having a first height of copper post. The method also includes providing a substrate with a plurality of second copper post bumps having a second height of copper post. The method... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140199813 - Transistor with longitudinal strain in channel induced by buried stressor relaxed by implantation: Processes for making field effect transistors relax a buried stressor layer to induce strain in a silicon surface layer above the buried stressor layer. The buried stressor layer is relaxed and the surface layer is strained by implantation into at least the buried stressor layer, preferably on both sides of... Agent: Acorn Technologies, Inc.
20140199816 - Method of fabricating a super junction transistor: A method of fabricating a super junction transistor is provided. A drain substrate is provided. An epitaxial layer is formed on the drain substrate. A plurality of trenches is formed in the epitaxial layer. A buffer layer is formed and is in direct contact with the interior surface of the... Agent: Anpec Electronics Corporation
20140199814 - Method of manufacture for a semiconductor device: A method of manufacturing a semiconductor device includes providing a semiconductor layer of a first conductivity type and forming a semiconductor layer of a second conductivity type thereon. The method also includes forming an insulator layer on the semiconductor layer of the second conductivity type, etching a trench into at... Agent: Maxpower Semiconductor, Inc.
20140199815 - Methods of manufacturing a semiconductor device: A method of manufacturing a vertical type memory device includes stacking a first lower insulating layer, one layer of a lower sacrificial layer and a second lower insulating layer on a substrate, forming a stacking structure by stacking sacrificial layers and insulating layers, and etching an edge portion of the... Agent:
20140199817 - Method for manufacturing multi-gate transistor device: A method for manufacturing multi-gate transistor device includes providing a semiconductor substrate having a patterned semiconductor layer, a gate dielectric layer and a gate layer sequentially formed thereon, forming a multiple insulating layer sequentially having a first insulating layer and a second insulating layer and covering the patterned semiconductor layer... Agent: United Microelectronics Corp.
20140199818 - Method for fabricating an esd protection device: A method for fabricating an ESD protection device . Agate electrode of a core device is formed in a non I/O region and a gate electrode of an ESD protection device is formed in a I/O region. A first photoresist film masks the I/O region and reveals the non I/O... Agent: Mediatek Inc.
20140199819 - Method of fabricating capacitor structure: A method of fabricating a capacitor structure includes the following steps. Firstly, a substrate is provided. A first conductive layer, a first insulation layer, a second conductive layer and a second insulation layer are sequentially formed over the substrate. A hard mask material layer is formed on the second insulation... Agent: United Microelectronics Corporation
20140199820 - Methods of forming a pattern and methods of manufacturing a semiconductor device using the same: A method of forming a pattern includes forming an underlayer on an etching target layer by a chemical vapor deposition (CVD) process, the underlayer including a silicon compound combined with a photoacid generator (PAG), forming a photoresist layer on the underlayer, irradiating extreme ultraviolet (EUV) light on the photoresist layer... Agent: Samsung Electronics Co., Ltd.
20140199821 - Variable-resistance material memories and methods: Variable-resistance memory material cells are contacted by vertical bottom spacer electrodes. Variable-resistance material memory spacer cells are contacted along the edge by electrodes. Processes include the formation of the bottom spacer electrodes as well as the variable-resistance material memory spacer cells. Devices include the variable-resistance memory cells.... Agent: Micron Technology, Inc.
20140199822 - Methods of forming semiconductor device structures including an insulative material on a semiconductive material, and related semiconductor device structures and semiconductor devices: A method of forming a semiconductor device structure. The method comprises forming an insulative material on a semiconductive material, and microwave annealing at least an interface between the insulative material and the semiconductive material. Additional methods of forming a semiconductor device structure, and related semiconductor device structures and a semiconductor... Agent: Micron Technology, Inc.
20140199823 - Method for manufacturing semiconductor device: An SOT substrate (6), in which a silicon layer (5) is provided on a silicon substrate (3) via a silicon oxide film (4), is formed. Next, a plurality of semiconductor elements (8) is formed on a surface of the silicon layer (5). Next, wiring (11) is formed on a surface... Agent: Mitsubishi Electric Corporation
20140199824 - Method and apparatus for forming silicon film: A method of forming a silicon film in grooves formed on a surface of an object to be processed, the method including forming a first silicon film containing impurities so as to embed the first silicon film in the grooves of the object to be processed; doping the impurities in... Agent: Tokyo Electron Limited
20140199825 - Silicon-germanium heterojunction tunnel field effect transistor and preparation method thereof: A silicon/germanium (SiGe) heterojunction Tunnel Field Effect Transistor (TFET) and a preparation method thereof are provided, in which a source region of a device is manufactured on a silicon germanium (SiGe) or Ge region, and a drain region of the device is manufactured in a Si region, thereby obtaining a... Agent: Shanghai Institute Of Microsystem And Information Technology, Chinese Academy Of Sciences
20140199826 - Manufacturing method for semiconductor device: A manufacturing method for a semiconductor device includes introducing an impurity into a SiC substrate, forming a mixed material layer, which is made from a resin and a fibrous carbon material, on a surface of the SiC material into which the impurity is introduced, performing heat treatment of the SiC... Agent: Toyota Jidosha Kabushiki Kaisha
20140199827 - Device and methods for small trench patterning: A semiconductor device and methods for small trench patterning are disclosed. The device includes a plurality of gate structures and sidewall spacers, and an etch buffer layer disposed over the sidewall spacers. The etch buffer layer includes an overhang component disposed on the upper portion of the sidewall spacers with... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.
20140199828 - Scaled equivalent oxide thickness for field effect transistor devices: A field effect transistor device includes a first gate stack portion including a dielectric layer disposed on a substrate, a first TiN layer disposed on the dielectric layer, a metallic layer disposed on the dielectric layer, and a second TiN layer disposed on the metallic layer, a first source region... Agent: International Business Machines Corporation
20140199829 - Graphene patterning method and patterning member: A graphene patterning method for forming a graphene of predetermined pattern includes bringing a patterning member in which a catalyst metal layer of the predetermined pattern is formed into contact with a substrate having a graphene oxide film. In bringing the patterning member, the catalyst metal layer is brought into... Agent: Tokyo Electron Limited
20140199830 - Chip package and method for forming the same: According to an embodiment of the invention, a chip package is provided. The chip package includes: a substrate having an upper surface and a lower surface; a plurality of conducting pads located under the lower surface of the substrate; a dielectric layer located between the conducting pads; a trench extending... Agent: Xintec Inc.
20140199831 - Semiconductor device and a method of manufacturing the same: For simplifying the dual-damascene formation steps of a multilevel Cu interconnect, a formation step of an antireflective film below a photoresist film is omitted. Described specifically, an interlayer insulating film is dry etched with a photoresist film formed thereover as a mask, and interconnect trenches are formed by terminating etching... Agent: Renesas Electronics Corporation
20140199833 - Methods for performing a via reveal etching process for forming through-silicon vias in a substrate: The present disclosure provides methods for via reveal etching process to form through-silicon vias (TSVs) in a substrate. In one embodiment, a method for performing a via reveal process to form through-silicon vias in a substrate includes providing a substrate having partial through-silicon vias formed from a first surface of... Agent: Applied Materials, Inc.
20140199832 - Titanium oxynitride hard mask for lithographic patterning: A vertical stack including a dielectric hard mask layer and a titanium nitride layer is formed over an interconnect-level dielectric material layer such as an organosilicate glass layer. The titanium nitride layer may be partially or fully converted into a titanium oxynitride layer, which is subsequently patterned with a first... Agent: International Business Machines Corporation
20140199834 - Hybrid conductor through-silicon-via for power distribution and signal transmission: A method of providing signal, power and ground through a through-silicon-via (TSV), and an integrated circuit chip having a TSV that simultaneously provides signal, power and ground. In one embodiment, the method comprises forming a TSV through a semiconductor substrate, including forming a via in the substrate; and forming a... Agent: International Business Machines Corporation
20140199835 - Chip package and method for forming the same: According to an embodiment of the invention, a chip package is provided. The chip package includes: a substrate having an upper surface and a lower surface; a plurality of conducting pads located under the lower surface of the substrate; a dielectric layer located between the conducting pads; a trench extending... Agent: Xintec Inc.
20140199836 - Method for forming interlevel dielectric (ild) layer: A method for forming an interlevel dielectric (ILD) layer includes the following steps. A MOS transistor on a substrate is provided. A first undoped oxide layer is deposited to cover the substrate and the MOS transistor. The first undoped oxide layer is planarized. A phosphorus containing oxide layer is deposited... Agent: United Microelectronics Corp.
20140199837 - Method of forming semiconductor structure having contact plug: A method of forming a semiconductor structure having at least a contact plug includes the following steps. At first, at least a transistor and an inter-layer dielectric (ILD) layer are formed on a substrate, and the transistor includes a gate structure and two source/drain regions. Subsequently, a cap layer is... Agent: United Microelectronics Corp.
20140199838 - Semiconductor device and method of forming through-silicon-via with sacrificial layer: A semiconductor device can be formed by first providing a semiconductor wafer, and forming a conductive via into the semiconductor wafer. A portion of the semiconductor wafer can be removed so that the conductive via extends above a surface of the semiconductor wafer. A first insulating layer can be formed... Agent: Stats Chippac, Ltd.
20140199839 - Film-forming method for forming silicon oxide film on tungsten film or tungsten oxide film: A film-forming method includes forming a tungsten film or a tungsten oxide film on an object to be processed, heating the object on which the tungsten film or the tungsten oxide film is formed, forming a seed layer on the tungsten film or the tungsten oxide film by supplying an... Agent: Tokyo Electron Limited
20140199840 - Chemical mechanical polishing apparatus and methods: In one aspect, a substrate polishing apparatus is disclosed. The apparatus has a polishing platform having two or more zones, each zone adapted to contain a different slurry component. In another aspect, a substrate polishing system is provided having a holder to hold a substrate, a polishing platform having a... Agent:
20140199842 - Chemical mechanical polishing process and slurry containing silicon nanoparticles: In one aspect, a substrate chemical mechanical polishing (CMP) method for substrates is disclosed. The CMP method includes providing a substrate having a surface of silicon and copper such as through silicon via regions containing copper, and polishing the surface with a slurry containing very small silicon nanoparticles (e.g., having... Agent:
20140199841 - Process for the manufacture of semiconductor devices comprising the chemical mechanical polishing of elemental germanium and/or si1-xgex material in the presence of a cmp composition having a ph value of 3.0 to 5.5: A process for the manufacture of semiconductor devices comprising the chemical mechanical polishing of elemental germanium and/or Si1-xGex material with 0.1≦x<1 in the presence of a chemical mechanical polishing (CMP) composition having a pH value in the range of from 3.0 to 5.5 and comprising: (A) inorganic particles, organic particles,... Agent: Basf Se
20140199844 - Array description system for large patterns: A method for describing an array of elements includes the steps of providing an array description system that includes a library of possible alternative designations; and describing the array of elements using at least one of the alternative designations. The library of possible alternative designations includes one or more of... Agent:
20140199843 - Pattern forming method and article manufacturing method: Provided is a method for forming a pattern on a layer on a substrate. The method includes forming a line-and-space pattern on the layer; coating a resist on the line-and-space pattern and filling the resist in a space portion of the line-and-space pattern; exposing a pattern to the resist, developing... Agent:
20140199845 - Selective removal of gate structure sidewall(s) to facilitate sidewall spacer protection: Methods are provided for facilitating fabricating a semiconductor device by selectively etching a gate structure sidewall(s) to facilitate subsequent sidewall spacer isolation. The method includes, for instance: providing a gate structure with a protective layer(s) over the gate structure, the gate structure including one or more sidewalls; selectively removing a... Agent: Globalfoundries, Inc.
20140199846 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device is disclosed. The method may comprise: etching a plurality of first openings in an interlayer dielectric layer on a substrate; forming an opening modifying layer in the plurality of first openings; and etching the opening modifying layer until the substrate is exposed, resulting... Agent:
20140199847 - Semiconductor device manufacturing method: According to one embodiment, a semiconductor device manufacturing method includes depositing a silicon film above a semiconductor substrate, forming an insulating film which includes silicon oxide or silicon nitride on the silicon film, forming a physical guide having a depressed portion above the insulating film, forming a directed self-assembly material... Agent: Kabushiki Kaisha Toshiba
20140199848 - Electron beam plasma chamber: A method and apparatus for tailoring the formation of active species using one or more electron beams to improve gap-fill during an integrated circuit formation process is disclosed herein. The energy of the electron beams may be decreased to maximize electrons leading to radicals or increased to maximize electrons leading... Agent: Applied Materials, Inc.
20140199849 - Polysilicon over-etch using hydrogen diluted plasma for three-dimensional gate etch: Methods of polysilicon over-etch using hydrogen diluted plasma for three-dimensional gate etch are described. In an example, a method of forming a three-dimensional gate structure includes performing a main plasma etch on a masked polysilicon layer formed over a semiconductor fin. The method also includes, subsequently, performing a plasma over... Agent: Applied Materials, Inc.
20140199850 - Dry-etch for selective oxidation removal: Methods of selectively etching tungsten oxide relative to tungsten, silicon oxide, silicon nitride and/or titanium nitride are described. The methods include a remote plasma etch formed from a fluorine-containing precursor and/or hydrogen (H2). Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents... Agent: Applied Materials, Inc.
20140199851 - Method of patterning a silicon nitride dielectric film: Methods of patterning silicon nitride dielectric films are described. For example, a method of isotropically etching a dielectric film involves partially modifying exposed regions of a silicon nitride layer with an oxygen-based plasma process to provide a modified portion and an unmodified portion of the silicon nitride layer. The method... Agent: Applied Materials, Inc.
20140199852 - Pattern forming method: A pattern forming method is provided for forming a pattern of a multilayer film including insulative films and electrically conductive films stacked together and having a hole formed therein on a substrate with the electrically conductive film being selectively accurately indented from an inner peripheral surface of the hole. The... Agent:
20140199853 - Method of forming silicon oxide film: A method of forming a silicon oxide film includes forming a silicon film on a base, the base being a surface to be processed of an object to be processed, and forming a silicon oxide film on the base by oxidizing the silicon film. Between the forming a silicon film... Agent: Tokyo Electron Limited
20140199854 - Method of forming film on different surfaces: A method of forming a film is provided. The method includes at least the following steps. A first substrate and a second substrate are provided in a batch processing system, wherein a first surface of the first substrate is adjacent to a second surface of the second substrate, the first... Agent: United Microelectronics Corp.
20140199855 - Method for making a carbon nanotube film: A method for making a carbon nanotube film includes the steps of: (a) adding a plurality of carbon nanotubes to a solvent to create a carbon nanotube floccule structure in the solvent; (b) separating the carbon nanotube floccule structure from the solvent; and (c) shaping the separated carbon nanotube floccule... Agent: Tsinghua University
20140199857 - Method of controlling silicon oxide film thickness: A deposition process for coating a substrate with films of varying thickness on a substrate can be achieve. The thickness of the film deposition can be controlled by the separation between the substrate and a curtain. Different separation distances between the substrate and curtain in the same chemical bath will... Agent: Natcore Technology, Inc.
20140199856 - Method of depositing a film and film deposition apparatus: A method of depositing a film including carrying substrates in plural substrate mounting portions formed on a turntable in a peripheral direction by intermittently rotating the turntable, arranging the plural substrate mounting portions in a carry-in and carry-out area, and sequentially mounting the substrates on the substrate mounting portions, depositing... Agent: Tokyo Electron Limited
20140199858 - Thermal processing by transmission of mid infra-red laser light through semiconductor substrate: Thermal processing is performed by transmission of mid infra-red laser light through a substrate such as a semiconductor substrate with a limited mid infra-red transmission range. The laser light is generated by a rare-earth-doped fiber laser and is directed through the substrate such that the transmitted power is capable of... Agent: Ipg Photonics CorporationPrevious industry: Chemistry: analytical and immunological testing
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