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Coded data generation or conversion

Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application.
09/25/2014 > 6 patent applications in 6 patent subcategories.

20140285365 - Method and device for managing a key matrix, corresponding computer program product and storage device: A method for managing, by device, a matrix of keys, including at least one line and at least two columns, each key making short circuiting a line and a column when pressed. The method includes a sweeping phase, including, for each line: writing a predetermined logic value in the line;... Agent:

20140285366 - Method and system for fingerline (phalange) mapping to an input device of a computing device: A method and system for mapping characters of an input device of a computing device to fingerline positions of a user. The method includes embedding at least one character corresponding to the input device of the computing device to a fingerline position, The method also includes registering a character corresponding... Agent: Unisys Corporation

20140285367 - Current compensation circuit: A first circuit operates in synchronization with a first clock having a first frequency, and generates N parallel data sets for every cycle period of the first clock. An interface circuit time-division multiplexes the N data sets received from the first circuit. A second circuit processes the N data set... Agent: Advantest Corporation

20140285368 - Analog-to-digital converter: A continuous-time ΔΣ-ADC (1) is disclosed, comprising a sampled quantizer (5) arranged to generate samples y(n) of a digital output signal of the ΔΣ-ADC (1) at sample instants nT. The ΔΣ-ADC (1) further comprises two or more DACs (10a-b), each arranged to generate an analog feedback signal based on the... Agent:

20140285369 - Multiple string digital to analog converter comprising a control circuit: A multi-string DAC is described and comprises at least two DAC stages. Each DAC stage comprises a string of impedance elements and a switching network. A control loop is provided to control the Ron of the switching network and provide code dependent control of switches in a DAC switching network.... Agent: Analog Devices Technology

20140285370 - Successive approximation ad converter and noise generator: In a successive approximation AD converter, a noise generator outputs the output of a ΔΣ modulator as a noise signal. A selector circuit can output the noise signal, in place of a digital signal for generating a comparison-target voltage for the next bit, to a capacitor element of a capacitance... Agent:

09/18/2014 > 37 patent applications in 18 patent subcategories.
09/11/2014 > 24 patent applications in 9 patent subcategories.

20140253349 - Window-enabled time-to-digital converter and method of detecting phase of a reference signal: A window-enabled TDC and method of detecting phase of a reference signal. One embodiment of the window-enabled TDC includes: (1) a window generator configured to receive a reference signal and a clock signal, and (2) a TDC circuit coupled to the window generator and configured to be enabled based on... Agent: Nvidia Corporation

20140253350 - Digital/analog converter circuit: The digital/analog converter circuit includes a digital/analog converting unit that receives a digital signal and outputs an output current to an output terminal in response to the digital signal. The digital/analog converter circuit includes an error current detecting unit that outputs a detection signal to the digital/analog converting unit, the... Agent: Kabushiki Kaisha Toshiba

20140253352 - Semiconductor integrated circuit device: A digital-correction-type A/D converter which is a charge sharing type and performing successive approximation is realized in a small area. The A/D converter is configured with an A/D conversion unit which is a charge sharing type and performing successive approximation, a digital correction unit which receives a digital output of... Agent: Renesas Electronics Corporation

20140253351 - Successive-approximation-register (sar) analog-to-digital converter (adc) attenuation capacitor calibration method and apparatus: A fixed capacitor is coupled between a top plate of an attenuation capacitor and a variable voltage reference. The error in the attenuation capacitor may be calibrated out with the variable voltage reference and the fixed correction capacitor. The variable voltage reference varies the charge on the attenuation capacitor and... Agent:

20140253353 - Apparatus and method for reducing sampling circuit timing mismatch: An example apparatus, system, and method for sampling in an interleaved sampling circuit having multiple channels. In an embodiment, an input clock is used to synchronize the transitions of sampling clocks from a first to second voltage level, relative to one another. The sampling clocks are input to a sampling... Agent: Analog Devices, Inc.

20140253355 - 4n+1 level capacitive dac using n capacitors: A digital-to analog converter (DAC) of the charge transfer type for use in a sigma delta modulator, includes a capacitor switch unit operable to generate a 4n+1 output levels, comprising: a plurality of second switching units for coupling first terminals of a plurality of reference capacitor pairs with either a... Agent:

20140253354 - Multi-level capacitive dac: A digital-to analog converter (DAC) of the charge transfer type can be used in a sigma delta modulator for generating N output levels, wherein an output level is defined by a respective amount of charge transferred by the DAC. The DAC has a first capacitor switch unit receiving a reference... Agent:

20140253356 - Digital-to-analogue converter: The invention relates to digital-to-analog converters for converting current. The converter includes a pair of differential branches with two transistors controlled by a digital register activated at a clock frequency, and two resistive loads receiving the currents of the differential branches to produce a differential electrical signal representing the analog... Agent: E2v Semiconductors

20140253357 - Low glitch-noise dac: An N-bit digital-to-analog converter (DAC) includes N input stages each of which generates the same amount of current and includes a pair of similarly sized transistor switches responsive to differential bits. The 2M−1 input stages associated with the M most significant bits of the DAC are connected in parallel and... Agent: Qualcomm Incorporated

20140253358 - Analog to digital conversion with pulse train data communication: A methodology for capturing analog information, such as from an analog sensor, including converting the analog information to a train of pulses, representing the analog information as the number of pulses in the pulse train. This pulse count data can be communicated to a processor configured to count the pulses... Agent:

20140253359 - Balanced signal processing circuit and analog-digital conversion circuit: A balanced signal processing circuit includes: a comparator; a first capacitor having a first end connected to a non-inverting input terminal of the comparator; a second capacitor having a first end connected to an inverting input terminal of the comparator; a first switch configured to apply a voltage signal to... Agent: Sony Corporation

20140253360 - Low power transmitter for remote control: A transmitter for remote control includes a first analog-to-digital converter (ADC) to receive a first audio signal from a electronic device and convert the first audio signal to a first direct-current (DC) signal, a first boost circuit connected to the first ADC to receive and amplify the first DC signal,... Agent: Favepc Inc.

09/04/2014 > 14 patent applications in 8 patent subcategories.

20140247165 - Method and system for de-binarization: A method for generating a decoded value from a codeword which is binarized utilizing a concatenated unary/k-th order Exp-Golomb code includes: identifying a first portion of the codeword, a second portion of the codeword and a third portion of the codeword; generating an offset according to the second portion; decoding... Agent: Mediatek Inc.

20140247166 - Hierarchical coding: A binary allocation in a hierarchical coding/decoding comprising a coding/decoding of a digital signal enhancement layer. The signal comprises a succession of L samples, each sample being represented by a mantissa and an exponent. The method comprises the allocation of a predetermined number Nb of enhancement bits to a part... Agent:

20140247167 - Encoder apparatus, decoder apparatus and method: An encoder encodes data to generate corresponding encoded data. The encoder includes a data processing arrangement for applying one or more encoding processes to the data to generate the encoded data. The data processing arrangement is operable to represent the data at least partially in a set of numerical value... Agent: Gurulogic Microsystems Oy

20140247168 - Encoder, decoder and method: There is provided an encoder and decoder for encoding and decoding input data (D1, D2 or D3) to generate corresponding encoded output data (D2 or D3, D5). The encoder includes a data processing arrangement, optionally for analyzing a range of values present in the input data (D1) to determine at... Agent: Gurulogic Microsystems Oy

20140247169 - Multi-level sigma-delta adc with reduced quantization levels: A multi-level sigma-delta Analog to Digital converter provides multi-level outputs using a quantizer with reduced quantization levels. The converter comprises a direct path comprising a computation block, an analog integrator and the quantizer with reduced quantization levels. Further, the converter comprises a feedback path arranged to provide to the computation... Agent: St-ericsson Sa

20140247172 - Asynchronous sampling using a dynamically adustable snapback range: A snapout calculator, and wherein the snapout calculator determines where the reference levels for the various comparators shall be placed after each asynchronous sample is generated.... Agent:

20140247171 - Asynchronous sampling using dynamically configurable voltage polling levels: A method, comprising: receiving an analog input; determining an upper outer rail and a lower outer rail as polling values to be used by voltage comparators; blanking at least three comparators; determining which two of the at least three comparators are closest to the input analog voltage levels; defining the... Agent:

20140247173 - Asynchronous to synchronous sampling using akima algorithm: A method, comprising: selecting three Two-Tuples before and three after a selected synchronous ADC conversion point; calculating the coefficients of a third order polynomial based on the value of the previous time asynchronous sample, the time difference between the asynchronous samples surrounding the selected sample, and the five linear slopes... Agent:

20140247175 - Asynchronous to synchronous sampling using an augmented least squares solver: A method, comprising: receiving a plurality of 2-tuples of asynchronously sampled inputs at an asynchronous to synchronous reconstructor; performing a coarse asynchronous to synchronous conversion using the plurality of 2-tuples to generate a plurality of low precision synchronous outputs; generating a high precision synchronous output, z0, using a plurality of... Agent: Texas Instruments Incorporated

20140247174 - Asynchronous to synchronous sampling using modified akima algorithm: A method, comprising: selecting two Two-Tuples before and two after a selected synchronous ADC conversion point; calculating the coefficients of a third order polynomial based on the value of the previous time asynchronous sample, the time differences between each of the asynchronous samples surrounding the selected sample, and the three... Agent:

20140247176 - Extension of adc dynamic range using post-processing logic: An apparatus, comprising: an analog to digital converter including: a clipping detector; and a post-processor, wherein the post processor generates synchronous values of clipped data based on non-clipped values of non-clipped data.... Agent:

20140247170 - Method and apparatus for closed loop control of supply and/or comparator common mode voltage in a successive approximation register analog to digital converter: A method and apparatus for controlling supply voltage for a successive approximation register analog to digital converter and comparator common mode voltage. The method comprises: measuring a successive approximation register conversion time; comparing the successive approximation register conversion time with a desired conversion time; and if necessary, performing a closed... Agent: Qualcomm Incorporated

20140247177 - Data conversion with redundant split-capacitor arrangement: Representative implementations of devices and techniques provide analog to digital conversion of time-discrete analog inputs. A redundant split-capacitor arrangement using a successive approximation technique can provide a fast and power efficient ADC. For example, a successive approximation capacitor arrangement may include multiple arrays with non-binary bit weights.... Agent: Infineon Technologies Ag

20140247178 - Codeset communication format and related methods and structures: A codeset is described in a Public Codeset Communication Format (PCCF) as a format block including a plurality of fields having readily decipherable values, such as ASCII character values. One field is a mark/space information field that includes a sequence of mark time indicators and space time indicators for an... Agent: Universal Electronics Inc.

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