Miscellaneous active electrical nonlinear devices, circuits, and systems patents - Monitor Patents
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Miscellaneous active electrical nonlinear devices, circuits, and systems

Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application.
09/18/2014 > 114 patent applications in 73 patent subcategories.

20140266307 - Circuit and method to extend a signal comparison voltage range: A circuit to a extend signal comparison voltage range includes a latching circuit and a comparator responsive to common-mode input signals. The comparator is coupled to the latching circuit and to a dynamic node. The circuit also includes a clocked boost circuit coupled to the dynamic node. The clocked boost... Agent: Qualcomm Incorporated

20140266306 - High speed dynamic latch: Embodiments of the present disclosure may provide a dynamic latch circuit with increased speed and that can perform comparisons on low input signals. The dynamic latch circuit may include a first input transistor receiving a first input signal and a second input transistor receiving a second input signal. A cross... Agent: Analog Devices Technology

20140266308 - Clock amplitude detection: In some embodiments, disclosed is an AC amplitude detector to compare the magnitude of an AC signal against a detector threshold level and to provide an indication as to whether the AC magnitude is larger or smaller than the detector threshold level.... Agent:

20140266309 - Cds circuit and analog-digital converter using dithering, and image sensor having same: A correlated double sampling circuit includes a first input terminal receiving a ramp signal having first and second ramp sections, a second input terminal receiving a pixel signal, and a comparing circuit comparing the ramp signal with the pixel signal to generate an output signal, wherein the comparing circuit changes... Agent: Samsung Electronics Co., Ltd.

20140266310 - Systems and methods for edge control based on detecting current direction in a switched output stage: In accordance with these and other embodiments of the present disclosure, an apparatus and a method may include receiving a first input configured to indicate an output voltage of an output node of a switched output stage comprising a pull-down driver device coupled at its non-gate terminals between a ground... Agent: Cirrus Logic, Inc.

20140266311 - Sampled reference supply voltage supervisor: A power supervisor circuit is provided. The circuit includes a first sample circuit that periodically samples a first reference voltage derived from a high output rail of a voltage source and generates a first sampled output voltage. The circuit includes second sample circuit that periodically samples a second reference voltage... Agent: Texas Instruments Incorporated

20140266312 - Sensing circuit with reduced bias clamp: A sensing circuit having a reduced bias clamp and method of operating the sensing circuit are provided. The sensing circuit may include a reference path and a sensing path. The sensing path may include a first transistor, clamping capacitor and a pair of switches. The reference path may include a... Agent:

20140266313 - Light receiving circuit: The light receiving circuit includes: a photoelectric conversion element for causing a current corresponding to an amount of incident light to flow to a node; a voltage detection circuit for outputting a detection signal when a voltage of the node becomes equal to or higher than a first voltage; a... Agent: Seiko Instruments Inc.

20140266314 - Power monitoring circuit, and a power up reset generator: A power supply monitoring circuit for monitoring a voltage at a power supply node compared to a reference node, the power supply monitoring circuit comprising a first field effect transistor and first and second voltage dropping components arranged in current flow communication between the power supply node and the reference... Agent: Analog Devices Technology

20140266315 - Voltage threshold calibration techniques for level detectors: Some embodiments relate to a level detector, comprising a current mirror including first and second current legs to carry first and second signals, respectively. The first current leg includes a first variable resistor and the second current leg includes a second variable resistor. During a calibration mode, a switching element... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.

20140266316 - Methods of and apparatus for determining particle inclusion and size in molten metal: Methods and apparatus for measuring the cleanliness of molten metal. Direct current is passed through molten metal advancing through a passage. A voltage signal is analyzed for the presence of solid generally non-metallic inclusions in the metal. A method includes sampling digital data of the voltage signal to generate data... Agent: Novelis Inc.

20140266317 - Capless voltage regulator using clock-frequency feed forward control: A voltage regulator for controlling an output device in accordance with embodiments includes an error amplifier; a controlled conductance output device; and a load predicting circuit; wherein an output of the error amplifier and an output of the load predicting circuit are summed to control the output device.... Agent:

20140266318 - Phase interpolator based output waveform synthesizer for low-power broadband transmitter: Exemplary embodiments of the present invention relate to an output waveform synthesizer using phase interpolators and an on-chip eye opening monitoring (EOM) circuit for a low-power transmitter. In order to achieve both small area and low-power consumption in the transmitter design, a single-stage multiphase multiplexer operating in subrate is employed.... Agent:

20140266319 - Capacitive high pass pre-emphasis circuit: Some aspects of the disclosure are directed to a transmission circuit that includes a main driver. The transmission circuit also includes a plurality of capacitive modules connected in parallel to the main driver. A controller also is included that is coupled to the plurality of capacitive modules. The controller selectively... Agent: Texas Instruments Deutschland Gmbh

20140266321 - Depletion mosfet driver: A driver circuit is configured using a depletion-mode MOSFET to supply an output voltage across an output capacitor. The driver circuit includes a resistor positioned between two terminals of the MOSFET. In the case of an n-channel depletion-mode MOSFET, the resistor is coupled to the source and the gate. The... Agent: Flextronics Ap, LLC

20140266322 - Driver circuit with controlled gate discharge current: The gate of a drive transistor having a drain and source is discharged by a circuit including a sensing circuit configured to sense a drain-to-source voltage of the drive transistor. A first current sink path is coupled to the gate of the drive transistor. The first current sink path applies... Agent: Stmicroelectronics R&d (shanghai) Co. Ltd.

20140266320 - Transmitter with voltage and current mode drivers: Described is an integrated circuit (IC) which comprises: an input-output (I/O) pad for coupling to a transmission line; a voltage mode driver coupled to the I/O pad, the voltage mode driver having a pull-up driver and a pull-down driver; and a current mode driver coupled to the I/O pad, the... Agent:

20140266324 - High electron mobility transistor with multiple channels: A device includes a source and a drain for transmitting and receiving an electronic charge. The device also includes a first stack and a second stack for providing at least part of a conduction path between the source and the drain, wherein the first stack includes a first gallium nitride... Agent: Mitsubishi Electric Research Laboratories, Inc.

20140266325 - Inverter with parallel power devices: A power drive apparatus is provided. The apparatus includes a first switch having a first plurality of power devices arranged in a back to back configuration within adjacent stacked rows of the first switch. The apparatus includes a second switch having a second plurality of power devices arranged in a... Agent: Atieva, Inc

20140266326 - Method for reducing overdrive need in mos switching and logic circuit: The present disclosure relates to methods and circuits to lowering the signal range of switching or logic circuits below supply range. The circuits may have one or more stages. The supply levels can be set individually for each stage. This may realize amplifiers/attenuators, both digitally and analogically controlled, based on... Agent: Dialog Semiconductor B.v.

20140266323 - Systems and methods for driving a load under various power conditions: An electronic circuit for driving an electronic switch includes a first voltage terminal coupled to receive a first voltage from a power supply and a second voltage terminal coupled to receive a second voltage from the power supply. A driver circuit is configured to drive the voltage at a control... Agent: Allegro Microsystems, Inc.

20140266327 - Method for charge sharing/reuse of electronic circuits: The present disclosure discloses methods and circuits to reduce power consumption of switching circuits comprising two or more units by applying charge sharing/reuse of capacitive loads between the units. The units are stacked in a way that, if an output potential of a unit is to be lowered and an... Agent: Dialog Semiconductor B.v.

20140266328 - Frequency synthesis with gapper: Systems and methods for frequency synthesis using a gapper. A frequency synthesizer may comprise a gapper, a first integer divider and a Phase Locked Loop (PLL). When a frequency of an output signal is intended to be greater than a corresponding input signal, a factor can be borrowed by the... Agent: Applied Micro Circuits Corporation

20140266329 - Frequency quadruplers at millimeter-wave frequencies: A symmetric frequency multiplier includes four non-linear devices configured to receive an input signal having a fundamental mode and to provide an output having one or more harmonics; and three collinear transmission lines, each having a length of about one quarter of an input wavelength, configured to receive the outputs... Agent: International Business Machines Corporation

20140266330 - Frequency quadruplers at millimeter-wave frequencies: Methods for increasing a signal frequency include generating two or more signals having a fundamental mode and one or more harmonics; phase shifting bifurcated components of the two or more signals in transmission lines; and combining the bifurcated components to create an output signal that cancels a fundamental mode, a... Agent: International Business Machines Corporation

20140266331 - Method and apparatus for local oscillation distribution: A circuit includes an oscillation generation circuit, a distribution circuit, and a transceiver circuit. The oscillation generation circuit is configured to generate a first oscillation signal having a first frequency. The distribution circuit includes a voltage to current stage, a transmission portion and a current to voltage stage. The voltage... Agent: Marvell World Trade Ltd.

20140266332 - Isolator-based transmission system with side isolator channel for refresh signals: A multi-channel isolation system has N+1 isolators for N channels of communication data. N of the isolators may transfer data signals across an isolation barrier, one for each of the N channels of data. An N+1st isolator transfers refresh signals representing state of the data signals on the N isolators.... Agent: Analog Devices, Inc.

20140266334 - Fine grain data-based clock gating: Embodiments of a logic path are disclosed that may allow for a reduction in switching power. The logic path may include a storage circuit, a comparison circuit, and a clock gating circuit. The storage circuit may be configured to store received data responsive to a local clock signal. The comparison... Agent: Oracle International Corporation

20140266333 - Generating clock on demand: A clock generation system for an integrated circuit (IC) chip (e.g., a microcontroller) is disclosed that allows digital blocks and other components in the IC chip to start and stop internal clocks dynamically on demand to reduce power consumption.... Agent:

20140266335 - Integrated circuit and control method thereof: There is provided an integrated circuit having a plurality of circuit blocks. An acquisition unit acquires a request of a reset operation for at least one of the plurality of circuit blocks. A determination unit determines, based on constraining condition information indicating whether or not a reset target circuit block... Agent: Canon Kabushiki Kaisha

20140266336 - Clock signal timing-based noise suppression: A method includes generating one of a first clock signal and a second clock signal from the other clock signal. The first clock signal is configured to be used to synchronize an operation of an analog system, and the second clock signal is configured to be used to synchronize an... Agent: Silicon Laboratories Inc.

20140266337 - Noise management method and circuit for asynchronous signals: Noise may be reduced by delaying signal propagation outside of a time window when a change in another signal is expected. A time window may be defined between the change of the first clock signal and the change of the second clock signal during which a third signal, such as... Agent:

20140266338 - Biased bang-bang phase detector for clock and data recovery: An apparatus includes a plurality of phase detector circuits and a summing circuit. Each of the plurality of phase detector circuits may be configured to generate a phase up signal and a phase down signal in response to a respective pair of data samples and intervening transition sample. The summing... Agent: Lsi Corporation

20140266341 - Digital phase-locked loop using phase-to-digital converter, method of operating the same, and devices including the same: A digital phase locked loop (DPLL), a method of operating the same, and a device including the same are provided. The DPLL includes a digitally-controlled oscillator configured to change a frequency and a phase of an output oscillation signal in response to a digital control code; a main divider configured... Agent:

20140266342 - High-frequency signal processing device: A high-frequency signal processing device having a frequency synthesizer (PLL: Phase Locked Loop) is provided. A control circuit measures oscillation frequencies obtained upon setting a bias current of an oscillation circuit to first and second bias setting values and acquires a frequency difference amount of the oscillation frequencies. The frequency... Agent: Renesas Electronics Corporation

20140266340 - Integrated clock differential buffering: Integrated clock differential buffering. A first phase locked loop (PLL) circuit having a first clocking ratio is coupled to receive an input differential clock signal. The first PLL circuit generates a first reference clock signal. A second PLL circuit having a second clocking ratio is coupled to receive the input... Agent:

20140266339 - Method and apparatus for gapping: Systems and methods for generating gapped signals comprising a Delta Sigma Modulator (DSM) configured to generate gapping control signals used to control gap removal rates of an associated gapping unit. The DSM is configured to generate a gapping control signal based on a value of an overflow resulted from performing... Agent: Applied Micro Circuits Corporation

20140266343 - Area-efficient pll with a low-noise low-power loop filter: Techniques for reducing noise and power consumption in a loop filter for a phase-locked loop (PLL) are described herein. In one embodiment, a loop filter for a PLL comprises a first proportional capacitor, a second proportional capacitor, an active device, and a plurality of switches. The plurality of switches are... Agent:

20140266344 - Varainductor, voltage controlled oscillator including the varainductor, and phase locked loop including the varainductor: A varainductor including a signal line disposed over a substrate. The varainductor further includes a first ground plane over the substrate, the first ground plane disposed on a first side of the signal line, and a second ground plane over the substrate, the second ground plane disposed on a second... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20140266346 - All-digital phase-locked loop for adaptively controlling closed-loop bandwidth, method of operating the same, and devices including the same: A method of operating an all-digital phase-locked loop (ADPLL) includes detecting a phase change in a feedback signal of the ADPLL using a search window and controlling a closed-loop bandwidth of the ADPLL based on a detection result. The closed-loop bandwidth when the phase change is detected outside the search... Agent:

20140266347 - Continuous adaptive training for data interface timing calibration: Circuits and methods for implementing a continuously adaptive timing calibration training function in an integrated circuit interface are disclosed. A mission data path is established where a data bit is sampled by a strobe. A similar reference data path is established for calibration purposes only. At an initialization time both... Agent: Uniquify, Inc.

20140266352 - Delay lock loop phase glitch error filter: A method and apparatus is provided for providing a phase glitch error filter for a delay lock loop. The device comprises a delay lock loop to provide an output signal based upon a phase difference between a reference signal and a feedback signal. The delay lock loop comprises a filter... Agent: Micron Technology, Inc.

20140266351 - Delay-locked loop circuit and method of controlling the same: A delay-locked loop circuit includes a phase detector and a coarse-lock detector. The phase detector receives a feedback clock and a first clock to generate first and second phase detecting signals, respectively. The coarse-lock detector generates a coarse-lock signal based on changes of phase of the first and second phase... Agent: Samsung Electronics Co., Ltd.

20140266345 - Electronic circuit, radar apparatus, and method of performing self-diagnosis on radar apparatus: An electronic circuit includes a first PLL circuit including a first frequency divider whose frequency-division ratio is variably controlled, a second frequency divider configured to divide a frequency of a signal input into the first frequency divider, a delay circuit configured to delay an output signal of the second frequency... Agent: Fujitsu Limited

20140266349 - Method for operating a circuit including a timing calibration function: Circuits and methods for implementing a continuously adaptive timing calibration training function in an integrated circuit interface are disclosed. A mission data path is established where a data bit is sampled by a strobe. A similar reference data path is established for calibration purposes only. At an initialization time both... Agent: Uniquify, Inc.

20140266348 - Method for operating a data interface circuit where a calibration controller controls both a mission path and a reference path: Circuits and methods for implementing a continuously adaptive timing calibration training function in an integrated circuit interface are disclosed. A mission data path is established where a data bit is sampled by a strobe. A similar reference data path is established for calibration purposes only. At an initialization time both... Agent: Uniquify, Inc.

20140266350 - Signal generating circuit and method thereof: A signal generating circuit comprises a signal synchronizing module and a control circuit. The signal synchronizing module includes: a first delay path for delaying a target signal to generate a first delayed target signal by utilizing a first delay amount; a second delay path for delaying the target signal to... Agent: Realtek Semiconductor Corp.

20140266354 - Digital phase-locked loop: Disclosed is a digital phase-locked-loop including: a time-to-digital converter (TDC) configured to output a digital bit based on an input clock and a reference clock, in which the TDC includes: a first arbiter group configured to compensate for a phase difference between the input clock and the reference clock with... Agent: Electronics And Telecommunications Research Institute

20140266353 - Mixed signal tdc with embedded t2v adc: A time-to-digital converter converts the difference between transition times of a reference clock signal and an oscillating signal to a digital signal whose value is proportional to the transitions timing difference. The time-to-digital converter includes an edge detector, a time-to-voltage converter, and an analog-to-digital converter. The edge detector is adapted... Agent: Qualcomm Incorporated

20140266355 - Phase-locked loop, method of operating the same, and devices having the same: A method of operating a phase-locked loop (PLL) such as an all-digital PLL includes operations of comparing a reference clock signal with a feedback signal of the PLL and outputting a comparison signal according to a result of the comparison, and detecting whether the PLL is in a lock state... Agent:

20140266356 - Distributing multiplexing logic to remove multiplexor latency on the output path for variable clock cycle, delayed signals: A logic unit is configured with least one multiplexor distributed along a delay path of a logic unit, wherein each at least one multiplexor is configured to receive two inputs and output one of the two inputs, wherein each at least one multiplexor is configured to select one of the... Agent: International Business Machines Corporation

20140266357 - Measure-based delay circuit: A master measure circuit is disclosed that may select from various nodes on a delay path carrying a signal. The master measure circuit measures the delay for propagation of the signal from one selected node to another selected node and controls an adjustable delay circuit in the delay path accordingly.... Agent: Qualcomm Incorporated

20140266358 - Low-distortion programmable capacitor array: In one example embodiment, a programmable capacitor array is provided for low distortion and minimizing linearity degradation of an input (Vin) by utilizing control circuitry to switch on and off an array of MOSFET switches. The control circuitry turns on a MOSFET to load a capacitance on Vin and turns... Agent: Analog Devices, Inc.

20140266359 - Clock cycle compensator and the method thereof: One aspect of the present invention is to provide a method for compensating a system duty cycle of a system clock signal. The method in one embodiment comprises the following steps: locking a duty cycle center of the system duty cycle by a delay lock loop; detecting a current system... Agent: Nanya Technology Corporation

20140266362 - Digital duty cycle correction circuit: A digital duty cycle correction circuit includes a duty cycle controller and a digital duty control code generator. The duty cycle controller generates first and second output clock signals by compensating duty cycles of first and second input clock signals based on a digital duty control code. The digital duty... Agent: Samsung Electronics Co., Ltd.

20140266361 - Duty cycle correction circuit: In an embodiment, a duty cycle correction circuit comprises a first set of inverters connected in series, a first filter, a first feedback circuit and a second feedback circuit. A first inverter in the series is configured to receive a clock signal and a last inverter in the series is... Agent: Texas Instruments Incorporated

20140266360 - Duty cycle corrector: The duty cycle corrector for correcting a system clock signal comprises a duty cycle detector and a duty cycle adjuster. The duty cycle detector is configured for detecting a system duty cycle of the system clock signal and generating the first control signal and the second control signal, wherein the... Agent: Nanya Technology Corporation

20140266363 - Method, apparatus and system for sensing a signal with automatic adjustments for changing signal levels: The present specification provides a method, apparatus and system for sensing a signal with automatic adjustments for changing signal levels. A novel fractional peak discriminator circuit is provided which can be incorporated into a system for measuring periodic signals from moving elements. The circuit can be used regardless of whether... Agent: Cognitive Vision Inc.

20140266364 - Semiconductor circuit and method of operating the same: Provided are a semiconductor circuit and a method of operating the same. The semiconductor circuit includes a first pulse generating circuit enabled to a rising edge of a clock signal and configured to generate a first read pulse, a second pulse generating circuit enabled to a rising edge of the... Agent:

20140266365 - Latency/area/power flip-flops for high-speed cpu applications: A circuit for a low latency, low area, and low power flip-flop may include a pass-gate multiplexer that can selectively allow one of input or test data to enter a master cell when a clock signal is low. The master cell may include a first inverter cross-coupled to a second... Agent: Broadcom Corporation

20140266366 - Compensated hysteresis circuit: A compensated hysteresis circuit comprises a hysteresis circuit including an output node and a first control transistor. The first control transistor provides feedback to the hysteresis circuit. A temperature and voltage compensation circuit includes a self-biasing threshold control circuit including an input coupled to the output node of the hysteresis... Agent: Freescale Semiconductor, Inc.

20140266368 - Light receiving circuit: The light receiving circuit includes: a photoelectric conversion element for causing a current corresponding to an amount of incident light to flow; a MOS transistor including a source connected to the photoelectric conversion element and a drain connected to a node, for causing the current of the photoelectric conversion element... Agent: Seiko Instruments Inc.

20140266367 - Semiconductor device: To provide a semiconductor device which can perform a scan test and includes a logic circuit capable of reducing signal delay. The semiconductor device includes a combinational circuit, sequential circuits each holding first data supplied to the combinational circuit or second data output from the combinational circuit, first memory circuits... Agent: Semiconductor Energy Laboratory Co., Ltd.

20140266369 - Low power architectures: Systems and methods for operating transistors near or in the sub-threshold region to reduce power consumption are described herein. In one embodiment, a method for low power operation comprises sending a clock signal to a flop via a clock path comprising a plurality of transistors, wherein the clock signal has... Agent: Qualcomm Incorporated

20140266371 - Multi-phase generator: A multi-phase generator includes an oscillator unit including a plurality of first buffer units forming a single closed loop and a delay unit including a plurality of second buffer units respectively connected to a plurality of nodes, wherein each of the plurality of nodes is connected between two adjacent buffer... Agent: Samsung Electronics Co., Ltd.

20140266370 - Multi-stage delay-locked loop phase detector: A phase detector includes a phase propagator circuit including a plurality of flip-flops. Each flip-flop includes a clock input configured to receive a clock signal having a different phase relative to phases of the clock signal received by other flip-flops in the plurality of flip-flops. The phase detector further includes... Agent: Silicon Laboratories Inc.

20140266372 - Apparatus, method and system for implementing a hardware interface pinout: Techniques and mechanisms for operating an integrated circuit to communicate via a hardware interface for the integrated circuit, wherein a pinout with the hardware interface is based on the configuration. In an embodiment, the integrated circuit receives a first plurality of signals via the hardware interface, and sequentially latches a... Agent:

20140266373 - Integrated delayed clock for high speed isolated spi communication: A system may include a plurality of isolators to transfer data signals across an isolation barrier, one of the signals including a clock signal. A delay circuit may be included to receive the clock signal and provide a delayed clock signal that lags the clock signal by an amount representing... Agent: Analog Devices, Inc.

20140266374 - Fractional order capacitor: Disclosed is a fractional order capacitor comprising a dielectric nanocomposite layer of thickness t, comprising a first side, and a second side opposite the first side, a first electrode layer coupled to the first side of the dielectric nanocomposite layer, a second electrode layer coupled to the second side of... Agent: Saudi Basic Industries Corporation

20140266375 - Integrated circuitry for generating a clock signal in an implantable medical device: Timer circuitry completely formable in an integrated circuit (IC) for generating a clock signal in an implantable medical device is disclosed. The timer circuitry can be formed on the same Application Specific Integrated Circuit typically used in the implant, and requires no external components. The timer circuitry comprises modification to... Agent: Boston Scientific Neuromodulation Corporation

20140266376 - Active clock tree for data converters: A multi-stage clock distribution circuit for an integrated circuit is provided. The clock distribution circuit may route a common clock signal to a plurality of clock receiver circuits. Each stage in the distribution circuit may include a plurality of buffers. Outputs of at least some, perhaps all, of the buffers... Agent: Analog Devices, Inc.

20140266377 - Hybrid analog/digital point-of-load controller: In one example, there is disclosed a hybrid analog-digital point-of-load controller (ADPOL) for use in a power supply. The ADPOL is configured to respond to transient current loads. In the presence of moderate current transients, power is clocked by a digital power core, which may be programmatically configured to adjust... Agent: Analog Devices Technology

20140266378 - Method for setting offset gain of analog output module: A method for setting an offset gain of analog output module configured to convert a digital signal outputted from an MPU (Micro Processing Unit) to an analog signal and to output the converted analog signal is proposed, the method including outputting, by the MPU, a digital signal value to the... Agent: Lsis Co., Ltd.

20140266379 - Semiconductor device: A sample-and-hold circuit including a transistor and a capacitor is connected to the differential circuit. The sample-and-hold circuit acquires voltage for correcting the offset voltage of the differential circuit by charging or discharging the capacitor through sampling operation. Then, it holds the potential of the capacitor through holding operation. In... Agent: Semiconductor Energy Laboratory Co., Ltd.

20140266380 - Interface and related method for connecting sensor equipment and a physiological monitor: An interface to connect sensor equipment and a physiological monitor includes a first connector to receive power from a first channel of the monitor and a second connector to receive power from a second channel of the monitor. The power from each of the first and second channels of the... Agent: St. Jude Medical Systems Ab

20140266381 - Bias circuit for a switched capacitor level shifter: A noise resistant switch control circuit is provided. The circuit includes a low pass filter configured to couple to a first terminal of a switch and a first voltage clamp coupled to the low pass filter. The first voltage clamp is configured to couple to a control terminal of the... Agent: Atieva, Inc.

20140266382 - Low-power interface and method of operation: In a particular embodiment, a method includes modifying an output impedance associated with the input receiver. In response to modifying the output impedance, the method restricts an output voltage at an output node of the input receiver. Particular embodiments of an input receiver circuit are also disclosed.... Agent: Qualcomm Incorporated

20140266383 - Self-activating adjustable power limiter: A fast response time, self-activating, adjustable threshold limiter including a limiting element LE, a first coupling element CE1 electrically connected from a signal node of LE to a control input of LE, and a second coupling element CE2 electrically connected from the control input of LE to a nominal node... Agent: Peregrine Semiconductor Corporation

20140266385 - Dual supply level shifter circuits: A dual supply level shifter circuit includes a switching circuit and a set of level shifter circuits coupled to the switching circuit. The switching circuit includes a first set of coupled transistors, wherein the supply switching circuit is coupled to a first supply source that is configured to provide a... Agent: Freescale Semiconductor, Inc

20140266387 - Input/output interface: One or more systems and techniques for communicating a signal between a first chip and a second chip using one or more circuits are provided. If the signal corresponds to a first voltage, one or more voltages are provided to one or more locations and a capacitive load is charged... Agent:

20140266386 - Level shifter for high density integrated circuits: A level shifter for converting between voltages of a core voltage range to voltages within a larger I/O voltage range. The level shifter has interconnected transistors implemented as core devices operable within the core voltage range. The level shifter is connected to first and second power connections at the I/O... Agent:

20140266389 - Powerline control interface: A powerline control interface includes a powerline connection, a level shifter connected to the powerline connection, the level shifter having a zero crossing detector signal output, a capacitor connected to the powerline connection, an inductor connected to the powerline connection, and a receive signal inductively coupled to the inductor.... Agent:

20140266384 - Systems and method for level shifters: A level shifter system includes an inverting portion, a non-inverting portion and a cross latch output component. The inverting portion is configured to receive an inverting input, a supply voltage and to generate an intermediary inverting output. The non-inverting portion is configured to receive a non-inverting input, the supply voltage... Agent: Taiwna Semiconductor Manufacturing Co. Ltd.

20140266388 - Voltage level shifter: The voltage level shifter includes a first voltage shift circuit, a second voltage shift circuit, a first switch circuit, a second switch circuit, a third switch circuit and a fourth switch circuit. The first voltage shift circuit receives a first input voltage, and the second voltage shift circuit receives a... Agent:

20140266390 - Transconductance circuit and frequency mixer: The present invention provides a transconductance circuit and a frequency mixer. The transconductance circuit includes: a first transistor, a second transistor, a first impedor, a second impedor, a first input network, and a second input network, where a gate of the first transistor is connected to a source of the... Agent: Huawei Technologies Co., Ltd.

20140266391 - Controlling the conductivity of an oxide by applying voltage pulses to an ionic liquid: Electrolyte gating with ionic liquids is a powerful tool for inducing conducting phases in correlated insulators. An archetypal correlated material is VO2 which is insulating only at temperatures below a characteristic phase transition temperature. We show that electrolyte gating of epitaxial thin films of VO2 suppresses the metal-to-insulator transition and... Agent: International Business Machines Corporation

20140266392 - Bootstrapped switching circuit with fast turn-on: An apparatus and method for implementing a bootstrapped switching circuit having improved (i.e. faster) turn-on time is provided. In an embodiment, an inner switching loop is implemented in a bootstrapped switching circuit where the inner switching loop is configured to turn on an input switch in the bootstrapped drive circuit... Agent: Analog Divices, Inc.

20140266393 - Bipolar transistor with lowered 1/f noise: In a bipolar transistor, a thin gate oxide, preferably less than 600 Å, is formed over the base surface region between the emitter and collector. A conductive gate, such as doped polysilicon, is then formed over the gate oxide and biased at the emitter voltage. In the example of a... Agent: Linear Technology Corporation

20140266394 - High-speed switch with signal-follower control offsetting effective visible-impedance loading: A data link circuit switches high-speed signals through FET-based circuitry between channels. A FET responds to control signals at the gate terminal to operate in either a signal-passing mode or another (blocking) mode. In the passing mode, an AC (high-speed) signal is passed between the S-D terminals by coupling a... Agent:

20140266395 - Ac coupling circuit with hybrid switches: A coupling apparatus having a first branch and a second branch is disclosed. The first branch generally comprises (A) a first switch group configured to connect an input signal to an output node through a first capacitor, and (B) second switch group configured to connect either (i) a second signal,... Agent: Lsi Corporation

20140266396 - Integrated clock gater (icg) using clock cascode complimentary switch logic: Inventive aspects include an integrated clock gater (ICG) circuit having clocked complimentary voltage switched logic (CICG) that delivers high performance while maintaining low power consumption characteristics. The CICG circuit provides a small enable setup time and a small clock-to-enabled-clock delay. A significant reduction in clock power consumption is achieved in... Agent:

20140266397 - Digital soft start with continuous ramp-up: A soft-start generation system is configured to generate a soft-start voltage. The soft-start generation system includes sawtooth circuitry configured to generate current having a sawtooth waveform and staircase circuitry configured to generate current having an ascending staircase waveform. A ramp-up current may be generated that is a combination of the... Agent:

20140266398 - Method and semiconductor apparatus for reducing power when transmitting data between devices in the semiconductor apparatus: A semiconductor apparatus is provided herein for reducing power when transmitting data between a first device and a second device in the semiconductor apparatus. Additional circuitry is added to the semiconductor apparatus to create a communication system that decreases a number of state changes for each signal line of a... Agent: Qualcomm Incorporated

20140266399 - Active lumped element circulator: An integrated circuit can comprise: a first port, a second port, and a third port; and a plurality of microwave operational amplifiers coupled to each other and the first port, the second port, and the third port. The plurality of microwave operational amplifiers can be arranged to substantially pass a... Agent:

20140266400 - Method of reducing current collapse of power device: According to example embodiments, a method of operating a power device includes applying a control voltage to a control electrode of the power device, where the control electrode is electrically separated from a source electrode, a drain electrode, and a gate electrode of the power device. The control voltage is... Agent: Samsung Electronics Co., Ltd.

20140266401 - Data-retained power-gating circuit and devices including the same: A power-gating circuit and devices including the same are provided. The power-gating circuit includes a flip-flop configured to receive a first power supply voltage and a gated clock signal to operate and a switch circuit connected between a first power supply voltage source configured to supply the first power supply... Agent:

20140266402 - Transistor including reentrant profile: A transistor includes a substrate, an electrically conductive material layer, and an electrically insulating material layer. At least a portion of one or more of the substrate, the electrically conductive material layer, and the electrically insulating material layer define a reentrant profile.... Agent:

20140266403 - Low loss electronic devices having increased doping for reduced resistance and methods of forming the same: An electronic device includes a drift region having a first conductivity type and a grid including a plurality of doped regions formed in the drift region and having a second conductivity type. The doped regions have a dopant concentration greater than 2.2×1019 cm−3. Related methods are also disclosed.... Agent:

20140266404 - Method for detecting environmental value in electronic device and electronic device: A method of detecting an environment vale of an electronic device is provided. The method includes measuring a state of one or more units related to the electronic device, determining a value based at least in part on the measured state of the one or more units related to the... Agent: Samsung Electronics Co., Ltd.

20140266405 - Management of exterior temperatures encountered by user of a portable electronic device by reducing heat generation by a component: Described embodiments include a portable electronic device. The device includes a shell housing components of the portable electronic device and a heat-generating component. The device includes a contact sensor configured to determine a user touch to the shell. The device includes a temperature sensor configured to determine an exterior temperature... Agent: Elwha LLC

20140266406 - Symmetric placement of components on a chip to reduce crosstalk induced by chip modes: A method and system to control crosstalk among qubits on a chip are described. The method includes placing two or more components symmetrically on the chip, the chip including the qubits, and driving two or more ports symmetrically to control the crosstalk based on controlling coupling of chip mode frequencies... Agent: International Business Machines Corporation

20140266407 - Bipolar junction transistor and operating and manufacturing method for the same: A bipolar junction transistor and an operating method and a manufacturing method for the same are provided. The bipolar junction transistor comprises a first doped region, a second doped region and a third doped region. The first doped region has a first type conductivity. The second doped region comprises well... Agent: Macronix International Co., Ltd

20140266408 - Circuit and method for a multi-mode filter: An embodiment integrated circuit includes a first capacitive element including a first metal-oxide-semiconductor (MOS) capacitor and a second capacitive element coupled in parallel with the first capacitive element, where the second capacitive element includes a second MOS capacitor. Also, the integrated circuit includes a third capacitive element coupled in parallel... Agent: Futurewei Technologies, Inc.

20140266409 - Semiconductor structure and method of manufacturing the same: A semiconductor structure with a high voltage area and a low voltage area includes a substrate of a first conductivity type accommodating the high voltage area and the low voltage area. A resistor is on the substrate, connecting the high voltage area and the low voltage area, and the resistor... Agent:

20140266410 - Apparatus and method for controlling charge pump: An apparatus for controlling a charge pump includes a current sensor arranged to output a current sense signal that is linearly proportional to an output current of the charge pump, and an oscillator that provides a clock signal for the charge pump. The oscillator receives the current sense signal and... Agent:

20140266411 - Switching device:

20140266412 - Systems and methods for power limiting for a programmable i/o device: A device includes a digital to analog converter (DAC) configured to generate a voltage output or a current output. The device also includes an integrated circuit configured to receive at least one of the voltage output or the current output and transmit the at least one of the voltage output... Agent: General Electric Company

20140266413 - Bandgap reference circuit: A circuit for generating a temperature-stabilized reference voltage on a semiconductor chip includes a differential pair including a first and a second bipolar junction transistor. The circuit further includes a feedback circuit including an amplification stage and configured to control a current flowing through the first bipolar junction transistor and... Agent: Intel Mobile Communications Gmbh

20140266414 - Internal voltage generator and contactless ic card including the same: A voltage generator of a contactless integrated circuit (IC) card includes a regulator configured to generate a first internal voltage based on an input voltage and a first reference voltage, the input voltage being received through an antenna of the contactless IC card. The voltage generator includes an internal voltage... Agent: Samsung Electronics Co., Ltd.

20140266415 - Harmonic cancellation circuit for an rf switch branch: Disclosed is a harmonic cancellation circuit for an RF switch branch having a first transistor with a first gate terminal and a first body terminal, a second transistor having a second gate terminal coupled to the first body terminal, and having a second body terminal coupled to the first gate... Agent: Rf Micro Devices, Inc.

20140266417 - Ground-referenced single-ended signaling connected graphics processing unit multi-chip module: A system of interconnected chips comprising a multi-chip module (MCM) includes a first processor chip, a graphics processing cluster (GPC) chip, and an MCM package configured to include the first processor chip, the GPC chip, and an interconnect circuit. The first processor chip is configured to include a first ground-referenced... Agent: Nvidia Corporation

20140266416 - On-package multiprocessor ground-referenced single-ended interconnect: A system of interconnected chips comprising a multi-chip module (MCM) includes a first processor chip, a second processor chip, and an MCM package configured to include the first processor chip, the second processor chip, and an interconnect circuit. The first processor chip is configured to include a first ground-referenced single-ended... Agent: Nvidia Corporation

20140266418 - Stacked chip system: A stacked chip system is provided to comprise a first chip, a second chip, a first group of through silicon vias (TSVs) connecting the first chip and second chip and comprising at least one first VSS TSV, at least one first VDD TSV, a plurality of first signal TSVs and... Agent:

20140266419 - Voltage controller for radio-frequency switch: One or more systems and techniques for limiting a voltage potential between an antenna and a radio-frequency switch circuit are provided. A voltage controller comprises a voltage generator, a voltage detection circuit and a switch cell. The voltage detection circuit is coupled to the voltage generator and to the switch... Agent: Taiwan Semiconductor Manufacturing Company Limited

09/11/2014 > 106 patent applications in 37 patent subcategories.

20140253176 - Ping pong comparator voltage monitoring circuit: A ping pong comparator voltage monitoring circuit which includes first and second comparators having inputs connected to a voltage Vin to be monitored, and second inputs connected to first and second nodes, respectively. A multiplexer alternately couples the first and second comparator outputs to an output in response to a... Agent: Analog Devices Technology

20140253177 - Sampling network: A circuit with a sampling network may include a pair of capacitors, where each of the capacitors has a first node and a second node; a first pair of switches communicatively coupling corresponding differential input voltage signals to the first node of each of the capacitors; and a second pair... Agent: Google Inc.

20140253178 - Semiconductor device including clock signal generation unit: A semiconductor device for stably generating a clock signal from a strobe signal includes a processor, a clock signal generation unit receiving a first strobe signal and a second strobe signal to generate the clock signal, and a data reception unit receiving at least one data signal to provide the... Agent: Samsung Electronics Co., Ltd

20140253179 - Low voltage swing repeater: Described is an integrated circuit (IC) which comprises: a first driver having stacked devices, the first driver operable on a first power supply and a first ground supply, the first driver to receive an input signal with a signal swing according to a second power supply and a second ground... Agent:

20140253180 - Charge pump power savings: Exemplary embodiments are directed to systems, devices, methods, and computer-readable media for reducing static and dynamic power consumption of a charge pump. In one embodiment, a device may include a plurality of switches, each switch of the plurality having a gate coupled to a dedicated driver of a plurality of... Agent: Qualcomm Incorporated

20140253185 - Circuit and method for improving noise immunity of a single-end level shifter in a floating gate driver: A floating gate driver uses a single-end level shifter to translate a set signal and a reset signal induced by a rising edge and a falling edge of a switch signal to a common output terminal to generate an output voltage for a bistable circuit to generate a level shifted... Agent: Richtek Technology Corporation

20140253182 - Drive control apparatus: A drive control apparatus for a semiconductor device having a diode and a transistor includes: a current detection device of a current flowing through the diode; and a control device, which applies a gate drive voltage to the semiconductor device when an on-instruction signal is input. The control device compares... Agent: Denso Corporation

20140253181 - Feed-forward frequency control method for current mode hysteretic buck regulator: A hysteresis generator provides a hysteresis parameter V_hyst to a hysteresis comparator of a voltage regulator. The hysteresis parameter V_hyst is a function of circuit components of the hysteresis generator, a voltage output Vout of the regulator, a voltage input Vin of the regulator, and a signal that drives one... Agent: Qualcomm Incorporated

20140253183 - Field effect transistor device: A semi-metallic structure, comprising an LaAlO3—SrTiO3 heterostructure (19), said LaAlO3—SrTiO3 heterostructure comprising a two-dimensional hole gas (21) and a two-dimensional electron gas (23).... Agent: Kabushiki Kaisha Toshiba

20140253184 - Gate drive circuit: A gate drive circuit includes a power supply circuit that has an output switch function for switching a voltage value of a drive voltage between two levels, a gate-ON drive circuit that outputs a constant electric current toward a gate of an IGBT from an output terminal of the power... Agent: Denso Corporation

20140253186 - Inductive load driver slew rate controlller: A circuit and method for digital controlling the slew rate of load voltage are provided. The circuit is comprised of a digital slew-rate control unit that utilizes a feedback signal to generate control signals where the feedback signal indicates the observed rate of voltage change on the load. The circuit... Agent:

20140253187 - Capacitive load drive circuit, fluid ejection device and medical device: Operation of a digital power amplifier for power amplification of a modulated signal is stopped in a period in which a voltage value of a drive signal applied to a capacitive load is constant, to thereby suppress power loss. The power amplification is stopped either when half a period of... Agent: Seiko Epson Corporation

20140253188 - Divided clock generation device and divided clock generation method: A clock generation device includes a flip-flop, a clock division unit, and a clock comparator. The flip-flop generates a chip selection signal synchronized with an internal clock signal. The clock division unit generates second divided clock signals based on a first divided clock signal. The clock comparator selects ones of... Agent: Samsung Electronics Co., Ltd.

20140253189 - Control circuits for asynchronous circuits: The described embodiments include a computing device with one or more asynchronous circuits and control circuits that control the operation of the asynchronous circuits. In some embodiments, the control circuits are arranged in a hierarchy with a top-level control circuit atop the hierarchy and one or more local control circuits... Agent: Advanced Micro Devices, Inc.

20140253190 - Multiple power domain electronic device and related method: An electronic device includes a first circuit, a second circuit, and a power on control (POC) circuit. The POC circuit includes an enable terminal electrically connected to a first output of the first circuit, a first input terminal electrically connected to a first voltage supply, a second input terminal electrically... Agent:

20140253191 - Semiconductor device and wireless communication device: A semiconductor device according to the present invention includes two diodes connected in parallel between power supplies, and a resistor circuit and a capacitance element connected in parallel between one power supply and each of the two diodes, and outputs a comparison result between voltages outputted from the two resistor... Agent: Renesas Electronics Corporation

20140253192 - Method of distributing a clock signal, a clock distributing system and an electronic system comprising a clock distributing system: A clock signal from a first electronic subsystem is distributed to a second electronic subsystem. The second electronic subsystem is remote from the first electronic subsystem and coupled to the first electronic subsystem by a bidirectional signal path. A first clock signal is generated on the first electronic subsystem and... Agent: Pro Design Electronic Gmbh

20140253193 - Differential amplifiers, clock generator circuits, delay lines and methods: A differential amplifier may be configured to have a duty cycle and/or gain that is adjustable, such as by adjusting the switch points of circuitry in the differential amplifier. The differential amplifier may alternatively or additionally have a hysteresis function by, for example, using a signal feedback from the output... Agent: Micron Technology, Inc.

20140253194 - Load switch: An IC generally comprises enable pin, ground pin, input pin, output pin, load switch, control circuitry, and level shifter. Load switch is coupled between input pin and output pin and receives a negative voltage through the input pin. The control circuitry is coupled to the enable pin, the ground pin,... Agent:

20140253195 - Open-loop correction of duty-cycle error and quadrature phase error: A Phase Interpolator (PI) may be employed as a precisely-controlled delay element in a transmit path, for example in clock forwarded serial links. Methods and circuits are disclosed for estimating a delay needed to correct duty-cycle/and or phase errors of the received clock. These corrections or delta values may be... Agent: Rambus Inc.

20140253196 - Flip-flops in a monolithic three-dimensional (3d) integrated circuit (ic) (3dic) and related methods: Flip-flops in a monolithic three-dimensional (3D) integrated circuit (IC)(3DIC) and related method are disclosed. In one embodiment, a single clock source is provided for the 3DIC and distributed to elements within the 3DIC. Delay is provided to clock paths by selectively controllable flip-flops to help provide synchronous operation. In certain... Agent: Qualcomm Incorporated

20140253197 - Low leakage retention register tray: A particular method includes receiving a retention signal. In response to receiving the retention signal, the method includes retaining state information in a non-volatile stage of a retention register and reducing power to a volatile stage of the retention register. The non-volatile stage may be powered by an external voltage... Agent: Qualcomm Incorporated

20140253198 - Apparatuses, methods, and circuits including a delay circuit: Apparatuses, methods, and delay circuits for delaying signals are described. An example apparatus includes a fine delay circuit configured to provide an output signal based on a ratio of a first input signal and a second input signal. The fine delay circuit including a phase mixer circuit including first signal... Agent: Micron Technology, Inc.

20140253199 - Systems, apparatus, and methods for providing continuous-time signal differentiation and integration: Systems and methods for providing an approximate differentiation and integration of an input continuous-time signal are provided. The disclosed systems include a continuous-time delay block configured to receive an input continuous-time signal and to delay the input continuous-time signal by a predetermined delay factor to generate a delayed input continuous-time... Agent: The Trustees Of Columbia University In The City Of New York

20140253200 - Link path delay estimator that combines coarse and fine delay estimates: A link-path delay estimator estimates a signal-path delay of a signal path between a master device and a remote device, by combining coarse delay estimates and a fine delay estimate. The coarse delay estimates indicate only an integral portion of the signal-path delay, selected as an integral multiple of a... Agent: Raytheon Company

20140253201 - Pulse generation in dual supply systems: Various apparatuses and methods are disclosed. The system describes a pulse generator comprising a first stage configured to be powered by a first voltage; and a second stage configured to be powered by a second voltage different from the first voltage, wherein the second stage is further configured to generate... Agent: Qualcomm Incorporated

20140253202 - Noise tolerant clock circuit with reduced complexity: The clock circuit of an integrated circuit operates with tolerance of variation in power. A compensation circuit is powered by a supply voltage. The compensation circuit generates a compensated voltage reference, which is compensated for variation in the supply voltage. The compensated voltage reference is compared by comparison circuitry against... Agent: Macronix International Co., Ltd.

20140253203 - Programmable clock spreading: An integrated circuit having a programmable clock spreader configured to generate a plurality of controllably skewed clock signals, each applied to a corresponding region within the integrated circuit with circuitry configured to be triggered off the applied clock signal. The programmable clock spreader is designed to enable customization of the... Agent: Lsi Corporation

20140253204 - Clock signal generator module, integrated circuit, electronic device and method therefor: A clock signal generator module arranged to generate at least one clock signal for at least one functional module is described. The clock signal generator module comprises a first clock source component associated with at least one functional module, at least one further clock source component associated with the at... Agent: Freescale Semiconductor, Inc.

20140253205 - Apparatus for controlling comparator input offset voltage: An apparatus to remove an input offset voltage of a comparator circuit includes an input voltage offset capacitor, control logic to charge and discharge the capacitor to provide an offset cancelation voltage. The offset cancellation voltage removes the input offset voltage of the comparator dependent upon an output of the... Agent:

20140253206 - Systems and methods for providing low-pass filtering: A low-pass filter circuit is described. The low-pass filter circuit includes a pseudo-resistor. The pseudo-resistor includes at least one metal-oxide-semiconductor field-effect transistor. The at least one metal-oxide-semiconductor field-effect transistor receives a digital power supply domain signal. The low-pass filter circuit also includes a capacitor. The capacitor is coupled to the... Agent: Qualcomm Incorporated

20140253207 - Calibration of single-ended high-speed interfaces: A method for calibrating signal swing and a trip reference voltage. The signal swing of a system can be calibrated in a symmetric or asymmetric technique through adjustment of a drive parameter such as a supply voltage for a transmitter or a drive termination. The trip reference voltage of the... Agent: Silicon Image, Inc.

20140253208 - Calibration of single-ended high-speed interfaces: A method for calibrating signal swing and a trip reference voltage. The signal swing of a system can be calibrated in a symmetric or asymmetric technique through adjustment of a drive parameter such as a supply voltage for a transmitter or a drive termination. The trip reference voltage of the... Agent: Silicon Image, Inc.

20140253209 - Apparatuses and method for shifting a voltage level: Apparatuses and methods, such as those for shifting a voltage level are disclosed. An example apparatus includes a level shifter configured to provide output signals based on a logical value of an input signal, where the level shifter is precharged to a precharge voltage prior to providing the output signals.... Agent: Micron Technology, Inc.

20140253213 - Level shifting circuit with adaptive feedback: An amplifier has a first pull-up path coupled between a voltage supply node and an output node, and a pull-down path coupled between the output node and a ground supply node. A second pull-up path is coupled between the voltage supply node and the output node. The second pull-up path... Agent: Stmicroelectronics International N.v.

20140253211 - Low voltage level shifter for low power applications: A level shifter circuit for low power applications that can shift the level of a digital signal that is below the threshold voltage of output transistors. The level shifter uses core transistors in the input stage and includes an intermediate stage that limits the voltage applied to the drain of... Agent: Synopsys, Inc.

20140253212 - Variable voltage level translator: An integrated circuit including a processor configured to operate off a supply voltage being applied at one of a plurality of external pins; and internal input/output circuitry configured to select between the supply voltage and at least one other supply voltage being applied at another of the plurality of external... Agent:

20140253210 - Voltage level shifter with a low-latency voltage boost circuit: Certain aspects of the present disclosure provide a voltage level shifting circuit employing a low latency, AC-coupled voltage boost circuit, as well as other circuits and apparatus incorporating such a level shifting circuit. Such level shifting circuits provide significantly lower latency compared to conventional level shifters (e.g., latency reduced by... Agent: Qualcomm Incorporated

20140253215 - Binary adder and multiplier circuit: An adder circuit includes first through fourth two-bit adder modules, and first through third result mux blocks for receiving and adding first and second binary values to generate a final sum. A multiplier circuit that multiplies a multiplier and a multiplicand includes a multiplexer, an encoder connected to the multiplexer,... Agent:

20140253214 - Multiplier circuit: A multiplier circuit for multiplying first and second binary values includes a first logic circuit, a priority encoder, a shifter circuit, and an accumulator. The first logic circuit receives the first binary value and a multiplier modifier, and modifies the first binary value based on the multiplier modifier. The multiplier... Agent:

20140253216 - Gilbert mixer with negative gm to increase nmos mixer conversion: A cross coupled NMOS transistors providing a negative gm transistor feedback allows a mixer to saturate at a reduced input signal swing voltage when compared to a conventional mixer allowing the mixer to enter into the current mode operation at a reduced signal input voltage range. The linearity of the... Agent: Tensorcom, Inc.

20140253217 - Rf switch gate control: In one implementation, a switching circuit includes a pass switch including group III-V, for example III-Nitride, transistors coupled between an input of the switching circuit and an output of the switching circuit. The switching circuit further includes a shunt switch configured to ground the input of the switching circuit while... Agent: International Rectifier Corporation

20140253218 - Multi-gate field effect transistor: An improved field effect transistor (FET) is provided by segmenting the gates of a power FET wherein a controller can “decide” how much of the FET to use, thus increasing efficiency.... Agent:

20140253219 - Compensation of changes in mems capacitive transduction: A method for compensating for strain on a MEMS device includes generating a signal indicative of a strain on the MEMS device in a first mode of operating a system including the MEMS device. The method includes compensating for the strain in a second mode of operating the system based... Agent: Silicon Laboratories Inc.

20140253220 - Electronic fuse cell and array: Embodiments may include an eFuse cell. The eFuse cell may include an eFuse having a first end and a second end. A blowFET has a first source/drain area, a second source/drain area, and a first gate. The first source/drain area is coupled to the second end of the eFuse, the... Agent: International Business Machines Corporation

20140253221 - On-die programmable fuses: In one embodiment described herein, on-die programmable fuses may be used. On-die programmable fuses may be programmed by entities other than the chip manufacturer after the fuse array chip has been manufactured and shipped out. However, other non-volatile memories may also be used.... Agent:

20140253222 - Preventing electronic device counterfeits: Systems and methods for authenticating electronic devices may perform one or more operations including, but not limited to: receiving at least one code associated with an authorization to perform one or more manufacturing life-cycle operations for at least one electronic device; and blowing one or more fuses of the at... Agent: Lsi Corporation

20140253223 - Method of improving noise immunity in a signal processing apparatus, and a signal processing apparatus having improved noise immunity: A signal processing apparatus that includes a circuit in which a signal processing function is performed during a first time period, the signal processing apparatus including or being associated with a switch or a filter in a power supply to the signal processing apparatus so as to disconnect the signal... Agent: Analog Devices Technology

20140253225 - Method and apparatus for generating regulated isolation supply voltage: High voltage rated isolation capacitors of inductors are formed on a face of a primary integrated circuit die. The isolation capacitors or inductors AC couple the primary integrated circuit in a first voltage domain to a second integrated circuit in a second voltage domain. The isolation capacitors or inductors DC... Agent:

20140253224 - Semiconductor element and manufacturing method and operating method of the same: A semiconductor element and a manufacturing method and an operating method of the same are provided. The semiconductor element includes a substrate, a first well, a first heavily doping region, at least a second heavily doping region, a gate layer, a third heavily doping region, and a fourth heavily doping... Agent: Macronix International Co., Ltd.

20140253226 - Power integrity control through active current profile management: An apparatus having one or more of a plurality of circuits in a first level of a hierarchy and two or more of the circuits in a second level of the hierarchy is disclosed. The circuits are configured to (i) allocate a profile from the first level down to the... Agent: Lsi Corporation

20140253227 - Integrated high voltage isolation using low value capacitors: High voltage rated isolation capacitors are formed on a face of a primary integrated circuit die. The isolation capacitors AC couple the primary integrated circuit in a first voltage domain to a second integrated circuit in a second voltage domain. The isolation capacitors DC isolate the primary integrated circuit from... Agent:

20140253228 - Integrated circuit floorplan for compact clock distribution: An integrated circuit includes core logic and a plurality of interface blocks disposed about a periphery of the core logic. A plurality of input or output (I/O) circuits is assigned to one of the plurality of interface blocks. The I/O circuits include external I/O circuits coupled to a device other... Agent: Qualcomm Incorporated

09/04/2014 > 21 patent applications in 17 patent subcategories.

20140247071 - Architecture for vbus pulsing in udsm processes: Architecture for VBUS pulsing in an Ultra Deep Sub Micron (UDSM) process for ensuring USB-OTG (On The Go) session request protocol, the architecture being of the type wherein at least a charging circuit is deployed, uses a diode-means connected in a forward path of the charging circuit. The architecture might... Agent: Texas Instruments Incorporated

20140247070 - Semiconductor device: Provided is a semiconductor device which can operate stably even in the case where a transistor thereof is a depletion transistor. The semiconductor device includes a first transistor for supplying a first potential to a first wiring, a second transistor for supplying a second potential to the first wiring, a... Agent: Semiconductor Energy Laboratory Co., Ltd.

20140247074 - Clock generation circuit, processor system using same, and clock frequency control method: A microcomputer includes a register that stores division ratio setting information, a frequency divider that determines first and second division ratios based on the division ratio setting information, frequency-divides a first clock having a first frequency at the first division ratio, and frequency-divides a second clock having a second frequency... Agent: Renesas Electronics Corporation

20140247072 - Correction circuit and real-time clock circuit: The present invention provides a correction circuit. The correction circuit includes a frequency dividing circuit, a frequency dividing coefficient operation circuit, a built-in temperature collection circuit, and a power-on and power-off detection circuit. The built-in temperature collection circuit is configured to collect a temperature of the chip; the power-on and... Agent: Huawei Technologies Co., Ltd.

20140247073 - M-ary sequence clock spreading: The invention concerns a device for providing a spread frequency clock signal, comprising: -an input (51) to receive a first clock signal having a first frequency; -a programmable clock divider (52) to generate the spread frequency clock signal from the first clock signal; -a first Feedback Shift Register (21), FSR,... Agent:

20140247075 - Interface circuit for signal transmission: An interface circuit for signal transmission includes an amplifying circuit, a de-skew circuit and a latching unit. The amplifying circuit receives an input clock signal and outputs an output clock signal after amplifying the input clock signal. The de-skew circuit receives the output clock signal and outputs a de-skew clock... Agent: Novatek Microelectronics Corp.

20140247076 - Aligning multiple chip input signals using digital phase lock loops: This disclosure describes methods and techniques using Digital Phase Lock Loops (DPLLs) within a source chip to automatically phase align a plurality of signals at a plurality of pins on a plurality of target chips of varying distances and corresponding delays from the source chip by using each transmitted signal's... Agent:

20140247077 - Semiconductor circuit: Provided is a semiconductor circuit. The semiconductor circuit includes a pulse generator which is enabled by a rising edge of a clock signal and generates a read pulse which varies depending on a voltage of a feedback node; and a sense amplifier which generates a voltage of a dynamic node... Agent:

20140247078 - Apparatus for programmable insertion delay to delay chain-based time to digital circuits: An apparatus for delaying a plurality of chain-based time-to-digital circuits (TDCs). The apparatus includes a plurality of propagation path devices each connected to a respective one of the plurality of TDCs, each propagation path device delays a common start signal by a selectable amount based on a delay selection signal... Agent: Kabushiki Kaisha Toshiba

20140247079 - Pulse generator circuit: A pulse generator circuit is disclosed that is optimized for printed, solution-processed thin film transistor processing. In certain embodiments, the circuit comprises dual thin film transistors that operate as a diode and resistor, respectively. Optionally, a third thin film transistor may be provided to operate as a pass transistor in... Agent:

20140247080 - Multi-level clock signal distribution network and integrated circuit: A multi-level clock signal distribution network comprises a plurality of lower network levels comprising at least a first lower network level and a lowermost network level that is connected to one or more lowermost clock signal driving circuits connectable to receive a clock signal; and a topmost network level arranged... Agent: Freescale Semiconductor, Inc.

20140247081 - Combinatorial circuit and method of operation of such a combinatorial circuit: An integrated level shifting combinatorial circuit receives a plurality of input signals in a first voltage domain and performs a combinatorial operation to generate an output signal in a second voltage domain. The circuit includes combinatorial circuitry includes first and second combinatorial circuit portions operating in respective first and second... Agent:

20140247082 - Fast voltage level shifter circuit: A voltage level shifting circuit with an input terminal and an output terminal. The level shifting circuit has a field-effect transistor (FET) switch with a gate attached to the input terminal, a drain attached to the output terminal and a source attached to a current changing mechanism. The current changing... Agent: Solaredge Technologies, Ltd.

20140247083 - Receiving device: A receiving device includes a dividing circuit, N pieces of internal circuits, and an averaging circuit. The dividing circuit is configured to divide an input signal into N pieces of divided signals (where N is an integer of two or larger), and the N pieces of internal circuits are configured... Agent: Fujitsu Limited

20140247084 - Specifications support enablement: Several circuits and methods that may be implemented to enable specification support of a plurality of interface components in an IC are disclosed. In an embodiment, a circuit includes a plurality of multiplexer circuits and a control circuit. The plurality of multiplexer circuits are configured to provide a plurality of... Agent: Texas Instruments Incorporated

20140247085 - Controller for load circuit: Two semiconductor switches are arranged in parallel in a load circuit for connecting a power source with a load. Further, the semiconductor switches are controlled so as to be alternately tuned on and off. As a result, since a current flows through only either of the semiconductor switches, an offset... Agent: Yazaki Corporation

20140247086 - System and method for operating low power circuits at high temperatures: A system includes first circuitry including first elements for operating in a low power mode; second circuitry including second elements for operating in a high-temperature mode; and one or more switching elements for selecting between the low power mode and the high temperature mode..... Agent:

20140247087 - Current control for output device biasing stage: Circuits and methods to control current through a device biasing an output device in case the supply voltage is not higher than the output voltage are disclosed. The circuits and methods are applicable to e.g. LDOs, amplifiers, or buffers. A control loop detects if the supply voltage is not higher... Agent: Dialog Semiconductor Gmbh

20140247088 - Minimizing power consumption in asynchronous dataflow architectures: A digital signal processing apparatus includes a digital circuit device having one or more elements configured to process digital data; a power supply configured to deliver a controllable operating voltage for the one or more elements; control logic configured to receive feedback signals from each of the one or more... Agent: Raytheon Company

20140247089 - Two stage source-follower based filter: A filter, comprising: two source-follower stages connected in series and in between input nodes and output nodes, wherein inner nodes connect the two stages; and a frequency dependent feedback circuit connected between the input and output nodes, wherein the filter comprises additional frequency dependent feedback circuits connected between input nodes... Agent: Imec Vzw

20140247090 - Resonant impedance sensing based on controlled negative impedance: Resonant impedance sensing with a resonant sensor (such as LC) is based on generating a controlled negative impedance to maintain steady-state oscillation in response to changes in resonance state caused by interaction with a target. Resonant impedance sensing can include: (a) generating a controlled negative impedance at the sensor; (b)... Agent:

08/28/2014 > 36 patent applications in 31 patent subcategories.

20140240003 - Phase lock loop lock indicator: A lock-on detection circuit for a phase-locked loop includes circuitry configured to receive first up and down outputs and second up and down outputs from one or more phase detectors and to determine from the first up and down outputs and the second up and down outputs how well the... Agent:

20140240004 - Phase disciplined, direct digital synthesizer based, coherent signal generator: A phase coherent signal generator apparatus is disclosed that has fast frequency shifting and numerous phase memory points, outputting a coherent continuous phase signal that includes fast switched multiple different frequency bursts. The apparatus comprises: a clock generator including an input that receives a reference clock signal, an output that... Agent:

20140240007 - Drive circuit for power transistor: A turn-on drive circuit for a power transistor comprising a first circuit comprising a resistor and capacitor in parallel and a second circuit comprising a resistor, the second circuit being in series in the drive path with the first circuit. A turn-off drive circuit for a power transistor comprising a... Agent: Control Techniques Limited

20140240006 - Energy delivery system and method for a gate drive unit controlling a thyristor-based valve: The invention concerns energy delivery system and method for a gate drive unit controlling a thyristor-based valve (19). The system comprises at least one current transformer (22) located in the main current path of the valve.... Agent: Alstom Technology Ltd

20140240005 - Pre-charge circuit with reduced process dependence: A pre-charging circuit, such as can be used to pre-charge a data bus, is presented that is largely process independent. A push-pull type of arrangement is used, where the output of the pre-charge circuit is initially connected to a supply level through one transistor, then connect to ground by another... Agent: Sandisk Technologies Inc.

20140240008 - Output driver for energy recovery from inductor based sensor: A system for recovering energy from a sensor couples a battery to an inductive device in the sensor for a period of time, such that a current flows through the inductive device from the battery during the time period. The connections of the inductive device are then reversed for a... Agent: Texas Instruments Deutscland Gmbh

20140240010 - Clock circuit for a microprocessor: A mobile communication device includes an analog clock and a digital clock circuit. The analog clock circuit is configured to generate an oscillating output. The digital clock circuit is configured to generate a digital clock output having a frequency that is substantially equal to the frequency of the oscillating output.... Agent: Blackberry Limited

20140240009 - State machine for low-noise clocking of high frequency clock: Methods, apparatus, and fabrication techniques relating to management of noise arising from capacitance in a clock tree of an integrated circuit. In some embodiments, the methods comprise receiving a signal to adjust a clock having a first rate to a second rate; and ramping, in response to receiving the signal,... Agent: Advanced Micro Devices, Inc.

20140240011 - Method and arrangement for generating a clock signal by means of a phase locked loop: A method and an arrangement for generating a clock signal by a phase locked loop in which the time for adjusting to a prescribed frequency and phase of a clock signal is reduced by virtue of the fact that a plurality of selection signals respectively shifted by a time difference... Agent: Technische Universitaet Dresden

20140240012 - Reference clock compensation for fractional-n phase lock loops (plls): In one embodiment, a method includes determining a phase difference between a reference clock and a feedback clock in even and odd cycles for a phase lock loop (PLL). The even and odd cycles are alternating clock periods. A delta value based on the phase difference is determined. The method... Agent: Marvell World Trade Ltd.

20140240013 - Apparatuses and methods for compensating for power supply sensitivities of a circuit in a clock path: Apparatuses and methods for compensating for differing power supply sensitivities of a circuit in a clock path. One such method includes altering signal timing of at least one of reference and feedback clock signals differently according to variations in power supply voltage to compensate for differences in delay power supply... Agent: Micron Technology, Inc

20140240014 - Semiconductor integrated circuit: In a system in which the phases of a data clock signal and a data signal differ between at an input and at an output, a semiconductor integrated circuit performs a simple BER test without using external equipment and, at the same time, performs a jitter evaluation required for a... Agent: Kabushiki Kaisha Toshiba

20140240015 - Semiconductor device: A semiconductor device includes: a voltage-control-type clock generation circuit having a plurality of stages of first delay elements and whose oscillation frequency is controlled according to a control voltage applied to the first delay elements; a delay circuit having a plurality of stages of second delay elements connected serially; and... Agent: Kabushiki Kaisha Toshiba

20140240016 - Low clock energy double-edge-triggered flip-flop circuit: A double-edge-triggered flip-flop circuit and a method for operating the double-edge-trigger flip-flop circuit are provided. Sub-circuits of a flip-flop circuit are coupled to a ground supply and decoupled the sub-circuits from a power supply when a clock signal is asserted. The sub-circuits generate trigger signals including a first pair of... Agent: Nvidia Corporation

20140240017 - Master-slave flip-flop with low power consumption: In a master-slave flip-flop, the master latch has first and second three-state stages, and a first feedback stage. The slave latch has third and fourth three-state stages, and a second feedback stage. First and second clock switches having opposite phases are provided. The first clock switch is configured in one... Agent:

20140240018 - Current mode logic latch: A current mode logic latch may include a sample stage and a hold stage, the hold stage comprising first and second stage transistors, first and second hold stage current sources, and a hold stage switch. The first hold stage transistor may be coupled at its drain terminal to the drain... Agent: Fujitsu Limited

20140240019 - Current mode logic latch: The second hold stage transistor may be coupled at its drain terminal to the drain terminal of a second sample stage transistor, coupled at its gate terminal to the drain terminal of the first hold stage transistor, and coupled at its drain terminal to a gate terminal of the first... Agent: Fujitsu Limited

20140240020 - Configurable time delays for equalizing pulse width modulation timing: A plurality of PWM generators have user configurable time delay circuits for each PWM control signal generated therefrom. The time delay circuits are adjusted so that each of the PWM control signals arrive at their associated power transistors at the same time. This may be accomplished by determining a maximum... Agent: Microchip Technology Incorporated

20140240021 - Setting switch size and transition pattern in a resonant clock distribution system: Recycling energy in a clock distribution network is provided. A method includes creating a resonant clocking circuit including a clock grid. The method further includes providing resonant structures distributed in the clock grid. The method further includes providing switches that control the resonant structures to switch between a non-resonant mode... Agent: International Business Machines Corporation

20140240022 - Charge measurement: An apparatus comprises a comparator that includes a first input, a second input and an output. The comparator is configured for measuring a difference in voltage between a source coupled to the first input and another source coupled to the second input, and providing information associated with the measured difference... Agent: Atmel Corporation

20140240023 - Super delta monopulse beamformer: An improved approach to direction finding using a super delta monopulse beamformer is disclosed. A super delta channel signal that includes direction finding information from two circular delta channels is formed and output by the super delta monopulse beamformer. This super delta channel signal uses only two channels, but is... Agent: The Aerospace Corporation

20140240024 - Method and apparatus for predictive switching: A method and apparatus for predictive switching an output have been disclosed.... Agent:

20140240025 - Lateral insulated gate turn-off devices: A lateral insulated gate turn-off (IGTO) device includes an n-type layer, a p-well formed in the n-type layer, a shallow n+ type region formed in the well, a shallow p+ type region formed in the well, a cathode electrode shorting the n+ type region to the p+ type region, at... Agent: Pakal Technologies, LLC

20140240026 - Method and apparatus for controlling a gate voltage in high electron mobility transistor: According to example embodiments, a method for controlling a gate voltage applied to a gate electrode of a high electron mobility transistor (HEMT) may include measuring a voltage between a drain electrode and a source electrode of the HEMT, and adjusting a level of the gate voltage applied to the... Agent: Samsung Electronics Co., Ltd.

20140240027 - Vertical insulated-gate turn-off device having a planar gate: An insulated gate turn-off (IGTO) device has a layered structure including a p+ layer (e.g., a substrate), an n-type layer, a p-type layer (which may be a p-well), n+ regions formed in the surface of the p-type layer, and insulated planar gates over the p-type layer between the n+ regions.... Agent: Pakal Technologies, LLC

20140240028 - High voltage switching circuits: The preferred embodiments of the present invention use low voltage transistors to support high voltage switching circuits by connecting low voltage circuits in a stacking configuration. High voltage switching signals are divided into a plurality of small amplitude switching signals before sending into transformers, filters or other circuits. The resulting... Agent:

20140240029 - Bridge switch control circuit and method of operating the same: A method of operating a bridge switch control circuit is disclosed for controlling at least one pair of complementary switches. First, a first driving signal, a second driving signal, a first latching signal, and a second latching signal are provided. The first driving signal and the second driving signal drive... Agent: Delta Electronics, Inc.

20140240030 - Semiconductor switch circuit: A semiconductor switch circuit includes first semiconductor switch units and second semiconductor switch units. The first semiconductor switch units each have a first threshold and two first ends. One first end is connected to a common terminal. The second semiconductor switch units each have a second threshold and two second... Agent:

20140240031 - System and method for tuning a thermal strategy in a portable computing device based on location: Various embodiments of methods and systems for tuning a thermal strategy of a portable computing device (“PCD”) based on PCD location information. In an exemplary embodiment, it may be recognized that the PCD is in an active state and producing thermal energy, or that one or more thermally aggressive components... Agent: Qualcomm Incorporated

20140240032 - Adaptive voltage scaling method, chip, and system: Embodiments of the present invention provide an adaptive voltage scaling method, chip, and device. An aging effect-related state parameter in a chip is obtained at a first voltage adjustment time point. The first voltage adjustment time point is one of multiple voltage adjustment time points set for the chip. An... Agent: Huawei Technologies Co., Ltd.

20140240033 - On-die programming of integrated circuit bond pads: SoC and SiP designs are configured with an antifuse link within the die to allow on-die programming of bond wires connecting package lead fingers to the bond pads on the die. This permits alteration of the bond pad connections for the die, particularly for the ground voltage ground signal (VSS)... Agent: Lsi Corporation

20140240034 - Divide by 2 and 3 charge pump methods: The present disclosure relates to methods and circuits to achieve ground centered charge-pumps generating output voltages of +/−VDD/2 or +/−VDD/3 while achieving high efficiency of power conversion and minimized output impedances. Key points of the disclosure are minimizing number of switching states, reducing the time required for transition through all... Agent: Dialog Semiconductor Gmbh

20140240035 - Synchronized charge pump-driven input buffer and method: An integrated circuit includes (a) an analog-to-digital converter operated according to a first clock signal; and (b) a charge pump circuit providing a negative power supply voltage to the integrated circuit, the charge pump circuit being operated according to a second clock signal having a frequency that is different from... Agent: Linear Technology Corporation

20140240036 - Semiconductor device: Disclosed is a semiconductor device that includes an N-channel MOS transistor and a control voltage generation circuit. The N-channel MOS transistor controls the supply of a power supply voltage obtained by stepping down a DC voltage. The control voltage generation circuit clips the gate voltage of the N-channel MOS transistor... Agent: Renesas Electronics Corporation

20140240037 - Buffer circuit: A buffer circuit includes a first current mirror circuit, a second current mirror circuit, a first transistor, and a second transistor. The first current mirror circuit passes a first mirror current through a second node, corresponding to a first current passed through a first node, and is activated based on... Agent: Kabushiki Kaisha Toshiba

20140240038 - Reference voltage generation circuit: Provided is a reference voltage generation circuit that has a flat temperature characteristic even when there are fluctuations in manufacturing step. After a semiconductor manufacturing process is finished, electrical characteristics of a semiconductor device are evaluated. Temperature characteristic of each reference voltage (VREF) of three unit reference voltage generation circuits... Agent: Seiko Instruments Inc.

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