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Optical mode converter having multiple regions




Optical mode converter having multiple regions


A standard-CMOS-process-compatible optical mode converter transitions an optical mode size using a series of adjacent regions having different optical mode sizes. In particular, in a partial-slab-mode region, which is adjacent to an initial rib-optical-waveguide-mode region, a width of a slab portion of the rib-type optical waveguide decreases and a width of a rib portion of the rib-type optical waveguide decreases to a first minimum tip size. Then, in a slab-mode region,...



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USPTO Applicaton #: #20170045686
Inventors: Jin-hyoung Lee, Ivan Shubin, Xuezhe Zheng, Ashok V. Krishnamoorthy


The Patent Description & Claims data below is from USPTO Patent Application 20170045686, Optical mode converter having multiple regions.


GOVERNMENT LICENSE RIGHTS

This invention was made with U.S. Government support under Agreement No. HR0011-08-9-0001 awarded by DARPA. The U.S. Government has certain rights in the invention.

BACKGROUND

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Field

The present disclosure generally relates to an optical mode converter for an optical interface. More specifically, the present disclosure relates to an optical mode converter for an optical interface that includes an inverse taper with multiple mode regions and an increased minimum tip size.

Related Art

Silicon photonics is a promising technology that can provide large communication bandwidth, large density, low latency and low power consumption for inter-chip and intra-chip connections. In the last few years, significant progress has been made in developing low-cost components for use in inter-chip and intra-chip silicon-photonic connections, including: high-bandwidth efficient silicon modulators, low-loss optical waveguides, wavelength-division-multiplexing (WDM) components, and high-speed CMOS optical-waveguide photo-detectors. Because of technical advances in CMOS processes, many of these components are now available in a commercial CMOS foundry, which may facilitate mass-volume production and, therefore, cost-effective inter-chip and intra-chip interconnects.

In order to enable dense integration, the optical mode in a silicon optical waveguide is typically sub-micron in size. However, when the optical waveguide is used to transfer data in and out from a silicon photonics chip (i.e., to optically couple light in or out from the silicon photonics chip), it usually suffers from significant optical coupling loss because of a huge optical mode size mismatch with external devices, such as an optical fiber (which has an optical mode size of around 10 μm) or a III-V optical gain chip (which has an optical mode size of around 1-3 μm). This severe optical coupling loss adversely affects the energy efficiency of the overall optical link and system.

In order to address this problem, different types of optical mode converters have been implemented in a submicron silicon-on-insulator (SOI) platform. For example, a surface-normal grating coupler has been widely adopted for versatile optical input/output (I/O) because of its excellent CMOS compatibility and wafer-level processing. However, surface-normal grating couplers also exhibit drawbacks, such as a relatively narrow bandwidth (typically 30 nm), polarization dependence, and strong back-reflection. For a specific application such as hybrid silicon-III-V laser integration, an optical interface with broadband, ultra-low coupling loss and low back-reflection is often very critical. Consequently, a surface-normal grating coupler is usually not suitable for these applications.

An optical mode converter is another widely used component in an optical interface between a silicon photonics chip and an optical fiber or other external device that has an expanded mode size. Typically, an optical mode converter on an SOI platform includes a silicon inverse taper and a dielectric (or a polymer) overcladding-type optical waveguide. A silicon inverse taper in conjunction with an overcladding dielectric waveguide has been successfully implemented to convert a submicron optical waveguide mode into an optical mode of a few microns with a very low loss.

In particular, an optical mode converter typically has very low loss because of the optical mode transition enabled by the adiabatic inverse taper with a tip size of approximately 60-80 nm. However, the widely used krypton-fluoride deep-ultraviolet lithography in foundries is currently targeting feature sizes or critical dimensions of around 100-250 nm and argon-fluoride deep-ultraviolet lithography is currently targeting feature sizes or critical dimensions of around 100 nm. Therefore, a 60-80 nm silicon inverse-taper tip size is clearly a challenge for processing using standard CMOS processes. Indeed, most of the existing optical mode converters were fabricated using low-throughput electron-beam lithography. While the current most-advanced CMOS process line with argon-fluoride immersion lithography is capable of feature sizes or critical dimensions of around 20-45 nm, such processing is not widely available and, therefore, may significantly increase the cost of optical mode converters and silicon photonics chips that include the optical mode converters.

Hence, what is needed is an optical mode converter that does not suffer from the above-described problems.

SUMMARY

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One embodiment of the present disclosure provides an integrated circuit that includes: a substrate; a buried-oxide (BOX) layer disposed on the substrate; and a semiconductor layer disposed on the BOX layer. Moreover, in a rib-optical-waveguide-mode region, an optical waveguide is defined by a rib portion in the semiconductor layer having a width along a direction transverse to a symmetry axis of the optical waveguide and a slab portion in the semiconductor layer having a width also along the direction transverse to the symmetry axis. Furthermore, the integrated circuit includes an optical mode converter that includes: a partial-slab-mode region, adjacent to the rib-optical-waveguide-mode region, in which the width of the slab portion decreases and the width of the rib portion decreases to a first minimum tip size; and a slab-mode region, adjacent to the partial-slab-mode region and that excludes the rib portion, in which the width of the slab portion decreases to a second minimum tip size. Additionally, a dielectric layer is disposed on the substrate, where the dielectric layer is disposed over the rib portion, the slab portion and the BOX layer in the partial-slab-mode region, the slab portion and the BOX layer in the slab-mode region, and the BOX layer in a released-mode region adjacent to the slab-mode region and that excludes the semiconductor layer.

Moreover, the optical waveguide may exclude a channel-type optical waveguide in the rib-optical-waveguide-mode region.

Furthermore, the first minimum tip size may be greater than 180 nm and/or the second minimum tip size may be greater than 180 nm.

Additionally, the dielectric layer may include: silicon dioxide, silicon oxynitride, silicon nitride, and/or a polymer.

In some embodiments, lengths of the partial-slab-mode region and the slab-mode region are an order of magnitude greater than the width of the slab portion and the width of the rib portion.

Note that a thickness of the dielectric layer may be based on a desired mode size of the optical mode converter.

Moreover, the optical mode converter may be defined in the integrated circuit prior to metallization and dielectric-stacking fabrication operations. Alternatively, the optical mode converter may be defined in the integrated circuit after metallization and dielectric-stacking fabrication operations.

Furthermore, the integrated circuit may include a dielectric stack with a metal layer as a built-in mask adjacent to the dielectric layer along the direction.

Another embodiment provides a system that includes: a processor; a memory, coupled to the processor, which stores a program module; and the integrated circuit. During operation, the program module may be executed by the processor.

Another embodiment provides a method for converting an optical spot size of an optical signal, which may be performed by the optical mode converter.

This Summary is provided merely for purposes of illustrating some exemplary embodiments, so as to provide a basic understanding of some aspects of the subject matter described herein. Accordingly, it will be appreciated that the above-described features are merely examples and should not be construed to narrow the scope or spirit of the subject matter described herein in any way. Other features, aspects, and advantages of the subject matter described herein will become apparent from the following Detailed Description, Figures, and Claims.

BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is a block diagram illustrating an optical mode converter in accordance with an embodiment of the present disclosure.

FIG. 2 is a drawing illustrating simulated mode-conversion loss of the optical mode converter of FIG. 1 as a function of the tip size in accordance with an embodiment of the present disclosure.

FIG. 3 is a drawing illustrating simulated mode-conversion loss of the optical mode converter of FIG. 1 as a function of the slab tip size in accordance with an embodiment of the present disclosure.

FIG. 4 is a drawing illustrating fabrication of the optical mode converter of FIG. 1 prior to metallization and dielectric-stacking fabrication operations in accordance with an embodiment of the present disclosure.

FIG. 5 is a drawing illustrating fabrication of the optical mode converter of FIG. 1 after metallization and dielectric-stacking fabrication operations in accordance with an embodiment of the present disclosure.

FIG. 6 is a block diagram illustrating an integrated circuit that includes the optical mode converter of FIG. 1 in accordance with an embodiment of the present disclosure.

FIG. 7 is a block diagram illustrating a system that includes the integrated circuit of FIG. 6 in accordance with an embodiment of the present disclosure.

FIG. 8 is a flow chart illustrating a method for converting an optical spot size of an optical signal in accordance with an embodiment of the present disclosure.




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stats Patent Info
Application #
US 20170045686 A1
Publish Date
02/16/2017
Document #
14823954
File Date
08/11/2015
USPTO Class
Other USPTO Classes
International Class
/
Drawings
9


Optic Optical Semiconductor Waveguide

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20170216|20170045686|optical mode converter having multiple regions|A standard-CMOS-process-compatible optical mode converter transitions an optical mode size using a series of adjacent regions having different optical mode sizes. In particular, in a partial-slab-mode region, which is adjacent to an initial rib-optical-waveguide-mode region, a width of a slab portion of the rib-type optical waveguide decreases and a width |Oracle-International-Corporation
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