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OF THE INVENTION
This patent application is related to pending U.S. patent application Ser. No. 13/343,970 filed Jan. 5, 2012, entitled COHERENT SPIN FIELD EFFECT TRANSISTOR. This application is also related to U.S. Patent Application 61/936,399 entitled Voltage Switchable Non-Local Spin-FET and Methods of Making Same. The disclosures of both these application are incorporated-by-reference herein.
This application claims benefit of the filing date of Provisional Patent Application 61/766,025 filed Feb. 18, 2013. The entire disclosure of the benefit application is incorporated herein-by-reference.
Aspects of the inventions disclosed and claimed herein were made in the course of work supported by funding grant NSF/MRSEC DMR-0820521. The United States Government may have certain rights in and to those inventions. The inventions disclosed and claimed herein were also made with the support of SRC Funding, including SRC-NRI Task I.D. 2101.01, GRC Nanomanufacturing Task I.D. 2123.01, SRC-NRI Task I.D. 2398.001 and C-Spin theme 2381.01. The support of the SRC is gratefully acknowledged.
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OF THE PRIOR ART
Manipulation of magnetically ordered states by electrical means is among the most promising of the approaches towards developing novel spintronic devices. Incorporating this functionality into a device is a Holy Grail of “spintronics”. The reasons are simple enough: voltage control of the magnetic state enables nonvolatile device elements whose state may be switched without large current densities and power consumption. Large current densities are, for example, required by spin-torque transfer memory element magnetic devices currently under development. The control of the magnetic state enables non-volatile RAM “on the chip” and such nonvolatile elements, if realized, would eliminate latency time and significantly enhance computing power without a major increase in power consumption: indeed a decrease in power consumption is anticipated [Binek 05, Zhirnov 05, Ney 03, Dery 07]. Current random access memory (RAM) elements require refresh power, and the information is lost when power is lost, which is often not desirable. Overall, a solid state device with a magnetically ordered state is then a memory element that is not volatile or easily “lost”.
Most efforts at providing magnetic memory element solid state devices have used magnetic spin valves or magnetic tunnel junction type structures. With electric (voltage) control of the memory elements, more complex schemes that require a magnetic fringe field to “write” a memory element (as in a magnetic tunnel junction) or a high-current-density pulse (as in a spin-torque transfer element) are not required. A novel approach to voltage controlled magnetic devices envisions the use of a magneto-electric substrate; materials where an applied voltage induces a magnetic moment and where the interface polarization is large [Andreev 96, Belshchenko 10, Dowben 11, He 10, Wu 11]. Here we disclose the structure and the potential of such devices.
Background of Magneto-Electronics
To be implemented in a pragmatic device, controlled by a magneto-electric means, the magneto-electric coercive voltage must be small, the switching speed high, the energy cost and dissipation low. The barriers to magneto-electric switching are thought to scale roughly with volume, so thinner films facilitate this voltage controlled switching of the interface polarization. Of course this also requires that the magneto-electric properties are retained in the thin film limit at elevated temperatures, but if this is indeed the case then the material requires a smaller critical voltage, and exhibits higher switching speeds as well [Fallarino 14].
Unfortunately there is a limit to preserving useful magneto-electric properties, as in the thin film limit the boundary magnetization dominates. We have shown that for ultra-thin chromia films close to the Neel temperature, a magnetic field alone can switch the entire antiferromagnetic spin structure through Zeemann coupling with the boundary magnetization [Fallarino 14]. Reliable isothermal switching of magnetization, by application of a voltage needs to be demonstrated and must be reliable at room temperature and above.
Magneto-electric materials, where a net magnetic moment is induced by an electric field, are a key to this approach of voltage controlled magnetic devices. The basic idea to the magneto-electric device is simple. An applied electric field E results in the induction of net magnetization M [Fiebig 05]. Normally, this linear magneto-electric effect, Mi=αijEj, is governed by an induction constant (αij ) that is very, very small (on the scale of ps/m, 4.13 ps/m in the case of the inorganic magneto-electric Cr2O3). But the key aspect of the magneto-electric is the boundary magnetization, i.e. the high surface polarization, that accompanies the magneto-electric in the single domain state [Andreev 96, Belshchenko 10, He 10].
The existence of net magnetization at the surface or boundary of magnetoelectric antiferromagnets has been predicted using symmetry arguments [Andreev 96, Belshchenko 10]. We have demonstrated that interface magnetization direction [Dowben 11, Wu 11] and control of the domain size can be achieved with voltage in Cr2O3 [He 10], and Fe2TeO6 [Wang 14] (another magneto-electric). It is this interface polarization that is key to the control of the spin state and switching of a free magnetic layer in a magneto-electric controlled device, as the bulk magneto-electric moment is otherwise quite small for all “reasonable” applied voltages. Isothermal switching between the single domain states is achieved when an electric field, E, and a small symmetry breaking magnetic field, H, are simultaneously applied such that the magnitude of the product E H overcomes a critical threshold. Note that the symmetry breaking H-field can be scaled down to arbitrary small values when the applied E-field is scaled up accordingly. We have demonstrated that the Earth's magnetic field is sufficient to achieve voltage-control of boundary magnetization in a chromia thin film.
Early attempts in electrically controlled exchange bias tried to exploit the linear magneto-electric susceptibility of the antiferromagnetic material Cr2O3 as an active exchange bias pinning system [Borisov 05], but controlling the interface magnetization is much more effective. In a magnetoelectric material, an applied electric field induces a net magnetic moment at the interface, which can be used to electrically manipulate the magnetic states of an adjacent exchange coupled ferromagnetic film. The small value of the magnetoelectric susceptibility of Cr2O3 led many researchers to the conclusion that multiferroic materials are better suited for this purpose. Such multiferroic materials have two or more ferroic order parameters, such as ferroelectric polarization and (anti)ferromagnetic order. Coupling between these order parameters has been demonstrated [Chu 08, Zhao 06], however, it is also still typically weak, and the theoretical upper limit of the magnetoelectric susceptibility is rarely reached. Due to the surface and interface magnetization in the single phase Cr2O3 material, or other magneto-electric (LuFeO3 for example), we overcome the limitation of the small magneto-electric coefficient that plagues the development of voltage controlled magnetic devices using other materials, including multiferroic materials. We disclose here non-volatile electric (voltage) control of boundary magnetization and its application in a spin-transistor and a ultra low power mram device [He 10, Wu 11]. This effect reflects the switching of the bulk antiferromagnetic domain state and the interface magnetization coupled to it. The switchable exchange bias sets in exactly at the bulk Neel temperature [He 10, Wu 11]. In fact, using a ferromagnetic Pd/Co multilayer deposited on the (0001) surface of a Cr2O3 single crystal, we achieved reversible, room temperature isothermal switching of the exchange bias field between positive and negative values by reversing the electric field while maintaining a permanent magnetic field [He 10].
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OF THE INVENTION
To best understand the subject invention, start with the basic concept of a spin-field effect transistor (a spin-FET), as illustrated in FIG. 1. We modify that structure into a magneto-electric spin-FET. The approach of having spin precession occur down a narrow channel conductor would normally require an external field. And source and drain have to be “magnetized” through spin-torque transfer or external fields. Since the gate dielectric has generally no interface polarization, the above, more complex scheme, also requires a magnetic fringe field to “drive” the spin precession of the logic element. To do this on the transistor level, one transistor at a time, without a magneto-electric, requires a complex architecture so that a local magnetic field can be applied in some fashion, e.g. [Durlam 03, van Dijken 02, Schmidt 00]. Addition wiring to create fringe fields is needed, and the spatial densities of an array of such more conventional spin-FET is extremely limited because the extrinsic magnetic fields will be difficult to restrict, without the stray fields influencing adjacent transistors in any dense array.
The magneto-electric spin-FET concept outlined here is to use Cr2O3, or any other suitable magneto-electric (e.g. LuFeO3, etc.), as a gate dielectric for a spin-FET and exploit the voltage controlled interface magnetization to polarize the narrow channel conductor. The device concept benefits from the key fact that magneto-electrics are in fact great dielectrics and make great dielectric gate barriers. The success of the whole idea behind the magneto-electric spin-FET is based on the ability of the magneto-electric interface to polarize the narrow (in this case very thin) narrow channel conductor/semiconductor channel of the FET intimate contact, while at the same time acting as the gate dielectric. Furthermore, this interface polarization of the magneto-electric gate is voltage controlled (a consequence of the magneto-electric properties), and under many conditions also not volatile (i.e. requiring no refresh current). As this interface polarization may be voltage controlled, a nonvolatile transistor that combines both memory and logic at low power can be provided. Dimensions of the device will vary substantially with the materials selected. In general, the conduction channel should have a width of no more than 1-2 nm, with thinner generally being better. Conduction channels may be as thin as 2-5 monolayers (ML) in special cases. At the other extreme, if, e.g., properly doped GaAs is selected, a thicker channel, on the order of up to 100 nm may be used. Similarly, the thickness of the chromia gate, either bottom or top, will be situation dependent. There is a limit to the thinness of the chromia or other material employed, and it probably needs to be thicker than about 3-5 nm. Thicknesses on up to 200 angstroms may be effective.
Quantum mechanical exchange coupling between the boundary magnetization and the spins of the carriers in the narrow channel of the FET gives rise to damped precession of the spins injected from the source of the FET into the channel. When utilizing channel materials with virtually zero spin-orbit coupling, such as graphene or Si, the effective exchange field of the voltage-controlled boundary magnetization is the sole source for spin precession. If the narrow channel conductor is sufficiently thin, the transport channel will be spin polarized by the proximity effect, providing coherent spin transport or modulated spin precession. For a given remanent boundary magnetization, the exchange field will determine the spin state of the carriers at the analyzer (FM drain) in concert with the length of the channel. Electrical spin injection and controlled spin precessional motion in silicon lateral transport devices using externally applied magnetic fields at room temperature and above has been demonstrated [van't Erve 07, Jonker 07]. Spin field effect transistors [Dery 07, Semenov 07, Semenov 10, Zaliznyak 10], have certainly been described using graphene and other narrow channel conductors.
BRIEF DESCRIPTION OF THE DRAWINGS
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The drawings constitute part of the disclosure of this patent application and are intended to assist in more fully disclosing the invention.
FIG. 1 is a schematic illustration of a spin-FET which may be adapted to the spintronic device of this patent application.
FIG. 2 is an illustration of a first embodiment of the electronically controlled spin-FET of this invention.
FIG. 3 is an illustration of a second embodiment of the electronically controlled spin-FET of this invention.
FIG. 4 is a schematic illustrating a multistate logic device of the invention.
FIG. 5 is a schematic of an electro-magnetic spin-FET of the invention in a top gate embodiment.
FIG. 6 is a schematic of a voltage-controlled magnetic tunnel junction where free magnetic layer magnetization is controlled by a magneto-electric interface, separating the read and write aspects of the device.
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OF THE INVENTION
The device described below works because of the huge interface polarization of dielectric chromia (described below as the gate dielectric). This boundary polarization is voltage controlled and described above [He 10, Belashchenko 10, Wang 14]. The narrow channel (i.e. thin) conductor (graphene, InP, GaSb, PbS, MoS2, WS2, MoSe2, WSe2, etc.) of the FET schemes described below are polarized by this very high interface polarization, a proximity effect. The proximity effect was originally described as a mean field effect in magnetism, not directly attributed to any specific material and is embodied by the Landau-Ginzburg equation, for which solutions are known for some boundary conditions [Dowben 91, Miller 93]. We need to divide the concept into actually two types of devices nonetheless.
(A) The Large Field, Very Short Channel Regime:
Conduction bands are strongly exchange-split. Spin precession length is microscopic, and spins completely decohere over small lengths, or do not precess. Here we have a magnetized semiconductor sandwiched between leads in the lateral geometry. In this regime it is sufficient to have one magnetic lead to measure magneto-resistance while the source contact can be a nonmagnetic metal. We estimate a high on/off ratio with magneto-resistance larger than 200% at room temperature, with little effort at improving the source and drain polarizations. In this regime, the magnetization of the electrode and of the magneto-electric\'s boundary magnetization should not be orthogonal.
Here, as shown in FIG. 2, the dark “blue” is the narrow channel conductor 202, with the dielectric chromia grey below 204, with an electron/hole channel 206/208 on top of the chromia. Gate electrode 210 is provided “underneath” the chromia in this embodiment. As the narrow channel conductor in in proximity to a magneto-electric oxide in this embodiment, it must be recognized that the narrow channel conductor may well be extrinsically doped p-type by the gate, if too thin, but both n- and p-type channel conductors are known. We have recently demonstrated we can grow the structure above. The narrow (thin) channel conductor/semiconductor (light blue) could be anything really, suitable to the task (graphene, InP, GaAs, GaSb, PbS, MoS2, WS2, MoSe2, WSe2, etc.).
The switching of only the source or drain electrode magnetization may be necessary and might be achieved at the “set-up” of the transistor, after fabrication or later by spin-torque transfer of other voltage controlled switching, as in a voltage controlled magnetic tunnel junction or spin valve. Those of skill in the art will recognize that in many cases, the conductive elements, particularly the alloyed materials, can be enhanced by appropriate doping. Suitable dopants include Mn, Cr, Co, V, Sc, Y, Gd, Nd, Tb, Ho, Dy, Sm, La and Yb. Selecting GaAs for example, these would all substitute into the gallium sites, while S, Se and Te might occupy the arsenide sites or vacancies.
(B) Low-Field Regime: