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Semiconductor device and a method of manufacturing the same

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Semiconductor device and a method of manufacturing the same


A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation...
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USPTO Applicaton #: #20140159245
Inventors: Taku Kanaoka, Masashi Sahara, Yoshio Fukayama, Yutaro Ebata, Kazuhisa Higuchi, Koji Fujishima



The Patent Description & Claims data below is from USPTO Patent Application 20140159245, Semiconductor device and a method of manufacturing the same.

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stats Patent Info
Application #
US 20140159245 A1
Publish Date
06/12/2014
Document #
14178781
File Date
02/12/2014
USPTO Class
257773
Other USPTO Classes
International Class
01L23/48
Drawings
32


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Active Solid-state Devices (e.g., Transistors, Solid-state Diodes)   Combined With Electrical Contact Or Lead   Of Specified Configuration  

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