freshpatentsnav7small (2K)

n/a

views for this patent on FreshPatents.com
updated 06/14/13

    Free Services  

  • MONITOR KEYWORDS
  • Enter keywords & we'll notify you when a new patent matches your request (weekly update).

  • ORGANIZER
  • Save & organize patents so you can view them later.

  • RSS rss
  • Create custom RSS feeds. Track keywords without receiving email.

  • ARCHIVE
  • View the last few months of your Keyword emails.

  • COMPANY PATENTS
  • Patents sorted by company.

Storage array controller for solid-state storage devices   

pdficondownload pdfimage preview


Abstract: A storage array controller provides a method and system for autonomously issuing trim commands to one or more solid-state storage devices in a storage array. The storage array controller is separate from any operating system running on a host system and separate from any controller in the solid-state storage device(s). The trim commands allow the solid-state storage device to operate more efficiently. ...

Agent: - Cambridge, MA, US
Inventors: Daniel L. Rosenband, Michael John Sebastian Smith
USPTO Applicaton #: #20120059976 - Class: 711103 (USPTO) - 03/08/12 - Class 711 
Related Terms: Commands   Operating System   Storage Device   
view organizer monitor keywords


The Patent Description & Claims data below is from USPTO Patent Application 20120059976, Storage array controller for solid-state storage devices.

pdficondownload pdf

CROSS-REFERENCE TO RELATED APPLICATIONS

If any definitions, information, etc. from any parent or related application and used for claim interpretation or other purpose conflict with this description, then the definitions, information, etc. in this description shall apply.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates generally to US Classification 711/216. The present invention relates to storage array controllers and more particularly to storage array controllers for storage arrays that include solid-state storage devices.

2. Description of the Related Art

U.S. Pat. No. 6,480,936 describes a cache control unit for a storage apparatus.

U.S. Pat. No. 7,574,556 and U.S. Pat. No. 7,500,050 describe destaging of writes in a non-volatile cache.

U.S. Pat. No. 7,253,981 describes the re-ordering of writes in a disk controller.

U.S. Pat. No. 6,957,302 describes the use of a write stack drive in combination with a normal drive.

U.S. Pat. No. 5,893,164 describes a method of tracking incomplete writes in a disk array.

U.S. Pat. No. 6,219,289 describes a data writing apparatus for a tester to write data to a plurality of electric devices.

U.S. Pat. No. 7,318,118 describes a disk drive controller that completes some writes to flash memory of a hard disk drive for subsequent de-staging to the disk, whereas for other writes the data is written directly to disk.

U.S. Pat. No. 6,427,184 describes a disk controller that detects a sequential I/O stream from a host computer.

U.S. Pat. No. 7,216,199 describes a storage controller that continuously writes write-requested data to a stripe on a disk without using a write buffer.

US Publication 2008/0307192 describes storage address re-mapping.

BRIEF

SUMMARY

OF THE INVENTION

The invention includes improvements to a storage array controller for storage arrays that include solid-state storage devices. The improvements include the ability of a storage array controller to autonomously issue disk trim commands to one or more solid-state storage devices.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

So that the features of the present invention can be understood, a more detailed description of the invention, briefly summarized above, may be had by reference to typical embodiments, some of which are illustrated in the accompanying drawings. It is to be noted, however, that the accompanying drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of the scope of the invention, for the invention may admit to other equally effective embodiments. The following detailed description makes reference to the accompanying drawings, which are now briefly described.

FIG. 1: shows a computer system including storage array controller that issues autonomous disk trim commands.

FIG. 2A shows a computer system with a storage array containing two SSDs.

FIG. 2B shows a device driver that issues autonomous disk trim commands.

FIG. 2C shows a device driver that is part of a hypervisor and that issues autonomous disk trim commands.

FIG. 2D shows a hyperdriver that is part of a hypervisor in a Windows Virtualization architecture and that issues autonomous disk trim commands.

FIG. 2E shows a hyperdriver that is part of a hypervisor in a Windows Hyper-V architecture and that issues autonomous disk trim commands.

FIG. 2F shows a hyperdriver as part of a VMWare ESX architecture and that issues autonomous disk trim commands

FIG. 3: shows an example of an implementation of a storage array controller that maintains a map and a freelist.

FIG. 4: shows an example of an implementation of a storage array controller that performs garbage collection and issues autonomous disk trim commands.

FIG. 5 illustrates an example of an implementation of a garbage collection algorithm.

FIG. 6 shows an example of an implementation of a storage array controller for use with one or more large-capacity SSDs and illustrates the storage structure.

FIG. 7 shows an example of an implementation of a storage array controller for use with one or more large-capacity SSDs and illustrates the use of superblocks.

FIG. 8 shows a screenshot of a BIOS Configuration Utility for a storage array controller.

While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described in detail. It should be understood, however, that the accompanying drawings and detailed description are not intended to limit the invention to the particular form disclosed, but on the contrary, the intention is to cover all modifications, equivalents and alternatives falling within the spirit and scope of the present invention as defined by the accompanying claims.

DETAILED DESCRIPTION

OF THE INVENTION

In the following detailed description and in the accompanying drawings, specific terminology and images are used to provide a thorough understanding. In some instances, the terminology and images may imply specific details that are not required to practice all embodiments. Similarly, the embodiments described and illustrated are representative and should not be construed as precise representations, as there are prospective variations on what is disclosed that will be obvious to someone with skill in the art. Thus this disclosure is not limited to the specific embodiments described and shown but embraces all prospective variations that fall within its scope. For brevity, not all steps may be detailed, where such details will be known to someone with skill in the art having benefit of this disclosure.

This invention focuses on storage arrays that include solid-state storage devices. The solid-state storage device will typically be a solid-state disk (SSD) and we will use an SSD in our examples, but the solid-state storage device does not have to be an SSD. An SSD may for example, comprise flash devices, but could also comprise other forms of solid-state memory components or devices (SRAM, DRAM, MRAM, volatile, non-volatile, etc.), a combination of different types of solid-state memory components, or a combination of solid-state memory with other types of storage devices (often called a hybrid disk). Such storage arrays may additionally include hard-disk drives (HD or HDD).

This invention allows a storage array controller to autonomously issue a disk trim command. The disk trim command allows an OS to tell an SSD that the sectors specified in the disk trim command are no longer required and may be deleted. The disk trim command allows an SSD to increase performance by executing housekeeping functions, such as erasing flash blocks, that the SSD could not otherwise execute without the information in the disk trim command. The algorithms of this invention allow a storage array controller to autonomously issue disk trim commands, even though an operating system may not support the trim command. The storage array controller is logically located between the host system and one or more SSDs. An SSD contains its own SSD controller, but a storage array controller may have more resources than an SSD controller. This invention allows a storage array controller to use resources, such as larger memory size, non-volatile memory, etc. as well as unique information (because a storage array controller is higher than the SSD controller in the storage array hierarchy, i.e. further from the storage devices) in order to manage and control a storage array as well as provide information to the SSD controller.

GLOSSARY AND CONVENTIONS

Terms that are special to this field of invention or specific to this invention are defined in this description and the first use (and usually the definition) of such special terms are highlighted in italics for the convenience of the reader. Table 1 shows a glossary for the convenience of the reader. If any information from Table 1 used for claim interpretation or other purpose conflict with the description text, figures or other tables, then the information in the description shall apply.

In this description there are several figures that depict similar structures with similar parts or components. For example several figures show a disk command. Even though disk commands may be similar in several figures, the disk commands are not necessarily identical. Thus, as an example, to avoid confusion a disk command in FIG. 1 may be labeled “Disk Command (1)” and a similar, but not identical, disk command in FIG. 2 is labeled “Disk Command (2)”, etc.

TABLE 1 Glossary of Terms Array Block Address Combination of D and DBA. (ABA) Block A region of a flash memory (also used for Sector). Clean A flash page that is not dirty. Device Driver Typically software that is coupled to a controller. Dirty A flash page that is no longer required (also invalid, obsolete). Disk (D) Identifies a disk (may be HDD or SSD). Disk Block Size (DBS) The block or sector size of a physical disk. Disk Command A command as received by a disk. Disk Controller The logic on a disk (HDD or SSD), as opposed to Storage Array Controller that is separate from a disk. Disk Logical Block The LBA that identifies the sector or block on Address (DBA) a disk. Disk Sector A region of a disk (e.g. 512 bytes). See also Sector. Disk trim Command Trim Command received by a disk (see also Trim Command). Field Part of a data structure. Flash Block Part of a flash memory chip. Flash blocks contain flash pages. Flash Page Part of a flash memory chip. Free Block (FB) A block (e.g. ABA) that is free (unused) and ready for use. Free Superblock (FSB) A superblock in which all blocks are free (unused) blocks. Freelist A list of free (i.e. unused) blocks or sectors (e.g. LBAs, ABAs). Garbage (G) A value in a data structure that indicates a block or sector is ready to be erased. Garbage Collection (GC) Relocating data to new locations and erasing the old locations. Copying flash pages to new flash blocks and erasing old flash blocks. Granularity An amount of storage (e.g. 512 bytes). Hard Disk (HD) A mechanical disk, also Hard Disk Drive (HDD). Host Block Address The LBA used by the host to address a (HBA) storage array controller. Host Block Size (HBS) The block or sector size seen by the host. Host Command The commands as transmitted by the host.

Download full PDF for full patent description/claims.




You can also Monitor Keywords and Search for tracking patents relating to this Storage array controller for solid-state storage devices patent application.

Patent Applications in related categories:

20130151752 - Bit-level memory controller and a method thereof - The present invention is directed to a bit-level memory controller and method adaptable to managing defect bits of a non-volatile memory. A bad column management (BCM) unit retrieves a bit-level mapping table, in which defect bits are respectively marked, based on which the BCM unit constructs a bit-level script (BLS) ...

20130151765 - Cluster based non-volatile memory translation layer - Methods of operating non-volatile memory devices including dividing the non-volatile memory device into a plurality of sequentially addressed clusters, wherein each cluster contains a plurality of sequentially addressed logical blocks, and where at least one cluster of the plurality of sequentially addressed clusters addresses a different number of sequentially addressed ...

20130151756 - Data de-duplication and solid state memory device - Example methods and apparatus concern identifying placement and/or erasure data for a flash memory based solid state device that supports de-duplication. One example apparatus include a processor, a memory, a set of logics and an interface to connect the processor, the memory, and the set of logics. The apparatus may ...

20130151761 - Data storage device storing partitioned file between different storage mediums and data management method - A data management method for a data storage device includes receiving a write request; partitioning the file into first and second portions; encrypting the first portion, and storing the encrypted first portion in a first storage medium and the second portion in a second storage medium. ...

20130151751 - High speed serial peripheral interface memory subsystem - A memory subsystem is disclosed. The memory subsystem includes a serial peripheral interface (SPI) double data rate (DDR) volatile memory component, a serial peripheral interface (SPI) double data rate (DDR) non-volatile memory component coupled to the serial peripheral interface (SPI) double data rate (DDR) volatile memory component and a serial ...

20130151757 - Independent write and read control in serially-connected devices - A memory device, comprising a first control input port, a second control input port, a third control input port, a data input port, a data output port, an internal memory and control circuitry. The control circuitry is responsive to a control signal on the first control input port to capture ...

20130151754 - Lba bitmap usage - Systems and methods are disclosed for logical block address (“LBA) bitmap usage for a system having non-volatile memory (“NVM”). A bitmap can be stored in volatile memory of the system, where the bitmap can store the mapping statuses of one or more logical addresses. By using the bitmap, the system ...

20130151755 - Non-volatile storage systems with go to sleep adaption - A non-volatile memory system goes into a low-power standby sleep mode to reduce power consumption if a host command is not received within delay period. The duration of this delay period is adjustable. In one set of embodiments, host commands can specify the delay value, the operation types to which ...

20130151758 - Nonvolatile memory device - A nonvolatile memory device includes: N (N is an integer equal to or greater than 2) number of nonvolatile memory cells disposed in a flag area of a page, N number of flag page buffers configured to input and output flag data to and from the nonvolatile memory cells of ...

20130151760 - Nonvolatile memory device and operating method thereof - Disclosed is a memory system which includes a nonvolatile memory device configured to store data information; and a memory controller configured to control the nonvolatile memory device. The memory controller provides the nonvolatile memory device with a program command sequence including program speed information according to an urgency level of ...

20130151762 - Storage device - The present invention aims to improve the performance of accessing flash memory used as a storage medium in a storage device. In the storage device in accordance with the present invention, a storage controller, before accessing the flash memory, queries a flash controller as to whether the flash memory is ...

20130151759 - Storage device and operating method eliminating duplicate data storage - A storage device includes storage media and a controller. The controller includes a de-duplication table that manages hash information for data stored in the storage media, and compares hash information for received write-requested data with hash information managed by the de-duplication table to determine whether the write-requested data is duplicate ...

20130151763 - Storage system having a plurality of flash packages - A storage system 100, which has a plurality of flash packages 230, has a function for minimizing the imbalance of the number of deletions of each block inside the flash package 230 and a block-unit capacity virtualization function, and efficiently manifests lessening of the imbalance of the number of deletions ...

20130151764 - Systems and methods for storing data in a multi-level cell solid state storage device - This disclosure is related to systems and methods for storing data in multi-level cell solid state storage devices, such as Flash memory devices. In one example, a multi-level cell memory array has programmable pages, a first page having a first programming time, and a second page having a second programming ...

20130151753 - Systems and methods of updating read voltages in a memory - A method includes receiving hard bit data and soft bit data corresponding to a portion of a memory, where each storage element of the memory stores multiple bits per storage element. The hard bit data and the soft bit data is received in connection with reading a single bit of ...


###
monitor keywords

Other recent patent applications listed under the agent :



Keyword Monitor How KEYWORD MONITOR works... a FREE service from FreshPatents
1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored.
3. Each week you receive an email with patent applications related to your keywords.  
Start now! - Receive info on patent apps like Storage array controller for solid-state storage devices or other areas of interest.
###


Previous Patent Application:
Storage array controller for flash-based storage devices
Next Patent Application:
Integrated circuit for executing external program codes and method thereof
Industry Class:
Electrical computers and digital processing systems: memory

###

FreshPatents.com Support - Terms & Conditions
Thank you for viewing the Storage array controller for solid-state storage devices patent info.
- - - AAPL - Apple, BA - Boeing, GOOG - Google, IBM, JBL - Jabil, KO - Coca Cola, MOT - Motorla

Results in 1.45609 seconds


Other interesting Freshpatents.com categories:
Medical: Surgery Surgery(2) Surgery(3) Drug Drug(2) Prosthesis Dentistry   g2