Semiconductor integrated circuit device

This application is a continuation of U.S. application Ser. No. 11/109,660, filed Apr. 20, 2005, and which application claims priority from Japanese patent application No. 2004-124683 filed on Apr. 20, 2004, the contents of which are hereby incorporated by reference into this application.

The present invention relates to a semiconductor integrated circuit device, and more particularly to a technique that can be effectively applied to, for instance, a system large scale integrated circuit (LSI) in which each of a plurality of functional modules is divided into circuit blocks and power supplied is turned on or off according to the operation or non-operation of each functional module.

There is Japanese Unexamined Patent Publication No. 2002-026711, which discloses a configuration in which the circuit is divided into a circuit block consisting of a MOSFET having a low threshold voltage and a circuit block consisting of a MOSFET having a high threshold voltage, the leak current is reduced by cutting off power supply to the circuit blocks of the low threshold voltage in the standby mode when the semiconductor integrated circuit device is not operating, and a gate circuit known as a wrapper is provided on the route on which its input signals and output signals are communicated. Also, the existence of Japanese Unexamined Patent Publication No. 2003-218682 is reported, which discloses a configuration comprising a sending-side circuit block having a power switch, a receiving-side circuit block, and a micro I/O circuit for supplying output signals from the sending-side circuit block to the receiving-side circuit block as input signals, in which the micro I/O circuit prevents the output signals from being propagated with a control signal from the receiving-side circuit block when power supply to the sending-side circuit block is cut off by the power switch. However neither of these patent references makes any mention of technical problems the invention under this application intends to solve.

[Patent Reference 1] Japanese Unexamined Patent Publication No. 2002-026711

[Patent Reference 2] Japanese Unexamined Patent Publication No. 2003-218682

According to Patent Reference 1, the whole LSI is divided into a low-threshold voltage circuit block and a high-threshold voltage circuit block and a leak current is reduced by cutting off power supply to the low-threshold voltage circuit block when the LSI is in the standby mode. Therefore, where a plurality of functions are mounted on a single semiconductor integrated circuit device as in a system LSI and there are both operating functional blocks and non-operating functional blocks, the above-stated technique of power saving by cutting off power supply to non-operating functional blocks cannot be applied. On the other hand, Patent Reference 2 discloses a configuration in which the circuit is divided into functional blocks, and power supply to standing-by circuit blocks is cut off. However, this configuration requires a special circuit block to connect the two circuit blocks, i.e. the micro I/O circuit, to prevent the through current, which would arise in the circuit block to which power is supplied as a result of the floating of the output signals of the circuit block to which power supply has been cut off. This is also true of the configuration according to Patent Reference 1, wherein the low-threshold voltage circuit block to which power supply is cut off is provided with circuit blocks known as an output wrapper and an input wrapper.

These configurations in which are arranged, apart from circuit blocks to perform the essential functions of the circuit, circuit blocks which prevent unfixed signals in the circuit block to which power supply has been cut off is prevented from being transmitted to the circuit block to which power is supplied, such as the wrapper and the micro I/O circuit, involve a problem of increased man-hours spent on the designing of circuit block arrangement for that purpose. Especially the configuration according to Patent Reference 2 involves a problem of requiring different ways of control to match four cases of power cut-off, as stated in paragraph 0020 of the specification, because where the micro I/O circuit has a level changing function, the earlier stage is supplied with the same source voltage as the sending-side circuit block and the later stage is supplied with the same source voltage as the receiving-side circuit block, with the consequence that one circuit block is supplied with a common source voltage to a different circuit block.

An object of the present invention is to provide a semiconductor integrated circuit device which achieves multi-functionalization and power saving with a simple configuration. Another object of the invention is to provide semiconductor integrated circuit device enhanced in design efficiency while achieving multi-functionalization and power saving. The aforementioned and other objects and novel features of the invention will become apparent from the following description in this specification when taken in conjunction with the accompanying drawings.

To briefly describe a typical aspect of the invention disclosed in the present application, the semiconductor integrated circuit device has first through third circuit blocks, wherein the first circuit block has a first power supply state in which the operation of internal circuits is guaranteed in accordance with an instruction from the third circuit block and a second power supply state in which the operation of the internal circuits is not guaranteed, the second circuit block has an input unit which receives signals supplied from the first circuit block, and the input unit of the second circuit block has an input circuit which, in accordance with the control signal which was responded to when the second power supply state was instructed by the third circuit block to the first circuit block, causes a specific signal level to be maintained in compliance with the operating voltage of the second circuit block irrespective of the signal supplied from the first circuit block.

With a simple configuration, inputs at unfixed levels to a circuit block in an operating state can be prevented while saving power consumption by interrupting power supply to a standing-by circuit block. The control signal for the prevention of inputs at unfixed levels can be easily generated and matched with power cut-off control.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1(A) and 1(B) show the configurations of the smallest unit of a semiconductor integrated circuit device, which is a preferred embodiment of the present invention.

FIG. 2 is a timing chart illustrating the operation of the circuit block 3 in FIG. 1.

FIG. 3 is an overall block diagram of a semiconductor integrated circuit device, which is a preferred embodiment of the invention.

FIG. 4 is a circuit diagram of an example of input circuit provided in the micro input/output circuit of FIG. 3.

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