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10/22/09 - USPTO Class 341 |  34 views | #20090261999 | Prev - Next | About this Page  341 rss/xml feed  monitor keywords

Device and method for testing of digital-to-analog converter

USPTO Application #: 20090261999
Title: Device and method for testing of digital-to-analog converter
Abstract: A current-steering digital-to-analog converter (DAC) is tested using a test component having a relaxation oscillator with an oscillation frequency based on the output current of the DAC. A series of test values is provided in sequence to the DAC for conversion to an output current with a magnitude that varies with the test values. The test component counts the number of oscillations (“the oscillation count”) of the relaxation oscillator over a fixed duration that is substantially equal for each test value. As the number of oscillations over the fixed duration depends on the oscillation frequency of the relaxation oscillator, which in turn is based on the magnitude of the output current, the oscillation count can be used as a relative measure of the magnitude of the output current for the corresponding test value. Accordingly, the oscillation counts for the test values can be used to determine operational characteristics of the DAC. (end of abstract)



Agent: Larson Newman & Abel, LLP - Austin, TX, US
Inventors: Ravi Ramaswami, Michael A. Bourland, Feng Zhao
USPTO Applicaton #: 20090261999 - Class: 341120 (USPTO)

Device and method for testing of digital-to-analog converter description/claims


The Patent Description & Claims data below is from USPTO Patent Application 20090261999, Device and method for testing of digital-to-analog converter.

Brief Patent Description - Full Patent Description - Patent Application Claims
  monitor keywords FIELD OF THE DISCLOSURE

The present disclosure relates generally to digital-to-analog converters (DACs) and more particularly to testing DACs.

BACKGROUND

High-speed current-steering digital-to-analog converters (DACs) often are used in display drivers and other systems to convert a digital code to a corresponding analog output current used to drive a display device or other component. Because fault models for analog simulation often are not fully defined, the DACs generally are specification tested after manufacturing by verifying that the input to, and the output from, the DAC meets specifications. Typically, this testing is achieved via automatic test equipment (ATE) that ramps through all possible DAC codes within the operating range of the DAC and then measuring the output current of the DAC resulting from each DAC code. However, it often is not economically feasible to obtain automatic testing equipment that is capable of testing a high-performance DAC at its full operating frequency and resolution. Thus, automatic test equipment that operates a substantially lower frequency typically is used to test high-performance DACs, a procedure which often fails to correctly assess the operational characteristics of a DAC due to the difference between the operating frequency and the test frequency. Accordingly, an improved technique for testing DACs at their operating frequencies would be advantageous.

BRIEF DESCRIPTION OF THE DRAWINGS

The present disclosure may be better understood and its numerous features and advantages made apparent to those skilled in the art by referencing the accompanying drawings. The use of the same reference symbols in different drawings indicates similar or identical items.

FIG. 1 is a diagram illustrating an example display system implementing a current-steering digital-to-analog converter (DAC) with a built-in self-test (BIST) component in accordance with at least one embodiment of the present disclosure.

FIG. 2 is a diagram illustrating an example implementation of the DAC and the BIST component of FIG. 1 in accordance with at least one embodiment of the present disclosure.

FIG. 3 is a signal chart illustrating an operation of a capacitor-based oscillator of the BIST component of FIG. 2 in accordance with at least one embodiment of the present disclosure.

FIG. 4 is a flow diagram illustrating an example test method for a DAC using the BIST component of FIGS. 1 and 2 in accordance with at least one embodiment of the present disclosure.

FIG. 5 is a diagram illustrating another example implementation of the DAC and the BIST component of FIG. 1 in accordance with at least one embodiment of the present disclosure.

FIG. 6 is a diagram illustrating an external loopback connection between a DAC and a BIST component in accordance with at least one embodiment of the present disclosure.

FIG. 7 is a diagram illustrating a multiple-DAC system utilizing a BIST component in accordance with at least one embodiment of the present disclosure.

FIG. 8 is a chart illustrating an example test operation of the multiple-DAC system in accordance with at least one embodiment of the present disclosure.

DETAILED DESCRIPTION

FIGS. 1-8 illustrate example techniques for testing a current-steering digital-to-analog converter (DAC) using a test component. In one embodiment, the test component includes a relaxation oscillator having an oscillation frequency based on the output current of the DAC. A series of test values is provided in sequence to the DAC for conversion to an output current with a magnitude that varies with the test values. The test component counts the number of oscillations (“the oscillation count”) of the relaxation oscillator over a fixed duration or period that is substantially equal for each test value. As the number of oscillations over the fixed duration depends on the oscillation frequency of the relaxation oscillator, which in turn is based on the magnitude of the output current, the oscillation count can be used as a relative measure of the magnitude of the output current for the corresponding test value. Accordingly, the oscillation counts for some or all of the test values are used to determine operational characteristics of the DAC, including, but not limited to, the integral non-linearity (INL) characteristics or the differential non-linearity (DNL) characteristics of the DAC. These operational characteristics then can be used to verify whether the DAC meets certain operational specifications, such as a specified maximum DNL or a specified maximum INL.

For ease of illustration, the example DAC test techniques are described herein in the context of a video system utilizing one or more DACs to convert digital video data into corresponding analog signals for driving a display device. However, these test techniques can be implemented in other systems utilizing current-steering DACs using the guidelines provided herein without departing from the scope of the present disclosure. Further, the example DAC test techniques are described herein in the context of built-in self-test (BIST) analysis of a current-steering DAC. However, the test components can be implemented, in whole or in part, external to the device in which the DAC is implemented without departing from the scope of the present disclosure.



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