Dual-frequency matching circuit

This is a continuation of International Application No. PCT/JP2008/002352, with an international filing date of Aug. 28, 2008, which claims priority of Japanese Patent Application No. 2007-222413, filed on Aug. 29, 2007, the contents of which are hereby incorporated by reference.

1. Field of the Invention

The present invention relates to a dual-frequency impedance matching circuit to be inserted between an antenna and an RF circuit in a mobile terminal in order to carry out impedance matching between the antenna and the RF circuit in two arbitrary frequency bands.

2. Description of the Related Art

As cellphone services have become amazingly popular nowadays, there are increasing demands for an even higher degree of mobility and even more versatile telecommunications services. To meet such demands, it is now one of the major technological objects to develop a mobile terminal that has an even smaller size and yet can use multiple telecommunications systems that are currently operating on mutually different frequency bands (such a device is called a “multi-band device”). Quite the same object is shared by an antenna that is an important device operating as a radio wave input/output interface. That is to say, development of an even smaller antenna operating on multiple different frequency bands (which is called a “multi-band antenna”) is awaited.

In actually developing a mobile terminal, however, it is extremely difficult to realize good antenna properties on multiple desired frequency bands just by optimizing the configuration of the antenna. That is why the final frequency adjustment and good impedance matching with an RF circuit often get done by inserting an appropriate matching circuit between the antenna and the RF circuit. Currently, the frequency bands utilized by various cellphone services are in 800-900 MHz range and 1.5-2 GHz range. To realize a multi-band mobile terminal, its antenna should operate on both of these two frequency bands. However, these two frequency bands are so far apart from each other that it is difficult for a normal single-frequency matching circuit to carry out flexible matching and adjustment on both of these two frequency bands. That is why to achieve the object described above, it is preferable to apply a dual-frequency matching circuit that can carry out independent matching on those two frequency bands.

In such a background, some conventional dual-frequency matching circuits that have been adopted so far include a ladder circuit consisting of multiple single-frequency matching circuits and multiple resonant circuits (see Japanese Patent Application Laid-Open Publication No. 2004-242269 (page 18 and FIG. 1) and Japanese Patent Application Laid-Open Publication No. 2006-325153 (page 14 and FIG. 1), for example). FIG. 11 is a circuit block diagram illustrating a circuit configuration for a conventional dual-frequency matching circuit disclosed in Japanese Patent Application Laid-Open Publication No. 2004-242269 (page 18 and FIG. 1).

In FIG. 11, the frequency dependency of impedance (or a single-terminal S parameter) at an output terminal 102 is already known and a load 101 corresponds to an antenna in the situation described above. And the load 101 is connected to a power supply 107 by way of a conventional dual-frequency matching circuit 108 consisting of first, second and third matching circuits 103, 104 and 105. As shown in the block diagrams in FIG. 11, these matching circuits 103, 104 and 105 are parallel or serial resonant circuits, each of which is made up of inductors and capacitors.

The conventional dual-frequency matching circuit 108 shown in FIG. 11 operates as an impedance transformer such that in two desired frequency bands, the circuit 108 transforms the impedance of the load 101 at the output terminal 102 into the impedance value of the power supply 107 at the input terminal 106. That is why in those two frequency bands, the power supplied from the power supply 107 can be passed to the load 101 efficiently without experiencing reflection attenuation.

Consider each of these three matching circuits 103, 104 and 105 as a single circuit block. In that case, the conventional dual-frequency matching circuit 108 shown in FIG. 11 is composed of the two fundamental types of single-frequency matching circuits 121a and 121b shown in FIG. 12 (see Robert E. Collin, —An IEEE Press Classic Reissue—Foundations for Microwave Engineering (Second Edition, IEEE Press Series on Electromagnetic Wave Theory), A John Wiley & Sons, Inc., Publication, ISBN 0-7803-6031-1 (page 323, FIG. 5.17) (hereinafter, Non-Patent Document No. 1), for example), and they are coupled together so as to form a ladder circuit 131 as shown in FIG. 13. FIG. 12 illustrates circuit block diagrams showing the circuit configurations of the two fundamental types of single-frequency matching circuits disclosed in Non-Patent Document No. 1 and FIG. 13 is a circuit block diagram illustrating the circuit configuration of a ladder circuit for use in a conventional dual-frequency matching circuit. It should be noted that the ladder circuit 131 is a circuit configuration that is ordinarily used in various types of filters.