Electronic device with serial ata interface and power saving method for serial ata buses

This application is a divisional of U.S. application Ser. No. 11/956,996 filed Dec. 14, 2007, which is a divisional of U.S. application Ser. No. 10/931,949 filed Sep. 1, 2004, which is based upon and claims the benefit of priority from prior Japanese Patent Application No. 2003-310361, filed Sep. 2, 2003, the entire contents of which are incorporated herein by reference.

1. Field of the Invention

The present invention relates to an electronic device with a serial AT attachment (ATA) interface, and more particularly to an electronic device represented by a disk drive, and a power saving method for serial ATA buses, which are suitable for reducing the power consumption of a serial ATA bus that conforms to the serial interface ATA standards.

2. Description of the Related Art

As recited in “Serial ATA: High Speed Serialized AT Attachment” Revision 1.0a, Serial ATA Workgroup, Jan. 7, 2003 (hereinafter referred to as “the prior art document”), standards for serial ATA interfaces that are new interfaces for disk drives have been worked out. Serial ATA interfaces are used as interfaces between a peripheral device, represented by a magnetic disk drive, and a host (host system) represented by a personal computer. In this point, serial ATA interfaces are similar to conventional ATA interfaces (i.e., parallel ATA interfaces).

A peripheral device with a serial ATA interface, such as a magnetic disk drive (hereinafter referred to as an “HDD”), is connected to a host by a serial bus. In such an HDD, to secure compatibility with an ATA interface, it is necessary to convert an ATA interface into a serial ATA interface, and convert a serial ATA interface into an ATA interface. Such interface conversion is performed by, for example, an LSI (bridge LSI) called a serial ATA bridge.

In the serial ATA interface standards, three layers of different functions, i.e., a physical layer, link layer and transport layer, are defined. The physical layer has a function for executing high-rate serial data transmission and reception. The physical layer interprets received data, and transmits the data to the link layer in accordance with an interpretation result. The physical layer also outputs a serial data signal to the link layer in response to a request therefrom. The link layer supplies the physical layer with a request to output a signal. The link layer also supplies the transport layer with the data transmitted from the physical layer. The transport layer performs conversion for operations based on the ATA standards. Assuming that the above-mentioned bridge LSI is used in an HDD, the role of the transport layer corresponds to the role of the ATA signal output unit of a conventional host that utilizes an ATA connection. The bridge LSI is connected to the disk controller (HDC) of the HDD via an ATA bus (or a bus compliant with the ATA bus) based on the ATA interface standards. Accordingly, in the connection between the bridge LSI and HDC of the HDD, operations equivalent to those stipulated in the ATA interface standards or compatible with the standards are performed. In this case, the portion of the HDD excluding the bridge LSI (hereinafter referred to as a “main HDD unit”) regards the bridge LSI as an apparatus (host) for issuing a command to the main HDD unit. Accordingly, the main HDD unit operates in the same manner as a conventional HDD utilizing an ATA connection. Thus, the serial ATA interface has compatibility with the ATA standards concerning protocols such as logical commands. However, a data signal (parallel data signal) processed by a parallel ATA interface must be converted into a serial data signal.

The serial ATA interface standards stipulate a power saving mode directed to serial ATA buses, as well as a power saving mode that conforms to the conventional ATA interface (parallel ATA interface) standards. The idea of serial ATA bus power saving does not exist in the conventional ATA standards.

The serial ATA interface standards stipulate three power management modes for serial ATA interfaces, i.e., “PHY READY (IDLE)”, “PARTIAL” and “SLUMBER”. The “PHY READY” mode indicates a state in which both the circuit (PHY circuit) for realizing the operation of a physical layer (PHY layer), and the main phase-locked loop (PLL) circuit are operating, thereby synchronizing the interfacing states of the host and peripheral device. The “PARTIAL” mode and “SLUMBER” mode indicate a state in which the PHY circuit is operating but the interface signal is in a neutral state.

The difference by definition between the “PARTIAL” mode and “SLUMBER” mode lies in the time required for restoration therefrom to the “PHY READY (IDLE)” mode. More specifically, it is stipulated that the time required for restoration from the “PARTIAL” mode must not exceed 10 μs. On the other hand, it is stipulated that the time required for restoration from the “SLUMBER” mode must not exceed 10 ms. As long as the restoration time and interface power state conform to the standards, manufacturers can select the portion of a device, the power saving function of which should be executed in the “PARTIAL” mode or “SLUMBER” mode (i.e., can select the circuit that should be turned off in the mode).

Shift to a power saving (ATA power saving) state conforming to the conventional ATA interface standards is realized basically under the control of a host. As ATA power saving modes, “IDLE”, “STANDBY” and “SLEEP” modes, for example, are stipulated. On the other hand, shift to a power saving (serial ATA power saving) mode (i.e., the “PARTIAL” or “SLUMBER” mode) for serial ATA buses may be realized under the control of either a host or peripheral device. However, the above-mentioned prior art document describes nothing about a technique for controlling the serial ATA power saving state (in particular, a technique for associating the ATA power saving state with the serial ATA power saving state).

Assume here that a serial ATA interface is used as the interface of an HDD, and the HDD is connected to a host via a serial ATA bus. In this case, it is necessary, as stated above, to provide a serial ATA interface control circuit (serial ATA bridge) for converting a conventional ATA interface (parallel ATA interface) into a serial ATA interface. In this HDD, the operation of a junction between the serial ATA interface control circuit and the hard disk controller (HDC) of the HDD is identical to or conforms to that stipulated in the conventional ATA interface standards. Accordingly, the HDC recognizes the serial ATA bridge as if it were a host itself that issues commands. This means that the operations of the portions of the HDD other than the serial ATA bridge peripheral portions are similar to the conventional ones. In HDDs with serial ATA interfaces, a conventional ATA bus (i.e., parallel ATA bus) that connects a serial ATA interface control circuit to an HDC can be formed on the printed circuit board (PCB) of the HDD. Therefore, in HDDs with serial ATA interfaces, the wiring length of the ATA bus can be shortened, and hence an increase in data transfer rate, which is hard to realize if a parallel ATA bus is used, can be expected.

The serial ATA interface standards have been worked out on the assumption that they are compatible with the conventional ATA standards (parallel ATA standards). Therefore, to realize the new idea of power saving stipulated in the serial ATA standards, it is necessary to provide a host with new means for designating new power saving. However, such new means may well deviate from the conventional ATA standards. Further, the provision of new means to a host may significantly influence the entire system.

In an embodiment of the invention, power consumption is reduced by effectively utilizing the power saving mode for serial ATA buses stipulated in the serial ATA standards.

In accordance with an embodiment of the invention, there is provided an electronic device with a serial ATA interface having a detector for detecting issue or reception of a predetermined command; a confirmation device for confirming completion of execution of the command detected by the detector; and a controller for controlling shifting of the serial ATA interface to a power saving mode upon confirmation of the completion of the execution by the confirmation device.

In accordance with yet another embodiment of the invention, there is provided a disk drive with a serial ATA interface connected to a host via a serial ATA bus. The disk drive has a reporting device for reporting, to the host, completion of execution of a command sent from the host to the disk drive; and a controller for controlling shift of the serial ATA interface to a power saving mode after the reporting device reports completion of execution of a preset command.

Yet further embodiments of the invention relates to a method of saving power of a serial ATA interface employed in an electronic device. The method detects issue or reception of a preset command; confirms completion of execution of the detected command; and shifts the serial ATA interface to a power saving mode upon confirming the completion of execution of the detected command.

Another embodiment of the invention pertains to a method of performing interface conversion between a serial ATA interface and a parallel ATA interface. This method measures a preset time starting each time the serial ATA interface is shifted to an idle mode in accordance with reception of a command which requires interface conversion; and shifts the serial ATA interface from the idle mode to a predetermined power saving mode if no further command has been sent after expiration of the preset time.