Producing method for crystalline thin film

The present invention relates to a crystalline thin film for forming a drive circuit or the like of a flat panel display and a producing method therefor.

In a flat panel display represented by a liquid crystal display, a higher definition, a higher velocity and a larger number of gradation levels in the image display have been achieved by a monolithic formation of a pixel driving circuit on the panel and by improvement in the performance of such a circuit. The panel of simple matrix drive system has progressed to the panel of active matrix drive system employing a switching transistor for each pixel. Also the shift register circuit employed in the active matrix drive system is formed in the peripheral region of the same panel. Thus, there are present full-color, high-definition liquid crystal displays that can even display moving images.

Realization of such a monolithic formation including also a peripheral drive circuit with a practical manufacturing cost owes greatly to a technology for forming a polycrystalline silicon film excellent in electrical characteristics on an inexpensive glass substrate. In this technology, an amorphous silicon film deposited on a glass substrate is melted and re-solidified with short pulse light in the ultraviolet region such as excimer laser to obtain a polycrystalline silicon film while the glass substrate is maintained at a low temperature. In comparison with a polycrystalline film obtained by solid-phase crystallization of the same starting amorphous silicon film, crystal grains obtained by the melting and resolidification method have less crystalline defects in the interior, whereby a thin film transistor utilizing such a film as the active area shows high carrier mobility. Therefore, even a polycrystalline silicon film of submicron average grain size allows production of a monolithic circuit for active matrix drive, of which performance is sufficient for a liquid crystal display of several inches in diagonal and a resolution of about 100 ppi at most.

Performance required for an active element such as a transistor is recently increasingly higher not only in a flat panel display but also in a semiconductor device requiring a high spatial uniformity, such as an image sensor, a magnetic recording apparatus, an information processing apparatus etc.

However, the thin film transistor utilizing the current melted and resolidified polycrystalline film does not have sufficient performance for the next generation liquid crystal display of widescreen or high-definition. Also such a polycrystalline silicon film is deficient in performance for use as, for example, a drive circuit element for a plasma display or an electroluminescence display requiring a higher voltage or a larger drive current than in the liquid crystal display, or a high-velocity drive circuit element of a wide screened X-ray image sensor, of which future development is expected. Even though the defect density within the crystal grains is low, the polycrystalline silicon film with an average grain size in submicron order cannot provide such high-performance devices. This is because the active area of an element of the order of micron includes many crystalline boundaries constituting significant hindrance to charge transfer.

The present inventors has proposed a general theory for reducing simultaneously the density of crystal boundaries and spatial dispersion thereof in a polycrystalline film as follows:

H. Kumomi and T. Yonehara, Jpn. J. Appl. Phys. 36, 1383 (1997); and

H. Kumomi and F. G. Shi, “Handbook of Thin Films Materials” Volume 1, Chapter 6, “Nucleation, Growth and Crystallization of Thin Films” edited by H. S. Nalwa (Academic Press, New York, 2001).

This is an idea of controlling the position of formation of crystal grains to control the position of crystal boundary and the grain size distribution, and it has been verified in chemical vapor deposition of a polycrystalline film or a solid phase crystallization of a thin film.

There have been studies of utilizing the same idea in the melting-resolidification formation of a crystalline film. Among these, the most successful one is of Wilt et al., as reported in:

P. Ch. van der Wilt, B. D. van Dijk, G. J. Bertsev, R. Ishihara, and C. I. M. Beenakker, Appl. Phys. Lett., Vol. 79, No. 12, 1819 (2001); and

R. Ishihara, P. Ch. van der Wilt, B. D. van Dijk, A. Burtsev, J. W. Metselaar and C. I. Beenakker, Digest of Technical Papers, AM-LCD 02, 53(The Japan Society of Applied Physics, 2002).

FIGS. 21(a) to 21(f) are cross sectional views showing an outline and a function of this process.

First, they formed a fine hole 2 of a diameter of 0.1 μm or less and a depth of about 1 μm from the surface of a silicon oxide layer 1 on a silicon monocrystalline substrate, then formed thereon an amorphous silicon film 3 of a thickness of 90 to 272 nm so as to fill the hole, and irradiated it with excimer laser 4 for completely fusing the film 3 except for the inside of the hole 2 [FIG. 21(a)]. When the amorphous silicon filling the hole 2 is not completely melted, there remains a group 5 of many crystal grains of a grain size of 20 to 50 nm, formed by an explosive crystallization in solid phase prior to the fusing [FIG. 21(b)]. Even if complete melting takes place also in the hole 2, it is considered that the heat due to the excimer laser irradiation is dissipated mainly to the silicon substrate whereby cooling proceeds at the bottom of the hole 2 causing crystal nucleation from the molten phase. In either case, with the proceeding of cooling from the bottom of the hole 2 toward the surface of the silicon film 3, crystal grains of group 5 present at the solid-liquid interface grow upward in the hole 2 [FIG. 21(c)]. In this state, part of the crystal grains loose a margin for growth for example because of an anisotropy in the growing velocity, whereby crystal grains capable of continuing upward growth are culled (“grain filtering”) [FIG. 21(c)]. By the time the crystal growth reaches the aperture of the hole 2, the number of the crystal grains capable of continuing growth is reduced to one, and such one crystal grain emerges from the hole 2 and grows into the amorphous silicon film 3 forming a crystal grain 6 [FIG. 21(d)]. After the growing front of the crystal grain 6 reached the surface of the amorphous silicon film 3, the growth is limited to a planar direction of the film, i.e., lateral growth [FIG. 21(e)]. When the cooling of the entire system proceeds, and the degree of supercooling in an unsolidified region 7 of the silicon film 3 becomes large enough, crystal nuclei 8 are generated at a high rate and a high concentration from the molten phase [FIG. 21(e)], and they collide with the crystal grain 6 to form a grain boundary 9 finishing the solidification [FIG. 21(f)]. In this manner the positions of the crystal grain 6 and the grain boundary 9 thereof are controlled by the position of the hole 2.

In the above-mentioned documents, Ishihara et al. fabricated MOS thin film transistor elements having a gate area in the crystal grain 6 of which position was controlled by the aforementioned method, and evaluated characteristics thereof and fluctuation therein. According to the report, the elements showed excellent characteristics in average close to those of elements on a monocrystalline silicon substrate, but a fluctuation among plural elements in the characteristics was far inferior to that of the elements provided on the monocrystalline silicon substrate, falling far short of the expectation.

In the above-mentioned reports, the large fluctuation in the characteristics among plural elements is resulted, in fact, from the incomplete position control of the crystal grain. More specifically, it results from a fact that the crystal grain 6 growing laterally from the aperture of the fine hole 2 is not necessary constituted of a single crystal grain but includes plural crystal grains, thus often containing a crystal grain boundary therein, and that the number of such a crystal grain boundary varies from 0 to a large number.

In the method explained in FIGS. 21(a) to 21(f), among the crystals of the crystal grain group 6 existing in the bottom of the hole 2, crystal habits, facet regions and orientations along the hole 2 of those at the solid-liquid interface of those at the solid-liquid interface are random. The “grain filtering” based on a preferential growth does not necessarily lead to selection of a single crystal grain, and often plural crystal grains simultaneously reach the aperture of the hole 2.

Also it is expected to increase the selection yield of a single crystal grain by increasing the depth of the hole 2 to increase a “grain filtering” length. The method explained in FIGS. 21(a) to 21(f) is so designed that, utilizing a wide temperature distribution generated along the depth of the hole 2, a complete melting state is attained at the aperture of the hole 2 where the temperature becomes high at the maximum melting of the amorphous silicon film, while an unmelted state is attained at the bottom of the hole 2 where the temperature is low. Since the temperature distribution is continuous, there always exist, between the aperture and the bottom of the hole 2, a near complete melting region and a partial melt region between the complete melting state and the unmelted state. Thus, the crystal grains existing in the hole 2 are present not only at the bottom of the hole 2 but also distributed widely with a density gradient decreasing toward the aperture of the hole 2. Therefore, mere deepening of the hole 2 will not increase the length of “grain filtering”.

On the other hand, the “grain filtering” in the hole 2 depends significantly on the hole diameter. For example, increased diameter increases the probability of plural crystal grains reaching the hole aperture, so that the selection yield of a single crystal grain becomes low. Smaller diameter will result in high selection yield. In principle, if the diameter of the hole 2 is smaller than the size of the smallest crystal grain of the crystal grain group 5, only one crystal grain comes into contact with the solid-liquid interface from the beginning, which enables single crystal grain selection securely. In practice, however, when the hole 2 is made in such a small size, the average grain size of the crystal grain group 5 is reduced at the same time, and an effective melting point is lowered by a capillary effect. Thus it is difficult to retain the crystal grain group 5 in an unmelted state. Also with the microfabrication technology even up to a near future, it is extremely difficult to form a fine hole of several tens of nanometers or less with a depth of 1 μm. Furthermore, even when such a fine hole can be actually formed, it is also difficult to fill it with amorphous silicon.

Also in consideration of the present level of the microfabrication technology, even with the dimension of the hole 2 explained in FIGS. 21(a) to 21(f), it is difficult to form a number of fine holes of such a high aspect ratio with a high precision over a wide region. Fluctuations in the dimension and the shape of the hole 2 are directly reflected in the fluctuation in the number of the crystal grains reaching the aperture of the hole 2. The present inventors thinks that this fact is possibly a main cause of the fluctuation in the element characteristics in the aforementioned reports.

As explained above, the aforementioned technology is an excellent idea cleverly combining the temperature distribution in the direction of depth of the fine hole 2 and the “grain filtering” phenomenon, but it is difficult to increase the selection yield of a single crystal grain for practical use by mere optimization of the conditions in view of the principle and the limitation of the manufacturing technology.