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07/02/09 - USPTO Class 250 |  73 views | #20090166515 | Prev - Next | About this Page  250 rss/xml feed  monitor keywords

Multi-point correlated sampling for image sensors

USPTO Application #: 20090166515
Title: Multi-point correlated sampling for image sensors
Abstract: An improved passive pixel sensor (PPS) circuit comprising a correlated sampling circuit and method that integrates pixel charge leakage onto an integrating amplifier during sampling periods. An integrator circuit is provided for integrating PPS pixel charges received via a column line, and correlated sampling circuit is provided for the removal of kTC noise and dark integration. A multi-point sampling of the output of the integrator is provided wherein at least a first and second correlated sample are used to detect the charge integration from the column line leakages, and at least a third sample is used to detect the PPS signal after pixel readout. The correlated sampling method is employed to remove kTC noise and dark integration from the PPS signal. (end of abstract)



Agent: Dickstein Shapiro LLP - Washington, DC, US
Inventor: Christian Boemler
USPTO Applicaton #: 20090166515 - Class: 2502081 (USPTO)

Multi-point correlated sampling for image sensors description/claims


The Patent Description & Claims data below is from USPTO Patent Application 20090166515, Multi-point correlated sampling for image sensors.

Brief Patent Description - Full Patent Description - Patent Application Claims
  monitor keywords FIELD OF THE INVENTION

The present invention relates generally to passive pixel sensor image devices and to correlated sampling methods for the same.

BACKGROUND OF THE INVENTION

Image sensors typically employ light detecting elements (e.g., photosensors) and are used in various applications. Such image sensors may be formed using a variety of fabrication techniques. Currently, two commonly fabricated image sensors are CMOS image sensors and charge coupled device (CCD) image sensors. Each sensor generally includes an array of pixels containing the photosensors. The image sensors typically use photosensors in the form of photogates, phototransistors or photodiodes.

When an image is focused on the image sensor array (also called an “imager array” or “pixel array”), light corresponding to the image is directed to the pixels usually through micro-lenses. Each micro-lens may be used to direct incoming light through a circuitry region of the corresponding pixel to the photosensor region, thereby increasing the amount of light reaching the photosensor. It is known in the art to use circuitry that includes storage regions that collect pixel charge representing the light reaching the photosensors.

In a CMOS imager, the pixels of the array convert pixel charge to an analog voltage signal that is proportional to the light collected by the photosensor. It is known in the art to use row select transistors to select a particular row in the pixel array and cause the storage element (e.g., a floating diffusion region) for each pixel in the selected row to provide an output voltage on a column line representing collected charge for further processing by image sensor circuitry. Thus, the pixel array circuitry samples the pixel output voltage in each column of the pixel array one row (i.e., the selected row) at a time. The analog voltage signals are converted to digital signals which may be used to replicate an image represented by the light incident on the photosensors of the array (i.e., the incident light). For example, the digitized pixel array voltage signals may be used to store or display a corresponding image on a monitor or to otherwise provide information about the image.

It is known to use passive pixel sensors (“PPS”) having one amplifier per column of pixels in image sensors. In PPS image sensors, each pixel contains just one transistor that is used as a charge gate for switching the contents of the pixel to the charge amplifiers.

It is also known to use active pixel sensors (“APS”) in image sensors. In APS, each pixel has an amplifier. APS commonly have four transistors (4T), but other configurations (for example, 3T and 5T) are also known.

Although PPS pre-dates the use of APS in CMOS image sensors, it was not until the advent of APS that CMOS image sensors greatly increased in commercial use. This occurred in part because historically, PPS had gained a negative reputation as being inferior with respect to fixed pattern noise (“FPN”) and noise due to reduced readout sensitivity and column line leakage. As a result, charge-coupled devices (“CCDs”) were favored over CMOS image sensors having PPS, notwithstanding that the manufacturing process for CCDs was much more costly than that for CMOS devices.

With the advent of APS, however, it became possible to read the floating diffusion region of a pixel through an amplifier and a row select transistor. Unlike PPS, which have an amplifier per column, APS have an amplifier per pixel and can compensate for noise on a pixel-by-pixel basis. APS have increased readout sensitivity as compared to traditional PPS image sensor circuits.

APS also have improved performance relative to traditional PPS circuits due to reduced column line leakage. In PPS, when a pixel leaks (which occurs, for example, upon pixel blooming), the pixel charge runs straight through the transistor gate and onto the column line. Unlike PPS, the multi-transistor configuration of APS enables the pixel signal to be buffered thereby reducing column line leakage.

APS are the most common form of CMOS image sensors today. However, despite benefits such as increased readout sensitivity and reduced column line leakage over traditional PPS circuits, APS require substantially more circuitry surrounding the pixel area, and provide substantially reduced fill factor relative to PPS. For example, it is not uncommon for APS circuits to devote seventy percent of the pixel array area to amplifier and other associated circuitry. This is undesirable.

It is known to use integrator amplifiers to improve readout sensitivity in PPS circuits. An integrator maintains constant column line voltage and integrates charge dumped from the pixel onto a feedback (e.g., integrating) capacitor. The feedback capacitance must be low in order to achieve high conversion gain. Low feedback capacitance, however, results in kTC noise. This is undesirable.

It is also known to use two-point correlated double sampling (“CDS”) to remove kTC noise in a PPS imager circuit. For example, two-point CDS samples the pixel signal outputs (via a column integrator circuit) and is used to remove noise due to column line leakage that occurs between the time the first sample point is taken and the second sample point is taken. Column line leakage may arise from a number of sources. Such leakage (e.g., “dark integration”) is primarily due to charge leakage in a row being read out, but may also arise from blooming in rows other than the readout row. Photon-generated electrons (e.g., as a result of pixel blooming) that are picked up by the column line instead of the pixel result in leakage current on the column line. The amount of column line leakage can vary from column to column, and can add a dark signal to all the pixels in a given column. Moreover, the parasitic capacitance can be substantial and the amplifier will have difficulty driving this capacitance within a reasonable settling time. As a result, the time required between reset and signal sampling has to be longer than if a shorter settling time were achieved. This in turn provides more time for additional column line leakage in the form of dark integration. Although two-point CDS may be used to remove kTC noise from a PPS circuit comprising an integrator, there remains substantial, undesirable dark integration, particularly dark current occurring after the time of the first sample point in the two-point sampling.

There remains a need for an improved image sensor having pixels and associated circuitry of reduced size with increased pixel fill factor. There also is a need for an improved PPS circuit with increased readout sensitivity. There also is a need for an improved PPS circuit with reduced column line leakage. Further, there is a need for a PPS circuit with improved correlated sampling for the removal of kTC noise and dark integration.

BRIEF SUMMARY OF THE INVENTION

The present invention provides in various method and apparatus exemplary embodiments an improved PPS circuit and method of operating it that integrates leakage onto an integrator amplifier during sampling periods. The method and apparatus of the present invention provides improved correlated sampling for the reduction of kTC and dark integration noise, such as bus leakage and blooming from pixel rows.

The above and other features and advantages are achieved in various method and apparatus exemplary embodiments of the invention by providing a correlated sampling circuit for sampling and holding multiple signals corresponding to pixel signals received via an integrator circuit, PPS sensor circuits comprising integrators and correlated sampling circuitry are used in the present invention to enable simpler circuitry of reduced size and improved performance.

BRIEF DESCRIPTION OF THE DRAWINGS

The foregoing and other advantages and features of the invention will become more apparent from the detailed description of exemplary embodiments provided below with reference to the accompanying drawings in which:



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