Multilayer capacitor array

1. Field of the Invention

The present invention relates to a multilayer capacitor array.

2. Related Background Art

As the size and thickness of electronic devices are reduced, integration of capacitors to be mounted in such electronic devices is required. Therefore, in recent years, capacitor arrays including a plurality of capacitors in a single chip have been developed. For example, a known multilayer capacitor array includes a laminated body formed of alternately laminated internal electrode layers, each having internal electrodes arranged parallel to each other, and dielectric layers, and terminal conductors formed on the laminated body (for example, refer to Japanese Unexamined Patent Application Publication No. Hei 11-26291).

While a reduction in the power-supply voltage for a central processing unit (CPU) mounted in a digital electronic device has been achieved, the load current has increased. Because it is very difficult to keep variations in the power-supply voltage, caused by abrupt changes in the load current, within an allowable range, a multilayer capacitor serving as a decoupling capacitor is connected to the power supply. During transient variations in the load current, the multilayer capacitor supplies an electric current to the CPU to control variations in the power-supply voltage.

Recently, as the operating frequency of CPUs these days increases, the load current is becoming faster and greater. Therefore, there are demands for increasing the capacitance and equivalent series resistance (ESR) of the multilayer capacitors used as decoupling capacitors.

However, Japanese Unexamined Patent Application Publication No. Hei 11-26291 does not mention the ESR of the multilayer capacitor array.

The present invention has been made to solve the above-described problem, and an object thereof is to provide a multilayer capacitor array having controllable ESR.

In a typical multilayer capacitor array, all internal electrodes are connected to respective terminal conductors through lead conductors. Therefore, the lead conductors to be connected to the terminal conductors are provided in the same number as the internal electrodes, making the ESR small. If the number of the laminated dielectric layers and internal electrode layers is increased in order to enhance the capacitance of the multilayer capacitor array, the number of lead conductors also increases. Because resistance components of the lead conductors to be connected to the terminal conductors are connected in parallel to the terminal conductors, the ESR of the multilayer capacitor array further decreases as the number of the lead conductors to be connected to the terminal conductors increases. For example, in the multilayer capacitor array disclosed in Japanese Unexamined Patent Application Publication No. Hei 11-26291, because all the internal electrodes are directly connected to the terminal conductors, the ESR decreases with an increase in electrostatic capacitance associated with an increase in the number of laminated layers to meet a trend toward higher capacitance. The demands for higher capacitance and greater ESR of multilayer capacitor arrays are in conflict with each other.

The present inventors carried out extensive research into a multilayer capacitor array that can meet the demands for higher capacitance and greater ESR. As a result, the present inventors discovered that the ESR can be adjusted to a desired value by connecting internal electrodes to each other through an external connecting conductor disposed on the laminated body and by changing the number of lead conductors without a change in the number of laminated dielectric layers and internal electrode layers. In addition, the present inventors discovered that the ESR can be adjusted to a desired value by connecting the internal electrodes to each other through the external connecting conductor disposed on the surface of the laminated body and by changing the position of the lead conductors in the laminating direction of the laminated body. In particular, a higher ESR can be achieved by making the number of the lead conductors smaller than the number of the internal electrodes.

With reference to the research results, a multilayer capacitor according to the present invention includes a laminate body having a plurality of laminated dielectric layers; and a plurality of external conductors placed on the laminate body, the laminate body having: rectangular first and second principal surfaces facing each other in a laminating direction of the dielectric layers, first and second side surfaces facing each other and extending in a longitudinal direction of the first and second principal faces so as to connect the first and second principal faces, third and fourth side surfaces facing each other and extending in a transverse direction of the first and second principal faces so as to connect the first an second principal faces, a first inner electrode group including a plurality of first electrodes and a second electrode, and a second inner electrode group including a third electrode and a fourth electrode, wherein the external conductors include first to fourth terminal conductors disposed on one of the first and second side surfaces, and a first external connection conductor disposed on a side surface placed on at least one of the first to fourth terminal conductors, wherein the first inner electrode group and the second inner electrode group are adjacent to each other in a opposed direction of the third and fourth side surfaces in the laminate body, wherein at least one of the first inner electrodes and the second inner electrode are arranged as opposed with at least one of the dielectric layers in between, wherein the third and fourth inner electrodes are arranged as opposed with at least one of the dielectric layers in between, wherein the first inner electrodes are electrically connected to the first external connection conductor via lead conductors, wherein the second inner electrode is electrically connected to the second terminal conductor via a lead conductor, wherein the third inner electrode is electrically connected to the third terminal conductor via a lead conductor, wherein the fourth inner electrode is electrically connected to the fourth terminal conductor via a lead conductor, and wherein, among all the first inner electrodes, one to multiple first inner electrodes that are less than the total first inner electrodes are electrically connected to the first terminal conductor via lead conductors.

In the multilayer capacitor array according to the present invention, only part of the first inner electrodes is connected to the first terminal conductor via the lead conductors. By connecting only part of the first inner electrodes to the first terminal conductor via the lead conductors, the equivalent series resistance of the capacitors each composed of the first and second inner electrodes and the dielectric layer can be adjusted. The present invention provides a multilayer capacitor array capable of adjusting equivalent series resistance.

According to the present invention, the first external connection conductor is disposed on the side surface (first or second side surface) on which at least one of the first to fourth terminal conductors is provided. In this way, the first external connection conductor and the terminal conductors provided on the side surface on which the first external connection conductor is provided can be prepared simultaneously, and the manufacturing process (process of forming the external conductors) can be simplified.

Preferably, the first terminal conductor, the fourth terminal conductor, and the first external connection conductor are disposed on the first side surface, and the second and third terminal conductors are disposed on the second side surface. In such a case, the first external connection conductor and the first and fourth terminal conductors can be prepared simultaneously.

Preferably, the first and the fourth terminal conductors are disposed on the first side surface, while the second terminal conductor, the third terminal conductor, and the first external connection terminal are disposed on the second side surface. In such a case, the first external connection conductor and the second and third terminal conductors can be prepared simultaneously. Since the first terminal conductor and the first external connection conductor, respectively, are disposed on the first side surface and the second side surface facing each other, the electric current path from the first terminal conductor to the first external connection conductor is relatively long. This structure ensures an increased equivalent series resistance of the capacitors including the first and second inner electrodes and the dielectric layer.

Preferably, the first inner electrode group is positioned on the third side surface side in the opposed direction of the third and fourth side surfaces, the external conductors further include a second external connection conductor disposed on the third side surface, the first inner electrode group includes a plurality of the second inner electrodes, the second inner electrodes are electrically connected to the second external connection conductor via lead conductors, and among all the second inner electrodes, one to multiple second inner electrodes that are less than the total second inner electrodes are electrically connected to the second terminal conductors via lead conductors. In such a case, only part of the second inner electrodes is connected to the second terminal conductor via the lead conductors. By connecting only part of the second inner electrodes to the second terminal conductor via the lead conductors, the equivalent series resistance of the capacitors, each composed of the first and second inner electrodes and the dielectric layer can be adjusted. Since the second external connection conductor is disposed on the third side surface, which is different from the side surface on which the first to fourth terminal conductors and the first external connection conductor are disposed, short-circuiting will not occur among the first to fourth terminal conductors, the first external connection conductor, and the second external connection conductor.

Preferably, the first and second inner electrodes are arranged as opposed with at least one of the dielectric layers in between. This structure ensures a relatively large capacitance of the capacitors composed of the first and second inner electrodes and the dielectric layers.

Preferably, the second inner electrode group includes a plurality of the third inner electrodes, the external conductors further include a third external connection conductor disposed on a side surface on which at least one of the first to fourth terminal conductors is disposed, at least one of the third inner electrodes and the fourth inner electrode are arranged as opposed with at least one of the dielectric layers in between, the third inner electrodes are electrically connected to the third external connection conductor via lead conductors, and among all the third inner electrodes, one to multiple third inner electrodes that are less than the total third inner electrodes are electrically connected to the third terminal conductors via lead conductors. In such a case, only part of the third inner electrodes is connected to the third terminal conductor via the lead conductors. By connecting only part of the third inner electrodes to the third terminal conductor via the lead conductors, the equivalent series resistance of the capacitors each composed of the third and fourth inner electrodes and the dielectric layer can be adjusted. Since the third external connection conductor is disposed on the side surface (first or second side surface) on which at least one of the first to third terminal conductors is disposed, the third external connection conductor and the terminal conductors on the side surfaces on which the third external connection conductor is disposed can be prepared simultaneously. As a result, the manufacturing process (preparation process of the external conductors) can be simplified.

Preferably, the first terminal conductor, the fourth terminal conductor, and the third external connection conductor are disposed on the first side surface, and the second and third terminal conductors are disposed on the second side surface. In such a case, the third external connection conductor and the second and third terminal conductors can be prepared simultaneously. Since the third terminal conductor and the third external connection conductor, respectively, are disposed on the first side surface and the second side surface facing each other, the electric current path from the third terminal conductor to the third external connection conductor is relatively long. This structure ensures a relatively large equivalent series resistance of the capacitors composed of the third and fourth inner electrodes and the dielectric layers.

Preferably, the first and fourth terminal conductors are disposed on the first side surface, while the second terminal conductor, the third terminal conductors, and the third external connection conductor are disposed on the second side surface. In such a case, the third external connection conductor and the second and third terminal conductors can be prepared simultaneously.

Preferably, the second inner electrode group is positioned on the fourth side surface side across the third and fourth side surfaces, the external conductors further include a fourth external connection conductor disposed on the fourth side surface, the second inner electrode group includes a plurality of the fourth inner electrodes, the fourth inner electrodes are electrically connected to the fourth external connection conductor via lead conductors, and among all the fourth inner electrodes, one to multiple fourth inner electrodes that are less than the total fourth inner electrodes are electrically connected to the fourth terminal conductors via lead conductors. In such a case, only part of the fourth inner electrodes is connected to the fourth terminal conductor via the lead conductors. By connecting only part of the fourth inner electrodes to the fourth terminal conductor via the lead conductors, the equivalent series resistance of the capacitors each composed of the third and fourth inner electrodes and the dielectric layer can be adjusted. Since the fourth external connection conductor is disposed on the fourth side surface, which is different from the side surface on which the first to fourth terminal conductors and the first and third external connection conductors are disposed, short-circuiting will not occur among the first to fourth terminal conductors, the first and third external connection conductors, and the fourth external connection conductor.