Circuit and method for generating a continuous pulse signal

1. Field of the Invention

The present invention relates to a circuit and method for generating a pulse signal, particularly to a circuit and method for generating a continuous pulse signal.

2. Description of the Related Art

Refer to FIG. 1 a diagram schematically showing the circuit of a conventional PWM (Pulse Width Modulation) device. The conventional PWM device 10 comprises: a comparator 12, a comparator 14 and a ramp signal generator 16, wherein the comparators 12 and 14 are coupled to each other, and the ramp signal generator 16 is coupled to the comparators 12 and 14. Refer to FIG. 2. The comparator 12 receives a high DC reference voltage V+ and a low DC reference voltage V− and outputs a clock signal. The ramp signal generator 16 then receives the clock signal and outputs a ramp signal to the comparators 12 and 14.

When the value of the ramp signal reaches the high DC reference voltage V+, the comparator 12 outputs a low-level clock signal to the ramp signal generator 16 to change the direction of the ramp signal, and the ramp signal begins to descend. When the value of the ramp signal reaches the low DC reference voltage V−, the comparator 12 outputs a high-level clock signal to the ramp signal generator 16 to change the direction of the ramp signal, and the ramp signal begins to ascend. Thus, the ramp signal is confined to between the high DC reference voltage V+ and the low DC reference voltage V−. Besides, the ramp signal is not necessarily the triangular waveform shown in FIG. 2 but may be a sawtooth waveform.

The comparator 14 receives the ramp signal and an input signal S_in and compares them to output a PWM signal. Refer to FIG. 3A. When the value of the input signal S_in is at the half of the ramp signal, the PWM signal is a pulse train having a 50% duty cycle. Refer to FIG. 3B. When the value of the input signal S_in is at between the high DC reference voltage V+ and the half of the ramp signal, the PWM signal is a pulse train having a duty cycle less than 50%. Refer to FIG. 3C. When the value of the input signal S_in is over the high DC reference voltage V+, the PWM signal is completely a low-level signal. However, such a phenomenon is abnormal. In other words, the conventional PWM device 10 has an intrinsic disadvantage: once the input signal S_in is over the range, the pulse signal is interrupted.

Accordingly, the present invention proposes a circuit and method for generating a continuous pulse signal to solve the above-mentioned problem.

One objective of the present invention is to provide a novel circuit and method for generating a continuous pulse signal, wherein a PWM device cooperates with a pulse continuity detector to generate a continuous pulse signal and prevent the pulse signal from being interrupted, and wherein the PWM device generates a clock signal and a PWM signal, and wherein the pulse continuity detector receives the clock signal and the PWM signal and generates an output signal according to whether the PWM signal is a high-level signal or a low-level signal.

According to the present invention, the circuit for generating a continuous pulse signal comprises: a PWM device and a pulse continuity detector coupled to the PWM device. The PWM device generates a clock signal and a PWM signal. The pulse continuity detector further comprises: a positive pilot signal generator, a negative pilot signal generator and a multiplexer. The positive pilot signal generator receives the clock signal and the PWM signal and outputs a positive pilot signal. The negative pilot signal generator receives the clock signal and the PWM signal and outputs a negative pilot signal. The multiplexer is coupled to the PWM device, the positive pilot signal generator and the negative pilot signal generator to receive the PWM signal, the positive pilot signal and the negative pilot signal. The multiplexer outputs the positive pilot signal or the negative pilot signal according to the PWM signal.

When the PWM signal is a high-level signal, the multiplexer outputs the negative pilot signal. When the PWM signal is a low-level signal, the multiplexer outputs the positive pilot signal.

According to the present invention, the method for generating a continuous pulse signal comprises: providing a PWM signal and a clock signal; generating a positive pilot signal and a negative pilot signal according to the PWM signal and the clock signal; and outputting the positive pilot signal or the negative pilot signal according to whether the PWM signal is a high-level signal or a low-level signal.

When the PWM signal is a high-level signal, the multiplexer outputs the negative pilot signal. When the PWM signal is a low-level signal, the multiplexer outputs the positive pilot signal.

Since the specification of the present invention is to demonstrate the present invention and make the present invention easily understood, any modification or variation according to the spirit of the present invention is obvious for the persons skilled in the art and should be included within the scope of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram schematically showing the circuit of a conventional PWM device;

FIG. 2 is a diagram schematically showing the rectangular waveform generated by the comparator and the triangular waveform generated by the ramp signal generator in a conventional PWM device;

FIG. 3A to FIG. 3C are diagram schematically showing that a comparator receives a ramp signal and different input signals S_in and then outputs different PWM signals in a conventional PWM device;

FIG. 4 is a diagram schematically showing a circuit for generating a continuous pulse signal according to the present invention;

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