Semiconductor device and manufacturing method thereof

This application is a divisional application of U.S. application Ser. No. 11/133,266 filed on May 20, 2005 which was a continuation of international application PCT/JP03/05223 filed on Apr. 24, 2003, the entire contents of which are incorporated herein by reference.

The present invention relates to a semiconductor device enhanced in endurance against permeation of hydrogen and water from outside and a manufacturing method thereof.

A wiring rule in a ferroelectric memory (FeRAM) is 0.35 μm recently, and in formation of an interlayer insulation film, a plasma CVD method is mainly adopted.

In order to prevent hydrogen diffusion into a ferroelectric capacitor, an alumina film directly covering the ferroelectric capacitor is formed as a hydrogen diffusion prevention film in a ferroelectric memory.

However, miniaturization is also highly demanded of a ferroelectric memory recently, and with miniaturization, the specifications of the ferroelectric capacitor and wiring become rigid. Meanwhile, coverage of an alumina film is comparatively low. For the above reasons, it cannot be said that protection of the ferroelectric capacitor is sufficient, and deterioration of the ferroelectric capacitor becomes a problem.

Concerning an interlayer insulation film, a gap is sometimes generated in the interlayer insulation film between a ferroelectric capacitor and wiring or the like when a multilayered wiring structure is formed. Therefore, high reliability is difficult to obtain.

Further, high moisture endurance is the characteristic which is required in not only a ferroelectric memory but also most semiconductor devices.

Therefore, in a multilayered wiring structure, the one provided with an SiN film between two wiring layers is also proposed. However, such a structure does not have sufficient moisture resistance.

Patent document 1

Japanese Patent Application Laid-open No. 2001-36026

Patent document 2

Japanese Patent Application Laid-open No. 2001-15703

An object of the present invention is to provide a semiconductor device which can suppress deterioration of a semiconductor element such as a ferroelectric capacitor, and a manufacturing method thereof.

In a first semiconductor device according to the present invention, a semiconductor substrate, a ferroelectric capacitor formed above the semiconductor substrate, and an insulation film directly covering the ferroelectric capacitor and having an inclination of its surface more gradual than an inclination of a surface of the ferroelectric capacitor are provided. A hydrogen diffusion prevention film preventing diffusion of hydrogen to the ferroelectric capacitor is formed on the insulation film.

In a second semiconductor device according to the present invention, a semiconductor substrate, a semiconductor element formed on the semiconductor substrate, a pad formed above the semiconductor substrate and connected to the semiconductor element, and one wiring layer, or two or more wiring layers formed between the semiconductor element and the pad are provided. A water permeation prevention film preventing permeation of water to a lower layer side is formed between an uppermost wiring layer located at an uppermost position of the one wiring layer or two or more wiring layers and the pad.

In a first manufacturing method of a semiconductor device according to the present invention, after a ferroelectric capacitor is formed above a semiconductor substrate, an insulation film directly covering the ferroelectric capacitor and having an inclination of its surface more gradual than an inclination of a surface of the ferroelectric capacitor is formed. A hydrogen diffusion prevention film preventing diffusion of hydrogen to the ferroelectric capacitor is formed on the insulation film.

In a second manufacturing method of a semiconductor device according to the present invention, after a semiconductor element is formed on a semiconductor substrate, one wiring layer, or two or more wiring layers is or are formed above the semiconductor element. Next, a water permeation prevention film preventing permeation of water to a lower layer side is formed above an uppermost wiring layer located at an uppermost position of the one wiring layer or two or more wiring layers. A pad connected to the semiconductor element is formed above the water permeation prevention film.