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06/18/09 - USPTO Class 716 | 1 views | #20090158227 | Prev - Next | About this Page

Method and system for calculating high frequency limit capacitance and inductance for coplanar on-chip structure

Title: Method and system for calculating high frequency limit capacitance and inductance for coplanar on-chip structure

Brief Patent Description - Full Patent Description - Patent Claims

The Patent Description & Claims data below is from USPTO Patent Application 20090158227, Method and system for calculating high frequency limit capacitance and inductance for coplanar on-chip structure.

Brief Patent Description - Full Patent Description - Patent Claims

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Patent Applications in related categories:

20090282375 - Circuit and method using distributed phase change elements for across-chip temperature profiling - Disclosed is an across-chip temperature sensing circuit and an associated method that can be used to profile the across-chip temperature gradient. The embodiments incorporate a plurality of phase change elements distributed approximately evenly across the semiconductor chip. These phase change elements are programmed to have essentially the same amorphous resistance. ...

20090282375 - Circuit and method using distributed phase change elements for across-chip temperature profiling - Disclosed is an across-chip temperature sensing circuit and an associated method that can be used to profile the across-chip temperature gradient. The embodiments incorporate a plurality of phase change elements distributed approximately evenly across the semiconductor chip. These phase change elements are programmed to have essentially the same amorphous resistance. ...

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