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Coupling wire to semiconductor regionCoupling wire to semiconductor region description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20090152702, Coupling wire to semiconductor region. Brief Patent Description - Full Patent Description - Patent Application Claims
This application is related to the following United States patent applications which are filed on even date herewith and which are incorporated herein by reference: Ser. No. 10/______ (Attorney Docket No.: 200315557-1/196843) entitled SYSTEMS AND METHODS FOR RECTIFYING AND DETECTING SIGNALS; Ser. No. 10/______ (Attorney Docket No.: 200315559-1/196845) entitled SYSTEMS AND METHODS FOR ELECTRICALLY COUPLING WIRES AND CONDUCTORS; and Ser. No. 10/______ (Attorney Docket No.: 200406357-1/200272) entitled METHODS AND SYSTEMS FOR ALIGNING AND COUPLING DEVICES. Integrated circuits have dominated the electronics industry for many years. Some applications require the use of multiple integrated circuits in combination. Signals between these multiple integrated circuits are connected in order for them to perform their intended function. Wire bonding is one method for connecting signals between integrated circuits. Each integrated circuit may include a wire bonding pad. An electrical interconnection between the integrated circuits is made by connecting a thin wire between the wire bonding pads. As the size of integrated circuits decreases, the space used for wire bonding techniques, such as for the bonding pads and the fan-out structures to bring signals to the bonding pads, becomes a larger proportion of entire integrated circuit surface. The following presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not an extensive overview of the invention. It is intended to neither identify key or critical elements of the invention nor delineate the scope of the invention. Its sole purpose is to present some general concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later. In one embodiment, the invention encompasses a system having a first device and a second device. The first device has a surface and includes a micrometer-scale or smaller geometry doped semiconductor region extending along the surface. The second device has a surface opposite the surface of the first device and includes a micrometer-scale or smaller wire extending through the second device to a position in proximity to the surface of the second device. The first and second devices are displaceable between first and second positions relative to each other. The wire is not substantially electrically coupled to the doped semiconductor region in the first position and the wire is substantially electrically coupled to the doped semiconductor region in the second position. A potential applied to the wire affects the conductivity of the doped semiconductor region in the second position. In another embodiment, the invention encompasses a system including a first device and a plurality of wire devices. The first device has a surface and includes a plurality of micrometer-scale or smaller geometry doped semiconductor regions extending along the surface of the first device. The wire devices each have a surface opposite the surface of the first device and each include a micrometer-scale or smaller wire extending through the respective wire device to at least one position in proximity to the surface of the respective wire device. Each of the wire devices is displaceable between respective first and second positions relative to the first device and its respective wire is substantially electrically coupled to a respective group of the plurality of doped semiconductor regions in the second position and is not substantially electrically coupled to the respective group of doped semiconductor regions in the first position. A potential applied to the wire of one of the plurality of wire devices affects the conductivity of its respective group of the plurality of doped semiconductor regions in the second position. In another embodiment, the invention encompasses a method for substantially electrically coupling a micrometer-scale or smaller geometry doped semiconductor region to a micrometer-scale or smaller geometry wire. A first device has a surface and includes the doped semiconductor region extending along its surface. A second device has a surface opposite the surface of the first device and includes the wire extending through the second device to a position in proximity to the surface of the second device. One of the first and second devices is displaced relative to the other device. A signal is received from a sensor, the signal indicating the relative position of the wire and the doped semiconductor region. The alignment of the first and second wires is determined in response to the signal. In yet another embodiment, the invention encompasses a method for substantially electrically coupling a micrometer-scale or smaller geometry wire to a micrometer-scale or smaller geometry doped semiconductor region. A first device has a surface and includes the plurality of doped semiconductor regions extending along its surface. A second device has a surface opposite the surface of the first device and includes the wire extending through the second device to a position in proximity to the surface of the second device. A signal identifying one of the doped semiconductor regions is received. Position information corresponding to the identified doped semiconductor region is read from memory. One of the first and second devices is displaced in response to the position information. In another embodiment, the invention comprises a method of substantially electrically coupling a micrometer-scale or smaller geometry wire to one of a plurality of micrometer-scale or smaller geometry doped semiconductor regions. A first device has a surface and includes the plurality of doped semiconductor regions extending along its surface. A second device has a surface opposite the surface of the first device and includes the wire extending through the second device to a position in proximity to the surface of the second device comprising. A signal identifying one of the doped semiconductor regions is received. Position information is read from memory, the position information corresponding to the identified doped semiconductor region. One of the first and second devices is displaced in response to the position information. In another embodiment, the invention comprises a system having a first device and a second device. The first device has a micrometer-scale or smaller geometry doped semiconductor region. The second device has a micrometer-scale or smaller geometry signal conductor. An actuator displaces the first and second devices relative to each other between first and second positions such that the doped semiconductor region is substantially conductive in the first position and not in the second position. In another embodiment, the invention comprises a system having a first device including micrometer-scale or smaller geometry doped semiconductor region. A second device includes a micrometer-scale or smaller geometry first means for activating and deactivating the doped semiconductor region. A second means displaces the first and second devices relative to each other between first and second positions such that the doped semiconductor is activated in the first position and deactivated in the second position. In another embodiment, the invention comprises a method of activating one of a plurality of micrometer-scale or smaller geometry doped semiconductor regions along a surface of a first device. A command signal is received, the command signal identifying the one of the plurality of doped semiconductor regions. A control signal is generated in response to the command signal. A second device is actuated relative to the first device in response to the control signal to align a conductor on the second device with the identified doped semiconductor region. Continue reading about Coupling wire to semiconductor region... Full patent description for Coupling wire to semiconductor region Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Coupling wire to semiconductor region patent application. Patent Applications in related categories: 20090278247 - Bonding pad sharing method applied to multi-chip module and apparatus thereof - A multi-chip module (MCM) includes a first die and a second die. The first die supports a plurality of predetermined functions. The second die is coupled to the first die and comprises at least an option pad configured for a bonding option. The first die performs a predetermined function according ... 20090278247 - Bonding pad sharing method applied to multi-chip module and apparatus thereof - A multi-chip module (MCM) includes a first die and a second die. The first die supports a plurality of predetermined functions. The second die is coupled to the first die and comprises at least an option pad configured for a bonding option. The first die performs a predetermined function according ... 20090278246 - Semiconductor device - A plurality of LSI chips (1) are stacked on an interposer (2). Signal coils (1b) for signal transmission are formed on the circuit formation surfaces of LSI chips (1) that are formed using silicon substrates (1a). The signal coils (1b) connect to circuits formed in the LAI chips (1). Through-holes ... 20090278246 - Semiconductor device - A plurality of LSI chips (1) are stacked on an interposer (2). Signal coils (1b) for signal transmission are formed on the circuit formation surfaces of LSI chips (1) that are formed using silicon substrates (1a). The signal coils (1b) connect to circuits formed in the LAI chips (1). Through-holes ... ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. 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