Resolution enhancement techniques combining four beam interference-assisted lithography with other photolithography techniques

This application is a nonprovisional, and claims the benefit, of U.S. Provisional Patent Application No. 60/969,230, filed Aug. 31, 2007, entitled “Resolution Enhancement Techniques For Interference-Assisted Lithography,” and U.S. Provisional Patent Application No. 60/969,280, filed Aug. 31, 2007, entitled “Integrated Interference-Assisted Lithography,” the entire disclosure of each of which is incorporated herein by reference for all purposes.

Optical resolution for lithography is determined by Rayleigh\'s equation. For the state of the art ArF lithography systems with air between the final lens element and the focal plane (or, wafer surface), the optical resolution is limited to 63 nm half pitch (HP) with a numerical aperture (NA) of 0.93 and K₁ factor at 0.3.

Immersion lithography has also been proposed. Immersion lithography techniques replace the usual air gap between the final lens and a wafer surface with a liquid medium that has a refractive index greater than one. In such systems, the resolution may be reduced by a factor equal to the refractive index of the liquid by allowing lenses with higher numerical aperture (N.A.). Current immersion lithography tools use highly purified water for the immersion liquid, and can achieve feature sizes below the Rayleigh limit of non-immersion systems. Immersion lithography, however, suffers from various manufacturing issues not present in dry systems, such as new classes of defects: water marks, drying stains, water leaching, wafer edge peeling, and air bubbles that restrict full scale manufacturing efforts. Current development focuses on various manufacturing techniques that avoid these negative effects. The optical resolution for water-immersion lithography with an NA of 1.35 and K₁ factor of 0.3 is limited to 42 nm HP, per Rayleigh\'s equation. Further research is being conducted to seek lens materials, immersion fluids and photoresists with higher index of refraction to further reduce the resolution limit. However, few breakthroughs have been reported making high index of refraction immersion an unlikely candidate as the technology of choice for the next generation lithography.

Currently, there are a number of lithography techniques under development that seek to provide optical resolution below the Rayleigh limit. For example, some have suggested employing a double patterning technique. Such a system may employ two exposures on two photoresist layers and two developing steps. There are technical challenges to employing a double patterning technique; for instance, the required tolerance of alignment for the two patterns is much tighter than is possible with current state-of-the-art exposure tools (called scanners). Second, the two independent exposures lead to two independent parameter distributions which complicates device and design variability significantly. Moreover, the process of depositing and developing two photoresists, which may also require additional imaging layers such as antireflection coatings or hard masks, as well as requiring two exposures compared to the single exposure needed in single patterning approaches, increases the operation use and thus the cost of expensive scanners and thin-film processing tools.

Others have suggested using extreme ultraviolet (EUV) lithography as another solution to providing optical resolution below Rayleigh\'s limit for 193 nm optical lithography. Systems currently under development use 13.5 nm wavelength light sources. Various basic problems must be resolved before EUV lithography can be implemented in any manufacturing scenario, the most serious being low source power, contamination of the optics, the handling of masks and many general manufacturing issues. These challenges have limited EUV lithography as a viable manufacturing solution to optical resolutions below the Rayleigh limit of 193 nm systems.

Some double patterning techniques have been provided. Such double patterning techniques require 2 masks, 2 develops, and 2 resist coats. Each extra step further adds complexity, increases costs and can add potential for error.

Accordingly, there remains a general need in the art for an optical lithography system that can provide optical resolution near or below the Rayleigh limit.

A method for exposing a wafer is provided according to one embodiment. The method exposes a first plurality of substantially parallel lines on the wafer using interference lithography during a first exposure. The first exposure provides a first dosage to the first plurality of substantially parallel lines. The method further exposes second portions of the wafer using a second lithographic technique during a second exposure. The second exposure provides a second dosage to the second portions of the wafer. In some embodiments the second portions of the wafer overlap at least part of the first portions of the wafer, wherein those portions of the wafer that overlap with the first portion and the second portion are exposed with the first and the second dosage.

In some embodiments, the second lithographic technique may include electron beam lithography, EUV lithography, interference lithography, and/or optical photolithography. In some embodiments, the second lithography technique comprises optical photolithography that provides a mask with at least one assist feature.

In various embodiments, methods may optimize the first dosage based on the second dosage, optimize the exposure rate of the first exposure based on the exposure rate of the second exposure, optimize the second exposure based on the first dosage, and/or optimize the exposure rate of the second exposure based on the exposure rate of the first exposure.

In some embodiments, the method may provide a photoresist on the wafer and develop the photoresist following both the first exposure and the second exposure.

In some other embodiments, the method may provide a first photoresist on a hardmask layer of the wafer; develop the first photoresist following the first exposure and before the second exposure; etch the hardmask layer to transfer the pattern provided during the first exposure into the hardmask layer; provide a second photoresist on the wafer prior to the second exposure; develop the second photoresist following the second exposure; and etch the hardmask layer to transfer the pattern provided during the second exposure into the hardmask layer.

In some other embodiments, the method may provide a first photoresist on a hardmask layer of the wafer; develop the first photoresist following the first exposure and before the second exposure; freeze the first photoresist layer so that the first photoresist will not be sensitive to the second exposure; provide a second photoresist on the wafer prior to the second exposure; develop the second photoresist following the second exposure; and etch the hardmask layer to transfer the pattern provided during the first exposure and the second exposure into the hardmask layer.

According to one embodiment the method may provide a negative photoresist. The second portions may include at least one line that is substantially perpendicular to the plurality of substantially parallel lines such that at least after the developing the at least one line joins two of the plurality of substantially parallel lines. According to another embodiment, the method may provide a positive photoresist. The second portions include at least one line that is substantially perpendicular to the plurality of substantially parallel lines, such that at least after the developing the at least one line divides at least one of the plurality of substantially parallel lines. According to another embodiment, the method may provide a positive photoresist on the wafer. The second portions may include at least one line that substantially overlaps a portion of the plurality of substantially parallel lines, such that at least after the developing the at least one line bulges at least one of the plurality of substantially parallel lines.

According to another embodiment, a positive photoresist is provided on the wafer. The second portions include at least one line that substantially overlaps a portion of the plurality of substantially parallel lines, such that at least after the developing the at least one line trims at least one of the plurality of substantially parallel lines. According to another embodiment, a positive photoresist is provided on the wafer. The second portions include at least one line that is substantially perpendicular to a portion of the plurality of substantially parallel lines, such that at least after the developing the at least one line adds a tab to at least one of the plurality of substantially parallel lines.

A system for exposing a wafer is provided according to another embodiment. The system includes a two-beam interference lithography interferometer and a lithographic scanner. The two-beam interference lithography interferometer may be configured to expose the wafer using interference lithography during a first exposure that provides a plurality of substantially parallel lines of a first exposure dose on the wafer. The lithographic scanner may be configured to expose the wafer during a second exposure that provides a second exposure dose on portions of the wafer. In some embodiments, the second scanner comprises an optical photolithography scanner that includes a mask with at least one assist feature. In other embodiments, the second scanner comprises an optical photolithography scanner that is configured to underexpose at least a portion the wafer.

In some embodiments, the interferometer is configured to underexpose at least a portion of the wafer. The system may further comprises a chamber housing the interferometer and the lithographic scanner. In other embodiments, the system includes a first and a second chamber, such that the interferometer is house in one and the lithographic scanner is housed in the other.

A photolithography system is also provided, according to one embodiment, that includes interference lithography means; lithography means; and post processing means. The interference lithography means may provide a plurality of substantially parallel lines of a first exposure dose on the wafer. The lithography means may provide a second exposure dose on portions of the wafer. The post processing means aids in developing portions of the wafer.