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Optical enhancement of integrated circuit photodetectors

Optical enhancement of integrated circuit photodetectors description/claims

With the advent of modern electronic scanners, digital cameras, and other products, light sensitive elements are becoming more and more common in these and other modern electronic systems. A semiconductor p-n junction diode is often used for the detection of light signals. When in use as a photodetector, the p-n junction is typically reverse biased. As such, light illuminating the p-n junction generates hole-electron pairs in the depletion region which are swept out of the depletion region in opposite directions. Depending upon the application, either a generated current due to electron-hole pair movement or a change in junction potential due to collapse of the depletion region is detected as the signal indicative of the incident light intensity.

A p-n junction diode intended for use as a photodetector is often referred to as a photodiode. Various physical mechanisms act to limit the ability of the photodiode and photodiode arrays to detect and specially resolve low levels of light. Important among these mechanisms are noise, surface reflectivity, leakage currents, and cross-talk. Noise may be due to random fluctuations in light signal intensity, thermal mechanisms, and other causes. Other characteristics of the photodiode, such as depth of the junction below the semiconductor surface and width of depletion region, also influence the sensitivity of the photodiode to the incident light.

Leakage currents in photodiodes are often referred to as the dark current of the device, i.e., the biased diode's current in the absence of any light. Leakage currents can be caused by surface and bulk defects in the semiconductor which give rise to mid-gap states sufficiently dense to provide leakage current paths across the device. These defects can be either native (generated during silicon wafer/epitaxial layer fabrication) or generated during the subsequent processing steps used in typical integrated circuit fabrication processes. One such processing step is the formation of a silicide layer on polysilicon and silicon surfaces. Silicide is a binary compound of silicon and a metal. Silicides can be formed by first depositing a metal on polysilicon or silicon and subsequently reacting the metal with the polysilicon or the silicon in a high temperature annealing process. Typically, this reaction is accompanied by a significant change in volume (before and after the reaction) for the metal and silicon. This results in a significant amount of stress on the remaining silicon which is usually accommodated by the creation of various defects in the silicon. As a result, it is necessary to block silicide formation in photodiode areas for high performance image sensors. This is typically accomplished by using a silicide block layer on top of silicon or polysilicon that prevents the chemical reaction between the metal and silicon. Another important reason for including a silicide block layer is that titanium silicide is light absorbing which would greatly impact the light collection of a photosensitive device should titanium be deposited over the photosensitive device as a part of the processing. Typically mixed signal CMOS processes and CMOS image sensor processes use a layer of silicon dioxide or silicon nitride as a silicide block layer.

In addition, depending upon the surface condition of the semiconductor, a significant fraction of the light signal may be reflected rather than absorbed, thereby reducing the sensitivity of the photodiode to low light levels. For applications wherein the anticipated light levels are low, it is important to have photosensitive devices capable of collecting as much of the incident light as possible while maintaining a low level of noise and leakage current.

In a representative embodiment, a semiconductor integrated circuit structure is disclosed. The semiconductor integrated circuit structure comprises a light sensitive device integral with a semiconductor substrate, a first dielectric layer disposed over the light sensitive device, and a second dielectric layer disposed over the first dielectric layer. The semiconductor substrate is silicon. Light is transmittable though the first dielectric layer and through the second dielectric layer. The first dielectric layer is fabricated from a silicide blocking material. The index of refraction of the first dielectric layer at a preselected light frequency is within twenty-five percent of the square root of the product of index of refraction of the semiconductor substrate and index of refraction of the second dielectric layer, and the thickness of the first dielectric layer is within twenty-five percent of length of a quarter wavelength of light at the preselected frequency in the first dielectric layer.

In another representative embodiment, a method for fabricating the semiconductor integrated circuit structure is disclosed. The method comprises creating a light sensitive device, disposing a first dielectric layer over the light sensitive device, and disposing second dielectric layer over the first dielectric layer. The semiconductor substrate is silicon. Light is transmittable though the first dielectric layer and through the second dielectric layer. The first dielectric layer is fabricated from a silicide blocking material. The index of refraction of the first dielectric layer at a preselected light frequency is within twenty-five percent of the square root of the product of index of refraction of the semiconductor substrate and index of refraction of the second dielectric layer, and the thickness of the first dielectric layer is within twenty-five percent of length of a quarter wavelength of light at the preselected frequency in the first dielectric layer.

In yet another representative embodiment, a semiconductor integrated circuit structure is disclosed. The semiconductor integrated circuit structure comprises a light sensitive device integral with a semiconductor substrate, a cover dielectric layer disposed over the light sensitive device, and a lens-formation dielectric layer disposed over the cover dielectric layer. Light is transmittable though the cover dielectric layer; and through the lens-formation dielectric layer. The lens-formation dielectric layer forms an embedded convex microlens. The microlens directs light onto the light sensitive device.

In still another representative embodiment, a method for fabricating a semiconductor integrated circuit structure is disclosed. The method comprises creating a light sensitive device integral with a semiconductor substrate, disposing a cover dielectric layer over the light sensitive device, and disposing a lens-formation dielectric layer over the cover dielectric layer. Light is transmittable though the cover dielectric layer and through the lens-formation dielectric layer. The lens-formation dielectric layer forms an embedded convex microlens. The microlens directs light onto the light sensitive device.

Other aspects and advantages of the representative embodiments presented herein will become apparent from the following detailed description, taken in conjunction with the accompanying drawings.

The accompanying drawings provide visual representations which will be used to more fully describe various representative embodiments and can be used by those skilled in the art to better understand them and their inherent advantages. In these drawings, like reference numerals identify corresponding elements.

FIG. 1 is a drawing of incident, reflected, and transmitted components of normally incident light at various surfaces of a semiconductor integrated circuit structure as described in various representative embodiments.

FIG. 2 is a flow chart of a method for creating a light sensitive, semiconductor integrated circuit structure as described in various representative embodiments.

FIG. 3 is a cross-sectional drawing of p-n junction photodiode in a semiconductor integrated circuit structure as described in various representative embodiments.

FIG. 4 is a cross-sectional drawing of the semiconductor integrated circuit structure as described in various representative embodiments.

FIG. 5 is another cross-sectional drawing of the semiconductor integrated circuit structure as described in various representative embodiments.

FIG. 6 is yet another cross-sectional drawing of the semiconductor integrated circuit structure as described in various representative embodiments.

FIG. 7 is a flow chart of another method for creating a light sensitive, semiconductor integrated circuit structure as described in various representative embodiments.

• Provisional Patent
• Utility Patent

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