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01/08/09 - USPTO Class 438 |  92 views | #20090011573 | Prev - Next | About this Page  438 rss/xml feed  monitor keywords

Carrier used for deposition of materials on a non-planar surface

USPTO Application #: 20090011573
Title: Carrier used for deposition of materials on a non-planar surface
Abstract: A carrier for effectuating semiconductor processing on a non-planar substrate is disclosed. The carrier is configured for holding at least one non-planar substrate throughout a semiconductor processing step and concurrently rotating non-planar substrates as they travel down a translational path of a processing chamber. As the non-planar substrates simultaneously rotate and translate down a processing chamber, the rotation exposes the whole or any desired portion of the surface area of the non-planar substrates to the deposition process, allowing for uniform deposition as desired. Alternatively, any predetermined pattern is able to be exposed on the surface of the non-planar substrates. Such a carrier effectuates manufacture of non-planar semiconductor devices, including, but not limited to, non-planar light emitting diodes, non-planar photovoltaic cells, and the like. (end of abstract)



Agent: Haverstock & Owens LLP - Sunnyvale, CA, US
Inventors: Dan Marohl, Timothy J. Franklin, Ratson Morad
USPTO Applicaton #: 20090011573 - Class: 438478 (USPTO)

Carrier used for deposition of materials on a non-planar surface description/claims


The Patent Description & Claims data below is from USPTO Patent Application 20090011573, Carrier used for deposition of materials on a non-planar surface.

Brief Patent Description - Full Patent Description - Patent Application Claims
  monitor keywords FIELD OF THE INVENTION

The present invention is related to semiconductor processing apparatus and techniques. Specifically, the present invention is directed to semiconductor processing on non-planar surfaces using both translational and rotational geometries.

BACKGROUND OF THE INVENTION

In many conventional semiconductor processing technologies, the specific processing steps are typically performed using planar motions. For example, most integrated circuits (ICs) are typically made with machinery using solely planar motion. This is due to the implicit structure of most conventional ICs, which are almost always planar in nature. Accordingly, the necessary depositions, doping, and scribing steps are almost always performed using planar motions with the device or the IC being moved in an x or y direction.

In this manner, semiconductor processing steps can be performed on an assembly line basis with the various devices and/or substrates being moved through the various pieces of semiconductor machinery. As described herein, such semiconductor processing steps can include deposition steps such as physical deposition, chemical deposition, reactive sputtering deposition, or molecular beam epitaxy deposition. All variants of the preceding deposition families should be considered as such semiconductor processing steps.

It should be understood that the semiconductor techniques described are all well known and performed on a common basis with regards to semiconductor devices having planar features. Accordingly, the various layers that are created on the planar substrate and/or IC can be done easily and cheaply, but only if the corresponding semiconductor device is planar in nature.

Accordingly, in current practice, semiconductor manufacturing techniques and/or processing steps, such as deposition, evaporation, and scribing, although well known, are typically limited to operating on these substantially planar substrates. For example, FIG. 1A shows an exemplary prior art sputter deposition chamber 10. Sputter deposition is a method of depositing thin films onto a substrate 11 by sputtering a block of source material 12 onto the substrate 11. Sputter deposition typically takes place in a vacuum. Sputtered atoms ejected into the gas phase are not in their thermodynamic equilibrium state, and tend to deposit on all surfaces in the vacuum chamber. A substrate (such as a wafer) placed in the chamber will be coated with a thin film of the source material 12. Sputtering typically takes place with argon plasma, or another inert gas in a plasma state, as well as the target material (i.e., a semiconductive material, a metallic material, or a buffer material).

Evaporation deposition is another common method of thin film deposition as shown in FIG. 1B. The source material 12 is exposed to a high temperature such that the material is evaporated in a vacuum. The vacuum allows vapor particles to travel directly to the target substrate, where they condense back to a solid state.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

FIG. 1A shows a prior art sputter chamber for deposition of materials on a substantially planar semiconductor substrate.

FIG. 1B shows a prior art evaporation deposition chamber.

FIG. 2 shows an example of non-planar substrates per the instant disclosure.

FIG. 3A shows an example of non-planar substrates being loaded into a processing chamber per the instant disclosure.

FIG. 3B shows an exemplary means for rotation per the instant disclosure.

FIG. 3C shows an exemplary means for rotation per the instant disclosure.

FIG. 3D shows a close up of the exemplary embodiment of FIG. 3C.

FIG. 3E shows a further close up of the exemplary embodiment of FIGS. 3C and 3D.

FIG. 3F shows a further exemplary means for rotation per the instant disclosure.

FIG. 4 shows an exemplary cross section of a processing chamber with the non-planar substrates rotating down a translational path.

FIG. 5A shows an exemplary combination of rotation and translation of the non-planar substrates.



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