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Methods of creating molds of variable solder volumes for flip attachMethods of creating molds of variable solder volumes for flip attach description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20090001248, Methods of creating molds of variable solder volumes for flip attach. Brief Patent Description - Full Patent Description - Patent Application Claims This application is a continuation of U.S. patent application Ser. No. 11/769,389, filed Jun. 27, 2007, the contents of which are herein incorporated by reference in its entirety. BACKGROUND OF THE INVENTION1. Technical Field The present disclosure relates to flip attach and, more specifically, to methods of creating molds of variable solder volumes for flip attach. 2. Discussion of the Related Art In the process of manufacturing electronic equipment, semiconductor devices, such as integrated circuits (ICs) are often encased in a protective package and mounted onto a printed circuit board (PCB) or other electronic device. Conventionally, semiconductor devices may be mounted onto a PCB using a series of thin wire interconnects. However, as semiconductor devices become smaller and more complex, the wire interconnects must become thinner and closer together. Many modern semiconductor devices are so small and complex that wire interconnects are no longer practical. Accordingly, other methods for chip mounting have been developed. Flip chip mounting methods are used to mount a semiconductor device without the need for wire connections. In flip chip mounting, bumps of solder are formed on the chip's connection pads during wafer processing. The chip may then be inverted such that the solder bumps directly contact the PCB or other associated external circuitry. Then, in a process called controlled collapse chip connection (C4), the solder bumps are reflowed and electrical connection is achieved. Electrically-insulating adhesive may then be used to underfill the space between the chip and the PCB to provide a stronger mechanical connection. Solder may be applied to a semiconductor chip to form interconnects. Methods for applying the solder bumps to the chip have been developed. For example, solder may be applied by evaporation through a shadow mask, electroplated into a Riston opening, or screen printing. Other approaches include injection molded solder (IMS) and direct solder ball attach. For example, the surface of the wafer may be screened with solder paste before the chip die is cut. However, the solder paste, which generally includes flux and solder alloy particles, may lack a consistent and uniform composition, especially as the size of the solder bumps decreases to accommodate smaller chips. Particular care may be given to provide for a highly uniform and consistent solder paste, however, such care generally comes at a high cost. Moreover, another problem with using solder paste screening techniques in modern high density devices is the reduced pitch between bumps. Since there is a large reduction in volume from a screened paste to the resulting solder bump, the screen holes must be significantly larger in diameter than the final bumps. Thus stringent dimensional control of the bumps makes the solder paste screening technique impractical for applications in high density devices. More recently developed injection molded solder (IMS) techniques attempt to solve these problems by dispensing molten solder instead of solder paste. According to these methods, a transfer mold having an array of cavities is filled with injected solder. The mold is then disposed over a semiconductor chip or chip packaging substrate such that the filled cavities align with the points of electrical contact on the chip. A combination of heat and gas pressure is applied to transfer the solder pattern onto the chip. Methods for IMS are described in U.S. Pat. Nos. 5,244,143; 6,056,191; and 6,105,852, the disclosures of which are hereby incorporated by reference in their entirety. Transfer molds are generally made of glass or polymeric substrates. A masking material may then be deposited on the mold and a pattern of holes may be formed on the mask. The layout of the patterned holes is determined by the footprint of the chip that is to receive the solder bumps. The mask is then etched to form the cavities and the mask is then removed. Because most etch processes are isotropic and have a constant etch rate in all directions, the diameter of the holes in the mask and the spacing between the holes in the mask determine the diameter, pitch and etch depth of the cavities that are formed during etching. SUMMARYA method for fabricating a solder transfer mold includes masking a substrate with a masking agent. A pattern is transferred to the substrate mask. The masked substrate is etched until cavities of a first volume are formed. The cavities of the first volume are selectively coated. The masked substrate is etched until cavities of a second volume are formed. A method for fabricating a solder transfer mold includes covering a substrate having anisotropic etching properties with a masking layer. The masking layer is patterned to create a plurality of openings of at least two different sizes. The substrate is etched through the patterned mask to generate a plurality of cavities of at least two different volumes. A solder mold includes a substrate. The substrate includes a plurality of cavities for holding solder to be transferred to an integrated circuit. The plurality of cavities includes cavities of at least two different volumes. A method for applying solder bumps directly to an integrated circuit includes filling a plurality of cavities within a solder mold with solder. The solder mold is placed in proximity with the integrated circuit. The solder is transferred from the pluralities of the cavities to the integrated circuit. The solder mold includes a substrate and the plurality of cavities and the plurality of cavities include cavities of at least two different volumes. A method for fabricating a solder transfer mold having solder cavities of multiple different volumes includes placing multiple alternating layers of a first protective material and a second protective material on a substrate. The following etch steps are repeated: a first protective material etch is performed, a second protective material etch is performed, and a substrate etch is performed. The number of alternating layer pairs is equal to the number of etch step repetitions and is equal to the number of different volumes. A method for generating a solder mold includes etching a first set of cavities of a first volume in a solder mold substrate. The first set of cavities continue to be etched while etching a second set of cavities of a second volume. The second volume is smaller than the first volume. Continue reading about Methods of creating molds of variable solder volumes for flip attach... Full patent description for Methods of creating molds of variable solder volumes for flip attach Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Methods of creating molds of variable solder volumes for flip attach patent application. ### 1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. Start now! - Receive info on patent apps like Methods of creating molds of variable solder volumes for flip attach or other areas of interest. ### Previous Patent Application: Concrete form for pouring non-round columns, and method of making same Next Patent Application: Rotational molding process and product using separation sheet Industry Class: Static molds ### FreshPatents.com Support Thank you for viewing the Methods of creating molds of variable solder volumes for flip attach patent info. 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